diff --git a/CONFIG.md b/CONFIG.md index e74d85bb..cd3ba26a 100644 --- a/CONFIG.md +++ b/CONFIG.md @@ -289,6 +289,12 @@ On the most widespread CPUs the D flag is not cleared upon entering interrupts. Feature needs 2 bytes in KERNAL segmment (for CPUs needing the patch), but at the same time allows optimizations allowing to gain some more bytes. If unsure - enable. +### `ARNITECH_CONTROLLER` + +For the mc64 computers of arnitech only, whose expansion port holds the Arnitech controller at `$DE80`. IOINIT puts CIA #1's TOD on 50 Hz and, if the controller's signature `"ARNI"` is at `$DE80`, sets the TOD from the controller's clock. The Arnitech jump table at `$FF00` (`src/kernal/arnitech/ff00.arnitech_jumptable.s`) wraps the controller's registers. + +Feature needs about 120 bytes in KERNAL segment, and the page at `$FF00`. Disable on any other machine. + ## Eye candy ### `COLORS_BRAND` diff --git a/Makefile b/Makefile index 343b39a4..477724c6 100644 --- a/Makefile +++ b/Makefile @@ -45,6 +45,7 @@ SRCDIR_KERNAL = $(SRCDIR_COMMON) \ src/kernal \ src/kernal/,stubs \ src/kernal/assets \ + src/kernal/arnitech \ src/kernal/board_crt \ src/kernal/board_m65 \ src/kernal/board_u64 \ diff --git a/src/,,config_mc64.s b/src/,,config_mc64.s index 867a4d03..82d23fc8 100644 --- a/src/,,config_mc64.s +++ b/src/,,config_mc64.s @@ -10,6 +10,8 @@ ; Same as the 'c64' configuration, except: ; - the banner names mc64 ; - BCD_SAFE_INTERRUPTS is off, for IRQ entry timing closer to the original +; - ARNITECH_CONTROLLER: IOINIT sets CIA1's TOD on 50 Hz and from the Arnitech controller's clock, +; and the Arnitech jump table is at $FF00 (src/kernal/arnitech) @@ -103,6 +105,7 @@ ;; #CONFIG# TAPE_WEDGE NO ;; #CONFIG# TAPE_HEAD_ALIGN NO ;; #CONFIG# BCD_SAFE_INTERRUPTS NO +;; #CONFIG# ARNITECH_CONTROLLER YES ; --- BASIC features diff --git a/src/aliases/,aliases_hardware_arnitech.s b/src/aliases/,aliases_hardware_arnitech.s new file mode 100644 index 00000000..ef5f1366 --- /dev/null +++ b/src/aliases/,aliases_hardware_arnitech.s @@ -0,0 +1,26 @@ + +; +; Names of the Arnitech controller's registers, on the expansion port's I/O1 (mc64 only) +; +; See arnitech's ADR 0023, "The Arnitech controller answers $DE80-$DE9F, and six Card windows +; follow it" (https://git.susdog.de/chris/arnitech, docs/adr/0023-arnitech-controller-register-map.md) +; + + +!ifdef CONFIG_ARNITECH_CONTROLLER { + + !addr ARNITECH_SIGNATURE = $DE80 ; "ARNI", 4 bytes + !addr ARNITECH_VERSION = $DE84 + !addr ARNITECH_SLOT_COUNT = $DE85 ; Card slots in this Case + !addr ARNITECH_IRQ_STATUS = $DE86 + !addr ARNITECH_IRQ_MASK = $DE87 + !addr ARNITECH_SLOT_TABLE = $DE88 ; the type of the Card in slots 0-5, $00 for none + + !addr ARNITECH_CLOCK_LATCH = $DE90 ; a read copies the clock into $DE91-$DE9E + !addr ARNITECH_CLOCK_TEN = $DE91 ; real time as CIA1's TOD reads it: tenths, + !addr ARNITECH_CLOCK_SEC = $DE92 ; seconds, + !addr ARNITECH_CLOCK_MIN = $DE93 ; minutes, + !addr ARNITECH_CLOCK_HRS = $DE94 ; hours, BCD 1-12, bit 7 PM + + !addr ARNITECH_CARD_WINDOW = $DEA0 ; slot n's Card window at $DEA0 + 16 * n +} diff --git a/src/kernal/arnitech/arnitech_controller.s b/src/kernal/arnitech/arnitech_controller.s new file mode 100644 index 00000000..a69e31ae --- /dev/null +++ b/src/kernal/arnitech/arnitech_controller.s @@ -0,0 +1,64 @@ +;; #LAYOUT# STD * #TAKE +;; #LAYOUT# * * #IGNORE + +; +; The Arnitech controller (mc64 only, arnitech's ADR 0023): its signature and its Slot table +; + +!ifdef CONFIG_ARNITECH_CONTROLLER { + +; +; Whether the controller answers: its signature "ARNI" at $DE80, compared with the jump table's. +; Out: carry clear if it does, carry set if not. A and X are not kept, Y is. +; + +arnitech_check_signature: + + ldx #$03 +@1: + lda ARNITECH_SIGNATURE, x + cmp arnitech_jumptable, x + bne @2 + dex + bpl @1 + + clc + rts +@2: + sec + rts + +; +; ARNI_FINDCARD, $FF06: see ff00.arnitech_jumptable.s +; + +arnitech_find_card: + + pha + jsr arnitech_check_signature + pla + bcs @2 ; no controller + + ldx #$00 +@1: + cpx ARNITECH_SLOT_COUNT + bcs @2 ; past the last slot, carry set + cmp ARNITECH_SLOT_TABLE, x + beq @3 + inx + bne @1 ; always taken +@2: + rts +@3: + txa + pha + asl + asl + asl + asl ; 16 * slot + clc + adc #