more aliases cleanup

c64/basic/fac1_mul.s

@@ -3,13 +3,13 @@
 // Implement by shifting MAC left one bit,
 // and then keeping that value to add on after
 // shifting two more bits left.
-// This should be done using basic_fac1_overflow to
+// This should be done using BITS to
 // hold the overflow bits, so that the result can
 // be exponent adjusted after, if required.
 
 fac1_mul10:
 	lda #$00
-	sta basic_fac1_overflow
+	sta BITS
 
 	// Multiply mantissa by 2
 	jsr fac1_mantissa_mul2
@@ -20,7 +20,7 @@ fac1_mul10:
 	// the overflow bits, and the copy is as small as possible)
 	ldx #7
 f1m10_l1:	
-	lda basic_fac1_mantissa,x
+	lda FAC1_mantissa,x
 	sta basic_numeric_work_area,x
 	dex
 	bpl f1m10_l1
@@ -33,21 +33,21 @@ f1m10_l1:
 	ldy #3
 	ldx #0
 	clc
-f1m10_l2:	
-	lda basic_fac1_mantissa,x
+f1m10_l2:
+	lda FAC1_mantissa,x
 	adc basic_numeric_work_area,x
-	sta basic_fac1_mantissa,x
+	sta FAC1_mantissa,x
 	inx
 	dey
 	bpl f1m10_l2
-	lda basic_fac1_overflow
+	lda BITS
 	adc basic_numeric_work_area+7
-	sta basic_fac1_overflow
+	sta BITS
 
 	// Now shift right and increase exponent until overflow
 	// bits = $00
 f1m10_l3:
-	lda basic_fac1_overflow
+	lda BITS
 	bne !+
 	// All done, return
 	clc
@@ -55,8 +55,8 @@ f1m10_l3:
 !:
 	// Divide mantissa by two, and increment exponent
 	jsr fac1_mantissa_div2
-	inc basic_fac1_exponent
-	lda basic_fac1_exponent
+	inc FAC1_exponent
+	lda FAC1_exponent
 	bpl f1m10_l3
 	// Exponent has bit 7 set, so has wrapped.
 	// = OVERFLOW ERROR
@@ -68,30 +68,30 @@ fac1_mantissa_mul2:
 	clc
 f1m1_l1:
 	// Multiply mantissa by 2, and store overflow
-	// in basic_fac1_bits
-	lda basic_fac1_mantissa,x
+	// in FAC1_bits
+	lda FAC1_mantissa,x
 	rol
-	sta basic_fac1_mantissa,x
+	sta FAC1_mantissa,x
 	inx
 	dey
 	bpl f1m1_l1
-	lda basic_fac1_overflow
+	lda BITS
 	rol
-	sta basic_fac1_overflow
+	sta BITS
 
 	rts
 
 fac1_mantissa_div2:
 	// Divide mantissa by 2, including using overflow bits
 	clc
-	lda basic_fac1_overflow
+	lda BITS
 	ror
-	sta basic_fac1_overflow
+	sta BITS
 	ldy #3
 f1md2_l1:
-	lda basic_fac1_mantissa,y
+	lda FAC1_mantissa,y
 	ror
-	sta basic_fac1_mantissa,y
+	sta FAC1_mantissa,y
 	dey
 	bpl f1md2_l1
 	rts