LOAD can now do verify on standard memory model

This commit is contained in:
FeralChild64 committed 2019-10-30 21:56:14 +01:00
1 parent 1065930539
commit 1682587d12
2 files changed
+33 -5

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+2 -2
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@@ -132,8 +132,8 @@ NOTE: Even the 'DONE' routines won't support features described as missing in on
| `$FFCF` | `$F157` | `CHRIN` | PARTIAL | no screen support, keyboard does not preserve .Y | | `$FFCF` | `$F157` | `CHRIN` | PARTIAL | no screen support, keyboard does not preserve .Y |
| `$FFD2` | `$F1CA` | `CHROUT` | DONE | | | `$FFD2` | `$F1CA` | `CHROUT` | DONE | |
| `$FFD5` | `$F49E` | `LOAD` | DONE | | | `$FFD5` | `$F49E` | `LOAD` | DONE | |
| `($0330)` | `$F4A5` | `LOAD` | PARTIAL | no VERIFY support | | `($0330)` | `$F4A5` | `LOAD` | PARTIAL | no VERIFY support for memory model 60k |
| `$FFD8` | `$F5DD` | `SAVE` | DONE | only this preparation routine part is done | | `$FFD8` | `$F5DD` | `SAVE` | DONE | main routine not done yet |
| `($0332)` | `$F5ED` | `SAVE` | NOT DONE | | | `($0332)` | `$F5ED` | `SAVE` | NOT DONE | |
| `$FFDB` | | `SETTIM` | DONE | | | `$FFDB` | | `SETTIM` | DONE | |
| `$FFDE` | | `RDTIM` | DONE | | | `$FFDE` | | `RDTIM` | DONE | |
+31 -3
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@@ -33,19 +33,19 @@ lvs_send_file_name_done:
lvs_handle_byte_load_verify: lvs_handle_byte_load_verify:
// XXX add VERIFY support ldy VERCKK
bne lvs_handle_byte_verify
// Save it and advance pointer.
// As with our BASIC, we want to enable LOADing // As with our BASIC, we want to enable LOADing
// anywhere in memory, including over the IO space. // anywhere in memory, including over the IO space.
// Thus we have to use a helper routine in low memory // Thus we have to use a helper routine in low memory
// to do the memory access // to do the memory access
#if CONFIG_MEMORY_MODEL_60K #if CONFIG_MEMORY_MODEL_60K
// Save byte under ROMs and IO if required // Save byte under ROMs and IO if required
php php
sei sei
// XXX behavior should depend on address
ldx #$33 ldx #$33
stx $01 stx $01
ldy #0 ldy #0
@@ -53,14 +53,42 @@ lvs_handle_byte_load_verify:
ldx #$37 ldx #$37
stx $01 stx $01
plp plp
#else #else
ldy #0 ldy #0
sta (STAL),y sta (STAL),y
#endif #endif
// FALLTROUGH
lvs_handle_byte_load_verify_end:
clc
rts rts
lvs_handle_byte_verify:
#if CONFIG_MEMORY_MODEL_60K
// XXX implement this part
#else
ldy #0
cmp (STAL),y
beq lvs_handle_byte_load_verify_end
#endif
sec
rts
lvs_advance_pointer: lvs_advance_pointer:
// Advance pointer // Advance pointer
inc STAL inc STAL
beq !+ beq !+