more work on IEC - finished tx part rework
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@@ -1,14 +1,26 @@
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# Intermediate compilation files
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c64/basic/combined.s
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c64/basic/combined.s
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c64/kernal/combined.s
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c64/kernal/combined.s
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temp.s
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temp.s
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temp.map
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temp.map
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newbasic
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newkern
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newrom
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src/compress_text
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src/compress_text
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src/pngprepare
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src/preprocess
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src/preprocess
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ophis.bin
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ophis.bin
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c64/basic/OUT.BIN
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c64/basic/OUT.BIN
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c64/kernal/OUT.BIN
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c64/kernal/OUT.BIN
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*project
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# Compilation output
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chargen
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newbasic
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newkern
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newrom
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# Various IDE project files, temporary files, etc.
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*project
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.*swp
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@@ -0,0 +1,7 @@
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iec_release_atn_clk_data:
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lda CI2PRA
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and #$FF - BIT_CI2PRA_ATN_OUT - BIT_CI2PRA_CLK_OUT - BIT_CI2PRA_DAT_OUT ; release
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sta CI2PRA
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rts
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@@ -5,6 +5,17 @@ iec_tx_byte:
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pha
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pha
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;; XXX to be filled-in
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;; Notify all devices that we are going to send a byte
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;; and it is going to be a data byte (released ATN)
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jsr iec_release_atn_clk_data
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;; Common part of iec_txbyte and iec_tx_common - waits for devices
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;; and transmits a byte
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pla
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jsr iec_tx_common
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;; All done
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clc
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rts
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rts
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@@ -29,68 +29,17 @@ iec_tx_command:
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;; At least one device responded, but they are still allowed to stall
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;; At least one device responded, but they are still allowed to stall
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;; (can be busy processing something), we have to wait till they are all
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;; (can be busy processing something), we have to wait till they are all
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;; ready (or bored with DOS attack...)
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;; ready (or bored with DOS attack...)
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;; - release back CLK, keep DATA released
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;; Release back CLK, keep DATA released - to ask devices for status.
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;; - afterwards wait till all devices also release DATA
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jsr iec_release_clk_data
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jsr iec_release_clk_data
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jsr iec_wait_for_data_release
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;; Pull CLK back to indicate that DATA is not valid, keep it for 60us
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;; Common part of iec_txbyte and iec_tx_common - waits for devices
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;; Don't wait too long, as 200us or more is considered EOI
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;; and transmits a byte
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jsr iec_pull_clk_release_data
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jsr iec_wait60us
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;; Now, we can start transmission of 8 bits of data
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ldx #7
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pla
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iec_tx_command_nextbit:
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;; Is next bit 0 or 1?
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lsr
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pha
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bcs +
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;; Bit is 0
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jsr iec_release_clk_pull_data
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jmp iec_tx_command_bitset
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*
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;; Bit is 1
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jsr iec_release_clk_data
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iec_tx_command_bitset:
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;; Wait 20us, so that device(s) can pick DATA
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jsr iec_wait20us
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;; Pull CLK for 20us again
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jsr iec_pull_clk_release_data
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jsr iec_wait20us
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;; More bits to send?
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pla
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pla
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dex
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jsr iec_tx_common
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bpl iec_tx_command_nextbit
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;; XXX the flow below is REALLY dangerous, as if there are multiple devices,
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;; All done
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;; one can signal that it's busy much earlier (more than 100ms) than the other.
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;; Can we do something about it?
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;; All done - give devices time to tell if they are busy by pulling DATA
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;; They should do it within 1ms
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ldx #$FF
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* lda CI2PRA
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;; BPL here is checking that bit 7 of $DD00 clears,
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;; i.e, that the DATA line is pulled by drive
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bpl +
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dex
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bne -
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bpl iec_tx_command_done
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*
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;; Wait 100us to give busy devices some time
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jsr iec_wait100us
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iec_tx_command_done:
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clc
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clc
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rts
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rts
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@@ -0,0 +1,74 @@
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;; This is a common part of iec_tx_byte and iec_tx_command
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;; Implemented based on https://www.pagetable.com/?p=1135, https://github.com/mist64/cbmbus_doc
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iec_tx_common:
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;; Store the bye to send on a stack
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pha
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;; Wait till all receivers are ready, they should all release DATA
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jsr iec_wait_for_data_release
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;; Pull CLK back to indicate that DATA is not valid, keep it for 60us
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;; Don't wait too long, as 200us or more is considered EOI
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jsr iec_pull_clk_release_data
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jsr iec_wait60us
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;; Now, we can start transmission of 8 bits of data
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ldx #7
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pla
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iec_tx_common_sendbit:
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;; Is next bit 0 or 1?
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lsr
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pha
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bcs +
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;; Bit is 0
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jsr iec_release_clk_pull_data
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jmp iec_tx_common_bit_is_sent
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*
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;; Bit is 1
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jsr iec_release_clk_data
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iec_tx_common_bit_is_sent:
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;; Wait 20us, so that device(s) can pick DATA
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jsr iec_wait20us
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;; More bits to send?
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pla
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dex
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bpl iec_tx_common_nextbit
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;; XXX the flow below is REALLY dangerous, as if there are multiple devices,
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;; one can signal that it's busy much earlier (more than 100ms) than the other.
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;; Can we do something about it?
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;; All done - give devices time to tell if they are busy by pulling DATA
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;; They should do it within 1ms
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ldx #$FF
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* lda CI2PRA
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;; BPL here is checking that bit 7 of $DD00 clears,
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;; i.e, that the DATA line is pulled by drive
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bpl +
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dex
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bne -
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bpl iec_tx_common_done
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*
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;; Wait 100us to give busy devices some time
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jsr iec_wait100us
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iec_tx_common_done:
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;; Byte sent, return
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rts
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iec_tx_common_nextbit:
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;; Pull CLK for 20us again, before
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jsr iec_pull_clk_release_data
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jsr iec_wait20us
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jmp iec_tx_common_sendbit
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@@ -0,0 +1,11 @@
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iec_tx_eoi:
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;; Wait at least 200us
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jsr iec_wait100us
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jsr iec_wait100us
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;; Restore the bus to idle state
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jsr iec_set_idle
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rts
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