From 3322932e5e6f3cbc30a9c98717a9edc389d127db Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 27 Dec 2019 19:13:15 +0100 Subject: [PATCH] turbo tape can now load files up to 250 blocks --- CONFIG.md | 2 +- STATUS.md | 20 ++++++++----- c64/kernal/tape/load_tape_turbo.s | 14 ++++++++- c64/kernal/tape/tape_turbo_bytestore.s | 40 ++++++++++++++++++++++++++ 4 files changed, 67 insertions(+), 9 deletions(-) create mode 100644 c64/kernal/tape/tape_turbo_bytestore.s diff --git a/CONFIG.md b/CONFIG.md index e8211f62..83ad933a 100644 --- a/CONFIG.md +++ b/CONFIG.md @@ -141,7 +141,7 @@ Needs about 700 bytes in KERNAL segment (if both normal and turbo are enabled, a Adds a minimal turbo tape support - just LOAD command (device 7, like on _Action Replay_ and _Final_ cartridges) -Needs about 600 bytes in KERNAL segment (if both normal and turbo are enabled, about 900 bytes are needed, as they share some code). If unsure - enable. +Needs about 650 bytes in KERNAL segment (if both normal and turbo are enabled, about 950 bytes are needed, as they share some code). If unsure - enable. ## Multiple SID support diff --git a/STATUS.md b/STATUS.md index be9e1b84..9145c2ad 100644 --- a/STATUS.md +++ b/STATUS.md @@ -3,19 +3,26 @@ Here are the features of the Open ROMs not found in the original ROMs from the 80s (many of them are [configurable](CONFIG.md) during compilation): + * improved keyboard scanning, resistant to ghosting and joystick interference (one variant even supports multi-keyy rollover), supports additional C128 keys * joystick can be used to move text cursor * pre-defined function keys -* uses RAM under ROM and I/O: 61438 bytes free -* cold/warm start silences multiple SID chips - all $D4xx and $D5xx addresses, configured addresses -* warm start due to BRK prints out the instruction address + +* JiffyDOS protocol support +* partial DolphinDOS protocol support (for now only LOAD is accelerated) +* DOS wedge (direct mode only) - `@`, `@`, `@$`, `@$`, `@` + +* turbo tape load support (as device 7, or using `←L`), up to 250 blocks (can store bytes under I/O) + * extended `LOAD` command * start/end addresses are displayed, in the Final cartridge style * command with just the file name tries to use the last device if it's number seems sane; otherwise uses 8 * secondary address over 255 is considered a start address -* JiffyDOS protocol support -* turbo tape load support (as device 7 or using `←L`) -* DOS wedge (direct mode only) - `@`, `@`, `@$`, `@$`, `@` + +* uses RAM under ROM and I/O: 61438 bytes free +* cold/warm start silences multiple SID chips - all $D4xx and $D5xx addresses, configured addresses +* warm start due to BRK prints out the instruction address + NOTE: extra features and their syntax can change in the future! @@ -33,7 +40,6 @@ The following ROM features are currently missing: * BASIC variables * BASIC expression parsing * floating point routines -* tape (normal mode) support * RS-232 support * NMI handling is incomplete diff --git a/c64/kernal/tape/load_tape_turbo.s b/c64/kernal/tape/load_tape_turbo.s index 5bcc0677..d70facfc 100644 --- a/c64/kernal/tape/load_tape_turbo.s +++ b/c64/kernal/tape/load_tape_turbo.s @@ -82,6 +82,18 @@ load_tape_turbo_header_loop: load_tape_turbo_payload: + // Copy helper byte store routine to RAM, provide default memory mapping + + ldx #(__tape_turbo_bytestore_size - 1) +!: + lda tape_turbo_bytestore_source, x + sta __tape_turbo_bytestore, x + dex + bpl !- + + lda CPU_R6510 + sta __tape_turbo_bytestore_defmap + // Initial checksum value lda #$00 @@ -96,7 +108,7 @@ load_tape_turbo_payload: load_tape_turbo_loop: jsr tape_turbo_get_byte - sta (MEMUSS),y + jsr __tape_turbo_bytestore // like 'sta (MEMUSS),y' - but under I/O eor PRTY // handle checksum sta PRTY diff --git a/c64/kernal/tape/tape_turbo_bytestore.s b/c64/kernal/tape/tape_turbo_bytestore.s new file mode 100644 index 00000000..66c94081 --- /dev/null +++ b/c64/kernal/tape/tape_turbo_bytestore.s @@ -0,0 +1,40 @@ + +// +// Tape (turbo) helper routine - storing byte uder I/O +// + +// This helper routine is meant to be copiet to the start of CPU stack. +// Original ROM tape loading routines uses this area to store information +// about bytes that did not read properly for the first time +// (see Mapping the C64, page 47); this mechanism is useless for turbo tape, +// but it means we can safely use this area for our purposes + + +#if CONFIG_TAPE_TURBO + + +.label __tape_turbo_bytestore = STACK +.label __tape_turbo_bytestore_defmap = __tape_turbo_bytestore + 7 +.label __tape_turbo_bytestore_size = __tape_turbo_bytestore_source_end - tape_turbo_bytestore_source + + +tape_turbo_bytestore_source: + + // Set all memory as RAM, tape motor ON + ldx #$00 + stx CPU_R6510 + + // Store byte in memory + sta (MEMUSS), y + + // Restore default memory layout + ldx #$00 // value will be determined later, offset from start: 7 bytes + stx CPU_R6510 + + // Go back + rts + +__tape_turbo_bytestore_source_end: + + +#endif // CONFIG_TAPE_TURBO