diff --git a/CONFIG.md b/CONFIG.md
index c1f56871..95ef6ffb 100644
--- a/CONFIG.md
+++ b/CONFIG.md
@@ -74,9 +74,17 @@ Choose if your CPU supports the Commodore Semiconductor Group 65CE02 instruction
 
 It enables some speed/size code optimizations.
 
+### `CONFIG_CPU_CSG_4510`
+
+Choose if your CPU supports the Commodore Semiconductor Group 4510 instruction set, like:
+
+* CSG 4510 - microcontroller used in the Commodore 65 prototypes
+
+It enables some speed/size code optimizations and allows C65 memory mapping to work.
+
 ### `CONFIG_CPU_M65_45GS02`
 
-Choose if you have a Mega65 FPGA board.
+Choose if you have a Mega65 FPGA board. It enables some speed/size code optimizations and allows Mega65 memory mapping to work.
 
 ### `CONFIG_CPU_WDC_65816`
 
diff --git a/Makefile b/Makefile
index 84be09a2..a33aa1b2 100644
--- a/Makefile
+++ b/Makefile
@@ -224,7 +224,7 @@ build/target_mega65/OUTK_0.BIN build/target_mega65/KERNAL_0_combined.vs build/ta
 build/kernal_mega65.rom_1 build/target_mega65/OUTK_1.BIN build/target_mega65/KERNAL_1_combined.vs build/target_mega65/KERNAL_1_combined.sym:
 	@mkdir -p build/target_mega65
 	@rm -f $@* build/kernal_mega65.rom_1 build/target_mega65/KERNAL_1*
-	@$(TOOL_BUILD_SEGMENT) -a ../../$(TOOL_ASSEMBLER) -r M65 -s KERNAL_1 -i KERNAL_1-mega65 -o OUTK_1.BIN -d build/target_mega65 -l 4000 -h 7fff c64/,,config_mega65.s $(SRCDIR_KERNAL) $(GEN_KERNAL)
+	@$(TOOL_BUILD_SEGMENT) -a ../../$(TOOL_ASSEMBLER) -r M65 -s KERNAL_1 -i KERNAL_1-mega65 -o OUTK_1.BIN -d build/target_mega65 -l 4000 -h 5fff c64/,,config_mega65.s $(SRCDIR_KERNAL) $(GEN_KERNAL)
 	@cp build/target_mega65/OUTK_1.BIN build/kernal_mega65.rom_1
 
 .PRECIOUS: build/target_%/newrom
@@ -268,7 +268,7 @@ build/symbols_hybrid.vs: build/target_generic/KERNAL_combined.vs
 
 build/mega65.rom: build/kernal_mega65.rom_0 build/kernal_mega65.rom_1 build/basic_mega65.rom_0 build/chargen.rom
 	cat build/kernal_mega65.rom_1 > build/mega65.rom
-	dd if=/dev/zero bs=4096 count=6 of=build/padding1
+	dd if=/dev/zero bs=4096 count=8 of=build/padding1
 	cat build/padding1 >> build/mega65.rom
 	cat build/basic_mega65.rom_0 build/chargen.rom build/chargen.rom build/kernal_mega65.rom_0 >> build/mega65.rom
 	dd if=/dev/zero bs=4096 count=16 of=build/padding2
diff --git a/c64/aliases/,aliases_cpu.s b/c64/aliases/,aliases_cpu.s
index de385d39..392e15cf 100644
--- a/c64/aliases/,aliases_cpu.s
+++ b/c64/aliases/,aliases_cpu.s
@@ -3,16 +3,20 @@
 // Provide pseudocommands (and other goodies) to make CPU optimizations easier
 //
 
-
-#if CONFIG_CPU_WDC_65C02 || CONFIG_CPU_CSG_65CE02 || CONFIG_CPU_WDC_65816
+#if CONFIG_CPU_WDC_65C02 || CONFIG_CPU_CSG_65CE02 || CONFIG_CPU_CSG_4510 || CONFIG_CPU_M65_45GS02 || CONFIG_CPU_WDC_65816
 	.cpu _65c02
 	#define HAS_OPCODES_65C02
+	#define HAS_BCD_SAFE_INTERRUPTS
 #endif
 
-#if CONFIG_CPU_CSG_65CE02 || CONFIG_CPU_M65_45GS02
+#if CONFIG_CPU_CSG_65CE02 || CONFIG_CPU_CSG_4510 || CONFIG_CPU_M65_45GS02
 	#define HAS_OPCODES_65CE02
 #endif
 
+#if CONFIG_CPU_CSG_4510 || CONFIG_CPU_M65_45GS02
+	#define HAS_OPCODES_4510
+#endif
+
 #if CONFIG_CPU_M65_45GS02
 	#define HAS_OPCODES_45GS02
 #endif
@@ -22,10 +26,6 @@
 #endif
 
 
-#if CONFIG_CPU_WDC_65C02 || CONFIG_CPU_CSG_65CE02 || CONFIG_CPU_M65_45GS02 || CONFIG_CPU_WDC_65816
-	#define HAS_BCD_SAFE_INTERRUPTS
-#endif
-
 
 //
 // These are not exactly for optimization - but to encourage proper usage of panic screen
@@ -46,46 +46,18 @@
 // Trick to skip a 2-byte instruction
 //
 
-.pseudocommand skip_2_bytes_trash_nvz
-{
-	.byte $2C
-}
+.pseudocommand skip_2_bytes_trash_nvz { .byte $2C }
 
 
 
 //
-// Some additional 45GS02 instructions
+// Memory mapping for C65 and Mega65
 //
 
-#if HAS_OPCODES_45GS02
+#if HAS_OPCODES_4510
 
-.function byteLO(value)
-{
-	.return mod(value.getValue(), $100)
-}
-
-.function byteHI(value)
-{
-	.return (value.getValue() - byteLO(value)) / $100
-}
-
-.pseudocommand rts_32                   // XXX not tested yet
-{
-	.byte $F8, $F8, $60
-}
-
-.pseudocommand jmp_32 bank:address      // XXX not tested yet
-{
-	.byte $F8, $F8, $4C, byteLO(address), byteHI(address), byteLO(bank), byteHI(bank)
-}
-
-.pseudocommand jsr_32 bank:address      // XXX not tested yet
-{
-	.var al = address.getValue();
-	.var ah = bank.getValue();
-
-	.byte $F8, $F8, $20, byteLO(address), byteHI(address), byteLO(bank), byteHI(bank)
-}
+.pseudocommand map { .byte $5C }
+.pseudocommand eom { .byte $EA }
 
 #endif
 
@@ -97,6 +69,22 @@
 
 #if HAS_OPCODES_65CE02
 
+// .B register support
+
+.pseudocommand tab { .byte $5B }
+.pseudocommand tba { .byte $7B }
+
+// .Z register support
+
+.pseudocommand inz { .byte $1B }
+.pseudocommand dez { .byte $3B }
+.pseudocommand phz { .byte $DB }
+.pseudocommand plz { .byte $FB }
+.pseudocommand taz { .byte $4B }
+.pseudocommand tza { .byte $6B }
+
+// 16-bit data processing
+
 .pseudocommand dew addr
 {
 	.var arg = addr.getValue()
diff --git a/c64/kernal/banking/4000.mega65_kernal_1.s b/c64/kernal/banking/4000.mega65_kernal_1.s
index 4887c883..ffaaf370 100644
--- a/c64/kernal/banking/4000.mega65_kernal_1.s
+++ b/c64/kernal/banking/4000.mega65_kernal_1.s
@@ -7,7 +7,7 @@
 
 // XXX this is for testing only
 
-	rts_32
+	rts
 
 
 #endif // ROM layout