more startup initialization fixes

c64/aliases/,aliases_config.s

@@ -130,7 +130,6 @@
 #if CONFIG_CPU_WDC_65C02 || CONFIG_CPU_CSG_65CE02 || CONFIG_CPU_WDC_65816
 
 #define HAS_BCD_SAFE_INTERRUPTS
-#define HAS_BCD_SAFE_RESET
 
 	.pseudocommand phx { .byte $DA }
 	.pseudocommand phy { .byte $5A }

c64/kernal/clrchn_real.s

@@ -25,7 +25,7 @@ clrchn_real:
 	// Handle IEC output device
 	jsr UNLSN
 !:
-clrchn_reset: // entry needed by CHRIN
+clrchn_reset: // entry needed by setup_vicii
 	// Set input device number to keyboard
 	lda #$00
 	sta DFLTN

c64/kernal/init/cint_real.s

@@ -114,9 +114,6 @@ cint_brk: // entry for BRK and STOP+RESTORE - XXX, where should it start?
 	// Put non-zero value in MODE to enable case switch
 	ldx #$00
 	stx MODE
-	
-	// Set default I/O devices (see SCINIT description at http://sta.c64.org/cbm64krnfunc.html)
-	jsr clrchn_reset
 
 	// Fallthrough/jump to screen clear routine (Compute's Mapping the 64 p215)
 	jmp clear_screen

c64/kernal/init/e5a0.setup_vicii.s

@@ -1,4 +1,11 @@
 
+//
+// Well-known Kernal routine, described in:
+//
+// - [CM64] Compute's Mapping the Commodore 64 - page 215
+//
+
+
 setup_vicii:
 
 	// XXX it should also set default devices
@@ -21,12 +28,12 @@ setup_vicii:
 
  	stx VIC_CLKRATE
 
-	// Set up default IO values - Compute's Mapping the 64
-	// - page 129       - VIC_SCROLY
-	// - pages 140-144  - VIC_SCROLX
-	// - pages 145-146  - VIC_YMCSB
+	// Set up default IO values
+	// - [CM64] page 129       - VIC_SCROLY
+	// - [CM64] pages 140-144  - VIC_SCROLX
+	// - [CM64] pages 145-146  - VIC_YMCSB
 
-	lda #$9B
+	lda #$1B                           // according to [CM64] page 137 some software assumes oldest bit is 0
 	sta VIC_SCROLY
 	lda #$C8
 	sta VIC_SCROLX                     // 40 column etc
@@ -35,14 +42,12 @@ setup_vicii:
 	lda #$0F
 	sta VIC_IRQ                        // clear all interrupts
 
-
-	// XXX initialize $D012 (VIC_RASTER) - which values to use?
-
-
 	// We use a different colour scheme of white text on all blue
 
 	lda #$06
 	sta VIC_EXTCOL
 	sta VIC_BGCOL0
 
-	rts
+	// Setup default I/O devices
+
+	jmp clrchn_reset

c64/kernal/interrupts/fce2.hw_entry_reset.s

@@ -6,9 +6,8 @@ hw_entry_reset:
 
 	// The GPL program at https://github.com/Klaus2m5/6502_65C02_functional_tests/blob/master/6502_functional_test.a65
 	// uses the following initial reset sequence, affirmed by c64 PRG p269
-#if !HAS_BCD_SAFE_RESET
-	cld // for CPUs having undefined D flag after reset
-#endif
+
+	cld // for CPUs might clear D flag - but it is possible this is called manually
 	ldx #$FF
 	txs
 	sei