chris/open-roms
1
0 Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

turned some repeating code into macros

Browse Source
This commit is contained in:
FeralChild64 committed 2020-12-20 11:54:04 +01:00
1 parent 6ced8b102a
commit 597aad5dcb
2 files changed
+58 -133
Download Patch File Download Diff File Expand all files Collapse all files

No files matched your search

src/zvm_m65/z80_instr_load_16bit.s
+22 -87
View File
@@ -3,98 +3,33 @@
; Z80 data load instructions, 16 bit
;
Z80_instr_C5: ; PUSH BC
lda REG_BC+1
!macro Z80_PUSH_REGnn .REGnn {
lda .REGnn+1
jsr (VEC_store_stack)
lda REG_BC+0
lda .REGnn+0
jsr (VEC_store_stack)
jmp ZVM_next
}
Z80_instr_D5: ; PUSH DE
Z80_instr_C5: +Z80_PUSH_REGnn REG_BC ; PUSH BC
Z80_instr_D5: +Z80_PUSH_REGnn REG_DE ; PUSH DE
Z80_instr_E5: +Z80_PUSH_REGnn REG_HL ; PUSH HL
Z80_instr_F5: +Z80_PUSH_REGnn REG_AF ; PUSH AF
Z80_instr_DD_E5: +Z80_PUSH_REGnn REG_IX ; PUSH IX
Z80_instr_FD_E5: +Z80_PUSH_REGnn REG_IY ; PUSH IY
lda REG_DE+1
jsr (VEC_store_stack)
lda REG_DE+0
jsr (VEC_store_stack)
!macro Z80_POP_REGnn .REGnn {
jsr (VEC_fetch_stack)
sta .REGnn+0
jsr (VEC_fetch_stack)
lda .REGnn+1
jmp ZVM_next
}
Z80_instr_E5: ; PUSH HL
lda REG_HL+1
jsr (VEC_store_stack)
lda REG_HL+0
jsr (VEC_store_stack)
jmp ZVM_next
Z80_instr_F5: ; PUSH AF
lda REG_AF+1
jsr (VEC_store_stack)
lda REG_AF+0
jsr (VEC_store_stack)
jmp ZVM_next
Z80_instr_DD_E5: ; PUSH IX
lda REG_IX+1
jsr (VEC_store_stack)
lda REG_IX+0
jsr (VEC_store_stack)
jmp ZVM_next
Z80_instr_FD_E5: ; PUSH IY
lda REG_IY+1
jsr (VEC_store_stack)
lda REG_IY+0
jsr (VEC_store_stack)
jmp ZVM_next
Z80_instr_C1: ; POP BC
jsr (VEC_fetch_stack)
sta REG_BC+0
jsr (VEC_fetch_stack)
lda REG_BC+1
jmp ZVM_next
Z80_instr_D1: ; POP DE
jsr (VEC_fetch_stack)
sta REG_DE+0
jsr (VEC_fetch_stack)
lda REG_DE+1
jmp ZVM_next
Z80_instr_E1: ; POP HL
jsr (VEC_fetch_stack)
sta REG_HL+0
jsr (VEC_fetch_stack)
lda REG_HL+1
jmp ZVM_next
Z80_instr_F1: ; POP AF
jsr (VEC_fetch_stack)
sta REG_AF+0
jsr (VEC_fetch_stack)
lda REG_AF+1
jmp ZVM_next
Z80_instr_DD_E1: ; POP IX
jsr (VEC_fetch_stack)
sta REG_IX+0
jsr (VEC_fetch_stack)
lda REG_IX+1
jmp ZVM_next
Z80_instr_FD_E1: ; POP IY
jsr (VEC_fetch_stack)
sta REG_IY+0
jsr (VEC_fetch_stack)
lda REG_IY+1
jmp ZVM_next
Z80_instr_C1: +Z80_POP_REGnn REG_BC ; POP BC
Z80_instr_D1: +Z80_POP_REGnn REG_DE ; POP DE
Z80_instr_E1: +Z80_POP_REGnn REG_HL ; POP HL
Z80_instr_F1: +Z80_POP_REGnn REG_AF ; POP AF
Z80_instr_DD_E1: +Z80_POP_REGnn REG_IX ; POP IX
Z80_instr_FD_E1: +Z80_POP_REGnn REG_IY ; POP IY