diff --git a/src/kernal/board_m65/mega65_hypervisor_reset.s b/src/kernal/board_m65/mega65_hypervisor_reset.s
index 64bc98eb..db451919 100644
--- a/src/kernal/board_m65/mega65_hypervisor_reset.s
+++ b/src/kernal/board_m65/mega65_hypervisor_reset.s
@@ -3,8 +3,6 @@
 
 ; Reset (hardware initialization) to be used when Open ROMs is used under hypervisor
 
-; XXX size-optimize this; share code with regular reset
-
 
 m65_hypervisor_reset:
 
@@ -13,6 +11,9 @@ m65_hypervisor_reset:
 	sei                      ; disable the interrupts, as fast as possible
 	cld                      ; Kernal is not designed to operate in decimal mode
 
+	lda #$00
+	sta NMINV+1              ; soft-disable custom NMI interrupt handler
+
 	; Do not reset the stack (see, ldx #$FF, txs) - we need to know where to return
 	
 	jsr m65_reset_part       ; init MEGA65 specific hardware, shutdown VIC-IV, clear native mode mark
@@ -20,9 +21,7 @@ m65_hypervisor_reset:
 	stx VIC_SCROLX
 
 	jsr IOINIT_skip_DOS      ; better not to initialize DOS under hypervisor, risk of incompatibility
-	jsr JRAMTAS
-	jsr JRESTOR
-	jsr JCINT
+	jsr m65_reset_common     ; RAMTAS, RESTOR, CINT
 
 	; Restore hypervisor memory mapping and quit
 
@@ -42,3 +41,9 @@ m65_hypervisor_reset:
 
 	cli
 	rts
+
+m65_reset_common:
+
+	jsr JRAMTAS
+	jsr JRESTOR
+	jmp JCINT
diff --git a/src/kernal/init/fce2.hw_entry_reset.s b/src/kernal/init/fce2.hw_entry_reset.s
index 41c21683..8cd79829 100644
--- a/src/kernal/init/fce2.hw_entry_reset.s
+++ b/src/kernal/init/fce2.hw_entry_reset.s
@@ -16,6 +16,9 @@ hw_entry_reset:
 
 	cld                      ; required for all CPUs - due to possibility of manual call
 
+	lda #$00
+	sta NMINV+1              ; soft-disable custom NMI interrupt handler
+
 !ifdef HAS_OPCODES_65CE02 {
 
 	see                      ; disable extended stack
@@ -49,6 +52,15 @@ hw_entry_reset:
 	; Initialising IO is obviously required. Also indicated by c64 prg p269.
 	jsr JIOINIT
 
+!ifdef CONFIG_MB_M65 {
+
+	jsr m65_reset_common     ; RAMTAS, RESTOR, CINT
+
+	clc
+	jsr M65_MODESET          ; on MEGA65 go to native mode by default
+
+} else {
+
 	; Setting up the screen and testing ram is obviously required
 	; also affirmed by p269 of c64 prg
 	jsr JRAMTAS ; called RANTAM on Codebase64 wiki
@@ -59,12 +71,8 @@ hw_entry_reset:
 
 	; "Compute's Mapping the 64" p236
 	jsr JCINT
-
-!ifdef CONFIG_MB_M65 {
-
-	clc
-	jsr M65_MODESET          ; on MEGA65 go to native mode by default
 }
+
 	; What do we do when finished?  A C64 jumps into the BASIC ROM
 	cli ; allow interrupts to happen
 
diff --git a/src/kernal/interrupts/hw_entry_nmi.s b/src/kernal/interrupts/hw_entry_nmi.s
index 006eb69d..6c541344 100644
--- a/src/kernal/interrupts/hw_entry_nmi.s
+++ b/src/kernal/interrupts/hw_entry_nmi.s
@@ -15,16 +15,12 @@ hw_entry_nmi:
 	; Call interrupt routine (only if initialised)
 	pha
 
-!ifndef CONFIG_MB_M65 {      ; XXX temporarily disabled for MEGA65, seems to cause crash during startup - to be investigated
-
 	lda NMINV+1              ; consider zeropage NMI address as uninitialized vector
 	beq @1                   ; this allows safer interrupt vector modifications 
 	pla
 	jmp (NMINV)
 @1:
 
-}
-
 	; Vector not initialized - call default interrupt routine
 	pla
 	jmp default_nmi_handler