set IRQ frequency depending on video system
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7 files changed
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-49
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@@ -27,8 +27,7 @@ The following ROM features are currently missing:
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* tape support
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* tape support
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* RS-232 support
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* RS-232 support
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* breaking Kernal routines with RUN/STOP key
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* breaking Kernal routines with RUN/STOP key
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* BRK handling
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* BRK handling; NMI/IRQ handling is incomplete
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* PAL/NTSC is detected, but for now only startup banner uses the result
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Features currently being worked on:
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Features currently being worked on:
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@@ -73,7 +72,7 @@ NOTE: Even the 'DONE' routines won't support features described as missing in on
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| Address | Name | Status | Remarks |
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| Address | Name | Status | Remarks |
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| --------- | :------- | :------: | :------------------------------------------------: |
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| --------- | :------- | :------: | :------------------------------------------------: |
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| `$FF81` | `CINT` | DONE | |
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| `$FF81` | `CINT` | DONE | |
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| `$FF84` | `IOINIT` | DONE | |
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| `$FF84` | `IOINIT` | PARTIAL | CIA initialization incomplete |
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| `$FF87` | `RAMTAS` | DONE | |
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| `$FF87` | `RAMTAS` | DONE | |
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| `$FF8A` | `RESTOR` | DONE | |
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| `$FF8A` | `RESTOR` | DONE | |
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| `$FF8D` | `VECTOR` | DONE | |
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| `$FF8D` | `VECTOR` | DONE | |
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+1
-25
@@ -14,31 +14,7 @@ cint:
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cint_brk: ; entry for BRK and STOP+RESTORE - XXX, where should it start?
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cint_brk: ; entry for BRK and STOP+RESTORE - XXX, where should it start?
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jsr setup_vicii
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jsr setup_vicii
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jsr setup_pal_ntsc
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;; Detect video system (PAL/NTSC), use Graham's method, as it's short and reliable
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;; see here: https://codebase64.org/doku.php?id=base:detect_pal_ntsc
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cint_w0:
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lda VIC_RASTER
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cint_w1:
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cmp VIC_RASTER
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beq cint_w1
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bmi cint_w0
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;; Result in A, if no interrupt happened during the test:
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;; #$37 -> 312 rasterlines, PAL, VIC 6569
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;; #$06 -> 263 rasterlines, NTSC, VIC 6567R8
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;; #$05 -> 262 rasterlines, NTSC, VIC 6567R56A
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cmp #$07
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bcs cint_pal
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cint_ntsc:
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lda #$00
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beq +
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cint_pal:
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lda #$01
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*
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sta PALNTSC
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;; Initialise cursor blink flags (Compute's Mapping the 64 p215)
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;; Initialise cursor blink flags (Compute's Mapping the 64 p215)
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lda #$00
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lda #$00
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+38
-19
@@ -34,35 +34,54 @@ ioinit:
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cpy #$80 ; $20 * amount of chips to silence, $80 to silence 4 chips
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cpy #$80 ; $20 * amount of chips to silence, $80 to silence 4 chips
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bne -
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bne -
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;; Enable CIA1 IRQ and ~50Hz timer
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;; XXX: calibrate TOD for both CIA's, see here: https://codebase64.org/doku.php?id=base:efficient_tod_initialisation
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;; (https://csdb.dk/forums/?roomid=11&topicid=69037)
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lda #$7f
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;; Enable CIA1 IRQ and ~50Hz timer (https://csdb.dk/forums/?roomid=11&topicid=69037)
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sta $DC0D ; First disable all
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lda #$7F
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sta CIA1_ICR ; disable all
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;; Set timer interval to ~1/60th of a second
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;; Set timer interval to ~1/60th of a second
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;; (This value was calculated by running a custom IRQ haandler on a C64
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jsr setup_pal_ntsc
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;; (This value was calculated by running a custom IRQ handler on a C64
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;; with original KERNAL, and writing the values of $DC04/5 to the screen
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;; with original KERNAL, and writing the values of $DC04/5 to the screen
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;; in the IRQ handler to see roughly what value the timers must be set to)
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;; in the IRQ handler to see roughly what value the timers must be set to)
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lda #<16380
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;; ldy #<16380
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sta $dc04
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;; ldx #>16380
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lda #>16380
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sta $dc05
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;; PAL C64 (https://codebase64.org/doku.php?id=base:cpu_clocking),
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;; is clocked at 0.985248 MHz, so that 1/60s is 16421 CPU cycles
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ldy #<16421
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ldx #>16421
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lda PALNTSC
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bne +
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;; NTSC C64 (https://codebase64.org/doku.php?id=base:cpu_clocking),
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;; is clocked at 1.022727 MHz, so that 1/60s is 17045 CPU cycles
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ldy #<17045
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ldx #>17045
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;; Store the IRQ timing constant to CIA chip
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*
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sty CIA1_TIMALO
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stx CIA1_TIMAHI
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;; Enable timer interrupt
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;; Enable timer interrupt
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lda #$81
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lda #$81
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sta $dc0d
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sta CIA1_ICR
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;; Enable timer A to run continuously
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;; Enable timer A to run continuously (http://codebase64.org/doku.php?id=base:timerinterrupts)
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;; (http://codebase64.org/doku.php?id=base:timerinterrupts)
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lda #$11
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lda #$11
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sta $dc0e
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sta CIA1_CRA
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lda $dc0d
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lda CIA1_ICR
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;; Set DDR on CIA2 for IEC bus, VIC-II banking
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;; Set DDR on CIA2 for IEC bus, VIC-II banking
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lda #$3b
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lda #$3B
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sta $dd02
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sta CIA2_DDRA
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;; Set IEC bus oto its initial idle state
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;; Set IEC bus to its initial idle state
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jsr iec_set_idle
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jmp iec_set_idle
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rts
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@@ -6,7 +6,7 @@ iec_wait20us:
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;; PAL:
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;; PAL:
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;; - CPU frequency 0.985248 MHz, we need to waste at least 20 cycles
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;; - CPU frequency 0.985248 MHz, we need to waste at least 20 cycles
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;; NTSC:
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;; NTSC:
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;; - CPU frequency 1.022727 MHZ, we need to waste at least 21 cycles
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;; - CPU frequency 1.022727 MHz, we need to waste at least 21 cycles
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;; Waste cycles by reading some unimportant memory location
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;; Waste cycles by reading some unimportant memory location
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;; in order not to clutter VICE debug logs
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;; in order not to clutter VICE debug logs
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@@ -6,7 +6,7 @@ iec_wait60us:
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;; PAL:
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;; PAL:
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;; - CPU frequency 0.985248 MHz, we need to waste at least 60 cycles
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;; - CPU frequency 0.985248 MHz, we need to waste at least 60 cycles
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;; NTSC:
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;; NTSC:
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;; - CPU frequency 1.022727 MHZ, we need to waste at least 62 cycles
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;; - CPU frequency 1.022727 MHz, we need to waste at least 62 cycles
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;; Waste cycles in a loop
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;; Waste cycles in a loop
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@@ -13,6 +13,8 @@ default_nmi_handler:
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;; XXX: RS-232 support is not implemented
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;; XXX: RS-232 support is not implemented
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;; XXX confirm NMIs from CIA, or no other NMI will arrive!
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jsr cartridge_check
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jsr cartridge_check
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bcc +
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bcc +
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jmp (ICART_WARM_START)
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jmp (ICART_WARM_START)
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@@ -0,0 +1,31 @@
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;;
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;; Detect video system (PAL/NTSC), use Graham's method, as it's short and reliable
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;; see here: https://codebase64.org/doku.php?id=base:detect_pal_ntsc
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;;
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setup_pal_ntsc:
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lda VIC_RASTER
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setup_pal_ntsc_w1:
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cmp VIC_RASTER
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beq setup_pal_ntsc_w1
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bmi setup_pal_ntsc
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;; Result in A, if no interrupt happened during the test:
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;; #$37 -> 312 rasterlines, PAL, VIC 6569
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;; #$06 -> 263 rasterlines, NTSC, VIC 6567R8
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;; #$05 -> 262 rasterlines, NTSC, VIC 6567R56A
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cmp #$07
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bcs setup_pal
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setup_ntsc:
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lda #$00
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beq +
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setup_pal:
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lda #$01
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*
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sta PALNTSC
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rts
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