From 80fb110391bf1f9e4c91e63395e26a9ef296c30b Mon Sep 17 00:00:00 2001 From: Christian Werner Date: Sun, 18 Oct 2026 08:57:01 +0200 Subject: [PATCH] feat(iec): on a Blade the 1 ms wait counts on CIA1's timer B A Blade has no VIC-II whose raster lines iec_wait1ms could count, so with ARNITECH_BLADE it runs CIA1's timer B, which only the tape used, once for 1024 cycles, and waits for its START bit to clear. Its ICR flag would not do, as the IRQ handler's read of the ICR clears it. --- src/kernal/iec/iec_wait1ms.s | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/src/kernal/iec/iec_wait1ms.s b/src/kernal/iec/iec_wait1ms.s index 254fbdda..fe63b10e 100644 --- a/src/kernal/iec/iec_wait1ms.s +++ b/src/kernal/iec/iec_wait1ms.s @@ -12,6 +12,28 @@ ; 63 cycles, we need at least 17 full rasters to be 100% sure we wait enough +!ifdef CONFIG_ARNITECH_BLADE { + + ; A Blade has no VIC-II: CIA #1's timer B, which only the tape used, counts 1024 cycles once + ; (a little over 1 ms at the PAL clock of a Blade). Its START bit clears when it runs out; + ; its ICR flag would not do, as the IRQ handler's read of the ICR clears it + +iec_wait1ms: + + lda #$00 + sta CIA1_TIMBLO + lda #$04 + sta CIA1_TIMBHI + lda #%00011001 ; one-shot, load the latch, start + sta CIA1_CRB +@2: + lda CIA1_CRB + lsr + bcs @2 + rts + +} else { + !ifdef CONFIG_IEC { @@ -55,3 +77,5 @@ wait_x_bars: ; additional entry point for delay in screen and tape support iec_wait_rts: ; dummy RTS, for very short waits rts + +} ; CONFIG_ARNITECH_BLADE