monitor command 'D' fully adapted

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FeralChild64 committed 2021-01-10 20:27:00 +01:00
1 parent 519f0e537b
commit 81f1213ad8
3 files changed
+18 -18

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-1
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@@ -10,7 +10,6 @@
; * Register storage * ; * Register storage *
; ******************** ; ********************
!addr Bank = 2 ; XXX remove this
!addr Adr_Mode = 2 ; $00 = 64K address, $80 = M65 flat address ; XXX adapt the implementation !addr Adr_Mode = 2 ; $00 = 64K address, $80 = M65 flat address ; XXX adapt the implementation
!addr PCH = 3 !addr PCH = 3
!addr PCL = 4 !addr PCL = 4
+11 -9
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@@ -192,7 +192,7 @@ Jump_Table:
!word Mon_Assemble ; A XXX to be debugged/adapted !word Mon_Assemble ; A XXX to be debugged/adapted
!word Mon_Bits ; B XXX to be debugged/adapted !word Mon_Bits ; B XXX to be debugged/adapted
!word Mon_Compare ; C XXX to be debugged/adapted !word Mon_Compare ; C XXX to be debugged/adapted
!word Mon_Disassemble ; D XXX to be debugged/adapted !word Mon_Disassemble ; D
!word Mon_Fill ; F XXX to be debugged/adapted !word Mon_Fill ; F XXX to be debugged/adapted
!word Mon_Go ; G XXX to be debugged/adapted !word Mon_Go ; G XXX to be debugged/adapted
!word Mon_Hunt ; H XXX to be debugged/adapted !word Mon_Hunt ; H XXX to be debugged/adapted
@@ -221,6 +221,8 @@ Mon_Exit:
LAC_To_PC: ; XXX to be adapted LAC_To_PC: ; XXX to be adapted
; ******** ; ********
inc $D020 ; XXX fior debug only
; called from Mon_Set_Register, Mon_Go and Mon_JSR ; called from Mon_Set_Register, Mon_Go and Mon_JSR
; as the first instruction. The carry flag was set from ; as the first instruction. The carry flag was set from
; the routine Got_LAC if an error occured. ; the routine Got_LAC if an error occured.
@@ -231,12 +233,12 @@ LAC_To_PC: ; XXX to be adapted
; the routines FAR_JMP and FAR_JSR of the operating system ; the routines FAR_JMP and FAR_JSR of the operating system
BCS @error BCS @error
LDA Long_AC ;LDA Long_AC
STA Bank+2 ;STA Bank+2
LDA Long_AC+1 ;LDA Long_AC+1
STA Bank+1 ;STA Bank+1
LDA Long_AC+2 ;LDA Long_AC+2
STA Bank ;STA Bank
@error RTS @error RTS
; ********* ; *********
@@ -456,7 +458,7 @@ Mon_Bits:
JMP Main JMP Main
; *************** ; ***************
Mon_Set_Register: Mon_Set_Register: ; XXX this needs adaptation
; *************** ; ***************
JSR Get_LAC ; get 1st. parameter JSR Get_LAC ; get 1st. parameter
@@ -465,7 +467,7 @@ Mon_Set_Register:
@loop JSR Get_LAC @loop JSR Get_LAC
BCS @exit BCS @exit
LDA Long_AC LDA Long_AC
STA Bank,Y STA Adr_Mode,Y
INY INY
CPY #9 CPY #9
BCC @loop BCC @loop
+7 -8
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@@ -3,7 +3,6 @@
Mon_Disassemble: Mon_Disassemble:
lda Adr_Mode
pha ; store addressing mode, in case no parameter is given pha ; store addressing mode, in case no parameter is given
lda #$00 lda #$00
sta Adr_Mode ; by default use C64-style addressing sta Adr_Mode ; by default use C64-style addressing
@@ -13,25 +12,24 @@ Mon_Disassemble:
pla ; drop previous addressing mode pla ; drop previous addressing mode
jsr LAC_To_LPC ; Long_PC = start address jsr LAC_To_LPC ; Long_PC = start address
jsr Get_Addr_To_LAC ; get 2nd parameter (end address) jsr Get_Addr_To_LAC ; get 2nd parameter (end address)
bne @range beq @norange
jsr LAC_Minus_LPC ; Long_CT = range
+bcc Mon_Error ; -> negative
bra @loop
@nopar: @nopar:
pla ; retrieve old addressing mode pla ; retrieve old addressing mode
sta Adr_Mode sta Adr_Mode
@norange:
lda #$20 ; by default disassemble 32 addresses lda #$20 ; by default disassemble 32 addresses
sta Long_CT+0 sta Long_CT+0
lda #$00 lda #$00
sta Long_CT+1 sta Long_CT+1
sta Long_CT+2 sta Long_CT+2
sta Long_CT+3 sta Long_CT+3
bra @loop
@range:
jsr LAC_Minus_LPC ; Long_CT = range
+bcc Mon_Error ; -> negative
@loop: @loop:
@@ -47,4 +45,5 @@ Mon_Disassemble:
sbc Op_Size sbc Op_Size
sta Long_CT sta Long_CT
bcs @loop bcs @loop
jmp Main jmp Main