added temporary handling of double LOAD/SAVE entries in Kernal

2019-09-29 22:09:33 +02:00
1 parent d17b5f9cde
commit 9fd0297e51
@@ -0,0 +1,2 @@
+This is a well-known address of a heavily used Kernal routine, it has to be the same so our ROM is compatible.
+
@@ -0,0 +1,13 @@
+
+//
+// XXX Note: something unusual was done with LOAD routine - although the vector at $330 points to $F4A5,
+//           the Kernal jump table points to $F49E (see also Mapping the C64, page 76). By experimenting
+//           I have already discovered that $F4A5 performs indirect jump via ($0330) vector, but it must
+//           be doing a little bit more - not sure yet, what. Something similar is done with SAVE.
+//
+//           This has to be clarified.
+//
+
+LOAD_INT:
+    jmp (ILOAD)
+
@@ -0,0 +1,2 @@
+This is a well-known address of a heavily used Kernal routine, it has to be the same so our ROM is compatible.
+
@@ -0,0 +1,12 @@
+
+//
+// XXX Note: something unusual was done with LOAD routine - although the vector at $330 points to $F4A5,
+//           the Kernal jump table points to $F49E (see also Mapping the C64, page 76). By experimenting
+//           I have already discovered that $F4A5 performs indirect jump via ($0330) vector, but it must
+//           be doing a little bit more - not sure yet, what. Something similar is done with SAVE.
+//
+//           This has to be clarified.
+//
+
+SAVE_INT:
+    jmp (ISAVE)
@@ -1,4 +1,4 @@
 // load RAM from a device
 // C64 Programmer's Reference Guide Page 272

-	jmp LOAD
+	jmp LOAD_INT
@@ -1,4 +1,4 @@
 // SAVE RAM to device
 // C64 Programmer's Reference Guide Page 273

-	jmp SAVE
+	jmp SAVE_INT
				`@@ -0,0 +1,2 @@`
				`This is a well-known address of a heavily used Kernal routine, it has to be the same so our ROM is compatible.`