diff --git a/src/kernal/screen_m65/mega65_chrout_screen.s b/src/kernal/screen_m65/mega65_chrout_screen.s index 8d771c31..fd122ae1 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen.s +++ b/src/kernal/screen_m65/mega65_chrout_screen.s @@ -4,6 +4,6 @@ m65_chrout_screen: - // Provide implementation + // XXX provide implementation - rts \ No newline at end of file + rts diff --git a/src/kernal/screen_m65/mega65_clrscr_clrwin.s b/src/kernal/screen_m65/mega65_clrscr_clrwin.s index a5876e2f..5d363ed6 100644 --- a/src/kernal/screen_m65/mega65_clrscr_clrwin.s +++ b/src/kernal/screen_m65/mega65_clrscr_clrwin.s @@ -37,13 +37,14 @@ M65_CLRWIN: bpl !- lda #$0F - sta M65_LPNT_KERN+2 + sta M65_LPNT_KERN+3 lda #$F8 - sta M65_LPNT_KERN+1 + sta M65_LPNT_KERN+2 // Go trough all the rows phz + ldx M65_SCRMODE ldy #$00 // FALLTROUGH @@ -61,7 +62,7 @@ m65_clrwin_loop: !: lda #$20 sta_lp (M65_LPNT_SCR),z - lda #$00 + lda COLOR sta_lp (M65_LPNT_KERN),z inz cpz M65_TXTWIN_X1 @@ -71,12 +72,30 @@ m65_clrwin_loop: m65_clrwin_loop_next: + // Increment M65_LPNT_SCR and M65_LPNT_KERN by the row length + + clc + lda m65_scrtab_txtwidth, x + adc M65_LPNT_SCR+0 + sta M65_LPNT_SCR+0 + bcc !+ + inc M65_LPNT_SCR+1 +!: + clc + lda m65_scrtab_txtwidth, x + adc M65_LPNT_KERN+0 + sta M65_LPNT_KERN+0 + bcc !+ + inc M65_LPNT_KERN+1 +!: + // Increment row counter, check if new row is valid + iny - - // XXX - + cpy M65_TXTWIN_Y1 + bne m65_clrwin_loop plz + // Set screen variables // XXX implement this diff --git a/src/kernal/screen_m65/mega65_scrmodeset.s b/src/kernal/screen_m65/mega65_scrmodeset.s index 1ee6e0ac..c7e070e5 100644 --- a/src/kernal/screen_m65/mega65_scrmodeset.s +++ b/src/kernal/screen_m65/mega65_scrmodeset.s @@ -42,6 +42,13 @@ m65_scrmodeset_internal: // entry point for M65_MODE65 sta M65_SCRMODE + // Set flags/variables for 40/80 columns and 25/50 rows + + tax + + lda m65_scrtab_vic_ctrlb,x + sta VIC_CTRLB + // Set the base screen addresses: // - in VIC_SCRNPTR and M65_SCRTXTBASE to $16000 // - in VIC_COLPTR to $0000 @@ -60,11 +67,4 @@ m65_scrmodeset_internal: // entry point for M65_MODE65 stx VIC_SCRNPTR+1 stx M65_SCRTXTBASE+1 - // Set flags/variables for 40/80 columns and 25/50 rows - - tax - - lda m65_scrtab_vic_ctrlb,x - sta VIC_CTRLB - rts