fix stupid checking of wrong bit in iec_wait_for_clock_release
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@@ -1,5 +1,5 @@
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iec_wait_for_clock_release:
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iec_wait_for_clock_release:
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LDA $DD00
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LDA $DD00
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and #$80
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and #$40
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beq iec_wait_for_clock_release
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beq iec_wait_for_clock_release
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rts
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rts
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