implemented NEG

src/zvm_m65/z80_instr_general.s

@@ -56,7 +56,23 @@ Z80_instr_2F:                                                                  ;
 	sta REG_F
 	jmp ZVM_next
 
-; XXX put NEG here
+Z80_instr_ED_44:                                                               ; NEG
+Z80_illeg_ED_4C:                                                               ; NEG
+Z80_illeg_ED_54:                                                               ; NEG
+Z80_illeg_ED_5C:                                                               ; NEG
+Z80_illeg_ED_64:                                                               ; NEG
+Z80_illeg_ED_6C:                                                               ; NEG
+Z80_illeg_ED_74:                                                               ; NEG
+Z80_illeg_ED_7C:                                                               ; NEG
+
+	ldx REG_A
+	lda z80_ftable_NEG, x
+	sta REG_F
+	lda #$00
+	sec
+	sbc REG_A
+	sta REG_A
+	jmp ZVM_next
 
 Z80_instr_3F:                                                                  ; CCF
 

src/zvm_m65/z80_tables.s

@@ -29,6 +29,10 @@ z80_ftable_IN_OR_XOR:
 
 	+PUT_Z80_FTABLE_IN_OR_XOR
 
+z80_ftable_NEG:
+
+	+PUT_Z80_FTABLE_NEG
+
 ;
 ; That horrific DAA instruction
 ;

src/zvm_m65/zvm_core.s

@@ -270,7 +270,6 @@ Z80_instr_DD_E3:   ; EX (SP),IX
 Z80_instr_DD_F9:   ; LD SP,IX
 Z80_instr_ED_42:   ; SBC HL,BC
 Z80_instr_ED_43:   ; LD (nn),BC
-Z80_instr_ED_44:   ; NEG
 Z80_instr_ED_45:   ; RETN
 Z80_instr_ED_4A:   ; ADC HL,BC
 Z80_instr_ED_4B:   ; LD BC,(nn)
@@ -345,20 +344,13 @@ Z80_illeg_CB_34:   ; SLL H
 Z80_illeg_CB_35:   ; SLL L
 Z80_illeg_CB_36:   ; SLL (HL)
 Z80_illeg_CB_37:   ; SLL A
-Z80_illeg_ED_4C:   ; NEG
-Z80_illeg_ED_54:   ; NEG
 Z80_illeg_ED_55:   ; RETN
-Z80_illeg_ED_5C:   ; NEG
 Z80_illeg_ED_5D:   ; RETN
-Z80_illeg_ED_64:   ; NEG
 Z80_illeg_ED_65:   ; RETN
-Z80_illeg_ED_6C:   ; NEG
 Z80_illeg_ED_6D:   ; RETN
 Z80_illeg_ED_70:   ; IN F,(C)
 Z80_illeg_ED_71:   ; OUT (C),0
-Z80_illeg_ED_74:   ; NEG
 Z80_illeg_ED_75:   ; RETN
-Z80_illeg_ED_7C:   ; NEG
 Z80_illeg_ED_7D:   ; RETN
 Z80_illeg_xDCB_C0: ; SET 0,(IXY+d),B
 Z80_illeg_xDCB_C1: ; SET 0,(IXY+d),C

tools/generate_z80_tables.cc

@@ -210,6 +210,26 @@ std::string generateInOrXorTable(void)
 	return outStr.str() + "}\n\n\n";
 } 
 
+std::string generateNegTable(void)
+{
+	std::stringstream outStr;
+	outStr << "!macro PUT_Z80_FTABLE_NEG {\n";
+
+	for (uint16_t idx = 0; idx < 0x100; idx++)
+	{
+		uint8_t flags = Z80_NF;
+		if (0 - idx >= 0x80)  flags |= Z80_SF;
+		if (idx == 0)         flags |= Z80_ZF;
+		if (idx != 0)         flags |= Z80_HF | Z80_CF;
+		if (idx == 0x80)      flags |= Z80_VF;
+		if ((0 - idx) & 0x08) flags |= Z80_XF;
+		if ((0 - idx) & 0x20) flags |= Z80_YF;
+
+		outStr << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << int(flags) << "\n";
+	}
+
+	return outStr.str() + "}\n\n\n";
+} 
 
 
 typedef struct FlagsDAA
@@ -333,6 +353,7 @@ void writeTables()
 	outFile << generateDecTable();
 	outFile << generateAndTable();
 	outFile << generateInOrXorTable();
+	outFile << generateNegTable();
 	outFile << generateDaaTables();
 
 	// XXX