migrated to ACME assembler
commit 145d64aa6e78838ed07cefed372f0ad6a4687e97 Author: FeralChild64 <you@example.com> Date: Sun Sep 20 20:16:57 2020 +0200 ACME adaptation commit 885209d7822286744ea53232ae7461472a01d5d6 Author: FeralChild64 <you@example.com> Date: Sun Sep 20 19:57:25 2020 +0200 ACME adaptation commit 334d84486bc603551887e7cbeb59d329f2224cc7 Author: FeralChild64 <you@example.com> Date: Sun Sep 20 18:29:15 2020 +0200 ACME adaptation commit b5966f49bcd8f0ca79cbec93819a31238924707e Author: FeralChild64 <you@example.com> Date: Sun Sep 20 18:09:31 2020 +0200 ACME adaptation commit 786536a93a5eab5e676fca99625b4eb094a554e7 Author: FeralChild64 <you@example.com> Date: Sun Sep 20 17:24:48 2020 +0200 ACME adaptation commit 704c70dfb1f5d68775d6f3da220803b8a3990f56 Author: FeralChild64 <you@example.com> Date: Sun Sep 20 15:07:12 2020 +0200 ACME adaptation commit 136874964c9083b375f151475310f9636871fc72 Author: FeralChild64 <you@example.com> Date: Sun Sep 20 14:45:14 2020 +0200 ACME adaptation commit 8eca0d5700b72d04336e72c5cd3a68e18b85f96d Author: FeralChild64 <you@example.com> Date: Sun Sep 20 14:06:52 2020 +0200 ACME adaptation commit 11d29eb7ee318239d782f85498b6d0524624d5c4 Author: FeralChild64 <you@example.com> Date: Sun Sep 20 13:56:45 2020 +0200 ACME apaptation commit c9b5e5e04cceb92c66bc027e6440bc0f7c5a499f Author: FeralChild64 <you@example.com> Date: Sun Sep 20 13:49:04 2020 +0200 ACME adaptation commit f5cc254cbc921f07863807468cb3fe26b410b409 Author: FeralChild64 <you@example.com> Date: Sun Sep 20 13:01:18 2020 +0200 ACME adaptation commit e135a27bf9c30cc0965379c954564e06406303b1 Author: FeralChild64 <you@example.com> Date: Sat Sep 19 21:55:01 2020 +0200 ACME adaptation commit e9dfddf90d9e2795e88b7da40ae050d733faeb56 Author: FeralChild64 <you@example.com> Date: Sat Sep 19 21:48:47 2020 +0200 Makefile fix commit 07030104c65cf5e5beeacf6d629ccb9245e58657 Author: FeralChild64 <you@example.com> Date: Sat Sep 19 21:42:00 2020 +0200 ACME adaptation commit f824362ee5bcfbffca86c430b57773b2ffd65655 Author: FeralChild64 <you@example.com> Date: Sat Sep 19 20:14:56 2020 +0200 ACME adaptation commit 3a3c59007dcd4940d89b8669f34ca56b61c25fdf Author: FeralChild64 <you@example.com> Date: Fri Sep 18 21:51:45 2020 +0200 ACME adaptation commit 6790ef7bc88a41de2881c69b7524dd4ab8c74b5d Author: FeralChild64 <you@example.com> Date: Fri Sep 18 20:35:23 2020 +0200 ACME adaptation commit 38ad18b90e9ec713aa7ca49576b3388ce1733357 Author: FeralChild64 <you@example.com> Date: Fri Sep 18 18:46:20 2020 +0200 ACME adaptation commit 541340371122a9702f7b2d9771c298223cffd0e9 Author: FeralChild64 <you@example.com> Date: Fri Sep 18 16:49:46 2020 +0200 ACME adaptation commit 25cfd5e186459be1a260d3eb8cfff767838de370 Author: FeralChild64 <you@example.com> Date: Thu Sep 17 20:13:33 2020 +0200 ACME adaptation commit f61599444d5b1d03d8fd8e4a6a7c3b85069bedb3 Author: FeralChild64 <you@example.com> Date: Thu Sep 17 19:29:23 2020 +0200 ACME adaptation commit b290be31ec7bb2e5723607697da1bbc621c84429 Author: FeralChild64 <you@example.com> Date: Thu Sep 17 17:20:14 2020 +0200 ACME adaptation commit 877be9e856880d98fd4bcb25b42aaaacda9dc463 Author: FeralChild64 <you@example.com> Date: Wed Sep 16 21:47:38 2020 +0200 ACME adaptation commit bb20edaf85d386e41d5c2f715b745b68fbd3362e Author: FeralChild64 <you@example.com> Date: Wed Sep 16 21:31:30 2020 +0200 ACME adaptation commit c5d31bd8685abce37c8e254d15aac20bd1570d9f Author: FeralChild64 <you@example.com> Date: Wed Sep 16 18:40:49 2020 +0200 ACME adaptation commit 29349826b38f8a89649171559dc8cf24c560aff1 Author: FeralChild64 <you@example.com> Date: Mon Sep 14 23:35:47 2020 +0200 ACME adaptation commit 8bcd6a621c4b11766d0cf34f79858ba90a67248e Author: FeralChild64 <you@example.com> Date: Mon Sep 14 22:52:25 2020 +0200 ACME adaptation commit e87a69edc2ce4bfcc460c31e08dcc352a985f88d Author: FeralChild64 <you@example.com> Date: Mon Sep 14 22:43:27 2020 +0200 ACME adaptation commit f49a097bd52e96d00b866c02bda7121e4543233c Author: FeralChild64 <you@example.com> Date: Mon Sep 14 19:02:07 2020 +0200 ACME adaptation commit fa0e9214a633b8e8f867cc70925b390940dcd426 Author: FeralChild64 <you@example.com> Date: Mon Sep 14 17:47:19 2020 +0200 ACME adaptation commit 1b763b91e7a03e426227129c7f22f0ce57a4c197 Author: FeralChild64 <you@example.com> Date: Mon Sep 14 17:17:10 2020 +0200 ACME adaptation commit e92a4b57b232cd85eb1e71090b8a89c7c8461ebc Author: FeralChild64 <you@example.com> Date: Mon Sep 14 17:15:37 2020 +0200 ACME adaptation commit de3c693e8a7e73ea5289198946058e3240894e6a Author: FeralChild64 <you@example.com> Date: Mon Sep 14 17:10:05 2020 +0200 ACME adaptation commit f9bd7ae0f04e932d613be9ed5cb19af9be5d338e Author: FeralChild64 <you@example.com> Date: Sun Sep 13 14:34:44 2020 +0200 ACME adaptation commit 694dee52555dbfc2b1f7f452a9671ff51106c057 Author: FeralChild64 <you@example.com> Date: Sun Sep 13 14:16:14 2020 +0200 ACME adaptation commit 0af2c55edfcd22942d9f25417eb0d35f55b71604 Author: FeralChild64 <you@example.com> Date: Fri Sep 11 17:38:09 2020 +0200 ACME adaptation commit 2015e17334bd56a1e8a13a5abc098d9c2e7ea44f Author: FeralChild64 <you@example.com> Date: Fri Sep 11 16:46:05 2020 +0200 ACME adaptation commit b1e972162798d60f4483cd6cc261e856c20c2c8c Author: FeralChild64 <you@example.com> Date: Fri Sep 11 16:24:31 2020 +0200 ACME adaptation commit 9d027e868466901ba53bf074a79ec8cf16273021 Author: FeralChild64 <you@example.com> Date: Fri Sep 11 15:04:31 2020 +0200 ACME adaptation commit 957186deddd1aa4f3b4f1aa1f421e4239a584e57 Author: FeralChild64 <you@example.com> Date: Thu Sep 10 22:49:07 2020 +0200 ACME adaptation commit b8060f67a455cfac109f08d96b62c360d693b931 Author: FeralChild64 <you@example.com> Date: Wed Sep 9 23:07:28 2020 +0200 ACME adaptation commit e54d004568f44bbfe5c070ef1d7cf3544112e497 Author: FeralChild64 <you@example.com> Date: Wed Sep 9 22:58:20 2020 +0200 ACME adaptation commit f90b77f073c5a605cb31c6ee451f65c8a8aff7d8 Author: FeralChild64 <you@example.com> Date: Wed Sep 9 22:12:09 2020 +0200 ACME adaptation commit b211bb4afcd9c58fe1f5c92f3007717d611cd531 Author: FeralChild64 <you@example.com> Date: Wed Sep 9 22:01:40 2020 +0200 ACME adaptation commit 8d7ea343b07e9e08e5f77f3c414758a6cffd0440 Author: FeralChild64 <you@example.com> Date: Wed Sep 9 21:38:34 2020 +0200 ACME adaptation commit 46413eb0d92d6400aba0ff8dfe556e61e8a44d78 Author: FeralChild64 <you@example.com> Date: Wed Sep 9 21:07:47 2020 +0200 ACME adaptation commit 9f98f69ecc21f7b74a5eb89e247f5a2c6fcb655d Author: FeralChild64 <you@example.com> Date: Wed Sep 9 20:05:03 2020 +0200 ACME adaptation commit 7bb9f1cadc682c7e0a4a6796739d860d473ca110 Author: FeralChild64 <you@example.com> Date: Wed Sep 9 19:55:12 2020 +0200 ACME adaptation commit 5fc115392b5bdca6b56f67ad866b1884d2d2bdf8 Author: FeralChild64 <you@example.com> Date: Wed Sep 9 19:31:10 2020 +0200 ACME adaptation commit b7940fc60e568d859df9e3156f6bacc6d685b2cc Author: FeralChild64 <you@example.com> Date: Wed Sep 9 19:16:09 2020 +0200 ACME adaptation commit 56288cb97197561afa0816b29c134ec1190e8eab Author: FeralChild64 <you@example.com> Date: Wed Sep 9 18:48:23 2020 +0200 ACME adaptation commit 10401a60fc7922a53d782120ef6795d889140218 Author: FeralChild64 <you@example.com> Date: Wed Sep 9 16:34:16 2020 +0200 ACME adaptation commit 8ce76e4d2b56837a691ae84b1a412a2ae32a157b Author: FeralChild64 <you@example.com> Date: Wed Sep 9 16:20:44 2020 +0200 ACME adaptation commit 33fade899fa6172ea6b5b5f6683bb61f544429fd Author: FeralChild64 <you@example.com> Date: Wed Sep 9 15:28:46 2020 +0200 ACME adaptation commit a416f04734402fcfbc57a933731376df2e0180a1 Author: FeralChild64 <you@example.com> Date: Wed Sep 9 12:40:03 2020 +0200 ACME adaptation commit f8daee005b1d29f6912723be2ac94bc5fbeb0508 Author: FeralChild64 <you@example.com> Date: Mon Sep 7 23:29:54 2020 +0200 ACME adaptation commit 83fe6bdd0b08a44fdbfc6eefe323a4b194ccaf5b Author: FeralChild64 <you@example.com> Date: Mon Sep 7 22:23:16 2020 +0200 ACME adaptation commit cb1f75620b9c83000a15c9c7f7acefdfee79a979 Author: FeralChild64 <you@example.com> Date: Mon Sep 7 19:23:12 2020 +0200 ACME adaptation commit e524d517c933ae1f0aeb49764d307fadb4845025 Author: FeralChild64 <you@example.com> Date: Sun Sep 6 08:24:25 2020 +0200 ACME adaptation - replaced comments commit 2ab572c3a21f4a78a7312d0e684bc11d91d1717a Author: FeralChild64 <you@example.com> Date: Sat Sep 5 17:59:10 2020 +0200 ACME adaptation - replaced the assembler
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@@ -13,7 +13,7 @@ Just edit them and recompile the project. To enable particular option - uncommen
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Note however, that features do not came for free - enabling them needs some additional ROM space (in BASIC segment, in KERNAL segment, or in both), which is VERY limited on the target machines. Some options might be unavailable for speecific targets - read the comments in the configuration files. Some options might also carry compatibility and/or performance hit - so choose wisely.
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## Hardware platform and brand
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## Hardware platform
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### `CONFIG_PLATFORM_COMMODORE_64`
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@@ -25,13 +25,17 @@ Since Open ROMs is highly modular, it should be possible to add other platforms
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* 8KB ROM area `$A000`-`$BFFF`
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* 8KB ROM area `$E000`-`$FFFF`
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### `CONFIG_MB_MEGA_65`, `CONFIG_MB_ULTIMATE_64`
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### `CONFIG_MB_M65`, `CONFIG_MB_U64`
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Select if the ROM is going to be used exclusively on the specific motherboard. It prevents from enabling options not having sense, skips initialization of C128-only registers, etc.
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Select if the ROM is going to be used exclusively on the specified motherboard. It prevents from enabling options not having sense, skips initialization of C128-only registers, and enables motherboard-specific features.
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## Brand
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Branding is only allowed for C64 platform, if no motherboard is specified.
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### `CONFIG_BRAND_CUSTOM`
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Intended for custom builds, which are not to be redistributed. Allows to configure branding with `CONFIG_CUSTOM_BRAND` varaible
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Intended for custom builds, for private purposes. Allows to configure branding with `CONFIG_CUSTOM_BRAND` macro.
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### `CONFIG_BRAND_GENERIC`
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@@ -41,12 +45,10 @@ If you don't know which variant to choose - select this one.
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Use this one for any kind of testing/experimental build.
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### `CONFIG_BRAND_MEGA_65`, `CONFIG_BRAND_ULTIMATE_64`
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Select if you are using appropriate motherboard.
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## Processor instruction set
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Processor type should be set only for C64 platform, if no motherboard is specified. Otherwise, it will be selected automatically. Setting proper CPU allows to enable various size/performance optimizations.
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### `CONFIG_CPU_MOS_6502`
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Choose if your CPU only supports the original MOS Technology 6502 instruction set, like:
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@@ -57,35 +59,20 @@ Choose if your CPU only supports the original MOS Technology 6502 instruction se
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If unsure - select this one.
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### `CONFIG_CPU_DTV_6502`
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Choose if your CPU only supports extended C64 DTV instruction set.
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### `CONFIG_CPU_RCW_65C02`
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Choose if your CPU supports the Rockwell 65C02 instruction set.
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### `CONFIG_CPU_WDC_65C02`
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Choose if your CPU supports the Western Design Center 65C02 instruction set, like:
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* WDC 65C02 - used in the Turbo Master accelerator
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It enables some speed/size code optimizations.
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### `CONFIG_CPU_CSG_65CE02`
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Choose if your CPU supports the Commodore Semiconductor Group 65CE02 instruction set, like:
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* CSG 65CE02
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* CSG 4510 - microcontroller used in the Commodore 65 prototypes
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It enables some speed/size code optimizations.
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### `CONFIG_CPU_CSG_4510`
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Choose if your CPU supports the Commodore Semiconductor Group 4510 instruction set, like:
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* CSG 4510 - microcontroller used in the Commodore 65 prototypes
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It enables some speed/size code optimizations and allows C65 memory mapping to work.
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### `CONFIG_CPU_M65_45GS02`
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Choose if you have a MEGA65 FPGA board. It enables some speed/size code optimizations and allows MEGA65 memory mapping to work.
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### `CONFIG_CPU_WDC_65816`
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Choose if your CPU supports the 16-bit Western Design Center 65816 instruction set, like:
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@@ -93,7 +80,12 @@ Choose if your CPU supports the 16-bit Western Design Center 65816 instruction s
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* WDC 65C816 - used in the Flash 8 accelerator
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* WDC 65C816S - used in the SuperCPU accelerator
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It enables some speed/size code optimizations.
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### `CONFIG_CPU_CSG_65CE02`
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Choose if your CPU supports the Commodore Semiconductor Group 65CE02 instruction set, like:
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* CSG 65CE02
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* CSG 4510 - microcontroller used in the Commodore 65 prototypes
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## Memory model
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@@ -115,7 +107,9 @@ It is currently not compatible with MEGA65 extended ROMs.
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Comparing to standard memory model, it needs about 180 bytes in BASIC segment and 80 bytes in KERNAL segment - at the moment of doing the test, these values are expected to change often.
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## IEC devices
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## IEC bus
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IEC bus, also known as Serial Port, is a standard interface to connect disk drives, printers, SD2IEC device, etc.
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### `CONFIG_IEC`
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@@ -145,7 +139,7 @@ Needs about 430 bytes in KERNAL segment. If unsure - enable.
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Causes screen blanking during JiffyDOS file loading to increase performance.
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## Tape support
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## Tape deck
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Note: for MEGA65 most of the tape support code is placed in it's extended ROM; very little of the (tiny) KERNAL segment is used.
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@@ -175,15 +169,15 @@ Enable this option if you are using a tape interface adapter with some audio sig
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Enable this option if you are using a tape interface adapter lacking tape motor control (most likely every adapter currently being sold) - this will eliminate the need to quickly press space when the program header information gets displayed. Note: if you are using a cassette player with REM port, and your adapter is connected to this port too, than you do not need this option.
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## Multiple SID support
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## Sound support
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The SID is a sound chip - the original Commodore 64 had one installed. However, mods exists to add more of them for improved sound capabilities. Emulators and FPGA machines typically allow to simulate more than one too. Unfortunately, there is no standard regarding how these additional chips are visible in the processor address space, and there is no sane way to detect it - thus, it has to be configurable.
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The original Commodore 64 had one SID sound chip installed. However, mods exists to add more of them for improved sound capabilities. Emulators and FPGA machines typically allow to simulate more than one too. Unfortunately, there is no standard regarding how these additional chips are visible in the processor address space, and there is no sane way to detect it - thus, it has to be configurable.
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The SID support in the ROM is very limited - it only disables the sound during startup or warm restart (when STOP+RESTORE is pressed or BRK assembler instruction is executed).
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### `CONFIG_SID_2ND` and `CONFIG_SID_3RD`
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### `CONFIG_SID_2ND_ADDRESS` and `CONFIG_SID_3RD_ADDRESS`
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Each of them add support for one additional SID - addresses should be given in `CONFIG_SID_2ND_ADDRESS` and `CONFIG_SID_3RD_ADDRESS`, respectively. Do not use when `CONFIG_MB_MEGA_65` is selected - the motherboard support code already knows the SID locations.
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Each of them add support for one additional SID - addresses should be given as parameter, respectively. Do not use when `CONFIG_MB_M65` is selected - the motherboard support code already knows the SID locations.
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Each of these options needs 3 bytes in KERNAL segment.
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@@ -191,7 +185,7 @@ Each of these options needs 3 bytes in KERNAL segment.
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Cause the system to support SIDs in `$D4xx` and `$D5xx` ranges, respectively.
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Each of them needs a couple of bytes in KERNAL segment - but they can share some code, and `$D4xx` range support replaces the standard `$D400` address handling, so exact amount depends on the exact configuration. Do not use when `CONFIG_MB_MEGA_65` is selected - the motherboard support code already knows the SID locations.
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Each of them needs a couple of bytes in KERNAL segment - but they can share some code, and `$D4xx` range support replaces the standard `$D400` address handling, so exact amount depends on the exact configuration. Do not use when `CONFIG_MB_M65` is selected - the motherboard support code already knows the SID locations.
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## Keyboard
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