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migrated to ACME assembler

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commit 145d64aa6e78838ed07cefed372f0ad6a4687e97
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 20:16:57 2020 +0200

    ACME adaptation

commit 885209d7822286744ea53232ae7461472a01d5d6
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 19:57:25 2020 +0200

    ACME adaptation

commit 334d84486bc603551887e7cbeb59d329f2224cc7
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 18:29:15 2020 +0200

    ACME adaptation

commit b5966f49bcd8f0ca79cbec93819a31238924707e
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 18:09:31 2020 +0200

    ACME adaptation

commit 786536a93a5eab5e676fca99625b4eb094a554e7
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 17:24:48 2020 +0200

    ACME adaptation

commit 704c70dfb1f5d68775d6f3da220803b8a3990f56
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 15:07:12 2020 +0200

    ACME adaptation

commit 136874964c9083b375f151475310f9636871fc72
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 14:45:14 2020 +0200

    ACME adaptation

commit 8eca0d5700b72d04336e72c5cd3a68e18b85f96d
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 14:06:52 2020 +0200

    ACME adaptation

commit 11d29eb7ee318239d782f85498b6d0524624d5c4
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 13:56:45 2020 +0200

    ACME apaptation

commit c9b5e5e04cceb92c66bc027e6440bc0f7c5a499f
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 13:49:04 2020 +0200

    ACME adaptation

commit f5cc254cbc921f07863807468cb3fe26b410b409
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 13:01:18 2020 +0200

    ACME adaptation

commit e135a27bf9c30cc0965379c954564e06406303b1
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 19 21:55:01 2020 +0200

    ACME adaptation

commit e9dfddf90d9e2795e88b7da40ae050d733faeb56
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 19 21:48:47 2020 +0200

    Makefile fix

commit 07030104c65cf5e5beeacf6d629ccb9245e58657
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 19 21:42:00 2020 +0200

    ACME adaptation

commit f824362ee5bcfbffca86c430b57773b2ffd65655
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 19 20:14:56 2020 +0200

    ACME adaptation

commit 3a3c59007dcd4940d89b8669f34ca56b61c25fdf
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 18 21:51:45 2020 +0200

    ACME adaptation

commit 6790ef7bc88a41de2881c69b7524dd4ab8c74b5d
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 18 20:35:23 2020 +0200

    ACME adaptation

commit 38ad18b90e9ec713aa7ca49576b3388ce1733357
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 18 18:46:20 2020 +0200

    ACME adaptation

commit 541340371122a9702f7b2d9771c298223cffd0e9
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 18 16:49:46 2020 +0200

    ACME adaptation

commit 25cfd5e186459be1a260d3eb8cfff767838de370
Author: FeralChild64 <you@example.com>
Date:   Thu Sep 17 20:13:33 2020 +0200

    ACME adaptation

commit f61599444d5b1d03d8fd8e4a6a7c3b85069bedb3
Author: FeralChild64 <you@example.com>
Date:   Thu Sep 17 19:29:23 2020 +0200

    ACME adaptation

commit b290be31ec7bb2e5723607697da1bbc621c84429
Author: FeralChild64 <you@example.com>
Date:   Thu Sep 17 17:20:14 2020 +0200

    ACME adaptation

commit 877be9e856880d98fd4bcb25b42aaaacda9dc463
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 16 21:47:38 2020 +0200

    ACME adaptation

commit bb20edaf85d386e41d5c2f715b745b68fbd3362e
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 16 21:31:30 2020 +0200

    ACME adaptation

commit c5d31bd8685abce37c8e254d15aac20bd1570d9f
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 16 18:40:49 2020 +0200

    ACME adaptation

commit 29349826b38f8a89649171559dc8cf24c560aff1
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 23:35:47 2020 +0200

    ACME adaptation

commit 8bcd6a621c4b11766d0cf34f79858ba90a67248e
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 22:52:25 2020 +0200

    ACME adaptation

commit e87a69edc2ce4bfcc460c31e08dcc352a985f88d
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 22:43:27 2020 +0200

    ACME adaptation

commit f49a097bd52e96d00b866c02bda7121e4543233c
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 19:02:07 2020 +0200

    ACME adaptation

commit fa0e9214a633b8e8f867cc70925b390940dcd426
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 17:47:19 2020 +0200

    ACME adaptation

commit 1b763b91e7a03e426227129c7f22f0ce57a4c197
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 17:17:10 2020 +0200

    ACME adaptation

commit e92a4b57b232cd85eb1e71090b8a89c7c8461ebc
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 17:15:37 2020 +0200

    ACME adaptation

commit de3c693e8a7e73ea5289198946058e3240894e6a
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 17:10:05 2020 +0200

    ACME adaptation

commit f9bd7ae0f04e932d613be9ed5cb19af9be5d338e
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 13 14:34:44 2020 +0200

    ACME adaptation

commit 694dee52555dbfc2b1f7f452a9671ff51106c057
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 13 14:16:14 2020 +0200

    ACME adaptation

commit 0af2c55edfcd22942d9f25417eb0d35f55b71604
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 11 17:38:09 2020 +0200

    ACME adaptation

commit 2015e17334bd56a1e8a13a5abc098d9c2e7ea44f
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 11 16:46:05 2020 +0200

    ACME adaptation

commit b1e972162798d60f4483cd6cc261e856c20c2c8c
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 11 16:24:31 2020 +0200

    ACME adaptation

commit 9d027e868466901ba53bf074a79ec8cf16273021
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 11 15:04:31 2020 +0200

    ACME adaptation

commit 957186deddd1aa4f3b4f1aa1f421e4239a584e57
Author: FeralChild64 <you@example.com>
Date:   Thu Sep 10 22:49:07 2020 +0200

    ACME adaptation

commit b8060f67a455cfac109f08d96b62c360d693b931
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 23:07:28 2020 +0200

    ACME adaptation

commit e54d004568f44bbfe5c070ef1d7cf3544112e497
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 22:58:20 2020 +0200

    ACME adaptation

commit f90b77f073c5a605cb31c6ee451f65c8a8aff7d8
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 22:12:09 2020 +0200

    ACME adaptation

commit b211bb4afcd9c58fe1f5c92f3007717d611cd531
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 22:01:40 2020 +0200

    ACME adaptation

commit 8d7ea343b07e9e08e5f77f3c414758a6cffd0440
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 21:38:34 2020 +0200

    ACME adaptation

commit 46413eb0d92d6400aba0ff8dfe556e61e8a44d78
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 21:07:47 2020 +0200

    ACME adaptation

commit 9f98f69ecc21f7b74a5eb89e247f5a2c6fcb655d
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 20:05:03 2020 +0200

    ACME adaptation

commit 7bb9f1cadc682c7e0a4a6796739d860d473ca110
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 19:55:12 2020 +0200

    ACME adaptation

commit 5fc115392b5bdca6b56f67ad866b1884d2d2bdf8
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 19:31:10 2020 +0200

    ACME adaptation

commit b7940fc60e568d859df9e3156f6bacc6d685b2cc
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 19:16:09 2020 +0200

    ACME adaptation

commit 56288cb97197561afa0816b29c134ec1190e8eab
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 18:48:23 2020 +0200

    ACME adaptation

commit 10401a60fc7922a53d782120ef6795d889140218
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 16:34:16 2020 +0200

    ACME adaptation

commit 8ce76e4d2b56837a691ae84b1a412a2ae32a157b
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 16:20:44 2020 +0200

    ACME adaptation

commit 33fade899fa6172ea6b5b5f6683bb61f544429fd
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 15:28:46 2020 +0200

    ACME adaptation

commit a416f04734402fcfbc57a933731376df2e0180a1
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 12:40:03 2020 +0200

    ACME adaptation

commit f8daee005b1d29f6912723be2ac94bc5fbeb0508
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 7 23:29:54 2020 +0200

    ACME adaptation

commit 83fe6bdd0b08a44fdbfc6eefe323a4b194ccaf5b
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 7 22:23:16 2020 +0200

    ACME adaptation

commit cb1f75620b9c83000a15c9c7f7acefdfee79a979
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 7 19:23:12 2020 +0200

    ACME adaptation

commit e524d517c933ae1f0aeb49764d307fadb4845025
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 6 08:24:25 2020 +0200

    ACME adaptation - replaced comments

commit 2ab572c3a21f4a78a7312d0e684bc11d91d1717a
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 5 17:59:10 2020 +0200

    ACME adaptation - replaced the assembler
This commit is contained in:
FeralChild64 committed 2020-09-20 20:22:36 +02:00
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src/aliases/,aliases_hardware.s
+141 -160
View File
@@ -1,198 +1,179 @@
//
// Names of hardware registers - names from C64 Programmer's Reference Guide, sometimes slightly modified
//
;
; Names of hardware registers - names from C64 Programmer's Reference Guide, sometimes slightly modified
;
#if CONFIG_PLATFORM_COMMODORE_64
!ifdef CONFIG_PLATFORM_COMMODORE_64 {
// CPU memory registers
; CPU memory registers
.label CPU_D6510 = $00
.label CPU_R6510 = $01
!addr CPU_D6510 = $00
!addr CPU_R6510 = $01
// VIC-II registers
; VIC-II registers
.label __VIC_BASE = $D000 // base address of the chip
!addr __VIC_BASE = $D000 ; base address of the chip
.label VIC_SP0X = $D000
.label VIC_SP0Y = $D001
.label VIC_SP1X = $D002
.label VIC_SP1Y = $D003
.label VIC_SP2X = $D004
.label VIC_SP2Y = $D005
.label VIC_SP3X = $D006
.label VIC_SP3Y = $D007
.label VIC_SP4X = $D008
.label VIC_SP4Y = $D009
.label VIC_SP5X = $D00A
.label VIC_SP5Y = $D00B
.label VIC_SP6X = $D00C
.label VIC_SP6Y = $D00D
.label VIC_SP7X = $D00E
.label VIC_SP7Y = $D00F
!addr VIC_SP0X = $D000
!addr VIC_SP0Y = $D001
!addr VIC_SP1X = $D002
!addr VIC_SP1Y = $D003
!addr VIC_SP2X = $D004
!addr VIC_SP2Y = $D005
!addr VIC_SP3X = $D006
!addr VIC_SP3Y = $D007
!addr VIC_SP4X = $D008
!addr VIC_SP4Y = $D009
!addr VIC_SP5X = $D00A
!addr VIC_SP5Y = $D00B
!addr VIC_SP6X = $D00C
!addr VIC_SP6Y = $D00D
!addr VIC_SP7X = $D00E
!addr VIC_SP7Y = $D00F
.label VIC_MSIGX = $D010
.label VIC_SCROLY = $D011
.label VIC_RASTER = $D012
.label VIC_LPENX = $D013
.label VIC_LPENY = $D014
.label VIC_SPENA = $D015
.label VIC_SCROLX = $D016
.label VIC_YXPAND = $D017
.label VIC_YMCSB = $D018
.label VIC_IRQ = $D019
.label VIC_IRQMSK = $D01A
.label VIC_SPBGPR = $D01B
.label VIC_SPMC = $D01C
.label VIC_XXPAND = $D01D
.label VIC_SPSPCL = $D01E
.label VIC_SPBGCL = $D01F
!addr VIC_MSIGX = $D010
!addr VIC_SCROLY = $D011
!addr VIC_RASTER = $D012
!addr VIC_LPENX = $D013
!addr VIC_LPENY = $D014
!addr VIC_SPENA = $D015
!addr VIC_SCROLX = $D016
!addr VIC_YXPAND = $D017
!addr VIC_YMCSB = $D018
!addr VIC_IRQ = $D019
!addr VIC_IRQMSK = $D01A
!addr VIC_SPBGPR = $D01B
!addr VIC_SPMC = $D01C
!addr VIC_XXPAND = $D01D
!addr VIC_SPSPCL = $D01E
!addr VIC_SPBGCL = $D01F
.label VIC_EXTCOL = $D020
.label VIC_BGCOL0 = $D021
.label VIC_BGCOL1 = $D022
.label VIC_BGCOL2 = $D023
.label VIC_BGCOL3 = $D024
.label VIC_SPMC0 = $D025
.label VIC_SPMC1 = $D026
.label VIC_SP0COL = $D027
.label VIC_SP1COL = $D028
.label VIC_SP2COL = $D029
.label VIC_SP3COL = $D02A
.label VIC_SP4COL = $D02B
.label VIC_SP5COL = $D02C
.label VIC_SP6COL = $D02D
.label VIC_SP7COL = $D02E
!addr VIC_EXTCOL = $D020
!addr VIC_BGCOL0 = $D021
!addr VIC_BGCOL1 = $D022
!addr VIC_BGCOL2 = $D023
!addr VIC_BGCOL3 = $D024
!addr VIC_SPMC0 = $D025
!addr VIC_SPMC1 = $D026
!addr VIC_SP0COL = $D027
!addr VIC_SP1COL = $D028
!addr VIC_SP2COL = $D029
!addr VIC_SP3COL = $D02A
!addr VIC_SP4COL = $D02B
!addr VIC_SP5COL = $D02C
!addr VIC_SP6COL = $D02D
!addr VIC_SP7COL = $D02E
#if !CONFIG_MB_MEGA_65 && !CONFIG_MB_ULTIMATE_64
!ifndef CONFIG_MB_M65 { !ifndef CONFIG_MB_U64 {
.label VIC_XSCAN = $D02F // C128 only
.label VIC_CLKRATE = $D030 // C128 only
!addr VIC_XSCAN = $D02F ; C128 only
!addr VIC_CLKRATE = $D030 ; C128 only
} }
#endif
; SID registers
// SID registers
!addr __SID_BASE = $D400 ; base address of the chip
.label __SID_BASE = $D400 // base address of the chip
!addr SID_FRELO1 = $D400
!addr SID_FREHI1 = $D401
!addr SID_PWLO1 = $D402
!addr SID_PWHI1 = $D403
!addr SID_VCREG1 = $D404
!addr SID_ATDCY1 = $D405
!addr SID_SUREL1 = $D406
#if CONFIG_MB_MEGA_65
!addr SID_FRELO2 = $D407
!addr SID_FREHI2 = $D408
!addr SID_PWLO2 = $D409
!addr SID_PWHI2 = $D40A
!addr SID_VCREG2 = $D40B
!addr SID_ATDCY2 = $D40C
!addr SID_SUREL2 = $D40D
.label __SID_R1_OFFSET = $00 // right SID 1, $D400
.label __SID_R2_OFFSET = $20 // right SID 2, $D420
.label __SID_L1_OFFSET = $40 // left SID 1, $D440
.label __SID_L2_OFFSET = $60 // left SID 2, $D460
!addr SID_FRELO3 = $D40E
!addr SID_FREHI3 = $D40F
!addr SID_PWLO3 = $D410
!addr SID_PWHI3 = $D411
!addr SID_VCREG3 = $D412
!addr SID_ATDCY3 = $D413
!addr SID_SUREL3 = $D414
#endif
!addr SID_CUTLO = $D415
!addr SID_CUTHI = $D416
!addr SID_RESON = $D417
!addr SID_SIGVOL = $D418
!addr SID_POTX = $D419
!addr SID_POTY = $D41A
!addr SID_RANDOM = $D41B
!addr SID_ENV3 = $D41C
.label SID_FRELO1 = $D400
.label SID_FREHI1 = $D401
.label SID_PWLO1 = $D402
.label SID_PWHI1 = $D403
.label SID_VCREG1 = $D404
.label SID_ATDCY1 = $D405
.label SID_SUREL1 = $D406
; Color COLOR_RAM
.label SID_FRELO2 = $D407
.label SID_FREHI2 = $D408
.label SID_PWLO2 = $D409
.label SID_PWHI2 = $D40A
.label SID_VCREG2 = $D40B
.label SID_ATDCY2 = $D40C
.label SID_SUREL2 = $D40D
!addr COLOR_RAM = $D800
.label SID_FRELO3 = $D40E
.label SID_FREHI3 = $D40F
.label SID_PWLO3 = $D410
.label SID_PWHI3 = $D411
.label SID_VCREG3 = $D412
.label SID_ATDCY3 = $D413
.label SID_SUREL3 = $D414
; CIA #1 registers
.label SID_CUTLO = $D415
.label SID_CUTHI = $D416
.label SID_RESON = $D417
.label SID_SIGVOL = $D418
.label SID_POTX = $D419
.label SID_POTY = $D41A
.label SID_RANDOM = $D41B
.label SID_ENV3 = $D41C
!addr __CIA1_BASE = $DC00 ; base address of the chip
// Color COLOR_RAM
!addr CIA1_PRA = $DC00
!addr CIA1_PRB = $DC01
!addr CIA1_DDRA = $DC02
!addr CIA1_DDRB = $DC03
.label COLOR_RAM = $D800
!addr CIA1_TIMALO = $DC04
!addr CIA1_TIMAHI = $DC05
!addr CIA1_TIMBLO = $DC06
!addr CIA1_TIMBHI = $DC07
// CIA #1 registers
!addr CIA1_TODTEN = $DC08
!addr CIA1_TODSEC = $DC09
!addr CIA1_TODMIN = $DC0A
!addr CIA1_TODHRS = $DC0B
.label __CIA1_BASE = $DC00 // base address of the chip
!addr CIA1_SDR = $DC0C
!addr CIA1_ICR = $DC0D
!addr CIA1_CRA = $DC0E
!addr CIA1_CRB = $DC0F
.label CIA1_PRA = $DC00
.label CIA1_PRB = $DC01
.label CIA1_DDRA = $DC02
.label CIA1_DDRB = $DC03
; CIA #2 registers
.label CIA1_TIMALO = $DC04
.label CIA1_TIMAHI = $DC05
.label CIA1_TIMBLO = $DC06
.label CIA1_TIMBHI = $DC07
!addr __CIA2_BASE = $DD00 ; base address of the chip
.label CIA1_TODTEN = $DC08
.label CIA1_TODSEC = $DC09
.label CIA1_TODMIN = $DC0A
.label CIA1_TODHRS = $DC0B
!addr CIA2_PRA = $DD00 ; VIC bank switching and IEC port
!addr CIA2_PRB = $DD01
!addr CIA2_DDRA = $DD02
!addr CIA2_DDRB = $DD03
.label CIA1_SDR = $DC0C
.label CIA1_ICR = $DC0D
.label CIA1_CRA = $DC0E
.label CIA1_CRB = $DC0F
!addr CIA2_TIMALO = $DD04
!addr CIA2_TIMAHI = $DD05
!addr CIA2_TIMBLO = $DD06
!addr CIA2_TIMBHI = $DD07
// CIA #2 registers
!addr CIA2_TODTEN = $DD08
!addr CIA2_TODSEC = $DD09
!addr CIA2_TODMIN = $DD0A
!addr CIA2_TODHRS = $DD0B
.label __CIA2_BASE = $DD00 // base address of the chip
!addr CIA2_SDR = $DD0C
!addr CIA2_ICR = $DD0D
!addr CIA2_CRA = $DD0E
!addr CIA2_CRB = $DD0F
.label CIA2_PRA = $DD00 // VIC bank switching and IEC port
.label CIA2_PRB = $DD01
.label CIA2_DDRA = $DD02
.label CIA2_DDRB = $DD03
.label CIA2_TIMALO = $DD04
.label CIA2_TIMAHI = $DD05
.label CIA2_TIMBLO = $DD06
.label CIA2_TIMBHI = $DD07
.label CIA2_TODTEN = $DD08
.label CIA2_TODSEC = $DD09
.label CIA2_TODMIN = $DD0A
.label CIA2_TODHRS = $DD0B
.label CIA2_SDR = $DD0C
.label CIA2_ICR = $DD0D
.label CIA2_CRA = $DD0E
.label CIA2_CRB = $DD0F
// CIA #2 helper bits - IEC bus
; CIA #2 helper bits - IEC bus
.const BIT_CIA2_PRA_ATN_OUT = $08 // 1 - low (pulled), 0 - high (released)
.const BIT_CIA2_PRA_CLK_OUT = $10 // 1 - low (pulled), 0 - high (released)
.const BIT_CIA2_PRA_DAT_OUT = $20 // 1 - low (pulled), 0 - high (released)
.const BIT_CIA2_PRA_CLK_IN = $40 // 0 - low (pulled), 1 - high (released)
.const BIT_CIA2_PRA_DAT_IN = $80 // 0 - low (pulled), 1 - high (released)
!set BIT_CIA2_PRA_ATN_OUT = $08 ; 1 - low (pulled), 0 - high (released)
!set BIT_CIA2_PRA_CLK_OUT = $10 ; 1 - low (pulled), 0 - high (released)
!set BIT_CIA2_PRA_DAT_OUT = $20 ; 1 - low (pulled), 0 - high (released)
!set BIT_CIA2_PRA_CLK_IN = $40 ; 0 - low (pulled), 1 - high (released)
!set BIT_CIA2_PRA_DAT_IN = $80 ; 0 - low (pulled), 1 - high (released)
#if CONFIG_MB_MEGA_65
; SuperCPU registers
.label C65_EXTKEYS_PR = $D607
.label C65_EXTKEYS_DDR = $D608
!ifndef CONFIG_MB_M65 {
#endif
!addr SCPU_SPEED_NORMAL = $D07A
!addr SCPU_SPEED_TURBO = $D07B
}
#if !CONFIG_MB_MEGA_65
// SuperCPU registers
.label SCPU_SPEED_NORMAL = $D07A
.label SCPU_SPEED_TURBO = $D07B
#endif
#endif
}