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migrated to ACME assembler

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commit 145d64aa6e78838ed07cefed372f0ad6a4687e97
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 20:16:57 2020 +0200

    ACME adaptation

commit 885209d7822286744ea53232ae7461472a01d5d6
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 19:57:25 2020 +0200

    ACME adaptation

commit 334d84486bc603551887e7cbeb59d329f2224cc7
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 18:29:15 2020 +0200

    ACME adaptation

commit b5966f49bcd8f0ca79cbec93819a31238924707e
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 18:09:31 2020 +0200

    ACME adaptation

commit 786536a93a5eab5e676fca99625b4eb094a554e7
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 17:24:48 2020 +0200

    ACME adaptation

commit 704c70dfb1f5d68775d6f3da220803b8a3990f56
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 15:07:12 2020 +0200

    ACME adaptation

commit 136874964c9083b375f151475310f9636871fc72
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 14:45:14 2020 +0200

    ACME adaptation

commit 8eca0d5700b72d04336e72c5cd3a68e18b85f96d
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 14:06:52 2020 +0200

    ACME adaptation

commit 11d29eb7ee318239d782f85498b6d0524624d5c4
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 13:56:45 2020 +0200

    ACME apaptation

commit c9b5e5e04cceb92c66bc027e6440bc0f7c5a499f
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 13:49:04 2020 +0200

    ACME adaptation

commit f5cc254cbc921f07863807468cb3fe26b410b409
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 13:01:18 2020 +0200

    ACME adaptation

commit e135a27bf9c30cc0965379c954564e06406303b1
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 19 21:55:01 2020 +0200

    ACME adaptation

commit e9dfddf90d9e2795e88b7da40ae050d733faeb56
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 19 21:48:47 2020 +0200

    Makefile fix

commit 07030104c65cf5e5beeacf6d629ccb9245e58657
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 19 21:42:00 2020 +0200

    ACME adaptation

commit f824362ee5bcfbffca86c430b57773b2ffd65655
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 19 20:14:56 2020 +0200

    ACME adaptation

commit 3a3c59007dcd4940d89b8669f34ca56b61c25fdf
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 18 21:51:45 2020 +0200

    ACME adaptation

commit 6790ef7bc88a41de2881c69b7524dd4ab8c74b5d
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 18 20:35:23 2020 +0200

    ACME adaptation

commit 38ad18b90e9ec713aa7ca49576b3388ce1733357
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 18 18:46:20 2020 +0200

    ACME adaptation

commit 541340371122a9702f7b2d9771c298223cffd0e9
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 18 16:49:46 2020 +0200

    ACME adaptation

commit 25cfd5e186459be1a260d3eb8cfff767838de370
Author: FeralChild64 <you@example.com>
Date:   Thu Sep 17 20:13:33 2020 +0200

    ACME adaptation

commit f61599444d5b1d03d8fd8e4a6a7c3b85069bedb3
Author: FeralChild64 <you@example.com>
Date:   Thu Sep 17 19:29:23 2020 +0200

    ACME adaptation

commit b290be31ec7bb2e5723607697da1bbc621c84429
Author: FeralChild64 <you@example.com>
Date:   Thu Sep 17 17:20:14 2020 +0200

    ACME adaptation

commit 877be9e856880d98fd4bcb25b42aaaacda9dc463
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 16 21:47:38 2020 +0200

    ACME adaptation

commit bb20edaf85d386e41d5c2f715b745b68fbd3362e
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 16 21:31:30 2020 +0200

    ACME adaptation

commit c5d31bd8685abce37c8e254d15aac20bd1570d9f
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 16 18:40:49 2020 +0200

    ACME adaptation

commit 29349826b38f8a89649171559dc8cf24c560aff1
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 23:35:47 2020 +0200

    ACME adaptation

commit 8bcd6a621c4b11766d0cf34f79858ba90a67248e
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 22:52:25 2020 +0200

    ACME adaptation

commit e87a69edc2ce4bfcc460c31e08dcc352a985f88d
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 22:43:27 2020 +0200

    ACME adaptation

commit f49a097bd52e96d00b866c02bda7121e4543233c
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 19:02:07 2020 +0200

    ACME adaptation

commit fa0e9214a633b8e8f867cc70925b390940dcd426
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 17:47:19 2020 +0200

    ACME adaptation

commit 1b763b91e7a03e426227129c7f22f0ce57a4c197
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 17:17:10 2020 +0200

    ACME adaptation

commit e92a4b57b232cd85eb1e71090b8a89c7c8461ebc
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 17:15:37 2020 +0200

    ACME adaptation

commit de3c693e8a7e73ea5289198946058e3240894e6a
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 17:10:05 2020 +0200

    ACME adaptation

commit f9bd7ae0f04e932d613be9ed5cb19af9be5d338e
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 13 14:34:44 2020 +0200

    ACME adaptation

commit 694dee52555dbfc2b1f7f452a9671ff51106c057
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 13 14:16:14 2020 +0200

    ACME adaptation

commit 0af2c55edfcd22942d9f25417eb0d35f55b71604
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 11 17:38:09 2020 +0200

    ACME adaptation

commit 2015e17334bd56a1e8a13a5abc098d9c2e7ea44f
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 11 16:46:05 2020 +0200

    ACME adaptation

commit b1e972162798d60f4483cd6cc261e856c20c2c8c
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 11 16:24:31 2020 +0200

    ACME adaptation

commit 9d027e868466901ba53bf074a79ec8cf16273021
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 11 15:04:31 2020 +0200

    ACME adaptation

commit 957186deddd1aa4f3b4f1aa1f421e4239a584e57
Author: FeralChild64 <you@example.com>
Date:   Thu Sep 10 22:49:07 2020 +0200

    ACME adaptation

commit b8060f67a455cfac109f08d96b62c360d693b931
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 23:07:28 2020 +0200

    ACME adaptation

commit e54d004568f44bbfe5c070ef1d7cf3544112e497
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 22:58:20 2020 +0200

    ACME adaptation

commit f90b77f073c5a605cb31c6ee451f65c8a8aff7d8
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 22:12:09 2020 +0200

    ACME adaptation

commit b211bb4afcd9c58fe1f5c92f3007717d611cd531
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 22:01:40 2020 +0200

    ACME adaptation

commit 8d7ea343b07e9e08e5f77f3c414758a6cffd0440
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 21:38:34 2020 +0200

    ACME adaptation

commit 46413eb0d92d6400aba0ff8dfe556e61e8a44d78
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 21:07:47 2020 +0200

    ACME adaptation

commit 9f98f69ecc21f7b74a5eb89e247f5a2c6fcb655d
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 20:05:03 2020 +0200

    ACME adaptation

commit 7bb9f1cadc682c7e0a4a6796739d860d473ca110
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 19:55:12 2020 +0200

    ACME adaptation

commit 5fc115392b5bdca6b56f67ad866b1884d2d2bdf8
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 19:31:10 2020 +0200

    ACME adaptation

commit b7940fc60e568d859df9e3156f6bacc6d685b2cc
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 19:16:09 2020 +0200

    ACME adaptation

commit 56288cb97197561afa0816b29c134ec1190e8eab
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 18:48:23 2020 +0200

    ACME adaptation

commit 10401a60fc7922a53d782120ef6795d889140218
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 16:34:16 2020 +0200

    ACME adaptation

commit 8ce76e4d2b56837a691ae84b1a412a2ae32a157b
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 16:20:44 2020 +0200

    ACME adaptation

commit 33fade899fa6172ea6b5b5f6683bb61f544429fd
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 15:28:46 2020 +0200

    ACME adaptation

commit a416f04734402fcfbc57a933731376df2e0180a1
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 12:40:03 2020 +0200

    ACME adaptation

commit f8daee005b1d29f6912723be2ac94bc5fbeb0508
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 7 23:29:54 2020 +0200

    ACME adaptation

commit 83fe6bdd0b08a44fdbfc6eefe323a4b194ccaf5b
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 7 22:23:16 2020 +0200

    ACME adaptation

commit cb1f75620b9c83000a15c9c7f7acefdfee79a979
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 7 19:23:12 2020 +0200

    ACME adaptation

commit e524d517c933ae1f0aeb49764d307fadb4845025
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 6 08:24:25 2020 +0200

    ACME adaptation - replaced comments

commit 2ab572c3a21f4a78a7312d0e684bc11d91d1717a
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 5 17:59:10 2020 +0200

    ACME adaptation - replaced the assembler
This commit is contained in:
FeralChild64 committed 2020-09-20 20:22:36 +02:00
1 parent bfc8291e41
commit c8d255130c
685 files changed
+15835 -16296
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src/kernal/init/cartridge_check.s
+8 -8
View File
@@ -1,22 +1,22 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# X16 * #IGNORE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# X16 * #IGNORE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
// c64 prg p263
; c64 prg p263
cartridge_check:
ldx #$05
!:
@1:
lda CART_SIG-1,x
cmp cartridge_signature-1,x
bne cartridge_check_end
dex
bne !-
bne @1
// FALLTROUGH
; FALLTROUGH
cartridge_check_end:
src/kernal/init/cint_screen_keyboard.s
+32 -33
View File
@@ -1,76 +1,75 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
//
// This is a part CINT which initializes screen and keyboard
//
// For more details see:
// - [RG64] C64 Programmers Reference Guide - page 280
// - [CM64] Computes Mapping the Commodore 64 - page 242
//
;
; This is a part CINT which initializes screen and keyboard
;
; For more details see:
; - [RG64] C64 Programmers Reference Guide - page 280
; - [CM64] Computes Mapping the Commodore 64 - page 242
;
cint_screen_keyboard:
// Setup KEYLOG vector
; Setup KEYLOG vector
lda #<scnkey_set_keytab
sta KEYLOG+0
lda #>scnkey_set_keytab
sta KEYLOG+1
// Initialise cursor blink flags (Computes Mapping the 64 p215)
; Initialise cursor blink flags (Computes Mapping the 64 p215)
lda #$01
sta BLNCT
sta BLNSW
// Enable cursor repeat - XXX make it configurable
; Enable cursor repeat - XXX make it configurable
#if CONFIG_KEY_REPEAT_DEFAULT && !CONFIG_KEY_REPEAT_ALWAYS
!ifdef CONFIG_KEY_REPEAT_DEFAULT { !ifndef CONFIG_KEY_REPEAT_ALWAYS {
lda #$80
sta RPTFLG
} }
#endif
; Set keyboard decode vector (Computes Mapping the 64 p215)
// Set keyboard decode vector (Computes Mapping the 64 p215)
!ifdef CONFIG_LEGACY_SCNKEY {
#if CONFIG_LEGACY_SCNKEY
// Set initial variables for our improved keyboard scan routine
; Set initial variables for our improved keyboard scan routine
lda #$FF
ldx #6
!: sta BufferOld,x
@1:
sta BufferOld,x
dex
bpl !-
bpl @1
sta BufferQuantity
// Set key repeat delay (Computes Mapping the 64 p215)
// Making some numbers up here: Repeat every ~1/10th sec
// But require key to be held for ~1/3sec before
// repeating (Computes Mapping the 64 p58)
; Set key repeat delay (Computes Mapping the 64 p215)
; Making some numbers up here: Repeat every ~1/10th sec
; But require key to be held for ~1/3sec before
; repeating (Computes Mapping the 64 p58)
// Not needed for default keyboard scanning code
; Not needed for default keyboard scanning code
ldx #22-2 // Fudge factor to match speed
ldx #22-2 ; Fudge factor to match speed
stx DELAY
#endif
}
// Set current colour for text (Computes Mapping the 64 p215)
; Set current colour for text (Computes Mapping the 64 p215)
ldx #CONFIG_COLOR_TXT
stx COLOR
// Set maximum keyboard buffer size (Computes Mapping the 64 p215)
; Set maximum keyboard buffer size (Computes Mapping the 64 p215)
ldx #10
stx XMAX
// Put non-zero value in MODE to enable case switch
; Put non-zero value in MODE to enable case switch
ldx #$00
stx MODE
// Fallthrough/jump to screen clear routine (Computes Mapping the 64 p215)
; Fallthrough/jump to screen clear routine (Computes Mapping the 64 p215)
jmp clear_screen
src/kernal/init/e518.cint_legacy.s
+23 -24
View File
@@ -1,40 +1,39 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
//
// Part of the official Kernal routine, described in:
//
// - [RG64] C64 Programmers Reference Guide - page 280
// - [CM64] Computes Mapping the Commodore 64 - page 242
//
// CPU registers that has to be preserved (see [RG64]): none
//
;
; Part of the official Kernal routine, described in:
;
; - [RG64] C64 Programmers Reference Guide - page 280
; - [CM64] Computes Mapping the Commodore 64 - page 242
;
; CPU registers that has to be preserved (see [RG64]): none
;
cint_legacy: // $E518
cint_legacy: ; $E518
#if ROM_LAYOUT_M65
!ifdef CONFIG_MB_M65 {
jsr M65_MODEGET
bcs !+
bcs @1
jsr M65_MODESET
bra cint_legacy_end
!:
#endif
// Setup video and I/O
// See here: https://csdb.dk/forums/index.php?roomid=11&topicid=17048&firstpost=22
@1:
}
; Setup video and I/O
; See here: https://csdb.dk/forums/index.php?roomid=11&topicid=17048&firstpost=22
jsr vicii_init
// FALLTROUGH
; FALLTROUGH
cint_legacy_end:
// Code below must be placed under $E51B, or some code will break - see here:
// - https://csdb.dk/forums/index.php?roomid=11&topicid=17048&firstpost=2
// Game 'Operacja Proboszcz' is one example.
; Code below must be placed under $E51B, or some code will break - see here:
; - https://csdb.dk/forums/index.php?roomid=11&topicid=17048&firstpost=2
; Game 'Operacja Proboszcz' is one example.
jmp cint_screen_keyboard // XXX try to fit the code here
jmp cint_screen_keyboard ; XXX try to fit the code here
src/kernal/init/e5a0.vicii_init.s
+38 -35
View File
@@ -1,71 +1,74 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# M65 KERNAL_0 #TAKE
// #LAYOUT# M65 KERNAL_1 #TAKE-FLOAT
// #LAYOUT# X16 * #IGNORE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# M65 KERNAL_0 #TAKE
;; #LAYOUT# M65 KERNAL_1 #TAKE-FLOAT
;; #LAYOUT# X16 * #IGNORE
;; #LAYOUT# * * #IGNORE
//
// Well-known Kernal routine, described in:
//
// - [CM64] Computes Mapping the Commodore 64 - page 215
//
;
; Well-known Kernal routine, described in:
;
; - [CM64] Computes Mapping the Commodore 64 - page 215
;
vicii_init:
#if (ROM_LAYOUT_M65 && SEGMENT_KERNAL_0)
!ifdef SEGMENT_M65_KERNAL_0 {
jsr map_KERNAL_1
jsr_ind VK1__vicii_init
jmp map_NORMAL
jsr map_KERNAL_1
jsr (VK1__vicii_init)
jmp map_NORMAL
#else
} else {
// Clear everything - turn off sprites (observed hanging around after
// running programs and resetting), etc.
; Clear everything - turn off sprites (observed hanging around after
; running programs and resetting), etc.
lda #$00
ldx #$2E
!:
@1:
sta __VIC_BASE, x
dex
bpl !-
bpl @1
#if !CONFIG_MB_MEGA_65 && !CONFIG_MB_ULTIMATE_64
!ifndef CONFIG_MB_M65 { !ifndef CONFIG_MB_U64 {
// Disable C128 extra keys - just to be sure they will not interfere with anything
; Disable C128 extra keys - just to be sure they will not interfere with anything
stx VIC_XSCAN
// Disable the C128 2MHz mode, it prevents VIC-II display from working correctly
; Disable the C128 2MHz mode, it prevents VIC-II display from working correctly
stx VIC_CLKRATE
} }
#endif
; Set up default IO values
; - [CM64] page 129 - VIC_SCROLY
; - [CM64] pages 140-144 - VIC_SCROLX
; - [CM64] pages 145-146 - VIC_YMCSB
// Set up default IO values
// - [CM64] page 129 - VIC_SCROLY
// - [CM64] pages 140-144 - VIC_SCROLX
// - [CM64] pages 145-146 - VIC_YMCSB
lda #$1B // according to [CM64] page 137 some software assumes oldest bit is 0
lda #$1B ; according to [CM64] page 137 some software assumes oldest bit is 0
sta VIC_SCROLY
lda #$C8
sta VIC_SCROLX // 40 column, etc.
sta VIC_SCROLX ; 40 column, etc.
lda #$14
sta VIC_YMCSB
lda #$0F
sta VIC_IRQ // clear all interrupts
sta VIC_IRQ ; clear all interrupts
// We use a different colour scheme of white text on all blue by default,
// but brand-specific color scheme can also be enabled
; We use a different colour scheme of white text on all blue by default,
; but brand-specific color scheme can also be enabled
lda #CONFIG_COLOR_BG
sta VIC_EXTCOL
sta VIC_BGCOL0
// Setup default I/O devices
; Setup default I/O devices
!ifdef CONFIG_IEC {
jmp clrchn_reset
} else {
jmp CLRCHN
}
#endif // ROM layout
} ; ROM layout
src/kernal/init/fce2.hw_entry_reset.s
+38 -44
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@@ -1,78 +1,72 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
// Resources describing the C64 reset sequence:
// https://www.c64-wiki.com/wiki/Reset_(Process)
; Resources describing the C64 reset sequence:
; https://www.c64-wiki.com/wiki/Reset_(Process)
hw_entry_reset:
// The GPL program at https://github.com/Klaus2m5/6502_65C02_functional_tests/blob/master/6502_functional_test.a65
// uses the similar initial reset sequence, affirmed by c64 PRG p269
; The GPL program at https://github.com/Klaus2m5/6502_65C02_functional_tests/blob/master/6502_functional_test.a65
; uses the similar initial reset sequence, affirmed by c64 PRG p269
sei // disable the interrupts, as fast as possible - they are disabled in case of HW reset,
// but this routine can be also called manually
sei ; disable the interrupts, as fast as possible - they are disabled in case of HW reset,
; but this routine can be also called manually
cld // required for all CPUs - due to possibility of manual call
cld ; required for all CPUs - due to possibility of manual call
#if HAS_OPCODES_65CE02
!ifdef HAS_OPCODES_65CE02 {
see // disable extended stack
#endif
see ; disable extended stack
}
ldx #$FF
txs
#if ROM_LAYOUT_M65
!ifdef CONFIG_MB_M65 {
jsr m65_reset_part
}
#endif
!ifdef CONFIG_PLATFORM_COMMODORE_64 {
#if CONFIG_PLATFORM_COMMODORE_64
; The following routine is based on reading the public KERNAL jumptable routine
; list, and making unimaginative assumptions about what should be done on reset.
; Also, https://codebase64.org/doku.php?id=base:assembling_your_own_cart_rom_image was used
; as it shows example startup sequence, to be followe by cartridge creators
// The following routine is based on reading the public KERNAL jumptable routine
// list, and making unimaginative assumptions about what should be done on reset.
// Also, https://codebase64.org/doku.php?id=base:assembling_your_own_cart_rom_image was used
// as it shows example startup sequence, to be followe by cartridge creators
// C64 PRG p269
; C64 PRG p269
jsr cartridge_check
bne !+
bne @1
jmp (ICART_COLD_START)
!:
@1:
// Disable the screen (and set 40 columns) to prevent visual glitches later
; Disable the screen (and set 40 columns) to prevent visual glitches later
ldx #$28
stx VIC_SCROLX
#endif
// Initialising IO is obviously required. Also indicated by c64 prg p269.
}
; Initialising IO is obviously required. Also indicated by c64 prg p269.
jsr JIOINIT
// Setting up the screen and testing ram is obviously required
// also affirmed by p269 of c64 prg
jsr JRAMTAS // called RANTAM on Codebase64 wiki
; Setting up the screen and testing ram is obviously required
; also affirmed by p269 of c64 prg
jsr JRAMTAS ; called RANTAM on Codebase64 wiki
// Resetting IO vectors is obviously required, if we want interrupts to run
// also affirmed by c64 prg p269
; Resetting IO vectors is obviously required, if we want interrupts to run
; also affirmed by c64 prg p269
jsr JRESTOR
// "Compute's Mapping the 64" p236
; "Compute's Mapping the 64" p236
jsr JCINT
#if ROM_LAYOUT_M65
!ifdef CONFIG_MB_M65 {
clc
jsr M65_MODESET // on MEGA65 go to native mode by default
jsr M65_MODESET ; on MEGA65 go to native mode by default
}
; What do we do when finished? A C64 jumps into the BASIC ROM
cli ; allow interrupts to happen
#endif
// What do we do when finished? A C64 jumps into the BASIC ROM
cli // allow interrupts to happen
// c64 prg p269
; c64 prg p269
jmp (IBASIC_COLD_START)
src/kernal/init/fd50.ramtas.s
+55 -51
View File
@@ -1,71 +1,71 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# M65 KERNAL_0 #TAKE
// #LAYOUT# M65 KERNAL_1 #TAKE-FLOAT
// #LAYOUT# X16 KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# M65 KERNAL_0 #TAKE
;; #LAYOUT# M65 KERNAL_1 #TAKE-FLOAT
;; #LAYOUT# X16 KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
//
// Official Kernal routine, described in:
//
// - [RG64] C64 Programmers Reference Guide - page 291
// - [CM64] Computes Mapping the Commodore 64 - page 237
//
// CPU registers that has to be preserved (see [RG64]): none
//
;
; Official Kernal routine, described in:
;
; - [RG64] C64 Programmers Reference Guide - page 291
; - [CM64] Computes Mapping the Commodore 64 - page 237
;
; CPU registers that has to be preserved (see [RG64]): none
;
RAMTAS:
#if (ROM_LAYOUT_M65 && SEGMENT_KERNAL_0)
!ifdef SEGMENT_M65_KERNAL_0 {
jsr map_KERNAL_1
jsr_ind VK1__RAMTAS
jmp map_NORMAL
jsr map_KERNAL_1
jsr (VK1__RAMTAS)
jmp map_NORMAL
#else
} else {
// C64 Programmers Reference guide p291:
// Clear $0000-$0101, $0200-$03ff
// PGS: $0000, $0001 are CPU IO ports, so should not get written to
; C64 Programmers Reference guide p291:
; Clear $0000-$0101, $0200-$03ff
; PGS: $0000, $0001 are CPU IO ports, so should not get written to
// How many ways are there to efficiently erase these two pages
// of RAM? We would like to avoid any unnecessary byte similarity
// with the C64 KERNAL. Thus we do $0300 before $0200, even though
// with the longer sequence of identicale bytes we see no basis for
// it being copyrightable. Again, we just want to redue the attack
// surface for any misguided suit.
; How many ways are there to efficiently erase these two pages
; of RAM? We would like to avoid any unnecessary byte similarity
; with the C64 KERNAL. Thus we do $0300 before $0200, even though
; with the longer sequence of identicale bytes we see no basis for
; it being copyrightable. Again, we just want to redue the attack
; surface for any misguided suit.
ldy #$00
lda #$00
!:
@1:
sta $0300,Y
sta $0200,Y
sta $0002,Y // that is why we do not use .X for index, we do not want zeropage addressing here!
sta $0002,Y ; that is why we do not use .X for index, we do not want zeropage addressing here!
iny
bne !-
bne @1
// Allocate cassette buffer
; Allocate cassette buffer
ldx #<$033C
stx TAPE1+0
ldx #>$033C
stx TAPE1+1
#if CONFIG_PLATFORM_COMMODORE_64
!ifdef CONFIG_PLATFORM_COMMODORE_64 {
// Set screen address pointer ("Compute's Mapping the 64" p238)
// This is obvious boiler plate containing no creative input, but to avoid
// unnecessarily similarity to the C64 KERNAL, we use X instead of A to do this,
// and several following
; Set screen address pointer ("Compute's Mapping the 64" p238)
; This is obvious boiler plate containing no creative input, but to avoid
; unnecessarily similarity to the C64 KERNAL, we use X instead of A to do this,
; and several following
ldx #>$0400
stx HIBASE
// Set BASIC start text pointer
// (remember, that low memory is 0 initialized at this moment)
; Set BASIC start text pointer
; (remember, that low memory is 0 initialized at this moment)
ldx #>$0800
stx MEMSTR+1
// Work out RAM size and put in MEMSIZK
// Try to modify $8000, if it fails then RAM ends at $7FFF, else $9FFF
; Work out RAM size and put in MEMSIZK
; Try to modify $8000, if it fails then RAM ends at $7FFF, else $9FFF
ldx $8000
inx
@@ -73,17 +73,21 @@ RAMTAS:
cpx $8000
bne ramtas_32k
// FALLTROUGH
; FALLTROUGH
ramtas_40k:
// 40K RAM - restore memory content, set MEMSIZK
; 40K RAM - restore memory content, set MEMSIZK
ldy #$A0
!:
; FALLTROUGH
ramtas_xxk:
sty MEMSIZK+1
// Always restore memory, cartridge might have RAM under ROM
; Always restore memory, cartridge might have RAM under ROM
dex
stx $8000
@@ -92,12 +96,12 @@ ramtas_40k:
ramtas_32k:
// 32K RAM - restore memory content, set MEMSIZK
; 32K RAM - restore memory content, set MEMSIZK
ldy #$80
bne !- // branch always
bne ramtas_xxk ; branch always
#elif CONFIG_PLATFORM_COMMANDER_X16
} else ifdef CONFIG_PLATFORM_COMMANDER_X16 {
ldx #>$0800
stx MEMSTR+1
@@ -105,11 +109,11 @@ ramtas_32k:
ldy #$9F
sty MEMSIZK+1
#else
} else {
.error "Please fill-in RAMTAS"
!error "Please fill-in RAMTAS"
#endif // platform
} ; platform
#endif // ROM layout
} ; ROM layout
src/kernal/init/fda3.ioinit.s
+91 -96
View File
@@ -1,175 +1,170 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# M65 KERNAL_0 #TAKE
// #LAYOUT# M65 KERNAL_1 #TAKE-FLOAT
// #LAYOUT# X16 * #IGNORE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# M65 KERNAL_0 #TAKE
;; #LAYOUT# M65 KERNAL_1 #TAKE-FLOAT
;; #LAYOUT# X16 * #IGNORE
;; #LAYOUT# * * #IGNORE
//
// Official Kernal routine, described in:
//
// - [RG64] C64 Programmers Reference Guide - page 285
// - [CM64] Computes Mapping the Commodore 64 - page 238
//
// CPU registers that has to be preserved (see [RG64]): none
//
;
; Official Kernal routine, described in:
;
; - [RG64] C64 Programmers Reference Guide - page 285
; - [CM64] Computes Mapping the Commodore 64 - page 238
;
; CPU registers that has to be preserved (see [RG64]): none
;
IOINIT:
#if (ROM_LAYOUT_M65 && SEGMENT_KERNAL_0)
!ifdef SEGMENT_M65_KERNAL_0 {
jsr map_KERNAL_1
jsr_ind VK1__IOINIT
// End by initializing the MEGA65 internal DOS
jmp m65dos_init
jsr map_KERNAL_1
jsr (VK1__IOINIT)
jmp m65dos_init ; end by initializing the MEGA65 internal DOS
#else
} else {
//
// First initialize the CPU port, to make sure we have correct memory map
//
;
; First initialize the CPU port, to make sure we have correct memory map
;
// We want BASIC and KERNAL ROMs mapped, and datasette motor off
// (https://www.c64-wiki.com/wiki/Zeropage)
// Work around for VICE bug: Writing $00 before $01 results in rubbish in $01
// after. https://sourceforge.net/p/vice-emu/bugs/1057/
; We want BASIC and KERNAL ROMs mapped, and datasette motor off
; (https://www.c64-wiki.com/wiki/Zeropage)
; Work around for VICE bug: Writing $00 before $01 results in rubbish in $01
; after. https://sourceforge.net/p/vice-emu/bugs/1057/
ldx #$27
stx CPU_R6510
ldx #$2F // checked real ROM value
ldx #$2F ; checked real ROM value
stx CPU_D6510
//
// Now prevent the CIAs from generating interrupts, who knows what damage they can do
//
;
; Now prevent the CIAs from generating interrupts, who knows what damage they can do
;
// Disable IRQ generation for both CIAs - see [CM64], page 149
; Disable IRQ generation for both CIAs - see [CM64], page 149
ldx #$7F
stx CIA1_ICR // $DC0D
stx CIA2_ICR // $DD0D
stx CIA1_ICR ; $DC0D
stx CIA2_ICR ; $DD0D
// See discussion here:
// https://www.lemon64.com/forum/viewtopic.php?t=41744&sid=e294c254db2ba671cde643f100aae341
// It seems that initializing this register to $7F is the best idea - UDTIM key scanning
// also leaves this at $7F
; See discussion here:
; https://www.lemon64.com/forum/viewtopic.php?t=41744&sid=e294c254db2ba671cde643f100aae341
; It seems that initializing this register to $7F is the best idea - UDTIM key scanning
; also leaves this at $7F
stx CIA1_PRA // $DC00
stx CIA1_PRA ; $DC00
//
// Now silence the SID chip(s), depending on the configuration - we want them silent ASAP
//
;
; Now silence the SID chip(s), depending on the configuration - we want them silent ASAP
;
lda #$00
#if !CONFIG_MB_MEGA_65
!ifndef CONFIG_MB_M65 {
// First the standard chip (skip if it is covered by whole $D4XX range)
; First the standard chip (skip if it is covered by whole $D4XX range)
#if !CONFIG_SID_D4XX
!ifndef CONFIG_SID_D4XX {
sta SID_SIGVOL
#endif // !CONFIG_SID_D4XX
}
// Silence manually configured 2nd and 3rd SIDs
; Silence manually configured 2nd and 3rd SIDs
#if CONFIG_SID_2ND
!ifdef CONFIG_SID_2ND_ADDRESS {
sta SID_SIGVOL - __SID_BASE + CONFIG_SID_2ND_ADDRESS
#endif // CONFIG_SID_2ND
}
#if CONFIG_SID_3RD
!ifdef CONFIG_SID_3RD_ADDRESS {
sta SID_SIGVOL - __SID_BASE + CONFIG_SID_3RD_ADDRESS
#endif // CONFIG_SID_3RD
}
; Silence whole D4XX and D5XX ranges (if configured)
// Silence whole D4XX and D5XX ranges (if configured)
#if CONFIG_SID_D4XX || CONFIG_SID_D5XX
!ifdef CONFIG_SID_D4XX_OR_D5XX {
ldy #$00
!:
@1:
#if CONFIG_SID_D4XX
!ifdef CONFIG_SID_D4XX {
sta SID_SIGVOL + $000, Y
#endif // CONFIG_SID_D4XX
#if CONFIG_SID_D5XX
}
!ifdef CONFIG_SID_D5XX {
sta SID_SIGVOL + $100, Y
#endif // CONFIG_SID_D4XX
}
tya
clc
adc #$20
tay
bne !-
bne @1
#endif // CONFIG_SID_D4XX || CONFIG_SID_D5XX
} ; CONFIG_SID_D4XX_OR_D5XX
#else
} else { ; CONFIG_MB_M65
// MEGA65 specific handling - it contains 4 SIDs
; MEGA65 specific handling - it contains 4 SIDs
sta SID_SIGVOL + __SID_R1_OFFSET
sta SID_SIGVOL + __SID_R2_OFFSET
sta SID_SIGVOL + __SID_L1_OFFSET
sta SID_SIGVOL + __SID_L2_OFFSET
#endif // CONFIG_MB_MEGA_65
}
//
// Now continue the CIAs initialization
//
;
; Now continue the CIAs initialization
;
// For CIA #1 we need port A as output and port B as input to scan the keyboard
; For CIA #1 we need port A as output and port B as input to scan the keyboard
ldx #$FF
stx CIA1_DDRA // $DC02
stx CIA1_DDRA ; $DC02
inx
stx CIA1_DDRB // $DC03
stx CIA2_DDRB // $DD03 // XXX this port is used for RS-232, value here is most likely wrong!
stx CIA1_DDRB ; $DC03
stx CIA2_DDRB ; $DD03 ; XXX this port is used for RS-232, value here is most likely wrong!
#if CONFIG_KEYBOARD_C65 || CONFIG_KEYBOARD_C65_CAPS_LOCK
!ifdef CONFIG_KEYBOARD_C65_OR_CAPS_LOCK {
lda #$02
sta C65_EXTKEYS_DDR // output for most keys, input for CAPS LOCK bit
sta C65_EXTKEYS_DDR ; output for most keys, input for CAPS LOCK bit
}
#endif
// Set DDR on CIA2 for IEC bus, VIC-II banking (see [CM64], $DDOO description on page 193)
; Set DDR on CIA2 for IEC bus, VIC-II banking (see [CM64], $DDOO description on page 193)
lda #$3F
sta CIA2_DDRA // $DD02
sta CIA2_DDRA ; $DD02
// Checked using VICE that original ROM initializes timers this way
; Checked using VICE that original ROM initializes timers this way
ldx #$08
stx CIA1_CRB // $DC0F
stx CIA2_CRA // $DD0E
stx CIA2_CRB // $DD0F
stx CIA1_CRB ; $DC0F
stx CIA2_CRA ; $DD0E
stx CIA2_CRB ; $DD0F
// Set VIC-II bank - at least the 'Operacja Proboszcz' game needs this within IOINIT
// Checked on original ROMs, that it sets bit #2 (RS-232 output) high
; Set VIC-II bank - at least the 'Operacja Proboszcz' game needs this within IOINIT
; Checked on original ROMs, that it sets bit #2 (RS-232 output) high
ldx #%00000111 // XXX adapt this to IEC idle state, JMP at the end won't be needed
stx CIA2_PRA // $DD00
ldx #%00000111 ; XXX adapt this to IEC idle state, JMP at the end won't be needed
stx CIA2_PRA ; $DD00
// Put something sane in the IRQ timer
; Put something sane in the IRQ timer
jsr setup_irq_timer
// Enable timer A to run continuously (http://codebase64.org/doku.php?id=base:timerinterrupts)
; Enable timer A to run continuously (http://codebase64.org/doku.php?id=base:timerinterrupts)
ldx #$11
stx CIA1_CRA // $DC0E
stx CIA1_CRA ; $DC0E
// Enable timer interrupt
; Enable timer interrupt
ldx #$81
stx CIA1_ICR // $DC0D
stx CIA1_ICR ; $DC0D
#if CONFIG_IEC
!ifdef CONFIG_IEC {
// Set IEC bus to its initial idle state
; Set IEC bus to its initial idle state
jmp iec_set_idle
#else
} else {
rts
#endif
}
#endif // ROM layout
} ; ROM layout
src/kernal/init/ff5b.cint.s
+11 -11
View File
@@ -1,15 +1,15 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
//
// Official Kernal routine, described in:
//
// - [RG64] C64 Programmers Reference Guide - page 280
// - [CM64] Computes Mapping the Commodore 64 - page 242
//
// CPU registers that has to be preserved (see [RG64]): none
//
;
; Official Kernal routine, described in:
;
; - [RG64] C64 Programmers Reference Guide - page 280
; - [CM64] Computes Mapping the Commodore 64 - page 242
;
; CPU registers that has to be preserved (see [RG64]): none
;
CINT:
src/kernal/init/fffc.vector_reset.s
+6 -6
View File
@@ -1,11 +1,11 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
// $FFFC - CPU Reset Vector
// Uncontrovertial, as it is a CPU requirement, and nothing else.
; $FFFC - CPU Reset Vector
; Uncontrovertial, as it is a CPU requirement, and nothing else.
vector_reset:
.word hw_entry_reset
!word hw_entry_reset
src/kernal/init/setup_pal_ntsc.s
+26 -26
View File
@@ -1,65 +1,65 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# X16 * #IGNORE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# X16 * #IGNORE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
// Detect video system (PAL/NTSC), use method by Graham, as it is short and reliable
// see here: https://codebase64.org/doku.php?id=base:detect_pal_ntsc
; Detect video system (PAL/NTSC), use method by Graham, as it is short and reliable
; see here: https://codebase64.org/doku.php?id=base:detect_pal_ntsc
setup_pal_ntsc:
lda VIC_RASTER
!:
@1:
cmp VIC_RASTER
beq !-
beq @1
bmi setup_pal_ntsc
// Result in A, if no interrupt happened during the test:
// #$37 -> 312 rasterlines, PAL, VIC 6569
// #$06 -> 263 rasterlines, NTSC, VIC 6567R8
// #$05 -> 262 rasterlines, NTSC, VIC 6567R56A
; Result in A, if no interrupt happened during the test:
; #$37 -> 312 rasterlines, PAL, VIC 6569
; #$06 -> 263 rasterlines, NTSC, VIC 6567R8
; #$05 -> 262 rasterlines, NTSC, VIC 6567R56A
cmp #$07
bcc setup_ntsc
// FALLTROUGH
; FALLTROUGH
setup_pal:
lda #$01
skip_2_bytes_trash_nvz
+skip_2_bytes_trash_nvz
// FALLTROUGH
; FALLTROUGH
setup_ntsc:
lda #$00
// FALLTROUGH
; FALLTROUGH
setup_pal_ntsc_end:
sta TVSFLG
// FALLTROUGH
; FALLTROUGH
setup_irq_timer: // entry point needed by UP9600 and CIA1 burst mod support
setup_irq_timer: ; entry point needed by UP9600 and CIA1 burst mod support
// Sets up IRQ timer in CIA1 to ~1/60th of a second,
// depending on the detected video system
; Sets up IRQ timer in CIA1 to ~1/60th of a second,
; depending on the detected video system
// Retrieve video system (0 - NTSC, 1 - PAL), assume PAL for unknown values
; Retrieve video system (0 - NTSC, 1 - PAL), assume PAL for unknown values
ldx TVSFLG
beq !+
beq @2
ldx #$01
!:
// Setup interval for timer A in CIA1
@2:
; Setup interval for timer A in CIA1
lda irq_timing_lo, x
sta CIA1_TIMALO // $DC04
sta CIA1_TIMALO ; $DC04
lda irq_timing_hi, x
sta CIA1_TIMAHI // $DC05
sta CIA1_TIMAHI ; $DC05
rts