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migrated to ACME assembler

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commit 145d64aa6e78838ed07cefed372f0ad6a4687e97
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 20:16:57 2020 +0200

    ACME adaptation

commit 885209d7822286744ea53232ae7461472a01d5d6
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 19:57:25 2020 +0200

    ACME adaptation

commit 334d84486bc603551887e7cbeb59d329f2224cc7
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 18:29:15 2020 +0200

    ACME adaptation

commit b5966f49bcd8f0ca79cbec93819a31238924707e
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 18:09:31 2020 +0200

    ACME adaptation

commit 786536a93a5eab5e676fca99625b4eb094a554e7
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 17:24:48 2020 +0200

    ACME adaptation

commit 704c70dfb1f5d68775d6f3da220803b8a3990f56
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 15:07:12 2020 +0200

    ACME adaptation

commit 136874964c9083b375f151475310f9636871fc72
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 14:45:14 2020 +0200

    ACME adaptation

commit 8eca0d5700b72d04336e72c5cd3a68e18b85f96d
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 14:06:52 2020 +0200

    ACME adaptation

commit 11d29eb7ee318239d782f85498b6d0524624d5c4
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 13:56:45 2020 +0200

    ACME apaptation

commit c9b5e5e04cceb92c66bc027e6440bc0f7c5a499f
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 13:49:04 2020 +0200

    ACME adaptation

commit f5cc254cbc921f07863807468cb3fe26b410b409
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 20 13:01:18 2020 +0200

    ACME adaptation

commit e135a27bf9c30cc0965379c954564e06406303b1
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 19 21:55:01 2020 +0200

    ACME adaptation

commit e9dfddf90d9e2795e88b7da40ae050d733faeb56
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 19 21:48:47 2020 +0200

    Makefile fix

commit 07030104c65cf5e5beeacf6d629ccb9245e58657
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 19 21:42:00 2020 +0200

    ACME adaptation

commit f824362ee5bcfbffca86c430b57773b2ffd65655
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 19 20:14:56 2020 +0200

    ACME adaptation

commit 3a3c59007dcd4940d89b8669f34ca56b61c25fdf
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 18 21:51:45 2020 +0200

    ACME adaptation

commit 6790ef7bc88a41de2881c69b7524dd4ab8c74b5d
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 18 20:35:23 2020 +0200

    ACME adaptation

commit 38ad18b90e9ec713aa7ca49576b3388ce1733357
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 18 18:46:20 2020 +0200

    ACME adaptation

commit 541340371122a9702f7b2d9771c298223cffd0e9
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 18 16:49:46 2020 +0200

    ACME adaptation

commit 25cfd5e186459be1a260d3eb8cfff767838de370
Author: FeralChild64 <you@example.com>
Date:   Thu Sep 17 20:13:33 2020 +0200

    ACME adaptation

commit f61599444d5b1d03d8fd8e4a6a7c3b85069bedb3
Author: FeralChild64 <you@example.com>
Date:   Thu Sep 17 19:29:23 2020 +0200

    ACME adaptation

commit b290be31ec7bb2e5723607697da1bbc621c84429
Author: FeralChild64 <you@example.com>
Date:   Thu Sep 17 17:20:14 2020 +0200

    ACME adaptation

commit 877be9e856880d98fd4bcb25b42aaaacda9dc463
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 16 21:47:38 2020 +0200

    ACME adaptation

commit bb20edaf85d386e41d5c2f715b745b68fbd3362e
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 16 21:31:30 2020 +0200

    ACME adaptation

commit c5d31bd8685abce37c8e254d15aac20bd1570d9f
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 16 18:40:49 2020 +0200

    ACME adaptation

commit 29349826b38f8a89649171559dc8cf24c560aff1
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 23:35:47 2020 +0200

    ACME adaptation

commit 8bcd6a621c4b11766d0cf34f79858ba90a67248e
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 22:52:25 2020 +0200

    ACME adaptation

commit e87a69edc2ce4bfcc460c31e08dcc352a985f88d
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 22:43:27 2020 +0200

    ACME adaptation

commit f49a097bd52e96d00b866c02bda7121e4543233c
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 19:02:07 2020 +0200

    ACME adaptation

commit fa0e9214a633b8e8f867cc70925b390940dcd426
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 17:47:19 2020 +0200

    ACME adaptation

commit 1b763b91e7a03e426227129c7f22f0ce57a4c197
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 17:17:10 2020 +0200

    ACME adaptation

commit e92a4b57b232cd85eb1e71090b8a89c7c8461ebc
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 17:15:37 2020 +0200

    ACME adaptation

commit de3c693e8a7e73ea5289198946058e3240894e6a
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 14 17:10:05 2020 +0200

    ACME adaptation

commit f9bd7ae0f04e932d613be9ed5cb19af9be5d338e
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 13 14:34:44 2020 +0200

    ACME adaptation

commit 694dee52555dbfc2b1f7f452a9671ff51106c057
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 13 14:16:14 2020 +0200

    ACME adaptation

commit 0af2c55edfcd22942d9f25417eb0d35f55b71604
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 11 17:38:09 2020 +0200

    ACME adaptation

commit 2015e17334bd56a1e8a13a5abc098d9c2e7ea44f
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 11 16:46:05 2020 +0200

    ACME adaptation

commit b1e972162798d60f4483cd6cc261e856c20c2c8c
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 11 16:24:31 2020 +0200

    ACME adaptation

commit 9d027e868466901ba53bf074a79ec8cf16273021
Author: FeralChild64 <you@example.com>
Date:   Fri Sep 11 15:04:31 2020 +0200

    ACME adaptation

commit 957186deddd1aa4f3b4f1aa1f421e4239a584e57
Author: FeralChild64 <you@example.com>
Date:   Thu Sep 10 22:49:07 2020 +0200

    ACME adaptation

commit b8060f67a455cfac109f08d96b62c360d693b931
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 23:07:28 2020 +0200

    ACME adaptation

commit e54d004568f44bbfe5c070ef1d7cf3544112e497
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 22:58:20 2020 +0200

    ACME adaptation

commit f90b77f073c5a605cb31c6ee451f65c8a8aff7d8
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 22:12:09 2020 +0200

    ACME adaptation

commit b211bb4afcd9c58fe1f5c92f3007717d611cd531
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 22:01:40 2020 +0200

    ACME adaptation

commit 8d7ea343b07e9e08e5f77f3c414758a6cffd0440
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 21:38:34 2020 +0200

    ACME adaptation

commit 46413eb0d92d6400aba0ff8dfe556e61e8a44d78
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 21:07:47 2020 +0200

    ACME adaptation

commit 9f98f69ecc21f7b74a5eb89e247f5a2c6fcb655d
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 20:05:03 2020 +0200

    ACME adaptation

commit 7bb9f1cadc682c7e0a4a6796739d860d473ca110
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 19:55:12 2020 +0200

    ACME adaptation

commit 5fc115392b5bdca6b56f67ad866b1884d2d2bdf8
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 19:31:10 2020 +0200

    ACME adaptation

commit b7940fc60e568d859df9e3156f6bacc6d685b2cc
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 19:16:09 2020 +0200

    ACME adaptation

commit 56288cb97197561afa0816b29c134ec1190e8eab
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 18:48:23 2020 +0200

    ACME adaptation

commit 10401a60fc7922a53d782120ef6795d889140218
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 16:34:16 2020 +0200

    ACME adaptation

commit 8ce76e4d2b56837a691ae84b1a412a2ae32a157b
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 16:20:44 2020 +0200

    ACME adaptation

commit 33fade899fa6172ea6b5b5f6683bb61f544429fd
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 15:28:46 2020 +0200

    ACME adaptation

commit a416f04734402fcfbc57a933731376df2e0180a1
Author: FeralChild64 <you@example.com>
Date:   Wed Sep 9 12:40:03 2020 +0200

    ACME adaptation

commit f8daee005b1d29f6912723be2ac94bc5fbeb0508
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 7 23:29:54 2020 +0200

    ACME adaptation

commit 83fe6bdd0b08a44fdbfc6eefe323a4b194ccaf5b
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 7 22:23:16 2020 +0200

    ACME adaptation

commit cb1f75620b9c83000a15c9c7f7acefdfee79a979
Author: FeralChild64 <you@example.com>
Date:   Mon Sep 7 19:23:12 2020 +0200

    ACME adaptation

commit e524d517c933ae1f0aeb49764d307fadb4845025
Author: FeralChild64 <you@example.com>
Date:   Sun Sep 6 08:24:25 2020 +0200

    ACME adaptation - replaced comments

commit 2ab572c3a21f4a78a7312d0e684bc11d91d1717a
Author: FeralChild64 <you@example.com>
Date:   Sat Sep 5 17:59:10 2020 +0200

    ACME adaptation - replaced the assembler
This commit is contained in:
FeralChild64 committed 2020-09-20 20:22:36 +02:00
1 parent bfc8291e41
commit c8d255130c
685 files changed
+15835 -16296
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src/kernal/interrupts/ea31.default_irq_handler.s
+27 -31
View File
@@ -1,75 +1,71 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
default_irq_handler:
#if CONFIG_RS232_UP9600
!ifdef CONFIG_RS232_UP9600 {
jsr rs232_count_channels
cpx #$00
beq !+
beq @1
jsr up9600_irq
!:
@1:
}
#endif // CONFIG_RS232_UP9600
#if ROM_LAYOUT_M65
!ifdef CONFIG_MB_M65 {
jsr M65_MODEGET
bcs !+
bcs @2
jsr m65_cursor_blink
bra default_irq_handler_common
!:
@2:
jsr cursor_blink
default_irq_handler_common:
jsr JSCNKEY
jsr JUDTIM // update jiffy clock
jsr JUDTIM ; update jiffy clock
#else
} else {
jsr cursor_blink
jsr JSCNKEY
jsr JUDTIM // update jiffy clock
#endif
jsr JUDTIM ; update jiffy clock
}
#if CONFIG_TAPE_NORMAL || CONFIG_TAPE_TURBO
!ifdef HAS_TAPE {
// Turn tape motor on/off depending on the button state
// For CAS1 (tape motor interlock) variable description, see Mapping the C64, page 7
; Turn tape motor on/off depending on the button state
; For CAS1 (tape motor interlock) variable description, see Mapping the C64, page 7
lda CPU_R6510
and #$10
beq !+ // branch if tape button pressed
beq @3 ; branch if tape button pressed
jsr tape_motor_off
lda #$00
sta CAS1
beq default_irq_handler_end_tape // branch always
!:
beq @4 ; branch always
@3:
lda CAS1
bne default_irq_handler_end_tape
bne @4
jsr tape_motor_on
default_irq_handler_end_tape:
#endif // CONFIG_TAPE_NORMAL || CONFIG_TAPE_TURBO
@4:
}
#if CONFIG_PLATFORM_COMMODORE_64
!ifdef CONFIG_PLATFORM_COMMODORE_64 {
// Acknowledge CIA interrupt and return
; Acknowledge CIA interrupt and return
jmp clear_cia1_interrupt_flag_and_return_from_interrupt
#else
} else {
jmp return_from_interrupt
#endif
}
src/kernal/interrupts/ea7e.ack_cia1_return_from_interrupt.s
+10 -10
View File
@@ -1,17 +1,17 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# X16 * #IGNORE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# X16 * #IGNORE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
// https://csdb.dk/forums/index.php?roomid=11&topicid=5776
// Clear the CIA1 interrupt flag, and then fall through to
// the return from interrupt routine
; https://csdb.dk/forums/index.php?roomid=11&topicid=5776
; Clear the CIA1 interrupt flag, and then fall through to
; the return from interrupt routine
clear_cia1_interrupt_flag_and_return_from_interrupt:
// We have free choice of LDA, LDX or LDY to achieve this goal
// in 3 bytes and minimum cycles. Thus we randomly choose LDY.
; We have free choice of LDA, LDX or LDY to achieve this goal
; in 3 bytes and minimum cycles. Thus we randomly choose LDY.
ldy CIA1_ICR
// FALL THROUGH to $EA81
; FALLTHROUGH to $EA81
src/kernal/interrupts/ea81.return_from_interrupt.s
+15 -15
View File
@@ -1,26 +1,26 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
// The IRQ is a commonly messed with thing on the C64,
// so we need to handle entry points that are commonly
// relied upon, including:
// $EA31 - Standard IRQ routine
// $EA61 - Check keyboard, but do not update timer? https://github.com/cc65/cc65/issues/324
// $EA81 - https://www.lemon64.com/forum/viewtopic.php?t=2112&sid=6ea01982b26da69783120a7923ca46fb
// Also the $0314 vector is widely used (e.g., https://www.lemon64.com/forum/viewtopic.php?t=2112&sid=6ea01982b26da69783120a7923ca46fb)
; The IRQ is a commonly messed with thing on the C64,
; so we need to handle entry points that are commonly
; relied upon, including:
; $EA31 - Standard IRQ routine
; $EA61 - Check keyboard, but do not update timer? https://github.com/cc65/cc65/issues/324
; $EA81 - https://www.lemon64.com/forum/viewtopic.php?t=2112&sid=6ea01982b26da69783120a7923ca46fb
; Also the $0314 vector is widely used (e.g., https://www.lemon64.com/forum/viewtopic.php?t=2112&sid=6ea01982b26da69783120a7923ca46fb)
return_from_interrupt:
// Restore registers and return
// Sequence according to Computes Mapping the 64 p73
; Restore registers and return
; Sequence according to Computes Mapping the 64 p73
ply_trash_a
plx_trash_a
+ply_trash_a
+plx_trash_a
pla
// FALLTROUGH
; FALLTROUGH
return_from_interrupt_rti:
src/kernal/interrupts/fe47.default_nmi_handler.s
+20 -21
View File
@@ -1,40 +1,39 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
default_nmi_handler:
// Implemented according to Computes Mapping the Commodore 64, page 74
// and to https://www.c64-wiki.com/wiki/Interrupt
; Implemented according to Computes Mapping the Commodore 64, page 74
; and to https://www.c64-wiki.com/wiki/Interrupt
// Save registers, sequence according to Computes Mapping the Commodore 64, page 73
; Save registers, sequence according to Computes Mapping the Commodore 64, page 73
pha
phx_trash_a
phy_trash_a
+phx_trash_a
+phy_trash_a
// XXX: RS-232 support is not implemented
; XXX: RS-232 support is not implemented
// XXX confirm NMIs from CIA, or no other NMI will arrive!
; XXX confirm NMIs from CIA, or no other NMI will arrive!
#if CONFIG_PLATFORM_COMMODORE_64
!ifdef CONFIG_PLATFORM_COMMODORE_64 {
jsr cartridge_check
bne !+
bne @1
jmp (ICART_WARM_START)
!:
@1:
}
#endif
; According to C64 Wiki, if STOP key is pressed, the routine assumes warm start request
// According to C64 Wiki, if STOP key is pressed, the routine assumes warm start request
// XXX is it right? how to check that IRQ was caused by RESTORE?
; XXX is it right? how to check that IRQ was caused by RESTORE?
jsr JSTOP
bcs !+
jmp return_from_interrupt // no STOP pressed
!:
// STOP + RESTORE - clean the address of the BRK instruction (it is not BRK) first
bcs @2
jmp return_from_interrupt ; no STOP pressed
@2:
; STOP + RESTORE - clean the address of the BRK instruction (it is not BRK) first
lda #$00
sta CMP0+0
sta CMP0+1
src/kernal/interrupts/fe66.default_brk_handler.s
+18 -21
View File
@@ -1,43 +1,40 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
default_brk_handler:
// Implemented according to Computes Mapping the Commodore 64, pages 73-74
; Implemented according to Computes Mapping the Commodore 64, pages 73-74
sei // disable IRQs, to be sure they wont interfere
sei ; disable IRQs, to be sure they wont interfere
#if CONFIG_PLATFORM_COMMODORE_64
!ifdef CONFIG_PLATFORM_COMMODORE_64 {
ldx #$00
sta VIC_SCROLX // turn the display off - we want as little screen artifacts as possible
sta VIC_SCROLX ; turn the display off - we want as little screen artifacts as possible
}
#endif
cld ; make sure this dangerous flag is disabled
cld // make sure this dangerous flag is disabled
!ifdef HAS_OPCODES_65CE02 {
#if HAS_OPCODES_65CE02
see ; disable extended stack
}
see // disable extended stack
!ifdef CONFIG_MB_M65 {
#endif
#if ROM_LAYOUT_M65
// Make sure we have normal memory mapping
; Make sure we have normal memory mapping
jsr map_NORMAL
#endif
}
jsr JRESTOR
jsr JIOINIT
// Original routine calls just a part of CINT - but I am not sure which one. Most likely it
// skips the PAL/NTSC check by calling $E518. I suspect bug in the original ROM, lets
// call the whole CINT, just to be sure everything is initialized.
; Original routine calls just a part of CINT - but I am not sure which one. Most likely it
; skips the PAL/NTSC check by calling $E518. I suspect bug in the original ROM, lets
; call the whole CINT, just to be sure everything is initialized.
jsr CINT
src/kernal/interrupts/fffa.vector_nmi.s
+6 -6
View File
@@ -1,11 +1,11 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
// $FFFA - CPU NMI Hanlder
// Uncontrovertial as this is also a CPU requirement.
; $FFFA - CPU NMI Hanlder
; Uncontrovertial as this is also a CPU requirement.
vector_nmi:
.word hw_entry_nmi
!word hw_entry_nmi
src/kernal/interrupts/fffe.vector_irq.s
+7 -7
View File
@@ -1,12 +1,12 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
// $FFFE - CPU IRQ Vector.
// This is non-controvertial, as it is a 6502 CPU requirement, and we just have to point
// it to whatever IRQ routine we make.
; $FFFE - CPU IRQ Vector.
; This is non-controvertial, as it is a 6502 CPU requirement, and we just have to point
; it to whatever IRQ routine we make.
vector_irq:
.word hw_entry_irq
!word hw_entry_irq
src/kernal/interrupts/hw_entry_irq.s
+26 -25
View File
@@ -1,45 +1,46 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
hw_entry_irq:
// The IRQ is a commonly messed with thing on the C64,
// so we need to handle entry points that are commonly
// relied upon, including:
// $EA31 - Standard IRQ routine
// $EA61 - Check keyboard, but do not update timer? https://github.com/cc65/cc65/issues/324
// $EA81 - https://www.lemon64.com/forum/viewtopic.php?t=2112&sid=6ea01982b26da69783120a7923ca46fb
// Also the $0314 vector is widely used (e.g., https://www.lemon64.com/forum/viewtopic.php?t=2112&sid=6ea01982b26da69783120a7923ca46fb)
; The IRQ is a commonly messed with thing on the C64,
; so we need to handle entry points that are commonly
; relied upon, including:
; $EA31 - Standard IRQ routine
; $EA61 - Check keyboard, but do not update timer? https://github.com/cc65/cc65/issues/324
; $EA81 - https://www.lemon64.com/forum/viewtopic.php?t=2112&sid=6ea01982b26da69783120a7923ca46fb
; Also the $0314 vector is widely used (e.g., https://www.lemon64.com/forum/viewtopic.php?t=2112&sid=6ea01982b26da69783120a7923ca46fb)
// Save registers, sequence according to Computes Mapping the Commodore 64, page 73
; Save registers, sequence according to Computes Mapping the Commodore 64, page 73
pha
phx_trash_a
phy_trash_a
+phx_trash_a
+phy_trash_a
#if CONFIG_CPU_MOS_6502 && CONFIG_BCD_SAFE_INTERRUPTS
cld // clear decimal flag to allow using it without disabling interrupts
#endif
!ifndef HAS_OPCODES_65CE02 { !ifdef CONFIG_BCD_SAFE_INTERRUPTS {
// Check if caused by BRK
cld ; clear decimal flag to allow using it without disabling interrupts
} }
; Check if caused by BRK
tsx
lda $0104, x // get the pre-interrupt processor state
lda $0104, x ; get the pre-interrupt processor state
and #$10
bne irq_handler_brk
// Not caused by BRK - call interrupt routine (only if initialised)
// Routine on zeropage = assuming not initialized
; Not caused by BRK - call interrupt routine (only if initialised)
; Routine on zeropage = assuming not initialized
lda CINV+1
beq !+
beq @1
jmp (CINV)
!:
// Vector not initialized - call default interrupt routine
@1:
; Vector not initialized - call default interrupt routine
jmp default_irq_handler
irq_handler_brk:
// Store BRK adddress, to be displayed
; Store BRK adddress, to be displayed
sec
lda $0105, x
sbc #$02
@@ -48,5 +49,5 @@ irq_handler_brk:
sbc #$00
sta CMP0+1
// Interrupt caused by BRK
; Interrupt caused by BRK
jmp (CBINV)
src/kernal/interrupts/hw_entry_nmi.s
+13 -12
View File
@@ -1,23 +1,24 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
hw_entry_nmi:
sei // do not allow IRQ to interfere, see https://www.c64-wiki.com/wiki/Interrupt
sei ; do not allow IRQ to interfere, see https://www.c64-wiki.com/wiki/Interrupt
#if CONFIG_CPU_MOS_6502 && CONFIG_BCD_SAFE_INTERRUPTS
cld // clear decimal flag to allow using it without disabling interrupts
#endif
!ifndef HAS_OPCODES_65CE02 { !ifdef CONFIG_BCD_SAFE_INTERRUPTS {
// Call interrupt routine (only if initialised)
cld ; clear decimal flag to allow using it without disabling interrupts
} }
; Call interrupt routine (only if initialised)
pha
lda NMINV+1 // consider zeropage NMI address as uninitialized vector
beq !+ // this allows safer interrupt vector modifications
lda NMINV+1 ; consider zeropage NMI address as uninitialized vector
beq @1 ; this allows safer interrupt vector modifications
pla
jmp (NMINV)
!:
// Vector not initialized - call default interrupt routine
@1:
; Vector not initialized - call default interrupt routine
pla
jmp default_nmi_handler
src/kernal/interrupts/nmi_lock.s
+26 -28
View File
@@ -1,60 +1,58 @@
// #LAYOUT# STD * #TAKE
// #LAYOUT# * KERNAL_0 #TAKE
// #LAYOUT# * * #IGNORE
;; #LAYOUT# STD * #TAKE
;; #LAYOUT# * KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
//
// Routine to lock NMI interrupts, using a trick described here:
// - https://codebase64.org/doku.php?id=base:nmi_lock
//
;
; Routine to lock NMI interrupts, using a trick described here:
; - https://codebase64.org/doku.php?id=base:nmi_lock
;
#if CONFIG_TAPE_HEAD_ALIGN
!ifdef CONFIG_TAPE_HEAD_ALIGN {
// XXX consider broader usage of this method to make IO safer
; XXX consider broader usage of this method to make IO safer
nmi_lock:
// We will have to change NMI vector to point empty routine,
// which will not acknowledge the interrupt - thus preventing
// the NMI to be triggered again
; We will have to change NMI vector to point empty routine,
; which will not acknowledge the interrupt - thus preventing
; the NMI to be triggered again
// Our code considers zeropage address invalid, so put
// it there as a preparation
; Our code considers zeropage address invalid, so put
; it there as a preparation
ldx #$00
stx NMINV+1
// We can now safelly replace the vector
; We can now safelly replace the vector
lda #<return_from_interrupt_rti
sta NMINV+0
lda #>return_from_interrupt_rti
sta NMINV+1
// Stop timer A
; Stop timer A
stx CIA2_CRA // $DD0E
stx CIA2_CRA ; $DD0E
// Set timer A to 0, after starting NMI will occur immediately
; Set timer A to 0, after starting NMI will occur immediately
stx CIA2_TIMALO // $DD04
stx CIA2_TIMAHI // $DD05
stx CIA2_TIMALO ; $DD04
stx CIA2_TIMAHI ; $DD05
// Set timer A as source for NMI
; Set timer A as source for NMI
lda #$81
sta CIA2_ICR // $DD0D
sta CIA2_ICR ; $DD0D
// Start timer A to trigger the NMI
; Start timer A to trigger the NMI
lda #$01
sta CIA2_CRA // $DD0E
sta CIA2_CRA ; $DD0E
// All done. Unmaskable interrupts are now masked.
; All done. Unmaskable interrupts are now masked.
rts
#endif
}