From da088c0d3cb3cd09c3bf782726c756f4266d6149 Mon Sep 17 00:00:00 2001
From: FeralChild64 <you@example.com>
Date: Fri, 8 Nov 2019 18:43:17 +0100
Subject: [PATCH] added some comments to tape support coode

---
 c64/kernal/tape/load_tape_normal.s | 22 ++++++++++++++++++++++
 c64/kernal/tape/load_tape_turbo.s  | 10 +++++-----
 2 files changed, 27 insertions(+), 5 deletions(-)

diff --git a/c64/kernal/tape/load_tape_normal.s b/c64/kernal/tape/load_tape_normal.s
index f480922e..e9e69370 100644
--- a/c64/kernal/tape/load_tape_normal.s
+++ b/c64/kernal/tape/load_tape_normal.s
@@ -4,6 +4,28 @@
 //
 
 
+// We have the following possible CPU frequencies:
+// - C64    PAL:  CPU frequency 0.985248 MHz
+// - C64    NTSC: CPU frequency 1.022727 MHz
+// - VIC-20 PAL:  CPU frequency 1.108405 MHz
+// - VIC-20 NTSC: CPU frequency 1.022727 MHz
+// Since VIC-20 tapes are not expected to be loaded often, routine will be optimized for C64 timings
+
+// We have to distinguish the following pulse lengths (http://sidpreservation.6581.org/tape-format/):
+// - S (short)    352 us
+// - M (medium)   512 us
+// - L (long)     672 us
+// This gives us the following thresholds (where average CPU frequency is 1.0039875 MHz):
+// - S vs M       432 us (54 8-cycle periods)
+// - M vs L       592 us (74 8-cycle periods)
+
+// The following encoding is used:
+// (S,M) = 0 bit
+// (M,S) = 1 bit
+// (L,M) = new-data marker
+// (L,S) = end-of-data marker
+
+
 #if CONFIG_TAPE_NORMAL
 
 
diff --git a/c64/kernal/tape/load_tape_turbo.s b/c64/kernal/tape/load_tape_turbo.s
index 80169211..2bdc473f 100644
--- a/c64/kernal/tape/load_tape_turbo.s
+++ b/c64/kernal/tape/load_tape_turbo.s
@@ -18,9 +18,9 @@ load_tape_turbo:
 	jsr tape_ditch_verify              // only LOAD is supported, no VERIFY
 
 	lda #$00
-	sta CIA2_TIMAHI
+	sta CIA2_TIMAHI // $DD05
 	lda #$FE                           // timer threshold for TurboTape
-	sta CIA2_TIMALO
+	sta CIA2_TIMALO // $DD04
 
 	jsr tape_ask_play
 
@@ -112,12 +112,12 @@ tape_turbo_get_bit:
 
 	lda #$10	
 !:
-	bit CIA1_ICR	
+	bit CIA1_ICR // $DC0D	
 	beq !-                             // busy loop to detect signal
-	lda CIA2_ICR
+	lda CIA2_ICR // $DD0D
 	pha	
 	lda #$19	
-	sta CIA2_CRA	
+	sta CIA2_CRA // $DD0E	
 	pla
 	
 	pha                                // audio/video effects