From 68670d0227cf93b1070ee96ca554316af450499a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 6 Dec 2020 22:16:36 +0100 Subject: [PATCH 001/257] partial IEC fix for MEGA65 --- src/kernal/iec/iec_tx_command.s | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/kernal/iec/iec_tx_command.s b/src/kernal/iec/iec_tx_command.s index 32e421f3..a6b5bc0e 100644 --- a/src/kernal/iec/iec_tx_command.s +++ b/src/kernal/iec/iec_tx_command.s @@ -38,6 +38,10 @@ iec_tx_command: ; Common part of iec_txbyte and iec_tx_common - waits for devices ; and transmits a byte +!ifdef CONFIG_MB_M65 { + ; If in native mode, switch to 1 MHz + jsr m65_iec_slow +} clc ; Carry flag set is used for EOI mark jmp iec_tx_common } From dfa8a4fe94a28fc199b7d89bf578d8b9650d3b55 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 7 Dec 2020 16:24:36 +0100 Subject: [PATCH 002/257] fix for IEC turnaround on MEGA65 native mode --- src/kernal/iec/iec_turnaround_to_listen.s | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/kernal/iec/iec_turnaround_to_listen.s b/src/kernal/iec/iec_turnaround_to_listen.s index b40c7f92..dd3971bd 100644 --- a/src/kernal/iec/iec_turnaround_to_listen.s +++ b/src/kernal/iec/iec_turnaround_to_listen.s @@ -20,6 +20,11 @@ iec_turnaround_to_listen: php sei +!ifdef CONFIG_MB_M65 { + ; If in native mode, switch to 1 MHz + jsr m65_iec_slow +} + ; Pull DATA, release CLK and ATN (we are not sending commands) jsr iec_pull_data_release_atn_clk From 38d9504230574e16014be7be76d1552db9a7c937 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 7 Dec 2020 16:46:04 +0100 Subject: [PATCH 003/257] size optimization in IEC code --- src/kernal/iec/load_iec.s | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/kernal/iec/load_iec.s b/src/kernal/iec/load_iec.s index 3efae832..45978d42 100644 --- a/src/kernal/iec/load_iec.s +++ b/src/kernal/iec/load_iec.s @@ -13,9 +13,6 @@ load_iec_dev_not_found: jmp lvs_device_not_found_error -load_iec_file_not_found: - jmp kernalerror_FILE_NOT_FOUND - load_iec_error: lda FA jsr iec_close_load @@ -199,6 +196,11 @@ load_iec_get_addr_byte: @4: pla pla + + ; FALLTROUGH + +load_iec_file_not_found: + jmp load_iec_file_not_found From 3fb7e880758dead21d3b4c73840fcf201e60a9bf Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 7 Dec 2020 17:03:21 +0100 Subject: [PATCH 004/257] fix for shifted screen on MEGA65 --- src/kernal/screen_m65/mega65_screen_tables_misc.s | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/kernal/screen_m65/mega65_screen_tables_misc.s b/src/kernal/screen_m65/mega65_screen_tables_misc.s index 8ec028f6..1498fc20 100644 --- a/src/kernal/screen_m65/mega65_screen_tables_misc.s +++ b/src/kernal/screen_m65/mega65_screen_tables_misc.s @@ -23,8 +23,8 @@ m65_scrtab_colviewmax_hi: ; maximum allowed color viewport start - high by m65_scrtab_scrolx: ; values for VIC_SCROLX !byte $C8 - !byte $CA - !byte $CA + !byte $C9 + !byte $C9 m65_scrtab_rowoffset_lo: ; row offsets - low bytes From ccf6191f5f11a0df61e852bbc64ad732460a6539 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 7 Dec 2020 18:54:48 +0100 Subject: [PATCH 005/257] added support for SHIFT+RETURN --- src/aliases/,aliases_petscii_codes.s | 1 + src/kernal/screen/chrout_screen_jumptable_codes.s | 4 ++++ src/kernal/screen_m65/mega65_screen_tables_misc.s | 2 ++ 3 files changed, 7 insertions(+) diff --git a/src/aliases/,aliases_petscii_codes.s b/src/aliases/,aliases_petscii_codes.s index 5393bed5..6ea92426 100644 --- a/src/aliases/,aliases_petscii_codes.s +++ b/src/aliases/,aliases_petscii_codes.s @@ -136,6 +136,7 @@ ; PETSCII codes for other non-printable characters !set KEY_RETURN = $0D +!set KEY_SHIFT_RETURN = $8D !set KEY_CLR = $93 !set KEY_HOME = $13 !set KEY_INS = $94 diff --git a/src/kernal/screen/chrout_screen_jumptable_codes.s b/src/kernal/screen/chrout_screen_jumptable_codes.s index f9555801..6b37055d 100644 --- a/src/kernal/screen/chrout_screen_jumptable_codes.s +++ b/src/kernal/screen/chrout_screen_jumptable_codes.s @@ -32,6 +32,7 @@ __chrout_screen_jumptable_quote_guard: } !byte KEY_DEL !byte KEY_RETURN + !byte KEY_SHIFT_RETURN __chrout_screen_jumptable_codes_end: @@ -59,6 +60,7 @@ chrout_screen_jumptable_lo: } !byte <(chrout_screen_DEL-1) !byte <(chrout_screen_RETURN-1) + !byte <(chrout_screen_RETURN-1) chrout_screen_jumptable_hi: @@ -80,6 +82,7 @@ chrout_screen_jumptable_hi: } !byte >(chrout_screen_DEL-1) !byte >(chrout_screen_RETURN-1) + !byte >(chrout_screen_RETURN-1) } else { ; HAS_OPCODES_65C02 @@ -105,4 +108,5 @@ chrout_screen_jumptable: } !word chrout_screen_DEL !word chrout_screen_RETURN + !word chrout_screen_RETURN } diff --git a/src/kernal/screen_m65/mega65_screen_tables_misc.s b/src/kernal/screen_m65/mega65_screen_tables_misc.s index 1498fc20..7982c519 100644 --- a/src/kernal/screen_m65/mega65_screen_tables_misc.s +++ b/src/kernal/screen_m65/mega65_screen_tables_misc.s @@ -75,6 +75,7 @@ __m65_chrout_screen_jumptable_quote_guard: !byte KEY_STOP !byte KEY_DEL !byte KEY_RETURN + !byte KEY_SHIFT_RETURN __m65_chrout_screen_jumptable_codes_end: @@ -108,3 +109,4 @@ m65_chrout_screen_jumptable: !word m65_chrout_screen_STOP !word m65_chrout_screen_DEL !word m65_chrout_screen_RETURN + !word m65_chrout_screen_RETURN From 3d856d378ad67a3759c4d8bbf05218747f1ee975 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 7 Dec 2020 19:35:10 +0100 Subject: [PATCH 006/257] minor comment update in screen editor --- src/kernal/screen_m65/mega65_chrout_screen_control.s | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control.s b/src/kernal/screen_m65/mega65_chrout_screen_control.s index d2bd24b0..6d7d844c 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control.s @@ -94,3 +94,7 @@ m65_chrout_screen_ESC: m65_chrout_screen_BELL: jmp m65_chrout_screen_done + +; XXX: implement the following functionalities according to MEGA65 book: +; CTRL +T +Z +E +Q +G +J +U +W +B +N +M +] +I +X +K +L +[ +; ESC +@ +A +B +C +D +E +F +G +H +I +J +K +L +M +N +O +P +Q +S +T +U +V +W +X +Y +Z +1..8 From 5b06c77bf56c8caec08163ce04050250d0a5eee6 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 10 Dec 2020 15:12:42 +0100 Subject: [PATCH 007/257] one more MEGA65 IEC fix, updated binaries --- bin/basic_generic.rom | Bin 8192 -> 8192 bytes bin/basic_generic_crt.rom | Bin 8192 -> 8192 bytes bin/basic_ultimate64.rom | Bin 8192 -> 8192 bytes bin/extrom_generic_crt.crt | Bin 32896 -> 32896 bytes bin/kernal_generic.rom | Bin 8192 -> 8192 bytes bin/kernal_generic_crt.rom | Bin 8192 -> 8192 bytes bin/kernal_ultimate64.rom | Bin 8192 -> 8192 bytes bin/mega65.rom | Bin 131072 -> 131072 bytes bin/mega65_orfont.rom | Bin 131072 -> 131072 bytes src/kernal/iec/iec_tx_byte.s | 2 ++ 10 files changed, 2 insertions(+) diff --git a/bin/basic_generic.rom b/bin/basic_generic.rom index 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18:37:08 +0100 Subject: [PATCH 008/257] fixed bug with determining line length in MEGA65 native mode --- src/kernal/screen_m65/mega65_chrin_keyboard.s | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/kernal/screen_m65/mega65_chrin_keyboard.s b/src/kernal/screen_m65/mega65_chrin_keyboard.s index 76f02967..419abeae 100644 --- a/src/kernal/screen_m65/mega65_chrin_keyboard.s +++ b/src/kernal/screen_m65/mega65_chrin_keyboard.s @@ -120,7 +120,7 @@ m65_chrin_keyboard_enter: ; Retrieve first byte which is not space jsr m65_helper_scrlpnt_chrin - ldy M65_COLVIEWMAX ; XXX add support for windowed mode here + ldy M65_SCRCOLMAX ; XXX add support for windowed mode here iny ; FALLTROUGH From cb84d791dcd8904d368ac48b51565e5498224eda Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 10 Dec 2020 20:23:14 +0100 Subject: [PATCH 009/257] preparation for BSMON integration --- Makefile | 86 ++++++++++++------- src/,,config_mega65.s | 8 +- .../basic_commands_04/cmd__jumptable_04.s | 5 +- src/basic/basic_commands_04/cmd_monitor.s | 9 ++ src/mon_m65/dummy.s | 2 + tools/generate_strings.cc | 2 +- 6 files changed, 75 insertions(+), 37 deletions(-) create mode 100644 src/basic/basic_commands_04/cmd_monitor.s create mode 100644 src/mon_m65/dummy.s diff --git a/Makefile b/Makefile index 9a2a878d..bbe91148 100644 --- a/Makefile +++ b/Makefile @@ -34,11 +34,6 @@ SRCDIR_BASIC = $(SRCDIR_COMMON) \ src/basic/rom_revision \ src/basic/wedge -SRCDIR_DOS_M65 = $(SRCDIR_COMMON) \ - src/dos_m65 \ - # src/dos_m65/cmdrdos \ - src/dos_m65/sdcard - SRCDIR_KERNAL = $(SRCDIR_COMMON) \ src/kernal \ src/kernal/,stubs \ @@ -65,9 +60,18 @@ SRCDIR_KERNAL = $(SRCDIR_COMMON) \ src/kernal/tape \ src/kernal/time +SRCDIR_DOS_M65 = $(SRCDIR_COMMON) \ + src/dos_m65 \ + # src/dos_m65/cmdrdos \ + src/dos_m65/sdcard + +SRCDIR_MON_M65 = $(SRCDIR_COMMON) \ + src/mon_m65 + SRC_BASIC = $(foreach dir,$(SRCDIR_BASIC),$(wildcard $(dir)/*.s)) -SRC_DOS_M65 = $(foreach dir,$(SRCDIR_DOS_M65),$(wildcard $(dir)/*.s)) SRC_KERNAL = $(foreach dir,$(SRCDIR_KERNAL),$(wildcard $(dir)/*.s)) +SRC_DOS_M65 = $(foreach dir,$(SRCDIR_DOS_M65),$(wildcard $(dir)/*.s)) +SRC_MON_M65 = $(foreach dir,$(SRCDIR_MON_M65),$(wildcard $(dir)/*.s)) SRC_TOOLS = $(wildcard tools/*.c,tools/*.cc) DIR_ACME = assembler/acme/src @@ -125,8 +129,9 @@ GEN_STR_X16 = $(DIR_X16)/,generated/,packed_strings.s # Dependencies - helper variables DEP_BASIC = $(SRC_BASIC) $(SRCDIR_BASIC) $(GEN_BASIC) -DEP_DOS_M65 = $(SRC_DOS_M65) $(SRCDIR_DOS_M65) DEP_KERNAL = $(SRC_KERNAL) $(SRCDIR_KERNAL) $(GEN_KERNAL) +DEP_DOS_M65 = $(SRC_DOS_M65) $(SRCDIR_DOS_M65) +DEP_MON_M65 = $(SRC_MON_M65) $(SRCDIR_MON_M65) # List of tools @@ -201,10 +206,11 @@ SEG_LIST_U64CRT = $(DIR_U64CRT)/basic.seg_1 \ SEG_LIST_M65 = $(DIR_M65)/basic.seg_0 \ $(DIR_M65)/basic.seg_1 \ - $(DIR_M65)/dos.seg_1 \ $(DIR_M65)/kernal.seg_0 \ $(DIR_M65)/kernal.seg_C \ - $(DIR_M65)/kernal.seg_1 + $(DIR_M65)/kernal.seg_1 \ + $(DIR_M65)/dos.seg_1 \ + $(DIR_M65)/mon.seg_1 SEG_LIST_X16 = $(DIR_X16)/basic.seg_0 \ $(DIR_X16)/basic.seg_1 \ @@ -355,12 +361,14 @@ $(DIR_U64CRT)/kernal.seg_1 $(DIR_U64CRT)/KERNAL_1_combined.vs $(DIR_U64CRT)/KERN $(DIR_M65)/basic.seg_1 $(DIR_M65)/BASIC_1_combined.vs $(DIR_M65)/BASIC_1_combined.sym: \ $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_BASIC) $(CFG_M65) $(GEN_STR_M65) $(DIR_M65)/KERNAL_0_combined.sym $(DIR_M65)/BASIC_0_combined.sym -$(DIR_M65)/dos.seg_1 $(DIR_M65)/DOS_1_combined.vs $(DIR_M65)/DOS_1_combined.sym: \ - $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_DOS_M65) $(CFG_M65) $(DIR_M65)/kernal.seg_C $(DIR_M65)/KERNAL_C_combined.vs $(DIR_M65)/KERNAL_C_combined.sym: \ $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_KERNAL) $(CFG_M65) $(GEN_STR_M65) $(DIR_M65)/KERNAL_0_combined.sym $(DIR_M65)/kernal.seg_1 $(DIR_M65)/KERNAL_1_combined.vs $(DIR_M65)/KERNAL_1_combined.sym: \ $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_KERNAL) $(CFG_M65) $(GEN_STR_M65) $(DIR_M65)/KERNAL_0_combined.sym +$(DIR_M65)/dos.seg_1 $(DIR_M65)/DOS_1_combined.vs $(DIR_M65)/DOS_1_combined.sym: \ + $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_DOS_M65) $(CFG_M65) +$(DIR_M65)/mon.seg_1 $(DIR_M65)/MON_1_combined.vs $(DIR_M65)/MON_1_combined.sym: \ + $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_MON_M65) $(CFG_M65) $(DIR_X16)/basic.seg_1 $(DIR_X16)/BASIC_1_combined.vs $(DIR_X16)/BASIC_1_combined.sym: \ $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_BASIC) $(CFG_X16) $(GEN_STR_X16) $(DIR_X16)/KERNAL_0_combined.sym $(DIR_X16)/BASIC_0_combined.sym @@ -494,7 +502,7 @@ $(DIR_U64CRT)/kernal.seg_1 $(DIR_U64CRT)/KERNAL_1_combined.vs $(DIR_U64CRT)/KERN @rm -f $@* $(DIR_U64CRT)/kernal.seg_1 $(DIR_U64CRT)/KERNAL_1* @$(TOOL_BUILD_SEGMENT) -a ../../$(TOOL_ASSEMBLER) -r CRT -s KERNAL_1 -i KERNAL_1-ultimate64-crt -o kernal.seg_1 -d $(DIR_U64CRT) -l 8000 -h 9fff $(CFG_U64CRT) $(GEN_STR_U64CRT) $(SRCDIR_KERNAL) $(GEN_KERNAL) -# Rules - BASIC and KERNAL intermediate files, for MEGA65 +# Rules - BASIC, KERNAL, DOS and MON intermediate files, for MEGA65 $(DIR_M65)/OUTB_0.BIN $(DIR_M65)/BASIC_0_combined.vs $(DIR_M65)/BASIC_0_combined.sym: @mkdir -p $(DIR_M65) @@ -511,11 +519,6 @@ $(DIR_M65)/basic.seg_1 $(DIR_M65)/BASIC_1_combined.vs $(DIR_M65)/BASIC_1_combine @rm -f $@* $(DIR_M65)/basic.seg_1 $(DIR_M65)/BASIC_1* @$(TOOL_BUILD_SEGMENT) -a ../../$(TOOL_ASSEMBLER) -r M65 -s BASIC_1 -i BASIC_1-mega65 -o basic.seg_1 -d $(DIR_M65) -l 4000 -h 6fff $(CFG_M65) $(GEN_STR_M65) $(SRCDIR_BASIC) $(GEN_BASIC) -$(DIR_M65)/dos.seg_1 $(DIR_M65)/DOS_1_combined.vs $(DIR_M65)/DOS_1_combined.sym: - @mkdir -p $(DIR_M65) - @rm -f $@* $(DIR_M65)/dos.seg_1 $(DIR_M65)/DOS_1* - @$(TOOL_BUILD_SEGMENT) -a ../../$(TOOL_ASSEMBLER) -r M65 -s DOS_1 -i DOS_1-mega65 -o dos.seg_1 -d $(DIR_M65) -l 4000 -h 7fff $(CFG_M65) $(SRCDIR_DOS_M65) - $(DIR_M65)/kernal.seg_C $(DIR_M65)/KERNAL_C_combined.vs $(DIR_M65)/KERNAL_C_combined.sym: @mkdir -p $(DIR_M65) @rm -f $@* $(DIR_M65)/kernal.seg_C $(DIR_M65)/KERNAL_C* @@ -526,6 +529,16 @@ $(DIR_M65)/kernal.seg_1 $(DIR_M65)/KERNAL_1_combined.vs $(DIR_M65)/KERNAL_1_comb @rm -f $@* $(DIR_M65)/kernal.seg_1 $(DIR_M65)/KERNAL_1* @$(TOOL_BUILD_SEGMENT) -a ../../$(TOOL_ASSEMBLER) -r M65 -s KERNAL_1 -i KERNAL_1-mega65 -o kernal.seg_1 -d $(DIR_M65) -l 4000 -h 5fff $(CFG_M65) $(GEN_STR_M65) $(SRCDIR_KERNAL) $(GEN_KERNAL) +$(DIR_M65)/dos.seg_1 $(DIR_M65)/DOS_1_combined.vs $(DIR_M65)/DOS_1_combined.sym: + @mkdir -p $(DIR_M65) + @rm -f $@* $(DIR_M65)/dos.seg_1 $(DIR_M65)/DOS_1* + @$(TOOL_BUILD_SEGMENT) -a ../../$(TOOL_ASSEMBLER) -r M65 -s DOS_1 -i DOS_1-mega65 -o dos.seg_1 -d $(DIR_M65) -l 4000 -h 7fff $(CFG_M65) $(SRCDIR_DOS_M65) + +$(DIR_M65)/mon.seg_1 $(DIR_M65)/MON_1_combined.vs $(DIR_M65)/MON_1_combined.sym: + @mkdir -p $(DIR_M65) + @rm -f $@* $(DIR_M65)/mon.seg_1 $(DIR_M65)/MON_1* + @$(TOOL_BUILD_SEGMENT) -a ../../$(TOOL_ASSEMBLER) -r M65 -s MON_1 -i MON_1-mega65 -o mon.seg_1 -d $(DIR_M65) -l 4000 -h 5fff $(CFG_M65) $(SRCDIR_MON_M65) + # Rules - BASIC and KERNAL intermediate files, for Commander X16 $(DIR_X16)/OUTB_0.BIN $(DIR_X16)/BASIC_0_combined.vs $(DIR_X16)/BASIC_0_combined.sym: @@ -644,12 +657,22 @@ build/kernal_hybrid_u64.rom: kernal $(DIR_U64)/OUTK_x.BIN build/symbols_hybrid_u64.vs: $(DIR_U64)/KERNAL_combined.vs @sort $(DIR_U64)/KERNAL_combined.vs | uniq | grep -v "__" > $@ -# Rules - external CRT images +# Rules - padding files + +build/padding_4_KB: + @mkdir -p build + @dd if=/dev/zero bs=4096 count=1 of=$@ status=none build/padding_8_KB: @mkdir -p build @dd if=/dev/zero bs=8192 count=1 of=$@ status=none +build/padding_16_KB: + @mkdir -p build + @dd if=/dev/zero bs=8192 count=2 of=$@ status=none + +# Rules - external CRT images + $(TARGET_GENCRT_X): $(SEG_LIST_GENCRT) $(CRT_BIN_LIST) build/padding_8_KB @echo @echo @@ -688,7 +711,7 @@ $(TARGET_U64CRT_X): $(SEG_LIST_U64CRT) $(CRT_BIN_LIST) build/padding_8_KB # Rules - MEGA65 platform specific -# $0:$0000 - 16 KB - DOS +# $0:$0000 - 16 KB - Computer Based DOS # $0:$4000 - 8 KB - KERNAL segment 1 # $0:$6000 - 12 KB - BASIC segment 1 # $0:$9000 - 4 KB - native mode chargen @@ -696,17 +719,10 @@ $(TARGET_U64CRT_X): $(SEG_LIST_U64CRT) $(CRT_BIN_LIST) build/padding_8_KB # $0:$C000 - 4 KB - KERNAL segment C # $0:$D000 - 4 KB - legacy mode chargen # $0:$E000 - 9 KB - KERNAL segment 0 -# $1:$0000 - 64 KB - unused for now, padding +# $1:$0000 - 8 KB - Machine Language MONITOR +# $1:$2000 - 56 KB - unused for now, padding -build/padding_64_KB: - @mkdir -p build - @dd if=/dev/zero bs=8192 count=8 of=$@ status=none - -build/padding_4_KB: - @mkdir -p build - @dd if=/dev/zero bs=4096 count=1 of=$@ status=none - -$(TARGET_M65_x_ORF) $(TARGET_M65_x_PXL): $(SEG_LIST_M65) build/padding_64_KB build/padding_4_KB $(TARGET_CHR_ORF) build/chargen_openroms.patched $(TARGET_CHR_PXL) build/chargen_pxlfont.patched +$(TARGET_M65_x_ORF) $(TARGET_M65_x_PXL): $(SEG_LIST_M65) build/padding_16_KB build/padding_4_KB $(TARGET_CHR_ORF) build/chargen_openroms.patched $(TARGET_CHR_PXL) build/chargen_pxlfont.patched @echo @echo @echo @@ -721,7 +737,11 @@ $(TARGET_M65_x_ORF) $(TARGET_M65_x_PXL): $(SEG_LIST_M65) build/padding_64_KB bui @cat $(DIR_M65)/kernal.seg_C >> $(TARGET_M65_x_ORF) @cat $(TARGET_CHR_ORF) >> $(TARGET_M65_x_ORF) @cat $(DIR_M65)/kernal.seg_0 >> $(TARGET_M65_x_ORF) - @cat build/padding_64_KB >> $(TARGET_M65_x_ORF) + @cat $(DIR_M65)/mon.seg_1 > $(TARGET_M65_x_ORF) + @cat build/padding_8_KB >> $(TARGET_M65_x_ORF) + @cat build/padding_16_KB >> $(TARGET_M65_x_ORF) + @cat build/padding_16_KB >> $(TARGET_M65_x_ORF) + @cat build/padding_16_KB >> $(TARGET_M65_x_ORF) @echo @echo @echo @@ -736,7 +756,11 @@ $(TARGET_M65_x_ORF) $(TARGET_M65_x_PXL): $(SEG_LIST_M65) build/padding_64_KB bui @cat $(DIR_M65)/kernal.seg_C >> $(TARGET_M65_x_PXL) @cat $(TARGET_CHR_PXL) >> $(TARGET_M65_x_PXL) @cat $(DIR_M65)/kernal.seg_0 >> $(TARGET_M65_x_PXL) - @cat build/padding_64_KB >> $(TARGET_M65_x_PXL) + @cat $(DIR_M65)/mon.seg_1 > $(TARGET_M65_x_PXL) + @cat build/padding_8_KB >> $(TARGET_M65_x_PXL) + @cat build/padding_16_KB >> $(TARGET_M65_x_PXL) + @cat build/padding_16_KB >> $(TARGET_M65_x_PXL) + @cat build/padding_16_KB >> $(TARGET_M65_x_PXL) @echo # Rules - platform 'Commander X16' specific diff --git a/src/,,config_mega65.s b/src/,,config_mega65.s index f105434d..8c5ea1f7 100644 --- a/src/,,config_mega65.s +++ b/src/,,config_mega65.s @@ -60,16 +60,16 @@ ;; #CONFIG# KEYCMD_F3 "@9$" ;; #CONFIG# KEYCMD_F4 "RUN:" ;; #CONFIG# KEYCMD_F5 "@10$" -;; #CONFIG# KEYCMD_F6 "\5FL" +;; #CONFIG# KEYCMD_F6 "REM F6" ;; #CONFIG# KEYCMD_F7 "@11$" -;; #CONFIG# KEYCMD_F8 "\5FHF" +;; #CONFIG# KEYCMD_F8 "MONITOR" ;; #CONFIG# KEYCMD_HELP "LIST" ;; #CONFIG# KEYCMD_F9 "REM F9" -;; #CONFIG# KEYCMD_F10 "REM F10" +;; #CONFIG# KEYCMD_F10 "\5FL" ;; #CONFIG# KEYCMD_F11 "REM F11" -;; #CONFIG# KEYCMD_F12 "REM F12" +;; #CONFIG# KEYCMD_F12 "\5FHF" ;; #CONFIG# KEYCMD_F13 "JOYCRSR 2" ;; #CONFIG# KEYCMD_F14 "JOYCRSR 0" diff --git a/src/basic/basic_commands_04/cmd__jumptable_04.s b/src/basic/basic_commands_04/cmd__jumptable_04.s index 642fc7d8..cee40047 100644 --- a/src/basic/basic_commands_04/cmd__jumptable_04.s +++ b/src/basic/basic_commands_04/cmd__jumptable_04.s @@ -7,6 +7,7 @@ !set ITEM_01 = cmd_sysinfo !set ITEM_02 = cmd_joycrsr +!set ITEM_03 = cmd_monitor !ifndef HAS_OPCODES_65C02 { @@ -15,12 +16,13 @@ command_04_jumptable_lo: !byte <(ITEM_01-1) !byte <(ITEM_02-1) + !byte <(ITEM_03-1) command_04_jumptable_hi: !byte >(ITEM_01-1) !byte >(ITEM_02-1) - + !byte >(ITEM_03-1) } else { ; HAS_OPCODES_65C02 @@ -30,4 +32,5 @@ command_04_jumptable: !word ITEM_01 !word ITEM_02 + !word ITEM_03 } diff --git a/src/basic/basic_commands_04/cmd_monitor.s b/src/basic/basic_commands_04/cmd_monitor.s new file mode 100644 index 00000000..ddf52c04 --- /dev/null +++ b/src/basic/basic_commands_04/cmd_monitor.s @@ -0,0 +1,9 @@ +;; #LAYOUT# M65 BASIC_0 #TAKE +;; #LAYOUT# * * #IGNORE + + +cmd_monitor: + + ; XXX implement this + + jmp do_NOT_IMPLEMENTED_error diff --git a/src/mon_m65/dummy.s b/src/mon_m65/dummy.s new file mode 100644 index 00000000..95b68023 --- /dev/null +++ b/src/mon_m65/dummy.s @@ -0,0 +1,2 @@ + + rts diff --git a/tools/generate_strings.cc b/tools/generate_strings.cc index 93924ad2..4e23e8a8 100644 --- a/tools/generate_strings.cc +++ b/tools/generate_strings.cc @@ -201,7 +201,7 @@ const StringEntryList GLOBAL_Keywords_04 = { ListType::KEYWORDS, "keywords_04", // STD CRT M65 U64 X16 { false, false, true, false, false, "K04_01", "SYSINFO", }, // Not present in CBM BASIC dialects, Open ROMs specific { false, false, true, false, false, "K04_02", "JOYCRSR", }, // Not present in CBM BASIC dialects, Open ROMs specific - + { false, false, true, false, false, "K04_03", "MONITOR", }, // Amos Professional Manual, Command Index } }; From d0e3fe0da6eb0ae0b8110314f15f5c6a563e0976 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 10 Dec 2020 20:37:22 +0100 Subject: [PATCH 010/257] imported BSMON source code, not yet adapted --- doc/Development.md | 2 +- src/mon_m65/LICENSE | 25 + src/mon_m65/bsmon.asm | 3207 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 3233 insertions(+), 1 deletion(-) create mode 100644 src/mon_m65/LICENSE create mode 100644 src/mon_m65/bsmon.asm diff --git a/doc/Development.md b/doc/Development.md index 85d534d9..a1b33f45 100644 --- a/doc/Development.md +++ b/doc/Development.md @@ -95,7 +95,7 @@ Currently there are 4 ROM layouts defined: - `STD` - with 2 code segments: `BASIC` (`$A000-$E4D2`, where `$C000-$DFFF` is a skip-gap for RAM and I/O area) and `KERNAL` (`$E4D3 - $FFFF`) - `CRT` - where `BASIC` becames `BASIC_0` and `KERNAL` becames `KERNAL_0`, with additional `BASIC`/`KERNAL` segments are placed on the required cartridge image -- `M65` - where `BASIC` becames `BASIC_0` and `KERNAL` becames `KERNAL_0`, additional segments might be added to the build system in the future; at the moment of writing this document additional 12KB of ROM is defined as `BASIC_1` segment, additional 4KB of ROM is defined as `KERNAL_C` segment, and additional 8KB of ROM is defined as `KERNAL_1` segment +- `M65` - where `BASIC` becames `BASIC_0` and `KERNAL` becames `KERNAL_0`, and several additional segments are added for extended functionality - `X16` - memory layout for the Commander X16 machine Expect at least one more, `U64`, if the planned additional ROM banks support for Ultimate 64 gets implemented. To check for current ROM layout or code segment use KickAssembler preprocessor defines, like `ROM_LAYOUT_STD`, `SEGMENT_M65_BASIC_0`, `SEGMENT_X16_KERNAL_1`. diff --git a/src/mon_m65/LICENSE b/src/mon_m65/LICENSE new file mode 100644 index 00000000..8bdf91b1 --- /dev/null +++ b/src/mon_m65/LICENSE @@ -0,0 +1,25 @@ +BSD 2-Clause License + +Copyright (c) 2020, MEGA65 +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/src/mon_m65/bsmon.asm b/src/mon_m65/bsmon.asm new file mode 100644 index 00000000..6af5d9f9 --- /dev/null +++ b/src/mon_m65/bsmon.asm @@ -0,0 +1,3207 @@ +******************************* +* BSM = Bit Shifter's Monitor * +* for The MEGA65 10-Dec_2020 * +******************************* + +.CPU 45GS02 + +.STORE $6000,$2000,"bsmon.rom" + +************* +* Constants * +************* + +WHITE = $05 +YELLOW = $9e +LRED = $96 + +CR = $0d +REV = $12 +CRIGHT = $1d +QUOTE = $22 +APOSTR = $27 + +************************************************ +* Register storage for JMPFAR and JSRFAR calls * +************************************************ + +Bank = 2 +PCH = 3 +PCL = 4 +SR = 5 +AC = 6 +XR = 7 +YR = 8 +ZR = 9 + +************************************* +* Used direct (zero) page addresses * +************************************* + +BP = 10 +SPH = 11 +SPL = 12 + +; following variables overlap with the BASIC floating point area + +; $59 - $5d : temporary floating point accumulator +; $5e - $62 : temporary floating point accumulator +; $63 - $69 : primary floating point accumulator +; $6a - $6f : secondary floating point accumulator + +; A set of 32 bit variables also used as 32 bit pointer + +& = $59 + +Long_AC .BSS 4 ; 32 bit accumulator +Long_CT .BSS 4 ; 32 bit counter +Long_PC .BSS 4 ; 32 bit program counter +Long_DA .BSS 4 ; 32 bit data pointer + +; Flags are used in BBR BBS instructions + +Adr_Flags .BSS 1 +Mode_Flags .BSS 1 +Op_Code .BSS 1 +Op_Flag .BSS 1 ; 7: two operands + ; 6: long branch + ; 5: 32 bit address + ; 4: Q register +Op_Size .BSS 1 +Dig_Cnt .BSS 1 +Buf_Index .BSS 1 + +; operating system variables + + +STATUS = $90 +VERCK = $93 +FNLEN = $b7 +SA = $b9 +FA = $ba +FNADR = $bb +BA = $bd +FNBANK = $be + +NDX = $d0 ; length of keyboard buffer +MODE_80 = $d7 ; 80 column / 40 volumn flag + +B_Margin = $e4 ; SCBOT default = 24 +T_Margin = $e5 ; SCTOP default = 0 +L_Margin = $e6 ; SCLF default = 0 +R_Margin = $e7 ; SCRT default = 39 or 79 + +QTSW = $f4 ; Quote switch + +Buffer = $0200 ; input buffer + +IIRQ = $0314 +IBRK = $0316 +EXMON = $032e + +& = $400 ; bottom of BASIC runtime stack + ; should be a safe space +X_Vector .BSS 2 ; exit vector (ROM version dependent) +Ix_Mne .BSS 1 ; index to mnemonics table +Op_Mne .BSS 3 ; 3 bytes for mnemonic +Op_Ix .BSS 1 ; type of constant +Op_Len .BSS 1 ; length of operand +Disk_Unit .BSS 1 ; unit = device +Disk_Track .BSS 1 ; logical track 1 -> 255 +Disk_Sector .BSS 1 ; logical sector 0 -> 255 +Disk_Status .BSS 1 ; BCD value of status + +Mon_Data .BSS 40 ; buffer for hunt and filename +Disk_Msg .BSS 40 ; disk status as text message + +EXIT_OLD = $cf2e ; exit address for ROM 910110 +EXIT = $cfa4 ; exit address for ROM 911001 + +SETBNK = $ff6b +JSRFAR = $ff6e +JMPFAR = $ff71 +LDA_FAR = $ff74 +STA_FAR = $ff77 +CMP_FAR = $ff7a +PRIMM = $ff7d +CINT = $ff81 +IOINIT = $ff84 +SETMSG = $ff90 +SECOND = $ff93 +TKSA = $ff96 +MEMTOP = $ff99 +MEMBOT = $ff9c +KEY = $ff9f +SETTMO = $ffa2 +ACPTR = $ffa5 +CIOUT = $ffa8 +UNTALK = $ffab +UNLSN = $ffae +LISTEN = $ffb1 +TALK = $ffb4 +READSS = $ffb7 +SETLFS = $ffba +SETNAM = $ffbd +OPEN = $ffc0 +CLOSE = $ffc3 +CHKIN = $ffc6 +CHKOUT = $ffc9 +CLRCHN = $ffcc +CHRIN = $ffcf +CHROUT = $ffd2 +LOAD = $ffd5 +SAVE = $ffd8 +SETTIM = $ffdb +GETTIM = $ffde +STOP = $ffe1 +GETIN = $ffe4 +CLALL = $ffe7 +SCAN = $ffea +SCRORG = $ffed +PLOT = $fff0 + +* = $1fff + .STORE $1fff,$0101,"bsm.prg" + +************* +Module header +************* + + .WORD $2001 ; load address + .WORD Link ; line link + .WORD 2020 ; line number + .BYTE $fe,$02 ; BANK token + .BYTE "0:" ; BANK argument + .BYTE $9e ; SYS token + .BYTE "(8235):" ; $202d + .BYTE $8f ; REM token + .BYTE " BIT SHIFTER 10-DEC-20",0 +Link .WORD 0 ; BASIC end marker + + ; copy image to $030000 + + SEI + +; map memory to monitor configuration + + LDA #$a0 + LDX #$82 + LDY #$00 + LDZ #$83 + MAP + EOM + +; VIC IV registers visible + + LDA #$47 + STA $d02f + LDA #$53 + STA $d02f + +; toggle write protection + + LDA #$70 + STA $D640 + NOP + + LDZ #0 + STZ Long_AC + LDA #$21 + STA Long_AC+1 + STZ Long_CT + STZ Long_CT+1 + LDA #3 + STA Long_CT+2 + STZ Long_CT+3 + LDX #$20 + +_loop LDA (Long_AC),Z + STA [Long_CT],Z + INZ + BNE _loop + INC Long_AC+1 + INC Long_CT+1 + DEX + BNE _loop + + LDA #$70 + STA $D640 ; toggle write protection + NOP + + RTS +EndMod + + .FILL $2100-* (0) + +* = $6000 + +******************** +Monitor_Call ; $6000 +******************** + + JMP Mon_Call + +********************* +Monitor_Break ; $6003 +********************* + + JMP Mon_Break + +********************** +Monitor_Switch ; $6009 +********************** + + JMP Mon_Switch + +**************** +Module Mon_Break +**************** + + JSR PRIMM + .BYTE "\rBREAK\a",0 + JSR Print_Commands + +; pull BP, Z, Y, X, A,SR,PCL,PCH +; 7 6 5 4 3 2 1 0 + + LDX #7 + BIT EXIT ; version + BPL _loop + DEX +_loop PLA + STA PCH,X + DEX + BPL _loop + +; decrement PC to point after BRK + + LDA PCL + BNE _nopage + DEC PCH +_nopage DEC PCL + + LDA $011d + BBR7 Bank,_bank + LDA $011f +_bank AND #15 + STA Bank + BRA Mon_Start +EndMod + +*************** +Module Mon_Call +*************** + + JSR Print_Commands + +; clear register for monitor call + + LDA #0 + LDX #6 +_loop STA AC,X + DEX + BPL _loop + +; set default PC to "exit to BASIC" + + LDA #EXIT + BIT EXIT ; $20 (JSR) or $ff ? + BPL _store + LDA #EXIT_OLD +_store STA PCL + STA X_Vector + STX PCH + STX X_Vector+1 +EndMod + +**************** +Module Mon_Start +**************** + + CLD + TSY + STY SPH + TSX + STX SPL + LDA #$c0 + JSR SETMSG + CLI + NOP +EndMod + +*************************** +Module Mon_Register ; $6042 +*************************** + + JSR Reg_Text + +; print Bank,PCH + + LDY #0 +_loopa LDA Bank,Y + JSR Print_Hex + INY + CPY #2 + BCC _loopa + +; print SR,PCL,A,X,Y,Z,BP + +_loopb LDA Bank,Y + JSR Print_Hex_Blank + INY + CPY #9 + BCC _loopb + +; print 16 bit stack pointer + + LDA SPH + JSR Print_Hex + LDA SPL + JSR Print_Hex_Blank + +; print flags + + LDY #8 + LDA SR +_loopc ASL A + PHA + LDA #'-' + BCC _flag + LDA #'1' +_flag JSR CHROUT + PLA + DEY + BNE _loopc +EndMod + +*********** +Module Main +*********** + + JSR Print_CR + LDX #0 + +; read one line into buffer + +****** +Main_A +****** + +_loop JSR CHRIN + STA Buffer,X + INX + CPX #80 + BCS Mon_Error ; input too long + CMP #CR + BNE _loop + + LDA #0 + STA Buf_Index + STA Buffer-1,X ; terminate buffer +_getcomm JSR Get_Char + BEQ Main + CMP #' ' + BEQ _getcomm +EndMod + +***************** +Module Mon_Switch +***************** + + LDX #24 +_loop CMP Command_Char,X + BEQ Mon_Select + DEX + BPL _loop + +; fall through to error routine if not found + +**************** +Module Mon_Error +**************** + +; put a question mark at the end of the text + + JSR PRIMM + .BYTE "\eO",CRIGHT,'?',0 + LDX #$f8 ; reset stack pointer + TXS + BRA Main + +***************** +Module Mon_Select +***************** + + STA VERCK + CPX #22 + LBCS Load_Save + TXA + ASL A + TAX + JMP (Jump_Table,X) +EndMod + +************** +Print_Commands +************** + + JSR PRIMM + .BYTE CR,YELLOW,REV,"BS MONITOR COMMANDS:" + +************ +Command_Char +************ + + ; 0123456789abcdef + .BYTE "ABCDFGHJMRTX@.>;?" + +*********** +Cons_Prefix +*********** + + .BYTE "$+&%'" + +**************** +Load_Save_Verify +**************** + + .BYTE "LSV",WHITE,0 + RTS + +********** +Jump_Table +********** + + .WORD Mon_Assemble ; A + .WORD Mon_Bits ; B + .WORD Mon_Compare ; C + .WORD Mon_Disassemble ; D + .WORD Mon_Fill ; F + .WORD Mon_Go ; G + .WORD Mon_Hunt ; H + .WORD Mon_JSR ; J + .WORD Mon_Memory ; M + .WORD Mon_Register ; R + .WORD Mon_Transfer ; T + .WORD Mon_Exit ; X + .WORD Mon_DOS ; @ + .WORD Mon_Assemble ; . + .WORD Mon_Set_Memory ; > + .WORD Mon_Set_Register ; ; + .WORD Mon_Help ; ? + .WORD Converter ; $ + .WORD Converter ; + + .WORD Converter ; & + .WORD Converter ; % + + +*************** +Module Mon_Exit +*************** + + JMP (X_Vector) + +**************** +Module LAC_To_PC +**************** + +; called from Mon_Set_Register, Mon_Go and Mon_JSR +; as the first instruction. The carry flag was set from +; the routine Got_LAC if an error occured. +; Notice that the Bank, PCH and PCL values are stored +; high to low, reverse to the standard order. + +; Bank, PCH and PCL are part of a list, that is used by +; the routines FAR_JMP and FAR_JSR of the operating system + + BCS _error + LDA Long_AC + STA Bank+2 + LDA Long_AC+1 + STA Bank+1 + LDA Long_AC+2 + STA Bank +_error RTS +EndMod + +***************** +Module LAC_To_LPC +***************** + + PHX + LDX #3 +_loop LDA Long_AC,X + STA Long_PC,X + DEX + BPL _loop + PLX + RTS +EndMod + +***************** +Module LAC_To_LCT +***************** + + PHX + LDX #3 +_loop LDA Long_AC,X + STA Long_CT,X + DEX + BPL _loop + PLX + RTS +EndMod + +***************** +Module LAC_To_LDA +***************** + + PHX + LDX #3 +_loop LDA Long_AC,X + STA Long_DA,X + DEX + BPL _loop + PLX + RTS +EndMod + +******************* +Module LAC_Plus_LCT +******************* + + PHX + LDX #252 ; use ZP wrap around + CLC +_loop LDA Long_AC+4,X + ADC Long_CT+4,X + STA Long_AC+4,X + INX + BNE _loop + PLX + RTS +EndMod + +******************** +Module LAC_Minus_LPC +******************** + + PHX + LDX #252 ; use ZP wrap around + SEC +_loop LDA Long_AC+4,X + SBC Long_PC+4,X + STA Long_CT+4,X + INX + BNE _loop + PLX + RTS +EndMod + +********************** +Module LAC_Compare_LPC +********************** + + PHX + LDX #252 ; use ZP wrap around + SEC +_loop LDA Long_AC+4,X + SBC Long_PC+4,X + INX + BNE _loop + PLX + RTS +EndMod + +************** +Module Inc_LAC +************** + + INW Long_AC + BNE _return + INW Long_AC+2 +_return RTS +EndMod + +************** +Module Dec_LAC +************** + + LDA Long_AC + ORA Long_AC+1 + BNE _skip + DEW Long_AC+2 +_skip DEW Long_AC + RTS +EndMod + +************** +Module Inc_LPC +************** + + INW Long_PC + BNE _return + INW Long_PC+2 +_return RTS +EndMod + +************** +Module Dec_LDA +************** + + LDA Long_DA + ORA Long_DA+1 + BNE _skip + DEW Long_DA+2 +_skip DEW Long_DA + RTS +EndMod + +************ +Module Fetch +************ + + PHZ + TYA + TAZ + BBS7 Long_PC+3,_banked ; trigger banked access + NOP ; use LDA [Long_PC],Z +_banked LDA (Long_PC),Z + PLZ + AND #$ff + RTS +EndMod + +***************** +Module Mon_Memory +***************** + + JSR Get_LAC ; get 1st. parameter + LDZ #16 ; default row count + BCS _row ; no address + JSR LAC_To_LPC ; Long_PC = start address + JSR Get_LAC ; Long_AC = end address + BCS _row ; not given + + JSR LAC_Minus_LPC ; Long_CT = range + LBCC Mon_Error ; negative range -> error + LDX #4 ; 16 bytes / line + BBR7 MODE_80,_shift + DEX ; 8 bytes / line +_shift LSR Long_CT+1 + ROR Long_CT + DEX + BNE _shift + LDZ Long_CT ; row count + INZ + +_row JSR STOP + BEQ _exit + JSR Dump_Row + DEZ + BNE _row +_exit JMP Main +EndMod + +***************** +Module Print_Bits +***************** + + PHZ + STA Long_DA + LDY #8 +_loop LDA #'*' + BBS7 Long_DA,_set + LDA #'.' +_set JSR CHROUT + ASL Long_DA + DEY + BNE _loop + PLZ + RTS +EndMod + +*************** +Module Mon_Bits +*************** + + JSR Get_LAC ; get 1st. parameter + BCS _lab + JSR LAC_To_LPC ; Long_PC = start address +_lab JSR Print_CR + LDA #WHITE + STA Long_DA+1 + + LDX #8 +_row PHX + JSR Hex_LPC + LDZ #0 +_col SEC + LDA #WHITE+LRED ; toggle colour + SBC Long_DA+1 + STA Long_DA+1 + JSR CHROUT + LDA [Long_PC],Z + JSR Print_Bits + CLC + TZA + ADC #8 + TAZ + CMP #64 + BCC _col + JSR Print_CR + JSR Inc_LPC + PLX + DEX + BNE _row + JMP Main +EndMod + +*********************** +Module Mon_Set_Register +*********************** + + JSR Get_LAC ; get 1st. parameter + JSR LAC_To_PC + LDY #3 +_loop JSR Get_LAC + BCS _exit + LDA Long_AC + STA Bank,Y + INY + CPY #9 + BCC _loop +_exit JMP Main +EndMod + +********************* +Module Mon_Set_Memory +********************* + + JSR Get_LAC ; get 1st. parameter + BCS _exit + JSR LAC_To_LPC ; Long_PC = row address + LDZ #0 +_loop JSR Get_LAC + BCS _exit + LDA Long_AC + BBS7 Long_PC+3,_banked ; trigger banked access + NOP ; use STA [Long_PC],Z +_banked STA (Long_PC),Z + INZ + CPZ #16 + BBR7 MODE_80,_next + CPZ #8 +_next BCC _loop + +_exit JSR PRIMM + .BYTE "\eO" + .BYTE $91,$00 + JSR Dump_Row + JMP Main +EndMod + +************* +Module Mon_Go +************* + + JSR Get_LAC ; get 1st. parameter + JSR LAC_To_PC + LDX SPL + TXS + JMP JMPFAR +EndMod + +************** +Module Mon_JSR +************** + + JSR Get_LAC ; get 1st. parameter + JSR LAC_To_PC + LDX SPL + TXS + JSR JSRFAR + TSX + STX SPL + JMP Main +EndMod + +******************* +Module Dump_4_Bytes +******************* + + JSR CHROUT ; colour +_loop BBS7 Long_PC+3,_banked ; trigger banked access + NOP ; use LDA [Long_PC],Z +_banked LDA (Long_PC),Z + JSR Print_Hex_Blank + INZ + TZA + AND #3 + BNE _loop + RTS +EndMod + +******************* +Module Dump_4_Chars +******************* + + LDY #0 + STY QTSW ; disable quote mode + JSR CHROUT ; colour +_loop BBS7 Long_PC+3,_banked ; trigger banked access + NOP ; use LDA [Long_PC],Z +_banked LDA (Long_PC),Z + TAY + AND #%0110 0000 + BNE _laba + LDY #'.' +_laba TYA + JSR CHROUT + INZ + TZA + AND #3 + BNE _loop + RTS +EndMod + +*************** +Module Dump_Row +*************** + + PHZ + JSR Print_CR + LDA #'>' + JSR CHROUT + JSR Hex_LPC + + LDZ #0 + LDX #2 ; 2 blocks in 80 columns + BBR7 MODE_80,_loop + DEX ; 1 block in 40 columns +_loop LDA #LRED + JSR Dump_4_Bytes + LDA #WHITE + JSR Dump_4_Bytes + DEX + BNE _loop + + JSR PRIMM + .BYTE $3a,$12,$00 ; : reverse on + + LDZ #0 + LDX #2 ; 4 blocks in 80 columns + BBR7 MODE_80,_lchr + DEX ; 2 blocks in 40 columns +_lchr LDA #LRED + JSR Dump_4_Chars + LDA #WHITE + JSR Dump_4_Chars + DEX + BNE _lchr + TZA + JSR Add_LPC + PLZ + RTS +EndMod + +******************* +Module Mon_Transfer +******************* + + JSR Param_Range ; Long_PC = source + LBCS Mon_Error ; Long_CT = count + JSR Get_LAC ; Long_AC = target + LBCS Mon_Error + + LDZ #0 + JSR LAC_Compare_LPC ; target - source + BCC _forward + +; source < target: backward transfer + + JSR LAC_Plus_LCT ; Long_AC = end of target + +_lpback LDA [Long_DA],Z ; backward copy + STA [Long_AC],Z + JSR Dec_LDA + JSR Dec_LAC + JSR Dec_LCT + BPL _lpback + JMP Main + +_forward LDA [Long_PC],Z ; forward copy + STA [Long_AC],Z + JSR Inc_LPC + JSR Inc_LAC + JSR Dec_LCT + BPL _forward + JMP Main +EndMod + +****************** +Module Mon_Compare +****************** + + JSR Param_Range ; Long_PC = source + LBCS Mon_Error ; Long_CT = count + JSR Get_LAC ; Long_AC = target + LBCS Mon_Error + JSR Print_CR + LDZ #0 +_loop LDA [Long_PC],Z + CMP [Long_AC],Z + BEQ _laba + JSR Hex_LPC +_laba JSR Inc_LAC + JSR Inc_LPC + JSR Dec_LCT + BPL _loop + JMP Main +EndMod + +*************** +Module Mon_Hunt +*************** + + JSR Param_Range ; Long_PC = start + LBCS Mon_Error ; Long_CT = count + LDY #0 + JSR Get_Char + CMP #APOSTR + BNE _bin + JSR Get_Char ; string hunt + CMP #0 + LBEQ Mon_Error ; null string + +_lpstr STA Mon_Data,Y + INY + JSR Get_Char + BEQ _hunt + CPY #32 ;max. string length + BNE _lpstr + BRA _hunt + +_bin JSR Got_LAC +_lpbin LDA Long_AC + STA Mon_Data,Y + INY + JSR Get_LAC + BCS _hunt + CPY #32 ;max. data length + BNE _lpbin + +_hunt STY Long_DA ; hunt length + JSR Print_CR + +_lpstart LDY #0 +_lpins JSR Fetch + CMP Mon_Data,Y + BNE _next + INY + CPY Long_DA + BNE _lpins + JSR Hex_LPC ; match +_next JSR STOP + LBEQ Main + JSR Inc_LPC + JSR Dec_LCT + BPL _lpstart + JMP Main +EndMod + +**************** +Module Load_Save +**************** + + LDY Disk_Unit + STY FA + LDY #8 + STY SA + LDY #0 + STY BA + STY FNLEN + STY FNBANK + STY STATUS + LDA #>Mon_Data + STA FNADR+1 + LDA # load/verify + JSR Print_CR + LDX Long_AC ; X/Y = end address + LDY Long_AC+1 + LDA VERCK ; A = load/verify/save + CMP #'S' + LBNE Mon_Error ; must be Save + LDA #0 + STA SA ; set SA for PRG + LDA #Long_PC ; Long_PC = start address + JSR SAVE +_exit JMP Main + +_do LDA VERCK + CMP #'V' ; Verify + BEQ _exec + CMP #'L' ; Load + LBNE Mon_Error + LDA #0 ; 0 = LOAD +_exec JSR LOAD ; A == 0 : LOAD else VERIFY + BBR4 STATUS,_exit + LDA VERCK + LBEQ Mon_Error + LBCS Main + JSR PRIMM + .BYTE " ERROR",0 + JMP Main + +_load LDX Long_PC + LDY Long_PC+1 + LDA #0 ; 0 = use X/Y as load address + STA SA ; and ignore load address from file + BRA _do +EndMod + +*************** +Module Mon_Fill +*************** + + JSR Param_Range ; Long_PC = target + LBCS Mon_Error ; Long_CT = count + JSR Get_LAC ; Long_AC = fill byte + LBCS Mon_Error + JSR Print_CR + LDZ #0 +_loop LDA Long_AC + STA [Long_PC],Z + JSR Inc_LPC + JSR Dec_LCT + BPL _loop + JMP Main +EndMod + +******************* +Module Mon_Assemble +******************* + + JSR Get_LAC ; get 1st. parameter + LBCS Mon_Error + JSR LAC_To_LPC ; Long_PC = PC + +_start LDX #0 ; mne letter counter + STX Long_DA+1 ; clear encoded MNE + STX Op_Flag ; 6:long branch 5:32 bit + STX Op_Ix ; operand byte index + STX Op_Len ; operand length +_getin JSR Get_Char + BNE _laba + CPX #0 + LBEQ Main + +_laba CMP #' ' + BEQ _start ; restart after blank + +; check for long branches + + CPX #1 + BNE _labb ; -> not 2nd. char + CMP #'B' + BNE _labb ; 2nd. char != 'B' + LDZ Op_Mne + CPZ #'L' + BNE _labb ; 1st. Char != 'L' + SMB6 Op_Flag ; flag long branch + DEX ; skip 'L' + +_labb STA Op_Mne,X ; next mne character + INX + CPX #3 + BNE _getin + +; encode 3 letter mnemonic + +_lpenc LDA Op_Mne-1,X + SEC + SBC #$3f ; offset + LDY #5 ; 5 bit code +_lpbit LSR A + ROR Long_DA + ROR Long_DA+1 + DEY + BNE _lpbit + DEX + BNE _lpenc + +; find packed MNE code in table + + LDX #90 ; # of mnemonics + LDA Long_DA +_lpfind CMP MNE_L,X ; compare left MNE + BNE _nxfind + LDY MNE_R,X + CPY Long_DA+1 ; compare right MNE + BEQ _found +_nxfind DEX + BPL _lpfind + JMP Mon_Error + +_found STX Ix_Mne + +; find 1st. opcode for this mnemonic + + TXA + LDX #0 +_lpopc CMP MNE_Index,X + BEQ _exopc + INX + BNE _lpopc +_exopc STX Op_Code + +; check for BBR BBS RMB SMB + + TXA + AND #7 + CMP #7 + BNE _labc + + JSR Get_Char + CMP #'0' + LBCC Mon_Error + CMP #'8' + LBCS Mon_Error + ASL A + ASL A + ASL A + ASL A + ORA Op_Code + STA Op_Code + + JSR Get_Char + CMP #' ' + LBNE Mon_Error + +; read operand + +_labc LDA #0 +_labd STA Mode_Flags + JSR Read_Number + LBCS Mon_Error + BEQ _labg ; no operand + LDA Long_AC+2 + LBNE Mon_Error ; -> overflow + LDY #2 ; Y=2 word operand + LDA Long_AC+1 + BNE _labf ; high byte not zero + DEY ; Y=1 byte operand +_labf LDX Op_Ix ; X = operand value # + TYA ; A = 1:byte or 2:word + STA Op_Len,X ; store operand length + INC Op_Ix ; ++index to operand value + TXA ; A = current index + BNE _labg ; -> at 2nd. byte + JSR LAC_To_LCT ; Long_CT = 1st. operand +_labg DEC Buf_Index ; back to delimiter + +_lpnop JSR Get_Char ; get delimiter + LBEQ _adjust ; end of operand + CMP #' ' + BEQ _lpnop + +; immediate + + CMP #'#' + BNE _lbra + LDA Mode_Flags + BNE _error + LDA #$80 ; immediate mode + BRA _labd + +; left bracket + +_lbra CMP #'[' + BNE _indir + LDA Mode_Flags + BNE _error + SMB5 Op_Flag ; 32 bit mode + LDA #$40 ; ( flag + BRA _labd + +; left parenthesis + +_indir CMP #'(' + BNE _comma + LDA Mode_Flags + BNE _error + LDA #$40 ; ( flag + BRA _labd + +; comma + +_comma CMP #',' + BNE _stack + LDA Op_Ix ; operand value # + BEQ _error + LDX #4 ; outside comma + LDA Mode_Flags + BEQ _comma1 ; no flags yet + CMP #$78 ; ($nn,SP) + BEQ _comma1 + CMP #$48 ; ($nn) + BEQ _comma1 + LDX #$20 ; , inside comma + CMP #$40 ; ( + BNE _error +_comma1 TXA + ORA Mode_Flags + JMP _labd + +; stack relative + +_stack CMP #'S' + BNE _rbra + JSR Get_Char + CMP #'P' + BNE _error + LDA Mode_Flags + CMP #$60 ; ($nn, + BNE _error + ORA #%0001 0000 ; SP flag + JMP _labd + +; right bracket + +_rbra CMP #']' + BNE _right + BBR5 Op_Flag,_error + LDA Op_Ix + LBEQ Mon_Error ; no value + LDA Mode_Flags + CMP #$40 ; ( + LBNE Mon_Error + ORA #%0000 1000 ; ) + JMP _labd + +_error JMP Mon_Error + +; right parenthesis + +_right CMP #')' + BNE _X + LDA Op_Ix + LBEQ Mon_Error ; no value + LDA Mode_Flags + CMP #$40 ; ( + BEQ _right1 + CMP #$61 ; ($nn,X + BEQ _right1 + CMP #$70 ; ($nn,SP + LBNE Mon_Error +_right1 ORA #%0000 1000 ; ) + JMP _labd + +_X CMP #'X' + BNE _Y + LDA Op_Ix + LBEQ Mon_Error + LDA Mode_Flags + CMP #$60 + BEQ _X1 + CMP #4 + LBNE Mon_Error +_X1 ORA #%0000 0001 + JMP _labd + +; Y + +_Y CMP #'Y' + BNE _Z + LDA Op_Ix + LBEQ Mon_Error + LDA Mode_Flags + CMP #$4c ; ($nn), + BEQ _Y1 + CMP #4 ; $nn, + BEQ _Y1 + CMP #$7c ; ($nn,SP), + LBNE Mon_Error +_Y1 ORA #%0000 0010 ; Y + JMP _labd + +; Z + +_Z CMP #'Z' + LBNE Mon_Error + LDA Op_Ix + LBEQ Mon_Error + LDA Mode_Flags + CMP #$4c ; $nn, + LBNE Mon_Error + ORA #%0000 0011 ; Z + JMP _labd + +; BBR BBS RMB SMB two operands + +_adjust LDA Ix_Mne + LDX Op_Ix ; # if values + BEQ _match ; -> no operand + DEX + BEQ _one ; -> one operand + DEX + LBNE Mon_Error ; -> error if more than 2 + CMP #5 ; BBR + BEQ _BB + CMP #6 ; BBS + LBNE Mon_Error +_BB LDA Long_CT+1 + LBNE Mon_Error + LDA #3 ; offset + JSR Branch_Target + LDA Op_Code + LDY Long_AC + LDX Long_CT + STX Long_AC + STY Long_AC+1 + LDY #2 + BRA _store + +; one operand in Long_CT + +_one LDX Long_CT + LDY Long_CT+1 + STX Long_AC + STY Long_AC+1 ; Aval = operand + LDX #10 +_lpbrain CMP BRAIN-1,X + BEQ _branch + DEX + BNE _lpbrain + BRA _match + +; branch instruction + +_branch LDA Mode_Flags + LBNE Mon_Error ; only value + LDA #2 ; branch offset + JSR Branch_Target + LDA Op_Code + LDY #1 ; short branch + BBR6 Op_Flag,_bran1 + INY ; long branch + ORA #3 +_bran1 BRA _store + +; find opcode matching mnemonic and address mode + +_match JSR Mode_Index +_lpmatch JSR Match_Mode + BEQ _okmat + LDA Op_Len + LBEQ Mon_Error + LDA Mode_Flags + LBMI Mon_Error + AND #%0011 1111 + STA Mode_Flags + INC Op_Len + JSR Size_To_Mode + BRA _lpmatch +_okmat LDY Op_Len + TXA + +; store instruction bytes +; ----------------------- +; A = opcode +; Y = operand length +; Long_AC = operand value + +_store STA Op_Code + STY Op_Size + INC Op_Size + BBR5 Op_Flag,_storen + LDA #$ea ; 32 bit prefix + LDZ #0 + STA [Long_PC],Z ; store prefix + INZ + LDA Op_Code + STA [Long_PC],Z ; store opcode + INZ + LDA Long_AC + STA [Long_PC],Z ; store address + INC Op_Size + BRA _print + +_storen PHY + PLZ ; Z = Y + BEQ _store1 + +_lpsto LDA Long_AC-1,Y + STA [Long_PC],Z + DEZ + DEY + BNE _lpsto + +_store1 LDA Op_Code + STA [Long_PC],Z + +_print JSR PRIMM + .BYTE 13,$91,"A \eQ",0 + JSR Print_Code + INC Op_Size + LDA Op_Size + JSR Add_LPC + +; print out command 'A' together with next address +; and put it into buffer too, +; for easy entry of next assembler instruction + + JSR PRIMM + .BYTE CR,"A ",0 + + LDA #'A' + STA Buffer + LDA #' ' + STA Buffer+1 + LDY #2 + LDX #2 ; 6 digits + LDA Long_PC,X + BNE _auto + DEX ; 4 digits +_auto PHX + LDA Long_PC,X + JSR A_To_Hex + STA Buffer,Y + JSR CHROUT + INY + TXA + STA Buffer,Y + JSR CHROUT + INY + PLX + DEX + BPL _auto + + LDA #' ' + STA Buffer,Y + JSR CHROUT + INY + TYA + TAX + JMP Main_A +EndMod + +******************** +Module Branch_Target +******************** + + DEW Long_AC + DEC A + BNE Branch_Target + +; Target - PC + + SEC + LDA Long_AC + SBC Long_PC + STA Long_AC + LDA Long_AC+1 + SBC Long_PC+1 + STA Long_AC+1 + RTS +EndMod + +***************** +Module Match_Mode +***************** + +; find matching mnemonic and address mode + + LDX Op_Code ; try this opcode + LDA Mode_Flags ; size and address mode +_loop CMP LEN_ADM,X + BEQ _return ; success ZF=1 + +; search for next opcode with same mnemonic + +_next INX ; next opcode + BEQ _error + LDY MNE_Index,X + CPY Ix_Mne ; same mnemonic ? + BEQ _loop ; -> compare again + BRA _next + +_error DEX ; X = $ff ZF=0 +_return RTS +EndMod + +***************** +Module Mode_Index +***************** + + LDA Mode_Flags + LDX #0 +_loop CMP ADMODE,X + BEQ _found + INX + CPX #16 + BCC _loop + TXA + RTS +_found STX Mode_Flags +EndMod + +******************* +Module Size_To_Mode +******************* + + LDA Op_Len + LSR A + ROR A + ROR A + ORA Mode_Flags + STA Mode_Flags + LDX #0 + RTS +EndMod + +********************** +Module Mon_Disassemble +********************** + + JSR Get_LAC ; get 1st. parameter + BCS _nopar + JSR LAC_To_LPC ; Long_PC = start address + JSR Get_LAC ; Long_AC = end address + BCC range +_nopar LDA #32 ; disassemble 32 bytes + STA Long_CT + BRA _loop +range JSR LAC_Minus_LPC ; Long_CT = range + LBCC Mon_Error ; -> negative + +_loop JSR CR_Erase ; prepare empty line + JSR STOP + LBEQ Main + JSR Dis_Code ; disassemble one line + INC Op_Size + LDA Op_Size + JSR Add_LPC ; advance address + LDA Long_CT + SEC + SBC Op_Size + STA Long_CT + BCS _loop + JMP Main +EndMod + +*************** +Module Dis_Code +*************** + + JSR PRIMM + .BYTE ". ",0 +EndMod + +***************** +Module Print_Code +***************** + +; print 24 bit address of instruction + + JSR Hex_LPC ; 24 bit address + +; read opcode and calculate length and address mode + + LDY #0 + STY Op_Flag ; clear flags + JSR Fetch ; fetch from (banked) address + +; check for Q instructions + + CMP #$42 ; NEG + BNE _nop + INY ; Y = 1 + JSR Fetch + CMP #$42 ; NEG + BNE _nop + SMB4 Op_Flag ; Q flag + LDA #2 + JSR Add_LPC ; skip NEG NEG + +; check for 32 bit address mode + +_nop LDY #0 + JSR Fetch + STA Op_Code + TAX + CMP #$ea ; prefix ? + BNE _normal + INY + JSR Fetch ; opcode after prefix + AND #%0001 1111 ; identify ($nn),Z codes + CMP #%0001 0010 + BNE _normal + SMB5 Op_Flag ; set extended flag + JSR Fetch + STA Op_Code ; code after prefix + TAX + +_normal LDY LEN_ADM,X ; Y = length and address mode + TYA ; A = length and address mode + AND #15 ; A = address mode + TAX ; X = address mode + LDA ADMODE,X ; A = mode flags + STA Adr_Flags ; store + TYA ; A = length and address mode + AND #%1100 0000 ; mask instruction length + ASL A ; rotate into lower two bits + ROL A + ROL A + STA Op_Size ; store + BBR5 Op_Flag,_norm1 + INC Op_Size +_norm1 + +; print instruction and operand bytes + + LDY #0 + LDA #' ' + BBR4 Op_Flag,_blpr + LDA #'*' ; print * for NEG NEG +_blpr JSR CHROUT +_lphex JSR Fetch + JSR Print_Hex_Blank + CPY #2 + BEQ _long ; stop after 3 bytes + CPY Op_Size + INY + BCC _lphex + +; fill up with blanks + +_lpfill CPY #3 + BCS _long + JSR PRIMM + .BYTE " ",0 + INY + BRA _lpfill + +; detect long branches + +_long LDA #YELLOW + JSR CHROUT + LDX Op_Code + LDA LEN_ADM,X + CMP #%1010 0000 ; long branch mode + BNE _locate + SMB6 Op_Flag ; set long branch flag + LDA #'L' + JSR CHROUT + +; locate mnemonic text + +_locate LDX Op_Code ; X = opcode + LDY MNE_Index,X ; Y = index to mnemonic text + LDA MNE_L,Y ; A = packed left part + STA Long_AC+1 + LDA MNE_R,Y ; A = packed right part + STA Long_AC + +; unpack and print mnemonic text + + LDX #3 ; 3 letters +_lpmne LDA #0 + LDY #5 ; 5 bits per letter +_lplet ASL Long_AC + ROL Long_AC+1 + ROL A ; rotate letter into A + DEY + BNE _lplet ; next bit + ADC #$3f ; add offset (C = 0) + DEX + BEQ _lastc ; 3rd. character + TAZ ; remember + JSR CHROUT ; and print it + BRA _lpmne ; next letter + +_lastc BBR4 Op_Flag,_lbra ; -> no Q + CMP #'A' ; LDA, STA, ORA + BEQ _Q3 + CMP #'C' ; DEC, INC + BNE _Q4 + CPZ #'E' ; DEC + BEQ _Q3 + CPZ #'N' ; INC + BNE _Q4 +_Q3 LDA #'Q' ; LDQ, STQ, ORQ, INQ, DEQ + JSR CHROUT + BRA _mne4 +_Q4 JSR CHROUT + LDA #'Q' ; add Q as 4th. char + JSR CHROUT + BRA _mne5 + +_lbra JSR CHROUT ; 3rd. character + BBS6 Op_Flag,_mne5 ; long branch + +; check for 4-letter bit instructions + + LDA Op_Code + AND #15 + CMP #7 ; RMB & SMB + BEQ _biti + CMP #15 ; BBR & BBS + BNE _mne4 + SMB7 Op_Flag ; flag two operands +_biti LDA Op_Code + AND #%0111 0000 + ASL A + ROL A + ROL A + ROL A + ROL A + ORA #'0' + JSR CHROUT + BRA _mne5 + +_mne4 JSR Print_Blank +_mne5 JSR Print_Blank + LDA #WHITE + JSR CHROUT + +; check for accumulator operand + + LDA Op_Code + LDX #8 +_lpaccu DEX + BMI _oper + CMP ACCUMODE,X + BNE _lpaccu + + LDA #'A' + BBR4 Op_Flag,_accu + LDA #'Q' +_accu JSR CHROUT + JMP _return + +; fetch and decode operand + +_oper LDX Op_Size + LBEQ _return ; -> no operand + + BBR7 Adr_Flags,_laba ; bit 7: immediate + LDA #'#' + BRA _labb +_laba BBR6 Adr_Flags,_labc ; bit 6: left ( + LDA #'(' + BBR5 Op_Flag,_labb + LDA #'[' +_labb JSR CHROUT +_labc LDA #'$' + JSR CHROUT + +; fetch operand to Long_AC + + LDY #0 + STY Long_AC+1 +_lpfop INY + JSR Fetch + STA Long_AC-1,Y + CPY Op_Size + BCC _lpfop + +; interpret address modes + + LDX Op_Code + LDA LEN_ADM,X + AND #%0010 0000 ; branches + LBNE _rel + +; print 16 bit operand hi/lo or 8 bit operand + + BBR5 Op_Flag,_proper + LDA Long_AC+1 + JSR Print_Hex ; [$nn],Z + LDA #']' + JSR CHROUT + BRA _labf + +_proper LDY Op_Size + BBR7 Op_Flag,_lpoper + LDY #1 +_lpoper LDA Long_AC-1,Y + JSR Print_Hex + DEY + BNE _lpoper + + BBR5 Adr_Flags,_labe ; comma flag + LDA #',' + JSR CHROUT + + BBR4 Adr_Flags,_labd ; SP flag + LDA #'S' + JSR CHROUT + LDA #'P' + JSR CHROUT + +_labd BBR0 Adr_Flags,_labe ; X flag + LDA #'X' + JSR CHROUT + +_labe BBR3 Adr_Flags,_labf ; ) flag + LDA #')' + JSR CHROUT + +_labf BBR4 Op_Flag,_comch ; not a Q instruction + LDA Adr_Flags + AND #3 + CMP #1 + BNE _return ; Q only with ,X + +_comch BBR2 Adr_Flags,_labg ; , flag + LDA #',' + JSR CHROUT + + LDA Adr_Flags + AND #%0000 0011 ; $03 + BEQ _labg + TAY + LDA Index_Char-1,Y + JSR CHROUT + +; fetch 2nd. operand for BBR and BBS + +_labg BBR7 Op_Flag,_return + LDA #',' + JSR CHROUT + LDA #'$' + JSR CHROUT + LDY #2 + JSR Fetch + STA Long_AC + LDA #0 + STA Long_AC+1 + DEY + STY Op_Size ; Op_Size = 1 + LDA #3 ; offset for relative address + BRA _rela + +_rel LDA #2 ; offset for relative address +_rela PHA + LDA Op_Size ; 1:short 2:long + LSR A + ROR A + AND Long_AC + BPL _labh + LDA #$ff ; backward branch + STA Long_AC+1 + +_labh PLX ; offset 2 or 3 +_lpinw INW Long_AC + DEX + BNE _lpinw + + CLC + LDA Long_AC + ADC Long_PC + PHA + LDA Long_AC+1 + ADC Long_PC+1 + TAX + PLA + JSR Print_XA_Hex + BBR7 Op_Flag,_return + INC Op_Size +_return RTS +EndMod + +************** +Module Got_LAC +************** + + DEC Buf_Index +EndMod + +************** +Module Get_LAC +************** + + JSR Read_Number + BCS _error ; illegal character + BEQ _noval ; no value + JSR Got_Char ; delimiter ? + BEQ _end ; end of input + CMP #' ' + BEQ _ok + CMP #',' + BEQ _ok +_error JMP Mon_Error ; stack is reset in Mon_Error + +_noval SEC + RTS + +_end DEC Buf_Index +_ok CLC + RTS +EndMod + +****************** +Module Read_Number +****************** + + PHX + PHY + PHZ + LDA #0 + STA Dig_Cnt ; count columns read + STA Long_AC ; clear result Long_AC + STA Long_AC+1 + STA Long_AC+2 + STA Long_AC+3 + + JSR Get_Glyph ; get 1st. character + BEQ _exit + CMP #APOSTR ; character entry 'C + BNE _numeric + JSR Get_Char ; character after ' + STA Long_AC + INC Dig_Cnt + BRA _exit + +_numeric LDY #3 ; $ + % % +_prefix CMP Cons_Prefix,Y ; Y = base index + BEQ _digit ; -> valid prefix + DEY + BPL _prefix + INY ; Y = 0 + DEC Buf_Index ; character is digit + +_digit JSR Get_Char ; hex -> BCD + BEQ _exit ; ? : ; and zero terminate + CMP #'0' + BCC _exit + CMP #':' + BCC _valid ; 0-9 + CMP #'A' + BCC _exit + CMP #'G' + BCS _exit + SBC #7 ; hex conversion +_valid SBC #'0'-1 + CMP Num_Base,Y + BCS _error + PHA ; push digit + INC Dig_Cnt + + CPY #1 ; decimal + BNE _laba + LDX #3 ; push Long_AC * 2 + CLC +_push LDA Long_AC,X + ROL A + PHA + DEX + BPL _push + +_laba LDX Num_Bits,Y +_shift ASL Long_AC + ROL Long_AC+1 + ROW Long_AC+2 + BCS _error ; overflow + DEX + BNE _shift + + CPY #1 ; decimal adjustment + BNE _labc + LDX #0 + LDZ #3 + CLC +_pull PLA + ADC Long_AC,X + STA Long_AC,X + INX + DEZ + BPL _pull + +_labc PLA ; pull digit + CLC + ADC Long_AC + STA Long_AC + BCC _digit + INC Long_AC+1 + BNE _digit + INW Long_AC+2 + BNE _digit + +_error SEC + BRA _return +_exit CLC +_return PLZ + PLY + PLX + LDA Dig_Cnt ; digits read + RTS +EndMod + +************** +Module Hex_LPC +************** + + LDX Long_PC+3 + BEQ _laba + LDA #YELLOW + JSR CHROUT + TXA + JSR Print_Hex + LDA Long_PC+2 + JSR Print_Hex + LDA #WHITE + JSR CHROUT + BRA _labb +_laba LDA Long_PC+2 + BEQ _labb + JSR Print_Hex +_labb LDX Long_PC+1 + LDA Long_PC +EndMod + +******************* +Module Print_XA_Hex +******************* + + PHA + TXA + JSR Print_Hex + PLA +EndMod + +********************** +Module Print_Hex_Blank +********************** + + JSR Print_Hex +EndMod + +****************** +Module Print_Blank +****************** + + LDA #' ' + JMP CHROUT +EndMod + +*************** +Module Print_CR +*************** + + LDA #13 + JMP CHROUT +EndMod + +*************** +Module CR_Erase +*************** + + JSR PRIMM + .BYTE "\r\eQ",0 + RTS +EndMod + +**************** +Module Print_Hex +**************** + + PHX + JSR A_To_Hex + JSR CHROUT + TXA + PLX + JMP CHROUT +EndMod + +*************** +Module A_To_Hex +*************** + + PHA + JSR _nibble + TAX + PLA + LSR A + LSR A + LSR A + LSR A + +_nibble AND #15 + CMP #10 + BCC _lab + ADC #6 +_lab ADC #'0' + RTS +EndMod + +**************** +Module Get_Glyph +**************** + PHX + LDA #' ' +_loop LDX Buf_Index + INC Buf_Index + CMP Buffer,X + BEQ _loop + PLX ; fall through +EndMod + +*************** +Module Got_Char +*************** + + DEC Buf_Index +EndMod + +*************** +Module Get_Char +*************** + + PHX + LDX Buf_Index + INC Buf_Index + LDA Buffer,X + CPX #1 + PLX + BCC _regc + CMP #';' ; register + BEQ _return + CMP #'?' ; help + BEQ _return +_regc CMP #0 + BEQ _return + CMP #':' +_return RTS +EndMod + + +************** +Module Dec_LCT +************** + + LDA Long_CT + ORA Long_CT+1 + BNE _skip + DEW Long_CT+2 +_skip DEW Long_CT + LDA Long_CT+3 ; set N flag + RTS +EndMod + +************** +Module Add_LPC +************** + + CLC + ADC Long_PC + STA Long_PC + BCC _return + +************ +Inc_LPC_Page +************ + + INC Long_PC+1 + BNE _return + INW Long_PC+2 +_return RTS + +****************** +Module Param_Range +****************** + +; read two (address) parameters + +; Long_CT = difference (2nd. minus 1st.) +; Long_PC = 1st. parameter +; Long_DA = 2nd. parameter + +; carry on exit flags error + + JSR Get_LAC ; get 1st. parameter + BCS _error + JSR LAC_To_LPC ; Long_PC = 1st. address + JSR Get_LAC + BCS _error + JSR LAC_To_LDA ; Long_DA = 2nd. address + JSR LAC_Minus_LPC ; Long_CT = range + BCC _error + CLC + RTS +_error SEC + RTS +EndMod + +**************** +Module Converter +**************** + + LDX #0 + STX Buf_Index + JSR Get_LAC + LBCS Mon_Error + LDX #0 +_loop PHX + JSR CR_Erase + LDA Cons_Prefix,X + JSR CHROUT + TXA + ASL A + TAX + JSR (Conv_Tab,X) + PLX + INX + CPX #4 + BCC _loop + JMP Main + +Conv_Tab .WORD Print_Hexval + .WORD Print_Decimal + .WORD Print_Octal + .WORD Print_Dual +EndMod + +***************** +Module Print_Dual +***************** + + LDX #24 ; digits + LDY #1 ; bits per digit + BRA _entry + +*********** +Print_Octal +*********** + + LDX #8 ; digits + LDY #3 ; bits per digit + +_entry JSR LAC_To_LCT + LDZ #0 + STZ Long_PC + LDZ #'0' + PHY ; save start value +_loopa PLY ; reinitialise + PHY + LDA #0 +_loopb ASL Long_CT + ROW Long_CT+1 + ROL A + DEY + BNE _loopb + CPX #1 ; print last character + BEQ _skip + ORA Long_PC + BEQ _next +_skip ORA #'0' + STZ Long_PC + JSR CHROUT +_next DEX + BNE _loopa + PLY ; cleanup stack + RTS +EndMod + +******************* +Module Print_Hexval +******************* + + JSR LAC_To_LPC + LDA #0 + STA Long_PC+3 + BRA Print_BCD +EndMod + +******************** +Module Print_Decimal +******************** + +; max $ffffff = 16777215 (8 digits) + + JSR LAC_To_LCT + LDX #3 ; 4 BCD bytes = 8 digits + LDA #0 +_clear STA Long_PC,X + DEX + BPL _clear + + LDX #32 ; source bits + SED +_loop ASL Long_CT + ROL Long_CT+1 + ROW Long_CT+2 + LDA Long_PC + ADC Long_PC + STA Long_PC + LDA Long_PC+1 + ADC Long_PC+1 + STA Long_PC+1 + LDA Long_PC+2 + ADC Long_PC+2 + STA Long_PC+2 + LDA Long_PC+3 + ADC Long_PC+3 + STA Long_PC+3 + DEX + BNE _loop + CLD +EndMod + +**************** +Module Print_BCD +**************** + + LDA #0 + STA Long_CT + LDZ #'0' + LDY #8 ; max. digits +_loopa LDX #3 ; 4 bytes + LDA #0 +_loopb ASL Long_PC + ROL Long_PC+1 + ROW Long_PC+2 + ROL A + DEX + BPL _loopb + + CPY #1 ; print last character + BEQ _skip + ORA Long_CT + BEQ _next +_skip ORA #'0' + STZ Long_CT + CMP #$3a + BCC _print + ADC #6 ; + carry +_print JSR CHROUT +_next DEY + BNE _loopa + RTS +EndMod + + +*************** +Module Mon_Disk +*************** + + DEC Buf_Index + LDX Buf_Index + LDA Buffer,X + BEQ Print_Disk_Status + STA Long_CT ; dir marker + LDY #$ff ; SA = 15 + CMP #'$' + BNE _lab + LDY #$f0 ; SA = 0 +_lab LDA FA + JSR LISTEN + TYA ; SA + JSR SECOND +_loop LDA Buffer,X + BEQ _close + JSR CIOUT + INX + BRA _loop +_close JSR UNLSN + LDA Long_CT + CMP #'$' + BNE Print_Disk_Status + JMP Directory + +EndMod + +********************** +Module Get_Disk_Status +********************** + + LDA FA + JSR TALK + LDA #$6f + JSR TKSA + JSR ACPTR ; 1st. digit + STA Disk_Msg + ASL A + ASL A + ASL A + ASL A + STA Disk_Status ; BCD + JSR ACPTR ; 2nd. digit + STA Disk_Msg+1 + AND #15 + ORA Disk_Status + STA Disk_Status ; complete BCD number + + LDY #1 +_loop INY + JSR ACPTR + STA Disk_Msg,Y + CMP #' ' + BCS _loop + LDA #0 + STA Disk_Msg,Y + JSR UNTALK + LDA Disk_Status + RTS +EndMod + +************************ +Module Print_Disk_Status +************************ + + JSR Get_Disk_Status + +************** +Print_Disk_Msg +************** + + JSR Print_CR + LDY #0 +_loop LDA Disk_Msg,Y + BEQ _exit + JSR CHROUT + INY + BRA _loop +_exit JMP Print_CR +EndMod + +; @[u] : print disk status for unit u +; @[u],$[=pattern] : print directory +; @[u],command : send disk command and read status +; @[u],U1 mem track startsec [endsec] : read disk sector(s) +; @[u],U2 mem track startsec [endsec] : write disk sector(s) + +************** +Module Mon_DOS +************** + + LDX #8 ; default device + JSR Get_Glyph + CMP #'0' + BCC _unit + CMP #':' + BCS _unit + DEC Buf_Index + JSR Read_Number + BCS _unit + LDX Long_AC ; unit + CPX #4 + LBCC Mon_Error + CPX #31 + LBCS Mon_Error +_unit STX FA + DEC Buf_Index +_next JSR Get_Char + BEQ _status ; only @u + CMP #' ' + BEQ _next + CMP #',' + BEQ _next + CMP #'U' ; sector read/write + BEQ DOS_U +_status JSR Mon_Disk + JMP Main +EndMod + +**************** +Module Directory +**************** + + LDA FA + JSR TALK + LDA #$60 + STA SA + JSR TKSA + LDA #0 + STA STATUS + + LDZ #6 ; load address, pseudo link, pseudo number +_loopb TAX ; X = previous byte + JSR ACPTR ; A = current byte + LDY STATUS + BNE _exit + DEZ + BNE _loopb ; X/A = last read word + + STX Long_AC + STA Long_AC+1 + STZ Long_AC+2 + STZ Long_AC+3 + JSR Print_Decimal ; file size + JSR Print_Blank + +_loopc JSR ACPTR ; print file entry + BEQ _cr + LDY STATUS + BNE _exit + JSR CHROUT + BCC _loopc + +_cr JSR Print_CR + JSR STOP + BEQ _exit + LDZ #4 + BRA _loopb ; next file +_exit JMP UNTALK +EndMod + +************ +Module DOS_U +************ + + JSR Get_Char + CMP #'1' ; U1: read + LBCC Mon_Error + CMP #'3' ; U2: write + LBCS Mon_Error + STA Mon_Data+1 ; U type + INC Buf_Index + JSR Get_LAC + LBCS Mon_Error + JSR LAC_To_LPC ; Long_PC = memory address + + JSR Get_LAC + LBCS Mon_Error + LDA Long_AC + STA Disk_Track + + JSR Get_LAC + LBCS Mon_Error + LDA Long_AC + STA Disk_Sector + + JSR Get_LAC + JSR LAC_To_LCT ; Long_CT = sector count + DEW Long_CT ; Long_CT = -1 for single + + JSR Open_Disk_Buffer + +_loop LDA Mon_Data+1 + LSR A + BEQ _write + JSR Find_Next_Sector + BNE _error + JSR Read_Sector + BRA _next + +_write JSR Write_Sector + JSR Find_Next_Sector + BNE _error + +_next JSR Inc_LPC_Page + INC Disk_Sector + DEW Long_CT + BPL _loop + +_error JSR Print_Disk_Msg + JSR Close_Disk_Buffer + JMP Main +EndMod + +*********************** +Module Find_Next_Sector +*********************** + + JSR Build_U_String + JSR Send_Disk_Command + JSR Get_Disk_Status + BEQ _return ; OK + CMP #$66 ; illegal track or sector + BNE _error ; error + LDA #0 + STA Disk_Sector + INC Disk_Track ; try next track + JSR Build_U_String + JSR Send_Disk_Command + JSR Get_Disk_Status + BEQ _return +_error JSR Print_Disk_Msg + LDA Disk_Status +_return RTS +EndMod + +*************************** +Module Open_Command_Channel +*************************** + + LDA FA + JSR LISTEN + LDA #$ff + JSR SECOND + LDY #0 + STY STATUS + RTS +EndMod + +*************** +Module Reset_BP +*************** + + JSR Open_Command_Channel +_loop LDA BP_ZERO,Y + BEQ _end + JSR CIOUT + INY + BRA _loop +_end JMP UNLSN +EndMod + +************************ +Module Send_Disk_Command +************************ + + JSR Open_Command_Channel +_loop LDA Mon_Data,Y + BEQ _end + JSR CIOUT + INY + BRA _loop +_end JMP UNLSN +EndMod + +****************** +Module Read_Sector +****************** + + LDA FA + JSR TALK + LDA #$69 ; SA = 9 + JSR TKSA + LDZ #0 + STZ STATUS +_loop JSR ACPTR + STA [Long_PC],Z + INZ + BNE _loop + JMP UNTALK +EndMod + +****************** +Module Write_Sector +****************** + + JSR Reset_BP ; reset disk buffer pointer + LDA FA + JSR LISTEN + LDA #$69 ; SA = 9 + JSR TKSA + LDZ #0 + STZ STATUS +_loop LDA [Long_PC],Z + JSR CIOUT + INZ + BNE _loop + JSR UNLSN + RTS +EndMod + +************* +Module Set_TS +************* + +; Input A = track or sector +; X = string index + +_100 CMP #100 + BCC _10 + INC Mon_Data,X + SBC #100 + BRA _100 +_10 CMP #10 + BCC _1 + INC Mon_Data+1,X + SBC #10 + BRA _10 +_1 ORA #'0' + STA Mon_Data+2,X + RTS +EndMod + +; @[u],U1 mem track startsec [endsec] : read disk sector(s) + +; U1:CHANNEL DRIVE TRACK SECTOR + +********************* +Module Build_U_String +********************* + + LDX #14 +_loop LDA U1,X + STA Mon_Data,X + DEX + CPX #2 + BCS _loop + LDA #'U' + STA Mon_Data + LDA Disk_Track + LDX #7 + JSR Set_TS + LDA Disk_Sector + LDX #11 + JMP Set_TS +EndMod + +*********************** +Module Open_Disk_Buffer +*********************** + + LDA #0 + STA STATUS + LDA FA + JSR LISTEN ; open fa,9,"#" + LDA #$f9 ; sa = 9 + JSR SECOND + LDA #'#' ; open buffer + JSR CIOUT + JSR UNLSN + LDA STATUS + LBNE Print_Disk_Status + RTS +EndMod + +************************ +Module Close_Disk_Buffer +************************ + + LDA #0 + STA STATUS + LDA FA + JSR LISTEN ; open fa,9,"#" + LDA #$e9 ; sa = 9 + JSR SECOND + JSR UNLSN + LDA STATUS + LBNE Print_Disk_Status + RTS +EndMod + + +; The 3 letter mnemonics are encoded as three 5-bit values +; and stored in a left byte MNE_L and a right byte MNE_R +; The 5 bit value is computed by subtracting $3f from the +; ASCII value, so '?'-> 0, '@'->1, 'A'->2, 'B'->3,'Z'->27 +; For example "ADC" is encoded as 2, 5, 4 +; ---------------- +; 7654321076543210 +; 00010 +; 00101 +; 00100 +; 0 +; +; The operator >" stores the left (high) byte of the packed value +; The operator <" stores the right (low) byte of the packed value + +***** +MNE_L +***** + + .BYTE >"ADC" + .BYTE >"AND" + .BYTE >"ASL" + .BYTE >"ASR" + .BYTE >"ASW" + .BYTE >"BBR" + .BYTE >"BBS" + .BYTE >"BCC" + .BYTE >"BCS" + .BYTE >"BEQ" + .BYTE >"BIT" + .BYTE >"BMI" + .BYTE >"BNE" + .BYTE >"BPL" + .BYTE >"BRA" + .BYTE >"BRK" + .BYTE >"BSR" + .BYTE >"BVC" + .BYTE >"BVS" + .BYTE >"CLC" + .BYTE >"CLD" + .BYTE >"CLE" + .BYTE >"CLI" + .BYTE >"CLV" + .BYTE >"CMP" + .BYTE >"CPX" + .BYTE >"CPY" + .BYTE >"CPZ" + .BYTE >"DEC" + .BYTE >"DEW" + .BYTE >"DEX" + .BYTE >"DEY" + .BYTE >"DEZ" + .BYTE >"EOR" + .BYTE >"INC" + .BYTE >"INW" + .BYTE >"INX" + .BYTE >"INY" + .BYTE >"INZ" + .BYTE >"JMP" + .BYTE >"JSR" + .BYTE >"LDA" + .BYTE >"LDX" + .BYTE >"LDY" + .BYTE >"LDZ" + .BYTE >"LSR" + .BYTE >"MAP" + .BYTE >"NEG" + .BYTE >"NOP" + .BYTE >"ORA" + .BYTE >"PHA" + .BYTE >"PHP" + .BYTE >"PHW" + .BYTE >"PHX" + .BYTE >"PHY" + .BYTE >"PHZ" + .BYTE >"PLA" + .BYTE >"PLP" + .BYTE >"PLX" + .BYTE >"PLY" + .BYTE >"PLZ" + .BYTE >"RMB" + .BYTE >"ROL" + .BYTE >"ROR" + .BYTE >"ROW" + .BYTE >"RTI" + .BYTE >"RTS" + .BYTE >"SBC" + .BYTE >"SEC" + .BYTE >"SED" + .BYTE >"SEE" + .BYTE >"SEI" + .BYTE >"SMB" + .BYTE >"STA" + .BYTE >"STX" + .BYTE >"STY" + .BYTE >"STZ" + .BYTE >"TAB" + .BYTE >"TAX" + .BYTE >"TAY" + .BYTE >"TAZ" + .BYTE >"TBA" + .BYTE >"TRB" + .BYTE >"TSB" + .BYTE >"TSX" + .BYTE >"TSY" + .BYTE >"TXA" + .BYTE >"TXS" + .BYTE >"TYA" + .BYTE >"TYS" + .BYTE >"TZA" + +***** +MNE_R +***** + + .BYTE <"ADC" ; 00 + .BYTE <"AND" ; 01 + .BYTE <"ASL" ; 02 + .BYTE <"ASR" ; 03 + .BYTE <"ASW" ; 04 + .BYTE <"BBR" ; 05 + .BYTE <"BBS" ; 06 + .BYTE <"BCC" ; 07 + .BYTE <"BCS" ; 08 + .BYTE <"BEQ" ; 09 + .BYTE <"BIT" ; 0a + .BYTE <"BMI" ; 0b + .BYTE <"BNE" ; 0c + .BYTE <"BPL" ; 0d + .BYTE <"BRA" ; 0e + .BYTE <"BRK" ; 0f + .BYTE <"BSR" ; 10 + .BYTE <"BVC" ; 11 + .BYTE <"BVS" ; 12 + .BYTE <"CLC" ; 13 + .BYTE <"CLD" ; 14 + .BYTE <"CLE" ; 15 + .BYTE <"CLI" ; 16 + .BYTE <"CLV" ; 17 + .BYTE <"CMP" ; 18 + .BYTE <"CPX" ; 19 + .BYTE <"CPY" ; 1a + .BYTE <"CPZ" ; 1b + .BYTE <"DEC" ; 1c + .BYTE <"DEW" ; 1d + .BYTE <"DEX" ; 1e + .BYTE <"DEY" ; 1f + .BYTE <"DEZ" + .BYTE <"EOR" + .BYTE <"INC" + .BYTE <"INW" + .BYTE <"INX" + .BYTE <"INY" + .BYTE <"INZ" + .BYTE <"JMP" + .BYTE <"JSR" + .BYTE <"LDA" + .BYTE <"LDX" + .BYTE <"LDY" + .BYTE <"LDZ" + .BYTE <"LSR" + .BYTE <"MAP" + .BYTE <"NEG" + .BYTE <"NOP" + .BYTE <"ORA" + .BYTE <"PHA" + .BYTE <"PHP" + .BYTE <"PHW" + .BYTE <"PHX" + .BYTE <"PHY" + .BYTE <"PHZ" + .BYTE <"PLA" + .BYTE <"PLP" + .BYTE <"PLX" + .BYTE <"PLY" + .BYTE <"PLZ" + .BYTE <"RMB" + .BYTE <"ROL" + .BYTE <"ROR" + .BYTE <"ROW" + .BYTE <"RTI" + .BYTE <"RTS" + .BYTE <"SBC" + .BYTE <"SEC" + .BYTE <"SED" + .BYTE <"SEE" + .BYTE <"SEI" + .BYTE <"SMB" + .BYTE <"STA" + .BYTE <"STX" + .BYTE <"STY" + .BYTE <"STZ" + .BYTE <"TAB" + .BYTE <"TAX" + .BYTE <"TAY" + .BYTE <"TAZ" + .BYTE <"TBA" + .BYTE <"TRB" + .BYTE <"TSB" + .BYTE <"TSX" + .BYTE <"TSY" + .BYTE <"TXA" + .BYTE <"TXS" + .BYTE <"TYA" + .BYTE <"TYS" + .BYTE <"TZA" + +********* +MNE_Index +********* + +; an index for all 256 opcodes, describing +; where to find the 3-letter mnemonic + + .BYTE $0f,$31,$15,$46,$53,$31,$02,$3d + .BYTE $33,$31,$02,$55,$53,$31,$02,$05 + .BYTE $0d,$31,$31,$0d,$52,$31,$02,$3d + .BYTE $13,$31,$22,$26,$52,$31,$02,$05 + .BYTE $28,$01,$28,$28,$0a,$01,$3e,$3d + .BYTE $39,$01,$3e,$59,$0a,$01,$3e,$05 + .BYTE $0b,$01,$01,$0b,$0a,$01,$3e,$3d + .BYTE $44,$01,$1c,$20,$0a,$01,$3e,$05 + .BYTE $41,$21,$2f,$03,$03,$21,$2d,$3d + .BYTE $32,$21,$2d,$50,$27,$21,$2d,$05 + .BYTE $11,$21,$21,$11,$03,$21,$2d,$3d + .BYTE $16,$21,$36,$4d,$2e,$21,$2d,$05 + .BYTE $42,$00,$42,$10,$4c,$00,$3f,$3d + .BYTE $38,$00,$3f,$5a,$27,$00,$3f,$05 + .BYTE $12,$00,$00,$12,$4c,$00,$3f,$3d + .BYTE $47,$00,$3b,$51,$27,$00,$3f,$05 + .BYTE $0e,$49,$49,$0e,$4b,$49,$4a,$48 + .BYTE $1f,$0a,$56,$4b,$4b,$49,$4a,$06 + .BYTE $07,$49,$49,$07,$4b,$49,$4a,$48 + .BYTE $58,$49,$57,$4a,$4c,$49,$4c,$06 + .BYTE $2b,$29,$2a,$2c,$2b,$29,$2a,$48 + .BYTE $4f,$29,$4e,$2c,$2b,$29,$2a,$06 + .BYTE $08,$29,$29,$08,$2b,$29,$2a,$48 + .BYTE $17,$29,$54,$2c,$2b,$29,$2a,$06 + .BYTE $1a,$18,$1b,$1d,$1a,$18,$1c,$48 + .BYTE $25,$18,$1e,$04,$1a,$18,$1c,$06 + .BYTE $0c,$18,$18,$0c,$1b,$18,$1c,$48 + .BYTE $14,$18,$35,$37,$1b,$18,$1c,$06 + .BYTE $19,$43,$29,$23,$19,$43,$22,$48 + .BYTE $24,$43,$30,$40,$19,$43,$22,$06 + .BYTE $09,$43,$43,$09,$34,$43,$22,$48 + .BYTE $45,$43,$3a,$3c,$34,$43,$22,$06 + +***** +BRAIN +***** + +; index values for branch mnemonics + +; BCC BCS BEQ BMI BNE BPL BRA BSR BVC BVS + .BYTE $07,$08,$09,$0b,$0c,$0d,$0e,$10,$11,$12 + +******* +LEN_ADM +******* + +; a table of instruction length, flags +; and address mode for all 256 opcodes + +; 7-6: operand length %00.. 0: implied +; %01.. 1: direct page, indirect +; %10.. 2: absolute, etc. +; %11.. 3: BBR and BBS + +; 5: relative %0110 0000 $60 short branch +; %1010 0000 $a0 long branch + +; 4: + +; 3-0: index of address mode + + ( %11...... BBR BBS) + + .BYTE $00,$44,$00,$00,$40,$40,$40,$40 ; $00 + .BYTE $00,$41,$00,$00,$80,$80,$80,$c0 ; $08 + .BYTE $60,$45,$46,$a0,$40,$47,$47,$40 ; $10 + .BYTE $00,$88,$00,$00,$80,$87,$87,$c0 ; $18 + .BYTE $80,$44,$8b,$84,$40,$40,$40,$40 ; $20 + .BYTE $00,$41,$00,$00,$80,$80,$80,$c0 ; $28 + .BYTE $60,$45,$46,$a0,$47,$47,$47,$40 ; $30 + .BYTE $00,$88,$00,$00,$87,$87,$87,$c0 ; $38 + .BYTE $00,$44,$00,$00,$40,$40,$40,$40 ; $40 + .BYTE $00,$41,$00,$00,$80,$80,$80,$c0 ; $48 + .BYTE $60,$45,$46,$a0,$47,$47,$47,$40 ; $50 + .BYTE $00,$88,$00,$00,$00,$87,$87,$c0 ; $58 + .BYTE $00,$44,$41,$a0,$40,$40,$40,$40 ; $60 + .BYTE $00,$41,$00,$00,$8b,$80,$80,$c0 ; $68 + .BYTE $60,$45,$46,$a0,$47,$47,$47,$40 ; $70 + .BYTE $00,$88,$00,$00,$84,$87,$87,$c0 ; $78 + .BYTE $60,$44,$4d,$a0,$40,$40,$40,$40 ; $80 + .BYTE $00,$41,$00,$87,$80,$80,$80,$c0 ; $88 + .BYTE $60,$45,$46,$a0,$47,$47,$48,$40 ; $90 + .BYTE $00,$88,$00,$88,$80,$87,$87,$c0 ; $98 + .BYTE $41,$44,$41,$41,$40,$40,$40,$40 ; $a0 + .BYTE $00,$41,$00,$80,$80,$80,$80,$c0 ; $a8 + .BYTE $60,$45,$46,$a0,$47,$47,$48,$40 ; $b0 + .BYTE $00,$88,$00,$87,$87,$87,$88,$c0 ; $b8 + .BYTE $41,$44,$41,$40,$40,$40,$40,$40 ; $c0 + .BYTE $00,$41,$00,$80,$80,$80,$80,$c0 ; $c8 + .BYTE $60,$45,$46,$a0,$40,$47,$47,$40 ; $d0 + .BYTE $00,$88,$00,$00,$80,$87,$87,$c0 ; $d8 + .BYTE $41,$44,$4d,$40,$40,$40,$40,$40 ; $e0 + .BYTE $00,$41,$00,$80,$80,$80,$80,$c0 ; $e8 + .BYTE $60,$45,$46,$a0,$81,$47,$47,$40 ; $f0 + .BYTE $00,$88,$00,$00,$80,$87,$87,$c0 ; $f8 + +****** +ADMODE +****** + +; printout flags for 16 address modes +; 76543210 +; -------- +; 7 x # +; 6 x ( +; 5 x , +; 4 x SP +; 3 x ) +; 2 x , +; 1/0 xx 01:X 10:Y 11:Z + + .BYTE %00000000 ; 0 implicit/direct + .BYTE %10000000 ; 1 #$nn immediate + .BYTE %00000000 ; 2 ---------- + .BYTE %00000000 ; 3 ---------- + .BYTE %01101001 ; 4 ($nn,X) indirect X + .BYTE %01001110 ; 5 ($nn),Y indirect Y + .BYTE %01001111 ; 6 ($nn),Z indirect Z + .BYTE %00000101 ; 7 $nn,X indexed X + .BYTE %00000110 ; 8 $nn,Y indexed Y + .BYTE %00000101 ; 9 $nn,X indexed X + .BYTE %00000110 ; a $nn,Y ---------- + .BYTE %01001000 ; b ($nnnn,X) JMP & JSR + .BYTE %01101001 ; c ($nn,X) ---------- + .BYTE %01111110 ; d ($nn,SP),Y LDA & STA + .BYTE %00000000 ; e + .BYTE %00000100 ; f + +; ASL INC ROL DEC LSR ROR NEG ASR +ACCUMODE .BYTE $0a,$1a,$2a,$3a,$4a,$6a,$42,$43 + +Num_Base .BYTE 16,10, 8, 2 ; hex, dec, oct, bin +Num_Bits .BYTE 4, 3, 3, 1 ; hex, dec, oct, bin + +Index_Char .BYTE "XYZ" + +; 0123456789abcd +U1 .BYTE "U1:9 0 000 000",0 ; channel 9, drive, track, sector +BP_ZERO .BYTE "B-P 9 0",0 ; set buffer pointer to 0 + +*************** +Module Reg_Text +*************** + JSR PRIMM + .BYTE "\r PC SR AC XR YR ZR BP SP NVEBDIZC\r; \eQ",0 + RTS +EndMod + +*************** +Module Mon_Help +*************** + JSR PRIMM + + .BYTE LRED,"A",WHITE,"SSEMBLE - A ADDRESS MNEMONIC OPERAND",CR + .BYTE LRED,"B",WHITE,"ITMAPS - B [FROM [TO]]",CR + .BYTE LRED,"C",WHITE,"OMPARE - C FROM TO WITH",CR + .BYTE LRED,"D",WHITE,"ISASSEMBLE - D [FROM [TO]]",CR + .BYTE LRED,"F",WHITE,"ILL - F FROM TO FILLBYTE",CR + .BYTE LRED,"G",WHITE,"O - G [ADDRESS]",CR + .BYTE LRED,"H",WHITE,"UNT - H FROM TO (STRING OR BYTES)",CR + .BYTE LRED,"J",WHITE,"SR - J ADDRESS",CR + .BYTE LRED,"L",WHITE,"OAD - L FILENAME [UNIT [ADDRESS]]",CR + .BYTE LRED,"M",WHITE,"EMORY - M [FROM [TO]]",CR + .BYTE LRED,"R",WHITE,"EGISTERS - R",CR + .BYTE LRED,"S",WHITE,"AVE - S FILENAME UNIT FROM TO",CR + .BYTE LRED,"T",WHITE,"RANSFER - T FROM TO TARGET",CR + .BYTE LRED,"V",WHITE,"ERIFY - V FILENAME [UNIT [ADDRESS]]",CR + .BYTE "E",LRED,"X",WHITE,"IT - X",CR + .BYTE LRED,".",WHITE," - . ADDRESS MNEMONIC OPERAND",CR + .BYTE LRED,">",WHITE," - > ADDRESS BYTE SEQUENCE",CR + .BYTE LRED,";",WHITE," - ; REGISTER CONTENTS",CR + .BYTE LRED,"@",WHITE,"DOS - @ [DOS COMMAND]",CR + .BYTE LRED,"?",WHITE,"HELP - ?",CR + .BYTE 0 + JMP Main +End_Mod + + .FILL $8000-* ($ff) ; 3749 bytes From cd541cf48603ae2946d4f5d6e91fa94fd85373e1 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 10 Dec 2020 21:42:39 +0100 Subject: [PATCH 011/257] BSMON adaptations --- Makefile | 4 +- src/,,config_mega65.s | 3 + src/mon_m65/{bsmon.asm => bsmon.s} | 781 +++++++++++------------------ 3 files changed, 309 insertions(+), 479 deletions(-) rename src/mon_m65/{bsmon.asm => bsmon.s} (88%) diff --git a/Makefile b/Makefile index bbe91148..02dc7764 100644 --- a/Makefile +++ b/Makefile @@ -737,7 +737,7 @@ $(TARGET_M65_x_ORF) $(TARGET_M65_x_PXL): $(SEG_LIST_M65) build/padding_16_KB bui @cat $(DIR_M65)/kernal.seg_C >> $(TARGET_M65_x_ORF) @cat $(TARGET_CHR_ORF) >> $(TARGET_M65_x_ORF) @cat $(DIR_M65)/kernal.seg_0 >> $(TARGET_M65_x_ORF) - @cat $(DIR_M65)/mon.seg_1 > $(TARGET_M65_x_ORF) + @cat $(DIR_M65)/mon.seg_1 >> $(TARGET_M65_x_ORF) @cat build/padding_8_KB >> $(TARGET_M65_x_ORF) @cat build/padding_16_KB >> $(TARGET_M65_x_ORF) @cat build/padding_16_KB >> $(TARGET_M65_x_ORF) @@ -756,7 +756,7 @@ $(TARGET_M65_x_ORF) $(TARGET_M65_x_PXL): $(SEG_LIST_M65) build/padding_16_KB bui @cat $(DIR_M65)/kernal.seg_C >> $(TARGET_M65_x_PXL) @cat $(TARGET_CHR_PXL) >> $(TARGET_M65_x_PXL) @cat $(DIR_M65)/kernal.seg_0 >> $(TARGET_M65_x_PXL) - @cat $(DIR_M65)/mon.seg_1 > $(TARGET_M65_x_PXL) + @cat $(DIR_M65)/mon.seg_1 >> $(TARGET_M65_x_PXL) @cat build/padding_8_KB >> $(TARGET_M65_x_PXL) @cat build/padding_16_KB >> $(TARGET_M65_x_PXL) @cat build/padding_16_KB >> $(TARGET_M65_x_PXL) diff --git a/src/,,config_mega65.s b/src/,,config_mega65.s index 8c5ea1f7..c2a2b642 100644 --- a/src/,,config_mega65.s +++ b/src/,,config_mega65.s @@ -106,3 +106,6 @@ ; --- Other ;; #CONFIG# COMPRESSION_LVL_2 NO + + +;; #CONFIG# DEV_BSMON NO ; do not change, BSMON is not integrated yet diff --git a/src/mon_m65/bsmon.asm b/src/mon_m65/bsmon.s similarity index 88% rename from src/mon_m65/bsmon.asm rename to src/mon_m65/bsmon.s index 6af5d9f9..7edf79c3 100644 --- a/src/mon_m65/bsmon.asm +++ b/src/mon_m65/bsmon.s @@ -1,15 +1,14 @@ -******************************* -* BSM = Bit Shifter's Monitor * -* for The MEGA65 10-Dec_2020 * -******************************* +; ******************************* +; * BSM = Bit Shifter's Monitor * +; * for The MEGA65 10-Dec_2020 * +; ******************************* -.CPU 45GS02 +!ifdef CONFIG_DEV_BSMON { -.STORE $6000,$2000,"bsmon.rom" -************* -* Constants * -************* +; ************* +; * Constants * +; ************* WHITE = $05 YELLOW = $9e @@ -21,9 +20,9 @@ CRIGHT = $1d QUOTE = $22 APOSTR = $27 -************************************************ -* Register storage for JMPFAR and JSRFAR calls * -************************************************ +; ************************************************ +; * Register storage for JMPFAR and JSRFAR calls * +; ************************************************ Bank = 2 PCH = 3 @@ -34,9 +33,9 @@ XR = 7 YR = 8 ZR = 9 -************************************* -* Used direct (zero) page addresses * -************************************* +; ************************************* +; * Used direct (zero) page addresses * +; ************************************* BP = 10 SPH = 11 @@ -58,7 +57,7 @@ Long_CT .BSS 4 ; 32 bit counter Long_PC .BSS 4 ; 32 bit program counter Long_DA .BSS 4 ; 32 bit data pointer -; Flags are used in BBR BBS instructions +; Flags are used in BBR BBS instructions Adr_Flags .BSS 1 Mode_Flags .BSS 1 @@ -117,20 +116,12 @@ Disk_Msg .BSS 40 ; disk status as text message EXIT_OLD = $cf2e ; exit address for ROM 910110 EXIT = $cfa4 ; exit address for ROM 911001 -SETBNK = $ff6b -JSRFAR = $ff6e -JMPFAR = $ff71 -LDA_FAR = $ff74 -STA_FAR = $ff77 -CMP_FAR = $ff7a PRIMM = $ff7d CINT = $ff81 IOINIT = $ff84 SETMSG = $ff90 SECOND = $ff93 TKSA = $ff96 -MEMTOP = $ff99 -MEMBOT = $ff9c KEY = $ff9f SETTMO = $ffa2 ACPTR = $ffa5 @@ -151,111 +142,29 @@ CHRIN = $ffcf CHROUT = $ffd2 LOAD = $ffd5 SAVE = $ffd8 -SETTIM = $ffdb -GETTIM = $ffde STOP = $ffe1 -GETIN = $ffe4 -CLALL = $ffe7 -SCAN = $ffea -SCRORG = $ffed -PLOT = $fff0 -* = $1fff - .STORE $1fff,$0101,"bsm.prg" - -************* -Module header -************* - - .WORD $2001 ; load address - .WORD Link ; line link - .WORD 2020 ; line number - .BYTE $fe,$02 ; BANK token - .BYTE "0:" ; BANK argument - .BYTE $9e ; SYS token - .BYTE "(8235):" ; $202d - .BYTE $8f ; REM token - .BYTE " BIT SHIFTER 10-DEC-20",0 -Link .WORD 0 ; BASIC end marker - - ; copy image to $030000 - - SEI - -; map memory to monitor configuration - - LDA #$a0 - LDX #$82 - LDY #$00 - LDZ #$83 - MAP - EOM - -; VIC IV registers visible - - LDA #$47 - STA $d02f - LDA #$53 - STA $d02f - -; toggle write protection - - LDA #$70 - STA $D640 - NOP - - LDZ #0 - STZ Long_AC - LDA #$21 - STA Long_AC+1 - STZ Long_CT - STZ Long_CT+1 - LDA #3 - STA Long_CT+2 - STZ Long_CT+3 - LDX #$20 - -_loop LDA (Long_AC),Z - STA [Long_CT],Z - INZ - BNE _loop - INC Long_AC+1 - INC Long_CT+1 - DEX - BNE _loop - - LDA #$70 - STA $D640 ; toggle write protection - NOP - - RTS -EndMod - - .FILL $2100-* (0) - -* = $6000 - -******************** +; ********** Monitor_Call ; $6000 -******************** +; ********** JMP Mon_Call -********************* +; *********** Monitor_Break ; $6003 -********************* +; *********** JMP Mon_Break -********************** +; ************ Monitor_Switch ; $6009 -********************** +; ************ JMP Mon_Switch -**************** -Module Mon_Break -**************** +; ******* +Mon_Break +; ******* JSR PRIMM .BYTE "\rBREAK\a",0 @@ -286,11 +195,10 @@ _nopage DEC PCL _bank AND #15 STA Bank BRA Mon_Start -EndMod -*************** -Module Mon_Call -*************** +; ****** +Mon_Call +; ****** JSR Print_Commands @@ -314,11 +222,10 @@ _store STA PCL STA X_Vector STX PCH STX X_Vector+1 -EndMod -**************** -Module Mon_Start -**************** +; ******* +Mon_Start +; ******* CLD TSY @@ -329,11 +236,10 @@ Module Mon_Start JSR SETMSG CLI NOP -EndMod -*************************** -Module Mon_Register ; $6042 -*************************** +; ********** +Mon_Register +; ********** JSR Reg_Text @@ -374,20 +280,19 @@ _flag JSR CHROUT PLA DEY BNE _loopc -EndMod -*********** -Module Main -*********** +; ** +Main +; ** JSR Print_CR LDX #0 ; read one line into buffer -****** +; **** Main_A -****** +; **** _loop JSR CHRIN STA Buffer,X @@ -404,11 +309,10 @@ _getcomm JSR Get_Char BEQ Main CMP #' ' BEQ _getcomm -EndMod -***************** -Module Mon_Switch -***************** +; ******** +Mon_Switch +; ******** LDX #24 _loop CMP Command_Char,X @@ -418,9 +322,9 @@ _loop CMP Command_Char,X ; fall through to error routine if not found -**************** -Module Mon_Error -**************** +; ******* +Mon_Error +; ******* ; put a question mark at the end of the text @@ -430,9 +334,9 @@ Module Mon_Error TXS BRA Main -***************** -Module Mon_Select -***************** +; ******** +Mon_Select +; ******** STA VERCK CPX #22 @@ -441,38 +345,37 @@ Module Mon_Select ASL A TAX JMP (Jump_Table,X) -EndMod -************** +; ************ Print_Commands -************** +; ************ JSR PRIMM .BYTE CR,YELLOW,REV,"BS MONITOR COMMANDS:" -************ +; ********** Command_Char -************ +; ********** ; 0123456789abcdef .BYTE "ABCDFGHJMRTX@.>;?" -*********** +; ********* Cons_Prefix -*********** +; ********* .BYTE "$+&%'" -**************** +; ************** Load_Save_Verify -**************** +; ************** .BYTE "LSV",WHITE,0 RTS -********** +; ******** Jump_Table -********** +; ******** .WORD Mon_Assemble ; A .WORD Mon_Bits ; B @@ -497,15 +400,15 @@ Jump_Table .WORD Converter ; % -*************** -Module Mon_Exit -*************** +; ****** +Mon_Exit +; ****** JMP (X_Vector) -**************** -Module LAC_To_PC -**************** +; ******* +LAC_To_PC +; ******* ; called from Mon_Set_Register, Mon_Go and Mon_JSR ; as the first instruction. The carry flag was set from @@ -524,11 +427,10 @@ Module LAC_To_PC LDA Long_AC+2 STA Bank _error RTS -EndMod -***************** -Module LAC_To_LPC -***************** +; ******** +LAC_To_LPC +; ******** PHX LDX #3 @@ -538,11 +440,10 @@ _loop LDA Long_AC,X BPL _loop PLX RTS -EndMod -***************** -Module LAC_To_LCT -***************** +; ******** +LAC_To_LCT +; ******** PHX LDX #3 @@ -552,11 +453,10 @@ _loop LDA Long_AC,X BPL _loop PLX RTS -EndMod -***************** -Module LAC_To_LDA -***************** +; ******** +LAC_To_LDA +; ******** PHX LDX #3 @@ -566,11 +466,10 @@ _loop LDA Long_AC,X BPL _loop PLX RTS -EndMod -******************* -Module LAC_Plus_LCT -******************* +; ********** +LAC_Plus_LCT +; ********** PHX LDX #252 ; use ZP wrap around @@ -582,11 +481,10 @@ _loop LDA Long_AC+4,X BNE _loop PLX RTS -EndMod -******************** -Module LAC_Minus_LPC -******************** +; *********** +LAC_Minus_LPC +; *********** PHX LDX #252 ; use ZP wrap around @@ -598,11 +496,10 @@ _loop LDA Long_AC+4,X BNE _loop PLX RTS -EndMod -********************** -Module LAC_Compare_LPC -********************** +; ************* +LAC_Compare_LPC +; ************* PHX LDX #252 ; use ZP wrap around @@ -613,21 +510,19 @@ _loop LDA Long_AC+4,X BNE _loop PLX RTS -EndMod -************** -Module Inc_LAC -************** +; ***** +Inc_LAC +; ***** INW Long_AC BNE _return INW Long_AC+2 _return RTS -EndMod -************** -Module Dec_LAC -************** +; ***** +Dec_LAC +; ***** LDA Long_AC ORA Long_AC+1 @@ -635,21 +530,19 @@ Module Dec_LAC DEW Long_AC+2 _skip DEW Long_AC RTS -EndMod -************** -Module Inc_LPC -************** +; ***** +Inc_LPC +; ***** INW Long_PC BNE _return INW Long_PC+2 _return RTS -EndMod -************** -Module Dec_LDA -************** +; ***** +Dec_LDA +; ***** LDA Long_DA ORA Long_DA+1 @@ -657,11 +550,10 @@ Module Dec_LDA DEW Long_DA+2 _skip DEW Long_DA RTS -EndMod -************ -Module Fetch -************ +; *** +Fetch +; *** PHZ TYA @@ -672,11 +564,10 @@ _banked LDA (Long_PC),Z PLZ AND #$ff RTS -EndMod -***************** -Module Mon_Memory -***************** +; ******** +Mon_Memory +; ******** JSR Get_LAC ; get 1st. parameter LDZ #16 ; default row count @@ -703,11 +594,10 @@ _row JSR STOP DEZ BNE _row _exit JMP Main -EndMod -***************** -Module Print_Bits -***************** +; ******** +Print_Bits +; ******** PHZ STA Long_DA @@ -721,11 +611,10 @@ _set JSR CHROUT BNE _loop PLZ RTS -EndMod -*************** -Module Mon_Bits -*************** +; ****** +Mon_Bits +; ****** JSR Get_LAC ; get 1st. parameter BCS _lab @@ -757,11 +646,10 @@ _col SEC DEX BNE _row JMP Main -EndMod -*********************** -Module Mon_Set_Register -*********************** +; ************** +Mon_Set_Register +; ************** JSR Get_LAC ; get 1st. parameter JSR LAC_To_PC @@ -774,11 +662,10 @@ _loop JSR Get_LAC CPY #9 BCC _loop _exit JMP Main -EndMod -********************* -Module Mon_Set_Memory -********************* +; ************ +Mon_Set_Memory +; ************ JSR Get_LAC ; get 1st. parameter BCS _exit @@ -801,22 +688,20 @@ _exit JSR PRIMM .BYTE $91,$00 JSR Dump_Row JMP Main -EndMod -************* -Module Mon_Go -************* +; **** +Mon_Go +; **** JSR Get_LAC ; get 1st. parameter JSR LAC_To_PC LDX SPL TXS JMP JMPFAR -EndMod -************** -Module Mon_JSR -************** +; ***** +Mon_JSR +; ***** JSR Get_LAC ; get 1st. parameter JSR LAC_To_PC @@ -826,11 +711,10 @@ Module Mon_JSR TSX STX SPL JMP Main -EndMod -******************* -Module Dump_4_Bytes -******************* +; ********** +Dump_4_Bytes +; ********** JSR CHROUT ; colour _loop BBS7 Long_PC+3,_banked ; trigger banked access @@ -842,11 +726,10 @@ _banked LDA (Long_PC),Z AND #3 BNE _loop RTS -EndMod -******************* -Module Dump_4_Chars -******************* +; ********** +Dump_4_Chars +; ********** LDY #0 STY QTSW ; disable quote mode @@ -865,11 +748,10 @@ _laba TYA AND #3 BNE _loop RTS -EndMod -*************** -Module Dump_Row -*************** +; ****** +Dump_Row +; ****** PHZ JSR Print_CR @@ -905,11 +787,10 @@ _lchr LDA #LRED JSR Add_LPC PLZ RTS -EndMod -******************* -Module Mon_Transfer -******************* +; ********** +Mon_Transfer +; ********** JSR Param_Range ; Long_PC = source LBCS Mon_Error ; Long_CT = count @@ -939,11 +820,10 @@ _forward LDA [Long_PC],Z ; forward copy JSR Dec_LCT BPL _forward JMP Main -EndMod -****************** -Module Mon_Compare -****************** +; ********* +Mon_Compare +; ********* JSR Param_Range ; Long_PC = source LBCS Mon_Error ; Long_CT = count @@ -960,11 +840,10 @@ _laba JSR Inc_LAC JSR Dec_LCT BPL _loop JMP Main -EndMod -*************** -Module Mon_Hunt -*************** +; ****** +Mon_Hunt +; ****** JSR Param_Range ; Long_PC = start LBCS Mon_Error ; Long_CT = count @@ -1010,11 +889,10 @@ _next JSR STOP JSR Dec_LCT BPL _lpstart JMP Main -EndMod -**************** -Module Load_Save -**************** +; ******* +Load_Save +; ******* LDY Disk_Unit STY FA @@ -1094,11 +972,10 @@ _load LDX Long_PC LDA #0 ; 0 = use X/Y as load address STA SA ; and ignore load address from file BRA _do -EndMod -*************** -Module Mon_Fill -*************** +; ****** +Mon_Fill +; ****** JSR Param_Range ; Long_PC = target LBCS Mon_Error ; Long_CT = count @@ -1112,11 +989,10 @@ _loop LDA Long_AC JSR Dec_LCT BPL _loop JMP Main -EndMod -******************* -Module Mon_Assemble -******************* +; ********** +Mon_Assemble +; ********** JSR Get_LAC ; get 1st. parameter LBCS Mon_Error @@ -1520,11 +1396,10 @@ _auto PHX TYA TAX JMP Main_A -EndMod -******************** -Module Branch_Target -******************** +; *********** +Branch_Target +; *********** DEW Long_AC DEC A @@ -1540,11 +1415,10 @@ Module Branch_Target SBC Long_PC+1 STA Long_AC+1 RTS -EndMod -***************** -Module Match_Mode -***************** +; ******** +Match_Mode +; ******** ; find matching mnemonic and address mode @@ -1564,11 +1438,10 @@ _next INX ; next opcode _error DEX ; X = $ff ZF=0 _return RTS -EndMod -***************** -Module Mode_Index -***************** +; ******** +Mode_Index +; ******** LDA Mode_Flags LDX #0 @@ -1580,11 +1453,10 @@ _loop CMP ADMODE,X TXA RTS _found STX Mode_Flags -EndMod -******************* -Module Size_To_Mode -******************* +; ********** +Size_To_Mode +; ********** LDA Op_Len LSR A @@ -1594,11 +1466,10 @@ Module Size_To_Mode STA Mode_Flags LDX #0 RTS -EndMod -********************** -Module Mon_Disassemble -********************** +; ************* +Mon_Disassemble +; ************* JSR Get_LAC ; get 1st. parameter BCS _nopar @@ -1624,19 +1495,17 @@ _loop JSR CR_Erase ; prepare empty line STA Long_CT BCS _loop JMP Main -EndMod -*************** -Module Dis_Code -*************** +; ****** +Dis_Code +; ****** JSR PRIMM .BYTE ". ",0 -EndMod -***************** -Module Print_Code -***************** +; ******** +Print_Code +; ******** ; print 24 bit address of instruction @@ -1945,18 +1814,16 @@ _lpinw INW Long_AC BBR7 Op_Flag,_return INC Op_Size _return RTS -EndMod -************** -Module Got_LAC -************** +; ***** +Got_LAC +; ***** DEC Buf_Index -EndMod -************** -Module Get_LAC -************** +; ***** +Get_LAC +; ***** JSR Read_Number BCS _error ; illegal character @@ -1975,11 +1842,10 @@ _noval SEC _end DEC Buf_Index _ok CLC RTS -EndMod -****************** -Module Read_Number -****************** +; ********* +Read_Number +; ********* PHX PHY @@ -2073,11 +1939,10 @@ _return PLZ PLX LDA Dig_Cnt ; digits read RTS -EndMod -************** -Module Hex_LPC -************** +; ***** +Hex_LPC +; ***** LDX Long_PC+3 BEQ _laba @@ -2095,53 +1960,47 @@ _laba LDA Long_PC+2 JSR Print_Hex _labb LDX Long_PC+1 LDA Long_PC -EndMod -******************* -Module Print_XA_Hex -******************* +; ********** +Print_XA_Hex +; ********** PHA TXA JSR Print_Hex PLA -EndMod -********************** -Module Print_Hex_Blank -********************** +; ************* +Print_Hex_Blank +; ************* JSR Print_Hex -EndMod -****************** -Module Print_Blank -****************** +; ********* +Print_Blank +; ********* LDA #' ' JMP CHROUT -EndMod -*************** -Module Print_CR -*************** +; ****** +Print_CR +; ****** LDA #13 JMP CHROUT -EndMod -*************** -Module CR_Erase -*************** +; ****** +CR_Erase +; ****** JSR PRIMM .BYTE "\r\eQ",0 RTS -EndMod -**************** -Module Print_Hex -**************** +; ******* +Print_Hex +; ******* PHX JSR A_To_Hex @@ -2149,11 +2008,10 @@ Module Print_Hex TXA PLX JMP CHROUT -EndMod -*************** -Module A_To_Hex -*************** +; ****** +A_To_Hex +; ****** PHA JSR _nibble @@ -2170,11 +2028,10 @@ _nibble AND #15 ADC #6 _lab ADC #'0' RTS -EndMod -**************** -Module Get_Glyph -**************** +; ******* +Get_Glyph +; ******* PHX LDA #' ' _loop LDX Buf_Index @@ -2182,18 +2039,16 @@ _loop LDX Buf_Index CMP Buffer,X BEQ _loop PLX ; fall through -EndMod -*************** -Module Got_Char -*************** +; ****** +Got_Char +; ****** DEC Buf_Index -EndMod -*************** -Module Get_Char -*************** +; ****** +Get_Char +; ****** PHX LDX Buf_Index @@ -2210,12 +2065,11 @@ _regc CMP #0 BEQ _return CMP #':' _return RTS -EndMod -************** -Module Dec_LCT -************** +; ***** +Dec_LCT +; ***** LDA Long_CT ORA Long_CT+1 @@ -2224,29 +2078,28 @@ Module Dec_LCT _skip DEW Long_CT LDA Long_CT+3 ; set N flag RTS -EndMod -************** -Module Add_LPC -************** +; ***** +Add_LPC +; ***** CLC ADC Long_PC STA Long_PC BCC _return -************ +; ********** Inc_LPC_Page -************ +; ********** INC Long_PC+1 BNE _return INW Long_PC+2 _return RTS -****************** -Module Param_Range -****************** +; ********* +Param_Range +; ********* ; read two (address) parameters @@ -2268,11 +2121,10 @@ Module Param_Range RTS _error SEC RTS -EndMod -**************** -Module Converter -**************** +; ******* +Converter +; ******* LDX #0 STX Buf_Index @@ -2297,19 +2149,18 @@ Conv_Tab .WORD Print_Hexval .WORD Print_Decimal .WORD Print_Octal .WORD Print_Dual -EndMod -***************** -Module Print_Dual -***************** +; ******** +Print_Dual +; ******** LDX #24 ; digits LDY #1 ; bits per digit BRA _entry -*********** +; ********* Print_Octal -*********** +; ********* LDX #8 ; digits LDY #3 ; bits per digit @@ -2338,21 +2189,19 @@ _next DEX BNE _loopa PLY ; cleanup stack RTS -EndMod -******************* -Module Print_Hexval -******************* +; ********** +Print_Hexval +; ********** JSR LAC_To_LPC LDA #0 STA Long_PC+3 BRA Print_BCD -EndMod -******************** -Module Print_Decimal -******************** +; *********** +Print_Decimal +; *********** ; max $ffffff = 16777215 (8 digits) @@ -2383,11 +2232,10 @@ _loop ASL Long_CT DEX BNE _loop CLD -EndMod -**************** -Module Print_BCD -**************** +; ******* +Print_BCD +; ******* LDA #0 STA Long_CT @@ -2415,12 +2263,10 @@ _print JSR CHROUT _next DEY BNE _loopa RTS -EndMod - -*************** -Module Mon_Disk -*************** +; ****** +Mon_Disk +; ****** DEC Buf_Index LDX Buf_Index @@ -2446,11 +2292,9 @@ _close JSR UNLSN BNE Print_Disk_Status JMP Directory -EndMod - -********************** -Module Get_Disk_Status -********************** +; ************* +Get_Disk_Status +; ************* LDA FA JSR TALK @@ -2480,17 +2324,16 @@ _loop INY JSR UNTALK LDA Disk_Status RTS -EndMod -************************ -Module Print_Disk_Status -************************ +; *************** +Print_Disk_Status +; *************** JSR Get_Disk_Status -************** +; ************ Print_Disk_Msg -************** +; ************ JSR Print_CR LDY #0 @@ -2500,7 +2343,6 @@ _loop LDA Disk_Msg,Y INY BRA _loop _exit JMP Print_CR -EndMod ; @[u] : print disk status for unit u ; @[u],$[=pattern] : print directory @@ -2508,9 +2350,9 @@ EndMod ; @[u],U1 mem track startsec [endsec] : read disk sector(s) ; @[u],U2 mem track startsec [endsec] : write disk sector(s) -************** -Module Mon_DOS -************** +; ***** +Mon_DOS +; ***** LDX #8 ; default device JSR Get_Glyph @@ -2538,11 +2380,10 @@ _next JSR Get_Char BEQ DOS_U _status JSR Mon_Disk JMP Main -EndMod -**************** -Module Directory -**************** +; ******* +Directory +; ******* LDA FA JSR TALK @@ -2580,11 +2421,10 @@ _cr JSR Print_CR LDZ #4 BRA _loopb ; next file _exit JMP UNTALK -EndMod -************ -Module DOS_U -************ +; *** +DOS_U +; *** JSR Get_Char CMP #'1' ; U1: read @@ -2633,11 +2473,10 @@ _next JSR Inc_LPC_Page _error JSR Print_Disk_Msg JSR Close_Disk_Buffer JMP Main -EndMod -*********************** -Module Find_Next_Sector -*********************** +; ************** +Find_Next_Sector +; ************** JSR Build_U_String JSR Send_Disk_Command @@ -2655,11 +2494,10 @@ Module Find_Next_Sector _error JSR Print_Disk_Msg LDA Disk_Status _return RTS -EndMod -*************************** -Module Open_Command_Channel -*************************** +; ****************** +Open_Command_Channel +; ****************** LDA FA JSR LISTEN @@ -2668,11 +2506,10 @@ Module Open_Command_Channel LDY #0 STY STATUS RTS -EndMod -*************** -Module Reset_BP -*************** +; ****** +Reset_BP +; ****** JSR Open_Command_Channel _loop LDA BP_ZERO,Y @@ -2681,11 +2518,10 @@ _loop LDA BP_ZERO,Y INY BRA _loop _end JMP UNLSN -EndMod -************************ -Module Send_Disk_Command -************************ +; *************** +Send_Disk_Command +; *************** JSR Open_Command_Channel _loop LDA Mon_Data,Y @@ -2694,11 +2530,10 @@ _loop LDA Mon_Data,Y INY BRA _loop _end JMP UNLSN -EndMod -****************** -Module Read_Sector -****************** +; ********* +Read_Sector +; ********* LDA FA JSR TALK @@ -2711,11 +2546,10 @@ _loop JSR ACPTR INZ BNE _loop JMP UNTALK -EndMod -****************** -Module Write_Sector -****************** +; ********** +Write_Sector +; ********** JSR Reset_BP ; reset disk buffer pointer LDA FA @@ -2730,11 +2564,10 @@ _loop LDA [Long_PC],Z BNE _loop JSR UNLSN RTS -EndMod -************* -Module Set_TS -************* +; **** +Set_TS +; **** ; Input A = track or sector ; X = string index @@ -2752,15 +2585,14 @@ _10 CMP #10 _1 ORA #'0' STA Mon_Data+2,X RTS -EndMod ; @[u],U1 mem track startsec [endsec] : read disk sector(s) ; U1:CHANNEL DRIVE TRACK SECTOR -********************* -Module Build_U_String -********************* +; ************ +Build_U_String +; ************ LDX #14 _loop LDA U1,X @@ -2776,11 +2608,10 @@ _loop LDA U1,X LDA Disk_Sector LDX #11 JMP Set_TS -EndMod -*********************** -Module Open_Disk_Buffer -*********************** +; ************** +Open_Disk_Buffer +; ************** LDA #0 STA STATUS @@ -2794,11 +2625,10 @@ Module Open_Disk_Buffer LDA STATUS LBNE Print_Disk_Status RTS -EndMod -************************ -Module Close_Disk_Buffer -************************ +; *************** +Close_Disk_Buffer +; *************** LDA #0 STA STATUS @@ -2810,7 +2640,6 @@ Module Close_Disk_Buffer LDA STATUS LBNE Print_Disk_Status RTS -EndMod ; The 3 letter mnemonics are encoded as three 5-bit values @@ -2828,9 +2657,9 @@ EndMod ; The operator >" stores the left (high) byte of the packed value ; The operator <" stores the right (low) byte of the packed value -***** +; *** MNE_L -***** +; *** .BYTE >"ADC" .BYTE >"AND" @@ -2924,9 +2753,9 @@ MNE_L .BYTE >"TYS" .BYTE >"TZA" -***** +; *** MNE_R -***** +; *** .BYTE <"ADC" ; 00 .BYTE <"AND" ; 01 @@ -3020,9 +2849,9 @@ MNE_R .BYTE <"TYS" .BYTE <"TZA" -********* +; ******* MNE_Index -********* +; ******* ; an index for all 256 opcodes, describing ; where to find the 3-letter mnemonic @@ -3060,18 +2889,18 @@ MNE_Index .BYTE $09,$43,$43,$09,$34,$43,$22,$48 .BYTE $45,$43,$3a,$3c,$34,$43,$22,$06 -***** +; *** BRAIN -***** +; *** ; index values for branch mnemonics ; BCC BCS BEQ BMI BNE BPL BRA BSR BVC BVS .BYTE $07,$08,$09,$0b,$0c,$0d,$0e,$10,$11,$12 -******* +; ***** LEN_ADM -******* +; ***** ; a table of instruction length, flags ; and address mode for all 256 opcodes @@ -3123,9 +2952,9 @@ LEN_ADM .BYTE $60,$45,$46,$a0,$81,$47,$47,$40 ; $f0 .BYTE $00,$88,$00,$00,$80,$87,$87,$c0 ; $f8 -****** +; **** ADMODE -****** +; **** ; printout flags for 16 address modes ; 76543210 @@ -3167,17 +2996,16 @@ Index_Char .BYTE "XYZ" U1 .BYTE "U1:9 0 000 000",0 ; channel 9, drive, track, sector BP_ZERO .BYTE "B-P 9 0",0 ; set buffer pointer to 0 -*************** -Module Reg_Text -*************** +; ****** +Reg_Text +; ****** JSR PRIMM .BYTE "\r PC SR AC XR YR ZR BP SP NVEBDIZC\r; \eQ",0 RTS -EndMod -*************** -Module Mon_Help -*************** +; ****** +Mon_Help +; ****** JSR PRIMM .BYTE LRED,"A",WHITE,"SSEMBLE - A ADDRESS MNEMONIC OPERAND",CR @@ -3202,6 +3030,5 @@ Module Mon_Help .BYTE LRED,"?",WHITE,"HELP - ?",CR .BYTE 0 JMP Main -End_Mod - .FILL $8000-* ($ff) ; 3749 bytes +} From 1001f43253ad83387ae44810bb4899231d507069 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 10 Dec 2020 23:56:44 +0100 Subject: [PATCH 012/257] BSMON adaptations --- src/mon_m65/4000.mon_vectable.s | 10 + src/mon_m65/bsmon.s | 676 +++++++++++++++----------------- src/mon_m65/dummy.s | 2 - 3 files changed, 336 insertions(+), 352 deletions(-) create mode 100644 src/mon_m65/4000.mon_vectable.s delete mode 100644 src/mon_m65/dummy.s diff --git a/src/mon_m65/4000.mon_vectable.s b/src/mon_m65/4000.mon_vectable.s new file mode 100644 index 00000000..0b07704f --- /dev/null +++ b/src/mon_m65/4000.mon_vectable.s @@ -0,0 +1,10 @@ + +; A vector table to integrate BSMON with the MEGA65 Kernal + +!ifdef CONFIG_DEV_BSMON { + +!word Mon_Call +!word Mon_Break +!word Mon_Switch + +} else { rts } diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 7edf79c3..32de0099 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -5,41 +5,43 @@ !ifdef CONFIG_DEV_BSMON { +; XXX adapt all the addresses/constants! + ; ************* ; * Constants * ; ************* -WHITE = $05 -YELLOW = $9e -LRED = $96 +!set WHITE = $05 +!set YELLOW = $9e +!set LRED = $96 -CR = $0d -REV = $12 -CRIGHT = $1d -QUOTE = $22 -APOSTR = $27 +!set CR = $0d +!set REV = $12 +!set CRIGHT = $1d +!set QUOTE = $22 +!set APOSTR = $27 ; ************************************************ ; * Register storage for JMPFAR and JSRFAR calls * ; ************************************************ -Bank = 2 -PCH = 3 -PCL = 4 -SR = 5 -AC = 6 -XR = 7 -YR = 8 -ZR = 9 +!addr Bank = 2 +!addr PCH = 3 +!addr PCL = 4 +!addr SR = 5 +!addr AC = 6 +!addr XR = 7 +!addr YR = 8 +!addr ZR = 9 ; ************************************* ; * Used direct (zero) page addresses * ; ************************************* -BP = 10 -SPH = 11 -SPL = 12 +!addr BP = 10 +!addr SPH = 11 +!addr SPL = 12 ; following variables overlap with the BASIC floating point area @@ -50,117 +52,91 @@ SPL = 12 ; A set of 32 bit variables also used as 32 bit pointer -& = $59 - -Long_AC .BSS 4 ; 32 bit accumulator -Long_CT .BSS 4 ; 32 bit counter -Long_PC .BSS 4 ; 32 bit program counter -Long_DA .BSS 4 ; 32 bit data pointer +!addr Long_AC = $59 ; 32 bit accumulator +!addr Long_CT = $5d ; 32 bit counter +!addr Long_PC = $61 ; 32 bit program counter +!addr Long_DA = $65 ; 32 bit data pointer ; Flags are used in BBR BBS instructions -Adr_Flags .BSS 1 -Mode_Flags .BSS 1 -Op_Code .BSS 1 -Op_Flag .BSS 1 ; 7: two operands - ; 6: long branch - ; 5: 32 bit address - ; 4: Q register -Op_Size .BSS 1 -Dig_Cnt .BSS 1 -Buf_Index .BSS 1 +!addr Adr_Flags = $69 +!addr Mode_Flags = $6a +!addr Op_Code = $6b +!addr Op_Flag = $6c ; 7: two operands + ; 6: long branch + ; 5: 32 bit address + ; 4: Q register +!addr Op_Size = $6d +!addr Dig_Cnt = $6e +!addr Buf_Index = $6f ; operating system variables -STATUS = $90 -VERCK = $93 -FNLEN = $b7 -SA = $b9 -FA = $ba -FNADR = $bb -BA = $bd -FNBANK = $be +!addr STATUS = $90 +!addr VERCK = $93 +!addr FNLEN = $b7 +!addr SA = $b9 +!addr FA = $ba +!addr FNADR = $bb +!addr BA = $bd +!addr FNBANK = $be -NDX = $d0 ; length of keyboard buffer -MODE_80 = $d7 ; 80 column / 40 volumn flag +!addr NDX = $d0 ; length of keyboard buffer +!addr MODE_80 = $d7 ; 80 column / 40 volumn flag -B_Margin = $e4 ; SCBOT default = 24 -T_Margin = $e5 ; SCTOP default = 0 -L_Margin = $e6 ; SCLF default = 0 -R_Margin = $e7 ; SCRT default = 39 or 79 +!addr B_Margin = $e4 ; SCBOT default = 24 +!addr T_Margin = $e5 ; SCTOP default = 0 +!addr L_Margin = $e6 ; SCLF default = 0 +!addr R_Margin = $e7 ; SCRT default = 39 or 79 -QTSW = $f4 ; Quote switch +!addr QTSW = $f4 ; Quote switch -Buffer = $0200 ; input buffer +!addr Buffer = $0200 ; input buffer -IIRQ = $0314 -IBRK = $0316 -EXMON = $032e +!addr IIRQ = $0314 +!addr IBRK = $0316 +!addr EXMON = $032e -& = $400 ; bottom of BASIC runtime stack - ; should be a safe space -X_Vector .BSS 2 ; exit vector (ROM version dependent) -Ix_Mne .BSS 1 ; index to mnemonics table -Op_Mne .BSS 3 ; 3 bytes for mnemonic -Op_Ix .BSS 1 ; type of constant -Op_Len .BSS 1 ; length of operand -Disk_Unit .BSS 1 ; unit = device -Disk_Track .BSS 1 ; logical track 1 -> 255 -Disk_Sector .BSS 1 ; logical sector 0 -> 255 -Disk_Status .BSS 1 ; BCD value of status + ; bottom of BASIC runtime stack + ; should be a safe space +!addr X_Vector = $400 ; exit vector (ROM version dependent) +!addr Ix_Mne = $402 ; index to mnemonics table +!addr Op_Mne = $403 ; 3 bytes for mnemonic +!addr Op_Ix = $406 ; type of constant +!addr Op_Len = $407 ; length of operand +!addr Disk_Unit = $408 ; unit = device +!addr Disk_Track = $409 ; logical track 1 -> 255 +!addr Disk_Sector = $40A ; logical sector 0 -> 255 +!addr Disk_Status = $40B ; BCD value of status Mon_Data .BSS 40 ; buffer for hunt and filename Disk_Msg .BSS 40 ; disk status as text message -EXIT_OLD = $cf2e ; exit address for ROM 910110 -EXIT = $cfa4 ; exit address for ROM 911001 +!addr EXIT_OLD = $cf2e ; exit address for ROM 910110 +!addr EXIT = $cfa4 ; exit address for ROM 911001 -PRIMM = $ff7d -CINT = $ff81 -IOINIT = $ff84 -SETMSG = $ff90 -SECOND = $ff93 -TKSA = $ff96 -KEY = $ff9f -SETTMO = $ffa2 -ACPTR = $ffa5 -CIOUT = $ffa8 -UNTALK = $ffab -UNLSN = $ffae -LISTEN = $ffb1 -TALK = $ffb4 -READSS = $ffb7 -SETLFS = $ffba -SETNAM = $ffbd -OPEN = $ffc0 -CLOSE = $ffc3 -CHKIN = $ffc6 -CHKOUT = $ffc9 -CLRCHN = $ffcc -CHRIN = $ffcf -CHROUT = $ffd2 -LOAD = $ffd5 -SAVE = $ffd8 -STOP = $ffe1 +!addr PRIMM = $ff7d +!addr CINT = $ff81 +!addr IOINIT = $ff84 +!addr SETMSG = $ff90 +!addr SECOND = $ff93 +!addr TKSA = $ff96 +!addr KEY = $ff9f +!addr ACPTR = $ffa5 +!addr CIOUT = $ffa8 +!addr UNTALK = $ffab +!addr UNLSN = $ffae +!addr LISTEN = $ffb1 +!addr TALK = $ffb4 +!addr OPEN = $ffc0 +!addr CLOSE = $ffc3 +!addr CHRIN = $ffcf +!addr CHROUT = $ffd2 +!addr LOAD = $ffd5 +!addr SAVE = $ffd8 +!addr STOP = $ffe1 -; ********** -Monitor_Call ; $6000 -; ********** - - JMP Mon_Call - -; *********** -Monitor_Break ; $6003 -; *********** - - JMP Mon_Break - -; ************ -Monitor_Switch ; $6009 -; ************ - - JMP Mon_Switch ; ******* Mon_Break @@ -175,12 +151,12 @@ Mon_Break LDX #7 BIT EXIT ; version - BPL _loop + BPL @loop DEX -_loop PLA +@loop PLA STA PCH,X DEX - BPL _loop + BPL @loop ; decrement PC to point after BRK @@ -206,9 +182,9 @@ Mon_Call LDA #0 LDX #6 -_loop STA AC,X +@loop STA AC,X DEX - BPL _loop + BPL @loop ; set default PC to "exit to BASIC" @@ -246,19 +222,19 @@ Mon_Register ; print Bank,PCH LDY #0 -_loopa LDA Bank,Y +@loopa LDA Bank,Y JSR Print_Hex INY CPY #2 - BCC _loopa + BCC @loopa ; print SR,PCL,A,X,Y,Z,BP -_loopb LDA Bank,Y +@loopb LDA Bank,Y JSR Print_Hex_Blank INY CPY #9 - BCC _loopb + BCC @loopb ; print 16 bit stack pointer @@ -271,7 +247,7 @@ _loopb LDA Bank,Y LDY #8 LDA SR -_loopc ASL A +@loopc ASL A PHA LDA #'-' BCC _flag @@ -279,7 +255,7 @@ _loopc ASL A _flag JSR CHROUT PLA DEY - BNE _loopc + BNE @loopc ; ** Main @@ -294,13 +270,13 @@ Main Main_A ; **** -_loop JSR CHRIN +@loop JSR CHRIN STA Buffer,X INX CPX #80 BCS Mon_Error ; input too long CMP #CR - BNE _loop + BNE @loop LDA #0 STA Buf_Index @@ -315,10 +291,10 @@ Mon_Switch ; ******** LDX #24 -_loop CMP Command_Char,X +@loop CMP Command_Char,X BEQ Mon_Select DEX - BPL _loop + BPL @loop ; fall through to error routine if not found @@ -434,10 +410,10 @@ LAC_To_LPC PHX LDX #3 -_loop LDA Long_AC,X +@loop LDA Long_AC,X STA Long_PC,X DEX - BPL _loop + BPL @loop PLX RTS @@ -447,10 +423,10 @@ LAC_To_LCT PHX LDX #3 -_loop LDA Long_AC,X +@loop LDA Long_AC,X STA Long_CT,X DEX - BPL _loop + BPL @loop PLX RTS @@ -460,10 +436,10 @@ LAC_To_LDA PHX LDX #3 -_loop LDA Long_AC,X +@loop LDA Long_AC,X STA Long_DA,X DEX - BPL _loop + BPL @loop PLX RTS @@ -474,11 +450,11 @@ LAC_Plus_LCT PHX LDX #252 ; use ZP wrap around CLC -_loop LDA Long_AC+4,X +@loop LDA Long_AC+4,X ADC Long_CT+4,X STA Long_AC+4,X INX - BNE _loop + BNE @loop PLX RTS @@ -489,11 +465,11 @@ LAC_Minus_LPC PHX LDX #252 ; use ZP wrap around SEC -_loop LDA Long_AC+4,X +@loop LDA Long_AC+4,X SBC Long_PC+4,X STA Long_CT+4,X INX - BNE _loop + BNE @loop PLX RTS @@ -504,10 +480,10 @@ LAC_Compare_LPC PHX LDX #252 ; use ZP wrap around SEC -_loop LDA Long_AC+4,X +@loop LDA Long_AC+4,X SBC Long_PC+4,X INX - BNE _loop + BNE @loop PLX RTS @@ -516,9 +492,9 @@ Inc_LAC ; ***** INW Long_AC - BNE _return + BNE @return INW Long_AC+2 -_return RTS +@return RTS ; ***** Dec_LAC @@ -536,9 +512,9 @@ Inc_LPC ; ***** INW Long_PC - BNE _return + BNE @return INW Long_PC+2 -_return RTS +@return RTS ; ***** Dec_LDA @@ -602,13 +578,13 @@ Print_Bits PHZ STA Long_DA LDY #8 -_loop LDA #'*' +@loop LDA #'*' BBS7 Long_DA,_set LDA #'.' _set JSR CHROUT ASL Long_DA DEY - BNE _loop + BNE @loop PLZ RTS @@ -617,9 +593,9 @@ Mon_Bits ; ****** JSR Get_LAC ; get 1st. parameter - BCS _lab + BCS @lab JSR LAC_To_LPC ; Long_PC = start address -_lab JSR Print_CR +@lab JSR Print_CR LDA #WHITE STA Long_DA+1 @@ -654,13 +630,13 @@ Mon_Set_Register JSR Get_LAC ; get 1st. parameter JSR LAC_To_PC LDY #3 -_loop JSR Get_LAC +@loop JSR Get_LAC BCS _exit LDA Long_AC STA Bank,Y INY CPY #9 - BCC _loop + BCC @loop _exit JMP Main ; ************ @@ -671,7 +647,7 @@ Mon_Set_Memory BCS _exit JSR LAC_To_LPC ; Long_PC = row address LDZ #0 -_loop JSR Get_LAC +@loop JSR Get_LAC BCS _exit LDA Long_AC BBS7 Long_PC+3,_banked ; trigger banked access @@ -679,9 +655,9 @@ _loop JSR Get_LAC _banked STA (Long_PC),Z INZ CPZ #16 - BBR7 MODE_80,_next + BBR7 MODE_80,@next CPZ #8 -_next BCC _loop +@next BCC @loop _exit JSR PRIMM .BYTE "\eO" @@ -717,14 +693,14 @@ Dump_4_Bytes ; ********** JSR CHROUT ; colour -_loop BBS7 Long_PC+3,_banked ; trigger banked access +@loop BBS7 Long_PC+3,_banked ; trigger banked access NOP ; use LDA [Long_PC],Z _banked LDA (Long_PC),Z JSR Print_Hex_Blank INZ TZA AND #3 - BNE _loop + BNE @loop RTS ; ********** @@ -734,19 +710,19 @@ Dump_4_Chars LDY #0 STY QTSW ; disable quote mode JSR CHROUT ; colour -_loop BBS7 Long_PC+3,_banked ; trigger banked access +@loop BBS7 Long_PC+3,_banked ; trigger banked access NOP ; use LDA [Long_PC],Z _banked LDA (Long_PC),Z TAY AND #%0110 0000 - BNE _laba + BNE @laba LDY #'.' -_laba TYA +@laba TYA JSR CHROUT INZ TZA AND #3 - BNE _loop + BNE @loop RTS ; ****** @@ -761,14 +737,14 @@ Dump_Row LDZ #0 LDX #2 ; 2 blocks in 80 columns - BBR7 MODE_80,_loop + BBR7 MODE_80,@loop DEX ; 1 block in 40 columns -_loop LDA #LRED +@loop LDA #LRED JSR Dump_4_Bytes LDA #WHITE JSR Dump_4_Bytes DEX - BNE _loop + BNE @loop JSR PRIMM .BYTE $3a,$12,$00 ; : reverse on @@ -831,14 +807,14 @@ Mon_Compare LBCS Mon_Error JSR Print_CR LDZ #0 -_loop LDA [Long_PC],Z +@loop LDA [Long_PC],Z CMP [Long_AC],Z - BEQ _laba + BEQ @laba JSR Hex_LPC -_laba JSR Inc_LAC +@laba JSR Inc_LAC JSR Inc_LPC JSR Dec_LCT - BPL _loop + BPL @loop JMP Main ; ****** @@ -878,12 +854,12 @@ _hunt STY Long_DA ; hunt length _lpstart LDY #0 _lpins JSR Fetch CMP Mon_Data,Y - BNE _next + BNE @next INY CPY Long_DA BNE _lpins JSR Hex_LPC ; match -_next JSR STOP +@next JSR STOP LBEQ Main JSR Inc_LPC JSR Dec_LCT @@ -983,11 +959,11 @@ Mon_Fill LBCS Mon_Error JSR Print_CR LDZ #0 -_loop LDA Long_AC +@loop LDA Long_AC STA [Long_PC],Z JSR Inc_LPC JSR Dec_LCT - BPL _loop + BPL @loop JMP Main ; ********** @@ -1004,26 +980,26 @@ _start LDX #0 ; mne letter counter STX Op_Ix ; operand byte index STX Op_Len ; operand length _getin JSR Get_Char - BNE _laba + BNE @laba CPX #0 LBEQ Main -_laba CMP #' ' +@laba CMP #' ' BEQ _start ; restart after blank ; check for long branches CPX #1 - BNE _labb ; -> not 2nd. char + BNE @labb ; -> not 2nd. char CMP #'B' - BNE _labb ; 2nd. char != 'B' + BNE @labb ; 2nd. char != 'B' LDZ Op_Mne CPZ #'L' - BNE _labb ; 1st. Char != 'L' + BNE @labb ; 1st. Char != 'L' SMB6 Op_Flag ; flag long branch DEX ; skip 'L' -_labb STA Op_Mne,X ; next mne character +@labb STA Op_Mne,X ; next mne character INX CPX #3 BNE _getin @@ -1072,7 +1048,7 @@ _exopc STX Op_Code TXA AND #7 CMP #7 - BNE _labc + BNE @labc JSR Get_Char CMP #'0' @@ -1092,25 +1068,25 @@ _exopc STX Op_Code ; read operand -_labc LDA #0 -_labd STA Mode_Flags +@labc LDA #0 +@labd STA Mode_Flags JSR Read_Number LBCS Mon_Error - BEQ _labg ; no operand + BEQ @labg ; no operand LDA Long_AC+2 LBNE Mon_Error ; -> overflow LDY #2 ; Y=2 word operand LDA Long_AC+1 - BNE _labf ; high byte not zero + BNE @labf ; high byte not zero DEY ; Y=1 byte operand -_labf LDX Op_Ix ; X = operand value # +@labf LDX Op_Ix ; X = operand value # TYA ; A = 1:byte or 2:word STA Op_Len,X ; store operand length INC Op_Ix ; ++index to operand value TXA ; A = current index - BNE _labg ; -> at 2nd. byte + BNE @labg ; -> at 2nd. byte JSR LAC_To_LCT ; Long_CT = 1st. operand -_labg DEC Buf_Index ; back to delimiter +@labg DEC Buf_Index ; back to delimiter _lpnop JSR Get_Char ; get delimiter LBEQ _adjust ; end of operand @@ -1124,7 +1100,7 @@ _lpnop JSR Get_Char ; get delimiter LDA Mode_Flags BNE _error LDA #$80 ; immediate mode - BRA _labd + BRA @labd ; left bracket @@ -1134,7 +1110,7 @@ _lbra CMP #'[' BNE _error SMB5 Op_Flag ; 32 bit mode LDA #$40 ; ( flag - BRA _labd + BRA @labd ; left parenthesis @@ -1143,7 +1119,7 @@ _indir CMP #'(' LDA Mode_Flags BNE _error LDA #$40 ; ( flag - BRA _labd + BRA @labd ; comma @@ -1163,7 +1139,7 @@ _comma CMP #',' BNE _error _comma1 TXA ORA Mode_Flags - JMP _labd + JMP @labd ; stack relative @@ -1176,7 +1152,7 @@ _stack CMP #'S' CMP #$60 ; ($nn, BNE _error ORA #%0001 0000 ; SP flag - JMP _labd + JMP @labd ; right bracket @@ -1189,7 +1165,7 @@ _rbra CMP #']' CMP #$40 ; ( LBNE Mon_Error ORA #%0000 1000 ; ) - JMP _labd + JMP @labd _error JMP Mon_Error @@ -1207,7 +1183,7 @@ _right CMP #')' CMP #$70 ; ($nn,SP LBNE Mon_Error _right1 ORA #%0000 1000 ; ) - JMP _labd + JMP @labd _X CMP #'X' BNE _Y @@ -1219,7 +1195,7 @@ _X CMP #'X' CMP #4 LBNE Mon_Error _X1 ORA #%0000 0001 - JMP _labd + JMP @labd ; Y @@ -1235,7 +1211,7 @@ _Y CMP #'Y' CMP #$7c ; ($nn,SP), LBNE Mon_Error _Y1 ORA #%0000 0010 ; Y - JMP _labd + JMP @labd ; Z @@ -1247,7 +1223,7 @@ _Z CMP #'Z' CMP #$4c ; $nn, LBNE Mon_Error ORA #%0000 0011 ; Z - JMP _labd + JMP @labd ; BBR BBS RMB SMB two operands @@ -1424,20 +1400,20 @@ Match_Mode LDX Op_Code ; try this opcode LDA Mode_Flags ; size and address mode -_loop CMP LEN_ADM,X - BEQ _return ; success ZF=1 +@loop CMP LEN_ADM,X + BEQ @return ; success ZF=1 ; search for next opcode with same mnemonic -_next INX ; next opcode +@next INX ; next opcode BEQ _error LDY MNE_Index,X CPY Ix_Mne ; same mnemonic ? - BEQ _loop ; -> compare again - BRA _next + BEQ @loop ; -> compare again + BRA @next _error DEX ; X = $ff ZF=0 -_return RTS +@return RTS ; ******** Mode_Index @@ -1445,11 +1421,11 @@ Mode_Index LDA Mode_Flags LDX #0 -_loop CMP ADMODE,X +@loop CMP ADMODE,X BEQ _found INX CPX #16 - BCC _loop + BCC @loop TXA RTS _found STX Mode_Flags @@ -1478,11 +1454,11 @@ Mon_Disassemble BCC range _nopar LDA #32 ; disassemble 32 bytes STA Long_CT - BRA _loop + BRA @loop range JSR LAC_Minus_LPC ; Long_CT = range LBCC Mon_Error ; -> negative -_loop JSR CR_Erase ; prepare empty line +@loop JSR CR_Erase ; prepare empty line JSR STOP LBEQ Main JSR Dis_Code ; disassemble one line @@ -1493,7 +1469,7 @@ _loop JSR CR_Erase ; prepare empty line SEC SBC Op_Size STA Long_CT - BCS _loop + BCS @loop JMP Main ; ****** @@ -1683,22 +1659,22 @@ _lpaccu DEX BBR4 Op_Flag,_accu LDA #'Q' _accu JSR CHROUT - JMP _return + JMP @return ; fetch and decode operand _oper LDX Op_Size - LBEQ _return ; -> no operand + LBEQ @return ; -> no operand - BBR7 Adr_Flags,_laba ; bit 7: immediate + BBR7 Adr_Flags,@laba ; bit 7: immediate LDA #'#' - BRA _labb -_laba BBR6 Adr_Flags,_labc ; bit 6: left ( + BRA @labb +@laba BBR6 Adr_Flags,@labc ; bit 6: left ( LDA #'(' - BBR5 Op_Flag,_labb + BBR5 Op_Flag,@labb LDA #'[' -_labb JSR CHROUT -_labc LDA #'$' +@labb JSR CHROUT +@labc LDA #'$' JSR CHROUT ; fetch operand to Long_AC @@ -1725,7 +1701,7 @@ _lpfop INY JSR Print_Hex ; [$nn],Z LDA #']' JSR CHROUT - BRA _labf + BRA @labf _proper LDY Op_Size BBR7 Op_Flag,_lpoper @@ -1735,44 +1711,44 @@ _lpoper LDA Long_AC-1,Y DEY BNE _lpoper - BBR5 Adr_Flags,_labe ; comma flag + BBR5 Adr_Flags,@labe ; comma flag LDA #',' JSR CHROUT - BBR4 Adr_Flags,_labd ; SP flag + BBR4 Adr_Flags,@labd ; SP flag LDA #'S' JSR CHROUT LDA #'P' JSR CHROUT -_labd BBR0 Adr_Flags,_labe ; X flag +@labd BBR0 Adr_Flags,@labe ; X flag LDA #'X' JSR CHROUT -_labe BBR3 Adr_Flags,_labf ; ) flag +@labe BBR3 Adr_Flags,@labf ; ) flag LDA #')' JSR CHROUT -_labf BBR4 Op_Flag,_comch ; not a Q instruction +@labf BBR4 Op_Flag,_comch ; not a Q instruction LDA Adr_Flags AND #3 CMP #1 - BNE _return ; Q only with ,X + BNE @return ; Q only with ,X -_comch BBR2 Adr_Flags,_labg ; , flag +_comch BBR2 Adr_Flags,@labg ; , flag LDA #',' JSR CHROUT LDA Adr_Flags AND #%0000 0011 ; $03 - BEQ _labg + BEQ @labg TAY LDA Index_Char-1,Y JSR CHROUT ; fetch 2nd. operand for BBR and BBS -_labg BBR7 Op_Flag,_return +@labg BBR7 Op_Flag,@return LDA #',' JSR CHROUT LDA #'$' @@ -1793,11 +1769,11 @@ _rela PHA LSR A ROR A AND Long_AC - BPL _labh + BPL @labh LDA #$ff ; backward branch STA Long_AC+1 -_labh PLX ; offset 2 or 3 +@labh PLX ; offset 2 or 3 _lpinw INW Long_AC DEX BNE _lpinw @@ -1811,9 +1787,9 @@ _lpinw INW Long_AC TAX PLA JSR Print_XA_Hex - BBR7 Op_Flag,_return + BBR7 Op_Flag,@return INC Op_Size -_return RTS +@return RTS ; ***** Got_LAC @@ -1892,7 +1868,7 @@ _valid SBC #'0'-1 INC Dig_Cnt CPY #1 ; decimal - BNE _laba + BNE @laba LDX #3 ; push Long_AC * 2 CLC _push LDA Long_AC,X @@ -1901,7 +1877,7 @@ _push LDA Long_AC,X DEX BPL _push -_laba LDX Num_Bits,Y +@laba LDX Num_Bits,Y _shift ASL Long_AC ROL Long_AC+1 ROW Long_AC+2 @@ -1910,7 +1886,7 @@ _shift ASL Long_AC BNE _shift CPY #1 ; decimal adjustment - BNE _labc + BNE @labc LDX #0 LDZ #3 CLC @@ -1921,7 +1897,7 @@ _pull PLA DEZ BPL _pull -_labc PLA ; pull digit +@labc PLA ; pull digit CLC ADC Long_AC STA Long_AC @@ -1932,9 +1908,9 @@ _labc PLA ; pull digit BNE _digit _error SEC - BRA _return + BRA @return _exit CLC -_return PLZ +@return PLZ PLY PLX LDA Dig_Cnt ; digits read @@ -1945,7 +1921,7 @@ Hex_LPC ; ***** LDX Long_PC+3 - BEQ _laba + BEQ @laba LDA #YELLOW JSR CHROUT TXA @@ -1954,11 +1930,11 @@ Hex_LPC JSR Print_Hex LDA #WHITE JSR CHROUT - BRA _labb -_laba LDA Long_PC+2 - BEQ _labb + BRA @labb +@laba LDA Long_PC+2 + BEQ @labb JSR Print_Hex -_labb LDX Long_PC+1 +@labb LDX Long_PC+1 LDA Long_PC ; ********** @@ -2024,9 +2000,9 @@ A_To_Hex _nibble AND #15 CMP #10 - BCC _lab + BCC @lab ADC #6 -_lab ADC #'0' +@lab ADC #'0' RTS ; ******* @@ -2034,10 +2010,10 @@ Get_Glyph ; ******* PHX LDA #' ' -_loop LDX Buf_Index +@loop LDX Buf_Index INC Buf_Index CMP Buffer,X - BEQ _loop + BEQ @loop PLX ; fall through ; ****** @@ -2058,13 +2034,13 @@ Get_Char PLX BCC _regc CMP #';' ; register - BEQ _return + BEQ @return CMP #'?' ; help - BEQ _return + BEQ @return _regc CMP #0 - BEQ _return + BEQ @return CMP #':' -_return RTS +@return RTS ; ***** @@ -2086,16 +2062,16 @@ Add_LPC CLC ADC Long_PC STA Long_PC - BCC _return + BCC @return ; ********** Inc_LPC_Page ; ********** INC Long_PC+1 - BNE _return + BNE @return INW Long_PC+2 -_return RTS +@return RTS ; ********* Param_Range @@ -2131,7 +2107,7 @@ Converter JSR Get_LAC LBCS Mon_Error LDX #0 -_loop PHX +@loop PHX JSR CR_Erase LDA Cons_Prefix,X JSR CHROUT @@ -2142,7 +2118,7 @@ _loop PHX PLX INX CPX #4 - BCC _loop + BCC @loop JMP Main Conv_Tab .WORD Print_Hexval @@ -2170,23 +2146,23 @@ _entry JSR LAC_To_LCT STZ Long_PC LDZ #'0' PHY ; save start value -_loopa PLY ; reinitialise +@loopa PLY ; reinitialise PHY LDA #0 -_loopb ASL Long_CT +@loopb ASL Long_CT ROW Long_CT+1 ROL A DEY - BNE _loopb + BNE @loopb CPX #1 ; print last character BEQ _skip ORA Long_PC - BEQ _next + BEQ @next _skip ORA #'0' STZ Long_PC JSR CHROUT -_next DEX - BNE _loopa +@next DEX + BNE @loopa PLY ; cleanup stack RTS @@ -2214,7 +2190,7 @@ _clear STA Long_PC,X LDX #32 ; source bits SED -_loop ASL Long_CT +@loop ASL Long_CT ROL Long_CT+1 ROW Long_CT+2 LDA Long_PC @@ -2230,7 +2206,7 @@ _loop ASL Long_CT ADC Long_PC+3 STA Long_PC+3 DEX - BNE _loop + BNE @loop CLD ; ******* @@ -2241,27 +2217,27 @@ Print_BCD STA Long_CT LDZ #'0' LDY #8 ; max. digits -_loopa LDX #3 ; 4 bytes +@loopa LDX #3 ; 4 bytes LDA #0 -_loopb ASL Long_PC +@loopb ASL Long_PC ROL Long_PC+1 ROW Long_PC+2 ROL A DEX - BPL _loopb + BPL @loopb CPY #1 ; print last character BEQ _skip ORA Long_CT - BEQ _next + BEQ @next _skip ORA #'0' STZ Long_CT CMP #$3a BCC _print ADC #6 ; + carry _print JSR CHROUT -_next DEY - BNE _loopa +@next DEY + BNE @loopa RTS ; ****** @@ -2275,17 +2251,17 @@ Mon_Disk STA Long_CT ; dir marker LDY #$ff ; SA = 15 CMP #'$' - BNE _lab + BNE @lab LDY #$f0 ; SA = 0 -_lab LDA FA +@lab LDA FA JSR LISTEN TYA ; SA JSR SECOND -_loop LDA Buffer,X +@loop LDA Buffer,X BEQ _close JSR CIOUT INX - BRA _loop + BRA @loop _close JSR UNLSN LDA Long_CT CMP #'$' @@ -2314,11 +2290,11 @@ Get_Disk_Status STA Disk_Status ; complete BCD number LDY #1 -_loop INY +@loop INY JSR ACPTR STA Disk_Msg,Y CMP #' ' - BCS _loop + BCS @loop LDA #0 STA Disk_Msg,Y JSR UNTALK @@ -2337,11 +2313,11 @@ Print_Disk_Msg JSR Print_CR LDY #0 -_loop LDA Disk_Msg,Y +@loop LDA Disk_Msg,Y BEQ _exit JSR CHROUT INY - BRA _loop + BRA @loop _exit JMP Print_CR ; @[u] : print disk status for unit u @@ -2370,12 +2346,12 @@ Mon_DOS LBCS Mon_Error _unit STX FA DEC Buf_Index -_next JSR Get_Char +@next JSR Get_Char BEQ _status ; only @u CMP #' ' - BEQ _next + BEQ @next CMP #',' - BEQ _next + BEQ @next CMP #'U' ; sector read/write BEQ DOS_U _status JSR Mon_Disk @@ -2394,12 +2370,12 @@ Directory STA STATUS LDZ #6 ; load address, pseudo link, pseudo number -_loopb TAX ; X = previous byte +@loopb TAX ; X = previous byte JSR ACPTR ; A = current byte LDY STATUS BNE _exit DEZ - BNE _loopb ; X/A = last read word + BNE @loopb ; X/A = last read word STX Long_AC STA Long_AC+1 @@ -2408,18 +2384,18 @@ _loopb TAX ; X = previous byte JSR Print_Decimal ; file size JSR Print_Blank -_loopc JSR ACPTR ; print file entry +@loopc JSR ACPTR ; print file entry BEQ _cr LDY STATUS BNE _exit JSR CHROUT - BCC _loopc + BCC @loopc _cr JSR Print_CR JSR STOP BEQ _exit LDZ #4 - BRA _loopb ; next file + BRA @loopb ; next file _exit JMP UNTALK ; *** @@ -2453,35 +2429,35 @@ DOS_U JSR Open_Disk_Buffer -_loop LDA Mon_Data+1 +@loop LDA Mon_Data+1 LSR A BEQ _write - JSR Find_Next_Sector + JSR Find_next_Sector BNE _error JSR Read_Sector - BRA _next + BRA @next _write JSR Write_Sector - JSR Find_Next_Sector + JSR Find_next_Sector BNE _error -_next JSR Inc_LPC_Page +@next JSR Inc_LPC_Page INC Disk_Sector DEW Long_CT - BPL _loop + BPL @loop _error JSR Print_Disk_Msg JSR Close_Disk_Buffer JMP Main ; ************** -Find_Next_Sector +Find_next_Sector ; ************** JSR Build_U_String JSR Send_Disk_Command JSR Get_Disk_Status - BEQ _return ; OK + BEQ @return ; OK CMP #$66 ; illegal track or sector BNE _error ; error LDA #0 @@ -2490,10 +2466,10 @@ Find_Next_Sector JSR Build_U_String JSR Send_Disk_Command JSR Get_Disk_Status - BEQ _return + BEQ @return _error JSR Print_Disk_Msg LDA Disk_Status -_return RTS +@return RTS ; ****************** Open_Command_Channel @@ -2512,11 +2488,11 @@ Reset_BP ; ****** JSR Open_Command_Channel -_loop LDA BP_ZERO,Y +@loop LDA BP_ZERO,Y BEQ _end JSR CIOUT INY - BRA _loop + BRA @loop _end JMP UNLSN ; *************** @@ -2524,11 +2500,11 @@ Send_Disk_Command ; *************** JSR Open_Command_Channel -_loop LDA Mon_Data,Y +@loop LDA Mon_Data,Y BEQ _end JSR CIOUT INY - BRA _loop + BRA @loop _end JMP UNLSN ; ********* @@ -2541,10 +2517,10 @@ Read_Sector JSR TKSA LDZ #0 STZ STATUS -_loop JSR ACPTR +@loop JSR ACPTR STA [Long_PC],Z INZ - BNE _loop + BNE @loop JMP UNTALK ; ********** @@ -2558,10 +2534,10 @@ Write_Sector JSR TKSA LDZ #0 STZ STATUS -_loop LDA [Long_PC],Z +@loop LDA [Long_PC],Z JSR CIOUT INZ - BNE _loop + BNE @loop JSR UNLSN RTS @@ -2595,11 +2571,11 @@ Build_U_String ; ************ LDX #14 -_loop LDA U1,X +@loop LDA U1,X STA Mon_Data,X DEX CPX #2 - BCS _loop + BCS @loop LDA #'U' STA Mon_Data LDA Disk_Track @@ -2919,38 +2895,38 @@ LEN_ADM ( %11...... BBR BBS) - .BYTE $00,$44,$00,$00,$40,$40,$40,$40 ; $00 - .BYTE $00,$41,$00,$00,$80,$80,$80,$c0 ; $08 - .BYTE $60,$45,$46,$a0,$40,$47,$47,$40 ; $10 - .BYTE $00,$88,$00,$00,$80,$87,$87,$c0 ; $18 - .BYTE $80,$44,$8b,$84,$40,$40,$40,$40 ; $20 - .BYTE $00,$41,$00,$00,$80,$80,$80,$c0 ; $28 - .BYTE $60,$45,$46,$a0,$47,$47,$47,$40 ; $30 - .BYTE $00,$88,$00,$00,$87,$87,$87,$c0 ; $38 - .BYTE $00,$44,$00,$00,$40,$40,$40,$40 ; $40 - .BYTE $00,$41,$00,$00,$80,$80,$80,$c0 ; $48 - .BYTE $60,$45,$46,$a0,$47,$47,$47,$40 ; $50 - .BYTE $00,$88,$00,$00,$00,$87,$87,$c0 ; $58 - .BYTE $00,$44,$41,$a0,$40,$40,$40,$40 ; $60 - .BYTE $00,$41,$00,$00,$8b,$80,$80,$c0 ; $68 - .BYTE $60,$45,$46,$a0,$47,$47,$47,$40 ; $70 - .BYTE $00,$88,$00,$00,$84,$87,$87,$c0 ; $78 - .BYTE $60,$44,$4d,$a0,$40,$40,$40,$40 ; $80 - .BYTE $00,$41,$00,$87,$80,$80,$80,$c0 ; $88 - .BYTE $60,$45,$46,$a0,$47,$47,$48,$40 ; $90 - .BYTE $00,$88,$00,$88,$80,$87,$87,$c0 ; $98 - .BYTE $41,$44,$41,$41,$40,$40,$40,$40 ; $a0 - .BYTE $00,$41,$00,$80,$80,$80,$80,$c0 ; $a8 - .BYTE $60,$45,$46,$a0,$47,$47,$48,$40 ; $b0 - .BYTE $00,$88,$00,$87,$87,$87,$88,$c0 ; $b8 - .BYTE $41,$44,$41,$40,$40,$40,$40,$40 ; $c0 - .BYTE $00,$41,$00,$80,$80,$80,$80,$c0 ; $c8 - .BYTE $60,$45,$46,$a0,$40,$47,$47,$40 ; $d0 - .BYTE $00,$88,$00,$00,$80,$87,$87,$c0 ; $d8 - .BYTE $41,$44,$4d,$40,$40,$40,$40,$40 ; $e0 - .BYTE $00,$41,$00,$80,$80,$80,$80,$c0 ; $e8 - .BYTE $60,$45,$46,$a0,$81,$47,$47,$40 ; $f0 - .BYTE $00,$88,$00,$00,$80,$87,$87,$c0 ; $f8 + !byte $00,$44,$00,$00,$40,$40,$40,$40 ; $00 + !byte $00,$41,$00,$00,$80,$80,$80,$c0 ; $08 + !byte $60,$45,$46,$a0,$40,$47,$47,$40 ; $10 + !byte $00,$88,$00,$00,$80,$87,$87,$c0 ; $18 + !byte $80,$44,$8b,$84,$40,$40,$40,$40 ; $20 + !byte $00,$41,$00,$00,$80,$80,$80,$c0 ; $28 + !byte $60,$45,$46,$a0,$47,$47,$47,$40 ; $30 + !byte $00,$88,$00,$00,$87,$87,$87,$c0 ; $38 + !byte $00,$44,$00,$00,$40,$40,$40,$40 ; $40 + !byte $00,$41,$00,$00,$80,$80,$80,$c0 ; $48 + !byte $60,$45,$46,$a0,$47,$47,$47,$40 ; $50 + !byte $00,$88,$00,$00,$00,$87,$87,$c0 ; $58 + !byte $00,$44,$41,$a0,$40,$40,$40,$40 ; $60 + !byte $00,$41,$00,$00,$8b,$80,$80,$c0 ; $68 + !byte $60,$45,$46,$a0,$47,$47,$47,$40 ; $70 + !byte $00,$88,$00,$00,$84,$87,$87,$c0 ; $78 + !byte $60,$44,$4d,$a0,$40,$40,$40,$40 ; $80 + !byte $00,$41,$00,$87,$80,$80,$80,$c0 ; $88 + !byte $60,$45,$46,$a0,$47,$47,$48,$40 ; $90 + !byte $00,$88,$00,$88,$80,$87,$87,$c0 ; $98 + !byte $41,$44,$41,$41,$40,$40,$40,$40 ; $a0 + !byte $00,$41,$00,$80,$80,$80,$80,$c0 ; $a8 + !byte $60,$45,$46,$a0,$47,$47,$48,$40 ; $b0 + !byte $00,$88,$00,$87,$87,$87,$88,$c0 ; $b8 + !byte $41,$44,$41,$40,$40,$40,$40,$40 ; $c0 + !byte $00,$41,$00,$80,$80,$80,$80,$c0 ; $c8 + !byte $60,$45,$46,$a0,$40,$47,$47,$40 ; $d0 + !byte $00,$88,$00,$00,$80,$87,$87,$c0 ; $d8 + !byte $41,$44,$4d,$40,$40,$40,$40,$40 ; $e0 + !byte $00,$41,$00,$80,$80,$80,$80,$c0 ; $e8 + !byte $60,$45,$46,$a0,$81,$47,$47,$40 ; $f0 + !byte $00,$88,$00,$00,$80,$87,$87,$c0 ; $f8 ; **** ADMODE @@ -2967,28 +2943,28 @@ ADMODE ; 2 x , ; 1/0 xx 01:X 10:Y 11:Z - .BYTE %00000000 ; 0 implicit/direct - .BYTE %10000000 ; 1 #$nn immediate - .BYTE %00000000 ; 2 ---------- - .BYTE %00000000 ; 3 ---------- - .BYTE %01101001 ; 4 ($nn,X) indirect X - .BYTE %01001110 ; 5 ($nn),Y indirect Y - .BYTE %01001111 ; 6 ($nn),Z indirect Z - .BYTE %00000101 ; 7 $nn,X indexed X - .BYTE %00000110 ; 8 $nn,Y indexed Y - .BYTE %00000101 ; 9 $nn,X indexed X - .BYTE %00000110 ; a $nn,Y ---------- - .BYTE %01001000 ; b ($nnnn,X) JMP & JSR - .BYTE %01101001 ; c ($nn,X) ---------- - .BYTE %01111110 ; d ($nn,SP),Y LDA & STA - .BYTE %00000000 ; e - .BYTE %00000100 ; f + !byte %00000000 ; 0 implicit/direct + !byte %10000000 ; 1 #$nn immediate + !byte %00000000 ; 2 ---------- + !byte %00000000 ; 3 ---------- + !byte %01101001 ; 4 ($nn,X) indirect X + !byte %01001110 ; 5 ($nn),Y indirect Y + !byte %01001111 ; 6 ($nn),Z indirect Z + !byte %00000101 ; 7 $nn,X indexed X + !byte %00000110 ; 8 $nn,Y indexed Y + !byte %00000101 ; 9 $nn,X indexed X + !byte %00000110 ; a $nn,Y ---------- + !byte %01001000 ; b ($nnnn,X) JMP & JSR + !byte %01101001 ; c ($nn,X) ---------- + !byte %01111110 ; d ($nn,SP),Y LDA & STA + !byte %00000000 ; e + !byte %00000100 ; f ; ASL INC ROL DEC LSR ROR NEG ASR -ACCUMODE .BYTE $0a,$1a,$2a,$3a,$4a,$6a,$42,$43 +ACCUMODE !byte $0a,$1a,$2a,$3a,$4a,$6a,$42,$43 -Num_Base .BYTE 16,10, 8, 2 ; hex, dec, oct, bin -Num_Bits .BYTE 4, 3, 3, 1 ; hex, dec, oct, bin +Num_Base !byte 16,10, 8, 2 ; hex, dec, oct, bin +Num_Bits !byte 4, 3, 3, 1 ; hex, dec, oct, bin Index_Char .BYTE "XYZ" diff --git a/src/mon_m65/dummy.s b/src/mon_m65/dummy.s deleted file mode 100644 index 95b68023..00000000 --- a/src/mon_m65/dummy.s +++ /dev/null @@ -1,2 +0,0 @@ - - rts From 797a5a19483d0ffadc905b9bfbdbfd72fea89093 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 11 Dec 2020 15:29:46 +0100 Subject: [PATCH 013/257] BSMON adaptations --- src/mon_m65/bsmon.s | 919 +++++++++++++++++++++++++------------------- 1 file changed, 517 insertions(+), 402 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 32de0099..80773079 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -1,6 +1,7 @@ ; ******************************* ; * BSM = Bit Shifter's Monitor * ; * for The MEGA65 10-Dec_2020 * +; * (adaped for the Open ROMs) * ; ******************************* !ifdef CONFIG_DEV_BSMON { @@ -85,11 +86,6 @@ !addr NDX = $d0 ; length of keyboard buffer !addr MODE_80 = $d7 ; 80 column / 40 volumn flag -!addr B_Margin = $e4 ; SCBOT default = 24 -!addr T_Margin = $e5 ; SCTOP default = 0 -!addr L_Margin = $e6 ; SCLF default = 0 -!addr R_Margin = $e7 ; SCRT default = 39 or 79 - !addr QTSW = $f4 ; Quote switch !addr Buffer = $0200 ; input buffer @@ -161,14 +157,14 @@ Mon_Break ; decrement PC to point after BRK LDA PCL - BNE _nopage + BNE @nopage DEC PCH -_nopage DEC PCL +@nopage DEC PCL LDA $011d - BBR7 Bank,_bank + BBR7 Bank,@bank LDA $011f -_bank AND #15 +@bank AND #15 STA Bank BRA Mon_Start @@ -191,10 +187,10 @@ Mon_Call LDA #EXIT BIT EXIT ; $20 (JSR) or $ff ? - BPL _store + BPL @store LDA #EXIT_OLD -_store STA PCL +@store STA PCL STA X_Vector STX PCH STX X_Vector+1 @@ -250,9 +246,9 @@ Mon_Register @loopc ASL A PHA LDA #'-' - BCC _flag + BCC @flag LDA #'1' -_flag JSR CHROUT +@flag JSR CHROUT PLA DEY BNE @loopc @@ -281,10 +277,10 @@ Main_A LDA #0 STA Buf_Index STA Buffer-1,X ; terminate buffer -_getcomm JSR Get_Char +@getcomm JSR Get_Char BEQ Main CMP #' ' - BEQ _getcomm + BEQ @getcomm ; ******** Mon_Switch @@ -353,27 +349,27 @@ Load_Save_Verify Jump_Table ; ******** - .WORD Mon_Assemble ; A - .WORD Mon_Bits ; B - .WORD Mon_Compare ; C - .WORD Mon_Disassemble ; D - .WORD Mon_Fill ; F - .WORD Mon_Go ; G - .WORD Mon_Hunt ; H - .WORD Mon_JSR ; J - .WORD Mon_Memory ; M - .WORD Mon_Register ; R - .WORD Mon_Transfer ; T - .WORD Mon_Exit ; X - .WORD Mon_DOS ; @ - .WORD Mon_Assemble ; . - .WORD Mon_Set_Memory ; > - .WORD Mon_Set_Register ; ; - .WORD Mon_Help ; ? - .WORD Converter ; $ - .WORD Converter ; + - .WORD Converter ; & - .WORD Converter ; % + !word Mon_Assemble ; A + !word Mon_Bits ; B + !word Mon_Compare ; C + !word Mon_Disassemble ; D + !word Mon_Fill ; F + !word Mon_Go ; G + !word Mon_Hunt ; H + !word Mon_JSR ; J + !word Mon_Memory ; M + !word Mon_Register ; R + !word Mon_Transfer ; T + !word Mon_Exit ; X + !word Mon_DOS ; @ + !word Mon_Assemble ; . + !word Mon_Set_Memory ; > + !word Mon_Set_Register ; ; + !word Mon_Help ; ? + !word Converter ; $ + !word Converter ; + + !word Converter ; & + !word Converter ; % ; ****** @@ -395,14 +391,14 @@ LAC_To_PC ; Bank, PCH and PCL are part of a list, that is used by ; the routines FAR_JMP and FAR_JSR of the operating system - BCS _error + BCS @error LDA Long_AC STA Bank+2 LDA Long_AC+1 STA Bank+1 LDA Long_AC+2 STA Bank -_error RTS +@error RTS ; ******** LAC_To_LPC @@ -502,9 +498,9 @@ Dec_LAC LDA Long_AC ORA Long_AC+1 - BNE _skip + BNE @skip DEW Long_AC+2 -_skip DEW Long_AC +@skip DEW Long_AC RTS ; ***** @@ -522,9 +518,9 @@ Dec_LDA LDA Long_DA ORA Long_DA+1 - BNE _skip + BNE @skip DEW Long_DA+2 -_skip DEW Long_DA +@skip DEW Long_DA RTS ; *** @@ -534,9 +530,9 @@ Fetch PHZ TYA TAZ - BBS7 Long_PC+3,_banked ; trigger banked access + BBS7 Long_PC+3,@banked ; trigger banked access NOP ; use LDA [Long_PC],Z -_banked LDA (Long_PC),Z +@banked LDA (Long_PC),Z PLZ AND #$ff RTS @@ -547,29 +543,29 @@ Mon_Memory JSR Get_LAC ; get 1st. parameter LDZ #16 ; default row count - BCS _row ; no address + BCS @row ; no address JSR LAC_To_LPC ; Long_PC = start address JSR Get_LAC ; Long_AC = end address - BCS _row ; not given + BCS @row ; not given JSR LAC_Minus_LPC ; Long_CT = range LBCC Mon_Error ; negative range -> error LDX #4 ; 16 bytes / line - BBR7 MODE_80,_shift + BBR7 MODE_80,@shift DEX ; 8 bytes / line -_shift LSR Long_CT+1 +@shift LSR Long_CT+1 ROR Long_CT DEX - BNE _shift + BNE @shift LDZ Long_CT ; row count INZ -_row JSR STOP - BEQ _exit +@row JSR STOP + BEQ @exit JSR Dump_Row DEZ - BNE _row -_exit JMP Main + BNE @row +@exit JMP Main ; ******** Print_Bits @@ -579,9 +575,9 @@ Print_Bits STA Long_DA LDY #8 @loop LDA #'*' - BBS7 Long_DA,_set + BBS7 Long_DA,@set LDA #'.' -_set JSR CHROUT +@set JSR CHROUT ASL Long_DA DEY BNE @loop @@ -600,10 +596,10 @@ Mon_Bits STA Long_DA+1 LDX #8 -_row PHX +@row PHX JSR Hex_LPC LDZ #0 -_col SEC +@col SEC LDA #WHITE+LRED ; toggle colour SBC Long_DA+1 STA Long_DA+1 @@ -615,12 +611,12 @@ _col SEC ADC #8 TAZ CMP #64 - BCC _col + BCC @col JSR Print_CR JSR Inc_LPC PLX DEX - BNE _row + BNE @row JMP Main ; ************** @@ -631,35 +627,35 @@ Mon_Set_Register JSR LAC_To_PC LDY #3 @loop JSR Get_LAC - BCS _exit + BCS @exit LDA Long_AC STA Bank,Y INY CPY #9 BCC @loop -_exit JMP Main +@exit JMP Main ; ************ Mon_Set_Memory ; ************ JSR Get_LAC ; get 1st. parameter - BCS _exit + BCS @exit JSR LAC_To_LPC ; Long_PC = row address LDZ #0 @loop JSR Get_LAC - BCS _exit + BCS @exit LDA Long_AC - BBS7 Long_PC+3,_banked ; trigger banked access + BBS7 Long_PC+3,@banked ; trigger banked access NOP ; use STA [Long_PC],Z -_banked STA (Long_PC),Z +@banked STA (Long_PC),Z INZ CPZ #16 BBR7 MODE_80,@next CPZ #8 @next BCC @loop -_exit JSR PRIMM +@exit JSR PRIMM .BYTE "\eO" .BYTE $91,$00 JSR Dump_Row @@ -693,9 +689,9 @@ Dump_4_Bytes ; ********** JSR CHROUT ; colour -@loop BBS7 Long_PC+3,_banked ; trigger banked access +@loop BBS7 Long_PC+3,@banked ; trigger banked access NOP ; use LDA [Long_PC],Z -_banked LDA (Long_PC),Z +@banked LDA (Long_PC),Z JSR Print_Hex_Blank INZ TZA @@ -710,11 +706,11 @@ Dump_4_Chars LDY #0 STY QTSW ; disable quote mode JSR CHROUT ; colour -@loop BBS7 Long_PC+3,_banked ; trigger banked access +@loop BBS7 Long_PC+3,@banked ; trigger banked access NOP ; use LDA [Long_PC],Z -_banked LDA (Long_PC),Z +@banked LDA (Long_PC),Z TAY - AND #%0110 0000 + AND #%01100000 BNE @laba LDY #'.' @laba TYA @@ -751,14 +747,14 @@ Dump_Row LDZ #0 LDX #2 ; 4 blocks in 80 columns - BBR7 MODE_80,_lchr + BBR7 MODE_80,@lchr DEX ; 2 blocks in 40 columns -_lchr LDA #LRED +@lchr LDA #LRED JSR Dump_4_Chars LDA #WHITE JSR Dump_4_Chars DEX - BNE _lchr + BNE @lchr TZA JSR Add_LPC PLZ @@ -775,26 +771,26 @@ Mon_Transfer LDZ #0 JSR LAC_Compare_LPC ; target - source - BCC _forward + BCC @forward ; source < target: backward transfer JSR LAC_Plus_LCT ; Long_AC = end of target -_lpback LDA [Long_DA],Z ; backward copy +@lpback LDA [Long_DA],Z ; backward copy STA [Long_AC],Z JSR Dec_LDA JSR Dec_LAC JSR Dec_LCT - BPL _lpback + BPL @lpback JMP Main -_forward LDA [Long_PC],Z ; forward copy +@forward LDA [Long_PC],Z ; forward copy STA [Long_AC],Z JSR Inc_LPC JSR Inc_LAC JSR Dec_LCT - BPL _forward + BPL @forward JMP Main ; ********* @@ -826,44 +822,44 @@ Mon_Hunt LDY #0 JSR Get_Char CMP #APOSTR - BNE _bin + BNE @bin JSR Get_Char ; string hunt CMP #0 LBEQ Mon_Error ; null string -_lpstr STA Mon_Data,Y +@lpstr STA Mon_Data,Y INY JSR Get_Char - BEQ _hunt + BEQ @hunt CPY #32 ;max. string length - BNE _lpstr - BRA _hunt + BNE @lpstr + BRA @hunt -_bin JSR Got_LAC -_lpbin LDA Long_AC +@bin JSR Got_LAC +@lpbin LDA Long_AC STA Mon_Data,Y INY JSR Get_LAC - BCS _hunt + BCS @hunt CPY #32 ;max. data length - BNE _lpbin + BNE @lpbin -_hunt STY Long_DA ; hunt length +@hunt STY Long_DA ; hunt length JSR Print_CR -_lpstart LDY #0 -_lpins JSR Fetch +@lpstart LDY #0 +@lpins JSR Fetch CMP Mon_Data,Y BNE @next INY CPY Long_DA - BNE _lpins + BNE @lpins JSR Hex_LPC ; match @next JSR STOP LBEQ Main JSR Inc_LPC JSR Dec_LCT - BPL _lpstart + BPL @lpstart JMP Main ; ******* @@ -883,39 +879,39 @@ Load_Save STA FNADR+1 LDA # load/verify + BCS @load ; no end address -> load/verify JSR Print_CR LDX Long_AC ; X/Y = end address LDY Long_AC+1 @@ -926,16 +922,16 @@ _unit STX Buf_Index ; update read position STA SA ; set SA for PRG LDA #Long_PC ; Long_PC = start address JSR SAVE -_exit JMP Main +@exit JMP Main -_do LDA VERCK +@do LDA VERCK CMP #'V' ; Verify - BEQ _exec + BEQ @exec CMP #'L' ; Load LBNE Mon_Error LDA #0 ; 0 = LOAD -_exec JSR LOAD ; A == 0 : LOAD else VERIFY - BBR4 STATUS,_exit +@exec JSR LOAD ; A == 0 : LOAD else VERIFY + BBR4 STATUS,@exit LDA VERCK LBEQ Mon_Error LBCS Main @@ -943,11 +939,11 @@ _exec JSR LOAD ; A == 0 : LOAD else VERIFY .BYTE " ERROR",0 JMP Main -_load LDX Long_PC +@load LDX Long_PC LDY Long_PC+1 LDA #0 ; 0 = use X/Y as load address STA SA ; and ignore load address from file - BRA _do + BRA @do ; ****** Mon_Fill @@ -974,18 +970,18 @@ Mon_Assemble LBCS Mon_Error JSR LAC_To_LPC ; Long_PC = PC -_start LDX #0 ; mne letter counter +@start LDX #0 ; mne letter counter STX Long_DA+1 ; clear encoded MNE STX Op_Flag ; 6:long branch 5:32 bit STX Op_Ix ; operand byte index STX Op_Len ; operand length -_getin JSR Get_Char +@getin JSR Get_Char BNE @laba CPX #0 LBEQ Main @laba CMP #' ' - BEQ _start ; restart after blank + BEQ @start ; restart after blank ; check for long branches @@ -1002,46 +998,46 @@ _getin JSR Get_Char @labb STA Op_Mne,X ; next mne character INX CPX #3 - BNE _getin + BNE @getin ; encode 3 letter mnemonic -_lpenc LDA Op_Mne-1,X +@lpenc LDA Op_Mne-1,X SEC SBC #$3f ; offset LDY #5 ; 5 bit code -_lpbit LSR A +@lpbit LSR A ROR Long_DA ROR Long_DA+1 DEY - BNE _lpbit + BNE @lpbit DEX - BNE _lpenc + BNE @lpenc ; find packed MNE code in table LDX #90 ; # of mnemonics LDA Long_DA -_lpfind CMP MNE_L,X ; compare left MNE - BNE _nxfind +@lpfind CMP MNE_L,X ; compare left MNE + BNE @nxfind LDY MNE_R,X CPY Long_DA+1 ; compare right MNE - BEQ _found -_nxfind DEX - BPL _lpfind + BEQ @found +@nxfind DEX + BPL @lpfind JMP Mon_Error -_found STX Ix_Mne +@found STX Ix_Mne ; find 1st. opcode for this mnemonic TXA LDX #0 -_lpopc CMP MNE_Index,X - BEQ _exopc +@lpopc CMP MNE_Index,X + BEQ @exopc INX - BNE _lpopc -_exopc STX Op_Code + BNE @lpopc +@exopc STX Op_Code ; check for BBR BBS RMB SMB @@ -1088,157 +1084,157 @@ _exopc STX Op_Code JSR LAC_To_LCT ; Long_CT = 1st. operand @labg DEC Buf_Index ; back to delimiter -_lpnop JSR Get_Char ; get delimiter - LBEQ _adjust ; end of operand +@lpnop JSR Get_Char ; get delimiter + LBEQ @adjust ; end of operand CMP #' ' - BEQ _lpnop + BEQ @lpnop ; immediate CMP #'#' - BNE _lbra + BNE @lbra LDA Mode_Flags - BNE _error + BNE @error LDA #$80 ; immediate mode BRA @labd ; left bracket -_lbra CMP #'[' - BNE _indir +@lbra CMP #'[' + BNE @indir LDA Mode_Flags - BNE _error + BNE @error SMB5 Op_Flag ; 32 bit mode LDA #$40 ; ( flag BRA @labd ; left parenthesis -_indir CMP #'(' - BNE _comma +@indir CMP #'(' + BNE @comma LDA Mode_Flags - BNE _error + BNE @error LDA #$40 ; ( flag BRA @labd ; comma -_comma CMP #',' - BNE _stack +@comma CMP #',' + BNE @stack LDA Op_Ix ; operand value # - BEQ _error + BEQ @error LDX #4 ; outside comma LDA Mode_Flags - BEQ _comma1 ; no flags yet + BEQ @comma1 ; no flags yet CMP #$78 ; ($nn,SP) - BEQ _comma1 + BEQ @comma1 CMP #$48 ; ($nn) - BEQ _comma1 + BEQ @comma1 LDX #$20 ; , inside comma CMP #$40 ; ( - BNE _error -_comma1 TXA + BNE @error +@comma1 TXA ORA Mode_Flags JMP @labd ; stack relative -_stack CMP #'S' - BNE _rbra +@stack CMP #'S' + BNE @rbra JSR Get_Char CMP #'P' - BNE _error + BNE @error LDA Mode_Flags CMP #$60 ; ($nn, - BNE _error - ORA #%0001 0000 ; SP flag + BNE @error + ORA #%00010000 ; SP flag JMP @labd ; right bracket -_rbra CMP #']' - BNE _right +@rbra CMP #']' + BNE @right BBR5 Op_Flag,_error LDA Op_Ix LBEQ Mon_Error ; no value LDA Mode_Flags CMP #$40 ; ( LBNE Mon_Error - ORA #%0000 1000 ; ) + ORA #%00001000 ; ) JMP @labd -_error JMP Mon_Error +@error JMP Mon_Error ; right parenthesis -_right CMP #')' - BNE _X +@right CMP #')' + BNE @X LDA Op_Ix LBEQ Mon_Error ; no value LDA Mode_Flags CMP #$40 ; ( - BEQ _right1 + BEQ @right1 CMP #$61 ; ($nn,X - BEQ _right1 + BEQ @right1 CMP #$70 ; ($nn,SP LBNE Mon_Error -_right1 ORA #%0000 1000 ; ) +@right1 ORA #%00001000 ; ) JMP @labd -_X CMP #'X' - BNE _Y +@X CMP #'X' + BNE @Y LDA Op_Ix LBEQ Mon_Error LDA Mode_Flags CMP #$60 - BEQ _X1 + BEQ @X1 CMP #4 LBNE Mon_Error -_X1 ORA #%0000 0001 +@X1 ORA #%00000001 JMP @labd ; Y -_Y CMP #'Y' - BNE _Z +@Y CMP #'Y' + BNE @Z LDA Op_Ix LBEQ Mon_Error LDA Mode_Flags CMP #$4c ; ($nn), - BEQ _Y1 + BEQ @Y1 CMP #4 ; $nn, - BEQ _Y1 + BEQ @Y1 CMP #$7c ; ($nn,SP), LBNE Mon_Error -_Y1 ORA #%0000 0010 ; Y +@Y1 ORA #%00000010 ; Y JMP @labd ; Z -_Z CMP #'Z' +@Z CMP #'Z' LBNE Mon_Error LDA Op_Ix LBEQ Mon_Error LDA Mode_Flags CMP #$4c ; $nn, LBNE Mon_Error - ORA #%0000 0011 ; Z + ORA #%00000011 ; Z JMP @labd ; BBR BBS RMB SMB two operands -_adjust LDA Ix_Mne +@adjust LDA Ix_Mne LDX Op_Ix ; # if values - BEQ _match ; -> no operand + BEQ @match ; -> no operand DEX - BEQ _one ; -> one operand + BEQ @one ; -> one operand DEX LBNE Mon_Error ; -> error if more than 2 CMP #5 ; BBR - BEQ _BB + BEQ @BB CMP #6 ; BBS LBNE Mon_Error -_BB LDA Long_CT+1 +@BB LDA Long_CT+1 LBNE Mon_Error LDA #3 ; offset JSR Branch_Target @@ -1248,24 +1244,24 @@ _BB LDA Long_CT+1 STX Long_AC STY Long_AC+1 LDY #2 - BRA _store + BRA @store ; one operand in Long_CT -_one LDX Long_CT +@one LDX Long_CT LDY Long_CT+1 STX Long_AC STY Long_AC+1 ; Aval = operand LDX #10 -_lpbrain CMP BRAIN-1,X - BEQ _branch +@lpbrain CMP BRAIN-1,X + BEQ @branch DEX - BNE _lpbrain - BRA _match + BNE @lpbrain + BRA @match ; branch instruction -_branch LDA Mode_Flags +@branch LDA Mode_Flags LBNE Mon_Error ; only value LDA #2 ; branch offset JSR Branch_Target @@ -1274,23 +1270,23 @@ _branch LDA Mode_Flags BBR6 Op_Flag,_bran1 INY ; long branch ORA #3 -_bran1 BRA _store +@bran1 BRA @store ; find opcode matching mnemonic and address mode -_match JSR Mode_Index -_lpmatch JSR Match_Mode - BEQ _okmat +@match JSR Mode_Index +@lpmatch JSR Match_Mode + BEQ @okmat LDA Op_Len LBEQ Mon_Error LDA Mode_Flags LBMI Mon_Error - AND #%0011 1111 + AND #%00111111 STA Mode_Flags INC Op_Len JSR Size_To_Mode - BRA _lpmatch -_okmat LDY Op_Len + BRA @lpmatch +@okmat LDY Op_Len TXA ; store instruction bytes @@ -1299,10 +1295,10 @@ _okmat LDY Op_Len ; Y = operand length ; Long_AC = operand value -_store STA Op_Code +@store STA Op_Code STY Op_Size INC Op_Size - BBR5 Op_Flag,_storen + BBR5 Op_Flag,@storen LDA #$ea ; 32 bit prefix LDZ #0 STA [Long_PC],Z ; store prefix @@ -1313,22 +1309,22 @@ _store STA Op_Code LDA Long_AC STA [Long_PC],Z ; store address INC Op_Size - BRA _print + BRA @print -_storen PHY +@storen PHY PLZ ; Z = Y - BEQ _store1 + BEQ @store1 -_lpsto LDA Long_AC-1,Y +@lpsto LDA Long_AC-1,Y STA [Long_PC],Z DEZ DEY - BNE _lpsto + BNE @lpsto -_store1 LDA Op_Code +@store1 LDA Op_Code STA [Long_PC],Z -_print JSR PRIMM +@print JSR PRIMM .BYTE 13,$91,"A \eQ",0 JSR Print_Code INC Op_Size @@ -1349,9 +1345,9 @@ _print JSR PRIMM LDY #2 LDX #2 ; 6 digits LDA Long_PC,X - BNE _auto + BNE @auto DEX ; 4 digits -_auto PHX +@auto PHX LDA Long_PC,X JSR A_To_Hex STA Buffer,Y @@ -1363,7 +1359,7 @@ _auto PHX INY PLX DEX - BPL _auto + BPL @auto LDA #' ' STA Buffer,Y @@ -1406,13 +1402,13 @@ Match_Mode ; search for next opcode with same mnemonic @next INX ; next opcode - BEQ _error + BEQ @error LDY MNE_Index,X CPY Ix_Mne ; same mnemonic ? BEQ @loop ; -> compare again BRA @next -_error DEX ; X = $ff ZF=0 +@error DEX ; X = $ff ZF=0 @return RTS ; ******** @@ -1422,13 +1418,13 @@ Mode_Index LDA Mode_Flags LDX #0 @loop CMP ADMODE,X - BEQ _found + BEQ @found INX CPX #16 BCC @loop TXA RTS -_found STX Mode_Flags +@found STX Mode_Flags ; ********** Size_To_Mode @@ -1448,11 +1444,11 @@ Mon_Disassemble ; ************* JSR Get_LAC ; get 1st. parameter - BCS _nopar + BCS @nopar JSR LAC_To_LPC ; Long_PC = start address JSR Get_LAC ; Long_AC = end address BCC range -_nopar LDA #32 ; disassemble 32 bytes +@nopar LDA #32 ; disassemble 32 bytes STA Long_CT BRA @loop range JSR LAC_Minus_LPC ; Long_CT = range @@ -1496,48 +1492,48 @@ Print_Code ; check for Q instructions CMP #$42 ; NEG - BNE _nop + BNE @nop INY ; Y = 1 JSR Fetch CMP #$42 ; NEG - BNE _nop + BNE @nop SMB4 Op_Flag ; Q flag LDA #2 JSR Add_LPC ; skip NEG NEG ; check for 32 bit address mode -_nop LDY #0 +@nop LDY #0 JSR Fetch STA Op_Code TAX CMP #$ea ; prefix ? - BNE _normal + BNE @normal INY JSR Fetch ; opcode after prefix - AND #%0001 1111 ; identify ($nn),Z codes - CMP #%0001 0010 - BNE _normal + AND #%00011111 ; identify ($nn),Z codes + CMP #%00010010 + BNE @normal SMB5 Op_Flag ; set extended flag JSR Fetch STA Op_Code ; code after prefix TAX -_normal LDY LEN_ADM,X ; Y = length and address mode +@normal LDY LEN_ADM,X ; Y = length and address mode TYA ; A = length and address mode AND #15 ; A = address mode TAX ; X = address mode LDA ADMODE,X ; A = mode flags STA Adr_Flags ; store TYA ; A = length and address mode - AND #%1100 0000 ; mask instruction length + AND #%11000000 ; mask instruction length ASL A ; rotate into lower two bits ROL A ROL A STA Op_Size ; store - BBR5 Op_Flag,_norm1 + BBR5 Op_Flag,@norm1 INC Op_Size -_norm1 +@norm1 ; print instruction and operand bytes @@ -1545,39 +1541,39 @@ _norm1 LDA #' ' BBR4 Op_Flag,_blpr LDA #'*' ; print * for NEG NEG -_blpr JSR CHROUT -_lphex JSR Fetch +@blpr JSR CHROUT +@lphex JSR Fetch JSR Print_Hex_Blank CPY #2 - BEQ _long ; stop after 3 bytes + BEQ @long ; stop after 3 bytes CPY Op_Size INY - BCC _lphex + BCC @lphex ; fill up with blanks -_lpfill CPY #3 - BCS _long +@lpfill CPY #3 + BCS @long JSR PRIMM .BYTE " ",0 INY - BRA _lpfill + BRA @lpfill ; detect long branches -_long LDA #YELLOW +@long LDA #YELLOW JSR CHROUT LDX Op_Code LDA LEN_ADM,X - CMP #%1010 0000 ; long branch mode - BNE _locate + CMP #%10100000 ; long branch mode + BNE @locate SMB6 Op_Flag ; set long branch flag LDA #'L' JSR CHROUT ; locate mnemonic text -_locate LDX Op_Code ; X = opcode +@locate LDX Op_Code ; X = opcode LDY MNE_Index,X ; Y = index to mnemonic text LDA MNE_L,Y ; A = packed left part STA Long_AC+1 @@ -1587,38 +1583,38 @@ _locate LDX Op_Code ; X = opcode ; unpack and print mnemonic text LDX #3 ; 3 letters -_lpmne LDA #0 +@lpmne LDA #0 LDY #5 ; 5 bits per letter -_lplet ASL Long_AC +@lplet ASL Long_AC ROL Long_AC+1 ROL A ; rotate letter into A DEY - BNE _lplet ; next bit + BNE @lplet ; next bit ADC #$3f ; add offset (C = 0) DEX - BEQ _lastc ; 3rd. character + BEQ @lastc ; 3rd. character TAZ ; remember JSR CHROUT ; and print it - BRA _lpmne ; next letter + BRA @lpmne ; next letter -_lastc BBR4 Op_Flag,_lbra ; -> no Q +@lastc BBR4 Op_Flag,_lbra ; -> no Q CMP #'A' ; LDA, STA, ORA - BEQ _Q3 + BEQ @Q3 CMP #'C' ; DEC, INC - BNE _Q4 + BNE @Q4 CPZ #'E' ; DEC - BEQ _Q3 + BEQ @Q3 CPZ #'N' ; INC - BNE _Q4 -_Q3 LDA #'Q' ; LDQ, STQ, ORQ, INQ, DEQ + BNE @Q4 +@Q3 LDA #'Q' ; LDQ, STQ, ORQ, INQ, DEQ JSR CHROUT - BRA _mne4 -_Q4 JSR CHROUT + BRA @mne4 +@Q4 JSR CHROUT LDA #'Q' ; add Q as 4th. char JSR CHROUT - BRA _mne5 + BRA @mne5 -_lbra JSR CHROUT ; 3rd. character +@lbra JSR CHROUT ; 3rd. character BBS6 Op_Flag,_mne5 ; long branch ; check for 4-letter bit instructions @@ -1626,12 +1622,12 @@ _lbra JSR CHROUT ; 3rd. character LDA Op_Code AND #15 CMP #7 ; RMB & SMB - BEQ _biti + BEQ @biti CMP #15 ; BBR & BBS - BNE _mne4 + BNE @mne4 SMB7 Op_Flag ; flag two operands -_biti LDA Op_Code - AND #%0111 0000 +@biti LDA Op_Code + AND #%01110000 ASL A ROL A ROL A @@ -1639,10 +1635,10 @@ _biti LDA Op_Code ROL A ORA #'0' JSR CHROUT - BRA _mne5 + BRA @mne5 -_mne4 JSR Print_Blank -_mne5 JSR Print_Blank +@mne4 JSR Print_Blank +@mne5 JSR Print_Blank LDA #WHITE JSR CHROUT @@ -1650,20 +1646,20 @@ _mne5 JSR Print_Blank LDA Op_Code LDX #8 -_lpaccu DEX - BMI _oper +@lpaccu DEX + BMI @oper CMP ACCUMODE,X - BNE _lpaccu + BNE @lpaccu LDA #'A' BBR4 Op_Flag,_accu LDA #'Q' -_accu JSR CHROUT +@accu JSR CHROUT JMP @return ; fetch and decode operand -_oper LDX Op_Size +@oper LDX Op_Size LBEQ @return ; -> no operand BBR7 Adr_Flags,@laba ; bit 7: immediate @@ -1681,18 +1677,18 @@ _oper LDX Op_Size LDY #0 STY Long_AC+1 -_lpfop INY +@lpfop INY JSR Fetch STA Long_AC-1,Y CPY Op_Size - BCC _lpfop + BCC @lpfop ; interpret address modes LDX Op_Code LDA LEN_ADM,X - AND #%0010 0000 ; branches - LBNE _rel + AND #%00100000 ; branches + LBNE @rel ; print 16 bit operand hi/lo or 8 bit operand @@ -1703,13 +1699,13 @@ _lpfop INY JSR CHROUT BRA @labf -_proper LDY Op_Size +@proper LDY Op_Size BBR7 Op_Flag,_lpoper LDY #1 -_lpoper LDA Long_AC-1,Y +@lpoper LDA Long_AC-1,Y JSR Print_Hex DEY - BNE _lpoper + BNE @lpoper BBR5 Adr_Flags,@labe ; comma flag LDA #',' @@ -1740,7 +1736,7 @@ _comch BBR2 Adr_Flags,@labg ; , flag JSR CHROUT LDA Adr_Flags - AND #%0000 0011 ; $03 + AND #%00000011 ; $03 BEQ @labg TAY LDA Index_Char-1,Y @@ -1761,10 +1757,10 @@ _comch BBR2 Adr_Flags,@labg ; , flag DEY STY Op_Size ; Op_Size = 1 LDA #3 ; offset for relative address - BRA _rela + BRA @rela -_rel LDA #2 ; offset for relative address -_rela PHA +@rel LDA #2 ; offset for relative address +@rela PHA LDA Op_Size ; 1:short 2:long LSR A ROR A @@ -1774,9 +1770,9 @@ _rela PHA STA Long_AC+1 @labh PLX ; offset 2 or 3 -_lpinw INW Long_AC +@lpinw INW Long_AC DEX - BNE _lpinw + BNE @lpinw CLC LDA Long_AC @@ -1802,21 +1798,21 @@ Get_LAC ; ***** JSR Read_Number - BCS _error ; illegal character - BEQ _noval ; no value + BCS @error ; illegal character + BEQ @noval ; no value JSR Got_Char ; delimiter ? - BEQ _end ; end of input + BEQ @end ; end of input CMP #' ' - BEQ _ok + BEQ @ok CMP #',' - BEQ _ok -_error JMP Mon_Error ; stack is reset in Mon_Error + BEQ @ok +@error JMP Mon_Error ; stack is reset in Mon_Error -_noval SEC +@noval SEC RTS -_end DEC Buf_Index -_ok CLC +@end DEC Buf_Index +@ok CLC RTS ; ********* @@ -1834,36 +1830,36 @@ Read_Number STA Long_AC+3 JSR Get_Glyph ; get 1st. character - BEQ _exit + BEQ @exit CMP #APOSTR ; character entry 'C - BNE _numeric + BNE @numeric JSR Get_Char ; character after ' STA Long_AC INC Dig_Cnt - BRA _exit + BRA @exit -_numeric LDY #3 ; $ + % % -_prefix CMP Cons_Prefix,Y ; Y = base index - BEQ _digit ; -> valid prefix +@numeric LDY #3 ; $ + % % +@prefix CMP Cons_Prefix,Y ; Y = base index + BEQ @digit ; -> valid prefix DEY - BPL _prefix + BPL @prefix INY ; Y = 0 DEC Buf_Index ; character is digit -_digit JSR Get_Char ; hex -> BCD - BEQ _exit ; ? : ; and zero terminate +@digit JSR Get_Char ; hex -> BCD + BEQ @exit ; ? : ; and zero terminate CMP #'0' - BCC _exit + BCC @exit CMP #':' - BCC _valid ; 0-9 + BCC @valid ; 0-9 CMP #'A' - BCC _exit + BCC @exit CMP #'G' - BCS _exit + BCS @exit SBC #7 ; hex conversion -_valid SBC #'0'-1 +@valid SBC #'0'-1 CMP Num_Base,Y - BCS _error + BCS @error PHA ; push digit INC Dig_Cnt @@ -1871,45 +1867,45 @@ _valid SBC #'0'-1 BNE @laba LDX #3 ; push Long_AC * 2 CLC -_push LDA Long_AC,X +@push LDA Long_AC,X ROL A PHA DEX - BPL _push + BPL @push @laba LDX Num_Bits,Y -_shift ASL Long_AC +@shift ASL Long_AC ROL Long_AC+1 ROW Long_AC+2 - BCS _error ; overflow + BCS @error ; overflow DEX - BNE _shift + BNE @shift CPY #1 ; decimal adjustment BNE @labc LDX #0 LDZ #3 CLC -_pull PLA +@pull PLA ADC Long_AC,X STA Long_AC,X INX DEZ - BPL _pull + BPL @pull @labc PLA ; pull digit CLC ADC Long_AC STA Long_AC - BCC _digit + BCC @digit INC Long_AC+1 - BNE _digit + BNE @digit INW Long_AC+2 - BNE _digit + BNE @digit -_error SEC +@error SEC BRA @return -_exit CLC +@exit CLC @return PLZ PLY PLX @@ -1990,7 +1986,7 @@ A_To_Hex ; ****** PHA - JSR _nibble + JSR @nibble TAX PLA LSR A @@ -1998,7 +1994,7 @@ A_To_Hex LSR A LSR A -_nibble AND #15 +@nibble AND #15 CMP #10 BCC @lab ADC #6 @@ -2032,12 +2028,12 @@ Get_Char LDA Buffer,X CPX #1 PLX - BCC _regc + BCC @regc CMP #';' ; register BEQ @return CMP #'?' ; help BEQ @return -_regc CMP #0 +@regc CMP #0 BEQ @return CMP #':' @return RTS @@ -2049,9 +2045,9 @@ Dec_LCT LDA Long_CT ORA Long_CT+1 - BNE _skip + BNE @skip DEW Long_CT+2 -_skip DEW Long_CT +@skip DEW Long_CT LDA Long_CT+3 ; set N flag RTS @@ -2086,16 +2082,16 @@ Param_Range ; carry on exit flags error JSR Get_LAC ; get 1st. parameter - BCS _error + BCS @error JSR LAC_To_LPC ; Long_PC = 1st. address JSR Get_LAC - BCS _error + BCS @error JSR LAC_To_LDA ; Long_DA = 2nd. address JSR LAC_Minus_LPC ; Long_CT = range - BCC _error + BCC @error CLC RTS -_error SEC +@error SEC RTS ; ******* @@ -2121,10 +2117,10 @@ Converter BCC @loop JMP Main -Conv_Tab .WORD Print_Hexval - .WORD Print_Decimal - .WORD Print_Octal - .WORD Print_Dual +Conv_Tab !word Print_Hexval + !word Print_Decimal + !word Print_Octal + !word Print_Dual ; ******** Print_Dual @@ -2132,7 +2128,7 @@ Print_Dual LDX #24 ; digits LDY #1 ; bits per digit - BRA _entry + BRA Print_Octal_entry ; ********* Print_Octal @@ -2141,7 +2137,8 @@ Print_Octal LDX #8 ; digits LDY #3 ; bits per digit -_entry JSR LAC_To_LCT +Print_Octal_entry + JSR LAC_To_LCT LDZ #0 STZ Long_PC LDZ #'0' @@ -2155,10 +2152,10 @@ _entry JSR LAC_To_LCT DEY BNE @loopb CPX #1 ; print last character - BEQ _skip + BEQ @skip ORA Long_PC BEQ @next -_skip ORA #'0' +@skip ORA #'0' STZ Long_PC JSR CHROUT @next DEX @@ -2184,9 +2181,9 @@ Print_Decimal JSR LAC_To_LCT LDX #3 ; 4 BCD bytes = 8 digits LDA #0 -_clear STA Long_PC,X +@clear STA Long_PC,X DEX - BPL _clear + BPL @clear LDX #32 ; source bits SED @@ -2227,15 +2224,15 @@ Print_BCD BPL @loopb CPY #1 ; print last character - BEQ _skip + BEQ @skip ORA Long_CT BEQ @next -_skip ORA #'0' +@skip ORA #'0' STZ Long_CT CMP #$3a - BCC _print + BCC @print ADC #6 ; + carry -_print JSR CHROUT +@print JSR CHROUT @next DEY BNE @loopa RTS @@ -2258,11 +2255,11 @@ Mon_Disk TYA ; SA JSR SECOND @loop LDA Buffer,X - BEQ _close + BEQ @close JSR CIOUT INX BRA @loop -_close JSR UNLSN +@close JSR UNLSN LDA Long_CT CMP #'$' BNE Print_Disk_Status @@ -2314,11 +2311,11 @@ Print_Disk_Msg JSR Print_CR LDY #0 @loop LDA Disk_Msg,Y - BEQ _exit + BEQ @exit JSR CHROUT INY BRA @loop -_exit JMP Print_CR +@exit JMP Print_CR ; @[u] : print disk status for unit u ; @[u],$[=pattern] : print directory @@ -2333,28 +2330,28 @@ Mon_DOS LDX #8 ; default device JSR Get_Glyph CMP #'0' - BCC _unit + BCC @unit CMP #':' - BCS _unit + BCS @unit DEC Buf_Index JSR Read_Number - BCS _unit + BCS @unit LDX Long_AC ; unit CPX #4 LBCC Mon_Error CPX #31 LBCS Mon_Error -_unit STX FA +@unit STX FA DEC Buf_Index @next JSR Get_Char - BEQ _status ; only @u + BEQ @status ; only @u CMP #' ' BEQ @next CMP #',' BEQ @next CMP #'U' ; sector read/write BEQ DOS_U -_status JSR Mon_Disk +@status JSR Mon_Disk JMP Main ; ******* @@ -2373,7 +2370,7 @@ Directory @loopb TAX ; X = previous byte JSR ACPTR ; A = current byte LDY STATUS - BNE _exit + BNE @exit DEZ BNE @loopb ; X/A = last read word @@ -2385,18 +2382,18 @@ Directory JSR Print_Blank @loopc JSR ACPTR ; print file entry - BEQ _cr + BEQ @cr LDY STATUS - BNE _exit + BNE @exit JSR CHROUT BCC @loopc -_cr JSR Print_CR +@cr JSR Print_CR JSR STOP - BEQ _exit + BEQ @exit LDZ #4 BRA @loopb ; next file -_exit JMP UNTALK +@exit JMP UNTALK ; *** DOS_U @@ -2431,22 +2428,22 @@ DOS_U @loop LDA Mon_Data+1 LSR A - BEQ _write + BEQ @write JSR Find_next_Sector - BNE _error + BNE @error JSR Read_Sector BRA @next -_write JSR Write_Sector +@write JSR Write_Sector JSR Find_next_Sector - BNE _error + BNE @error @next JSR Inc_LPC_Page INC Disk_Sector DEW Long_CT BPL @loop -_error JSR Print_Disk_Msg +@error JSR Print_Disk_Msg JSR Close_Disk_Buffer JMP Main @@ -2459,7 +2456,7 @@ Find_next_Sector JSR Get_Disk_Status BEQ @return ; OK CMP #$66 ; illegal track or sector - BNE _error ; error + BNE @error ; error LDA #0 STA Disk_Sector INC Disk_Track ; try next track @@ -2467,7 +2464,7 @@ Find_next_Sector JSR Send_Disk_Command JSR Get_Disk_Status BEQ @return -_error JSR Print_Disk_Msg +@error JSR Print_Disk_Msg LDA Disk_Status @return RTS @@ -2489,11 +2486,11 @@ Reset_BP JSR Open_Command_Channel @loop LDA BP_ZERO,Y - BEQ _end + BEQ @end JSR CIOUT INY BRA @loop -_end JMP UNLSN +@end JMP UNLSN ; *************** Send_Disk_Command @@ -2501,11 +2498,11 @@ Send_Disk_Command JSR Open_Command_Channel @loop LDA Mon_Data,Y - BEQ _end + BEQ @end JSR CIOUT INY BRA @loop -_end JMP UNLSN +@end JMP UNLSN ; ********* Read_Sector @@ -2548,17 +2545,17 @@ Set_TS ; Input A = track or sector ; X = string index -_100 CMP #100 - BCC _10 +@100 CMP #100 + BCC @10 INC Mon_Data,X SBC #100 - BRA _100 -_10 CMP #10 - BCC _1 + BRA @100 +@10 CMP #10 + BCC @1 INC Mon_Data+1,X SBC #10 - BRA _10 -_1 ORA #'0' + BRA @10 +@1 ORA #'0' STA Mon_Data+2,X RTS @@ -2630,8 +2627,126 @@ Close_Disk_Buffer ; 00100 ; 0 ; -; The operator >" stores the left (high) byte of the packed value -; The operator <" stores the right (low) byte of the packed value + +!set ENC_A = %00010 +!set ENC_B = %00011 +!set ENC_C = %00100 +!set ENC_D = %00101 +!set ENC_E = %00110 +!set ENC_F = %00111 +!set ENC_G = %01000 +!set ENC_H = %01001 +!set ENC_I = %01010 +!set ENC_J = %01011 +!set ENC_K = %01100 +!set ENC_L = %01101 +!set ENC_M = %01110 +!set ENC_N = %01111 +!set ENC_O = %10000 +!set ENC_P = %10001 +!set ENC_Q = %10010 +!set ENC_R = %10011 +!set ENC_S = %11000 +!set ENC_T = %11001 +!set ENC_U = %11010 +!set ENC_V = %11011 +!set ENC_W = %11100 +!set ENC_X = %11101 +!set ENC_Y = %11110 +!set ENC_Z = %11111 + +!set ENC_ADC = ENC_A * 64 * 64 + ENC_D * 64 + ENC_C +!set ENC_AND = ENC_A * 64 * 64 + ENC_N * 64 + ENC_D +!set ENC_ASL = ENC_A * 64 * 64 + ENC_S * 64 + ENC_L +!set ENC_ASR = ENC_A * 64 * 64 + ENC_S * 64 + ENC_R +!set ENC_ASW = ENC_A * 64 * 64 + ENC_S * 64 + ENC_W +!set ENC_BBR = ENC_B * 64 * 64 + ENC_B * 64 + ENC_R +!set ENC_BBS = ENC_B * 64 * 64 + ENC_B * 64 + ENC_S +!set ENC_BCC = ENC_B * 64 * 64 + ENC_C * 64 + ENC_C +!set ENC_BCS = ENC_B * 64 * 64 + ENC_C * 64 + ENC_S +!set ENC_BEQ = ENC_B * 64 * 64 + ENC_E * 64 + ENC_Q +!set ENC_BIT = ENC_B * 64 * 64 + ENC_I * 64 + ENC_T +!set ENC_BMI = ENC_B * 64 * 64 + ENC_M * 64 + ENC_I +!set ENC_BNE = ENC_B * 64 * 64 + ENC_N * 64 + ENC_E +!set ENC_BPL = ENC_B * 64 * 64 + ENC_P * 64 + ENC_L +!set ENC_BRA = ENC_B * 64 * 64 + ENC_R * 64 + ENC_A +!set ENC_BRK = ENC_B * 64 * 64 + ENC_R * 64 + ENC_K +!set ENC_BSR = ENC_B * 64 * 64 + ENC_S * 64 + ENC_R +!set ENC_BVC = ENC_B * 64 * 64 + ENC_V * 64 + ENC_C +!set ENC_BVS = ENC_B * 64 * 64 + ENC_V * 64 + ENC_S +!set ENC_CLC = ENC_C * 64 * 64 + ENC_L * 64 + ENC_C +!set ENC_CLD = ENC_C * 64 * 64 + ENC_L * 64 + ENC_D +!set ENC_CLE = ENC_C * 64 * 64 + ENC_L * 64 + ENC_E +!set ENC_CLI = ENC_C * 64 * 64 + ENC_L * 64 + ENC_I +!set ENC_CLV = ENC_C * 64 * 64 + ENC_L * 64 + ENC_V +!set ENC_CMP = ENC_C * 64 * 64 + ENC_M * 64 + ENC_P +!set ENC_CPX = ENC_C * 64 * 64 + ENC_P * 64 + ENC_X +!set ENC_CPY = ENC_C * 64 * 64 + ENC_P * 64 + ENC_Y +!set ENC_CPZ = ENC_C * 64 * 64 + ENC_P * 64 + ENC_Z +!set ENC_DEC = ENC_D * 64 * 64 + ENC_E * 64 + ENC_C +!set ENC_DEW = ENC_D * 64 * 64 + ENC_E * 64 + ENC_W +!set ENC_DEX = ENC_D * 64 * 64 + ENC_E * 64 + ENC_X +!set ENC_DEY = ENC_D * 64 * 64 + ENC_E * 64 + ENC_Y +!set ENC_DEZ = ENC_D * 64 * 64 + ENC_E * 64 + ENC_Z +!set ENC_EOR = ENC_E * 64 * 64 + ENC_O * 64 + ENC_R +!set ENC_INC = ENC_I * 64 * 64 + ENC_N * 64 + ENC_C +!set ENC_INW = ENC_I * 64 * 64 + ENC_N * 64 + ENC_W +!set ENC_INX = ENC_I * 64 * 64 + ENC_N * 64 + ENC_X +!set ENC_INY = ENC_I * 64 * 64 + ENC_N * 64 + ENC_Y +!set ENC_INZ = ENC_I * 64 * 64 + ENC_N * 64 + ENC_Z +!set ENC_JMP = ENC_J * 64 * 64 + ENC_M * 64 + ENC_P +!set ENC_JSR = ENC_J * 64 * 64 + ENC_S * 64 + ENC_R +!set ENC_LDA = ENC_L * 64 * 64 + ENC_D * 64 + ENC_A +!set ENC_LDX = ENC_L * 64 * 64 + ENC_D * 64 + ENC_X +!set ENC_LDY = ENC_L * 64 * 64 + ENC_D * 64 + ENC_Y +!set ENC_LDZ = ENC_L * 64 * 64 + ENC_D * 64 + ENC_Z +!set ENC_LSR = ENC_L * 64 * 64 + ENC_S * 64 + ENC_R +!set ENC_MAP = ENC_M * 64 * 64 + ENC_A * 64 + ENC_P +!set ENC_NEG = ENC_N * 64 * 64 + ENC_E * 64 + ENC_G +!set ENC_NOP = ENC_N * 64 * 64 + ENC_O * 64 + ENC_P +!set ENC_ORA = ENC_O * 64 * 64 + ENC_R * 64 + ENC_A +!set ENC_PHA = ENC_P * 64 * 64 + ENC_H * 64 + ENC_A +!set ENC_PHP = ENC_P * 64 * 64 + ENC_H * 64 + ENC_P +!set ENC_PHW = ENC_P * 64 * 64 + ENC_H * 64 + ENC_W +!set ENC_PHX = ENC_P * 64 * 64 + ENC_H * 64 + ENC_X +!set ENC_PHY = ENC_P * 64 * 64 + ENC_H * 64 + ENC_Y +!set ENC_PHZ = ENC_P * 64 * 64 + ENC_H * 64 + ENC_Z +!set ENC_PLA = ENC_P * 64 * 64 + ENC_L * 64 + ENC_A +!set ENC_PLP = ENC_P * 64 * 64 + ENC_L * 64 + ENC_P +!set ENC_PLX = ENC_P * 64 * 64 + ENC_L * 64 + ENC_X +!set ENC_PLY = ENC_P * 64 * 64 + ENC_L * 64 + ENC_Y +!set ENC_PLZ = ENC_P * 64 * 64 + ENC_L * 64 + ENC_Z +!set ENC_RMB = ENC_R * 64 * 64 + ENC_M * 64 + ENC_B +!set ENC_ROL = ENC_R * 64 * 64 + ENC_O * 64 + ENC_L +!set ENC_ROR = ENC_R * 64 * 64 + ENC_O * 64 + ENC_R +!set ENC_ROW = ENC_R * 64 * 64 + ENC_O * 64 + ENC_W +!set ENC_RTI = ENC_R * 64 * 64 + ENC_T * 64 + ENC_I +!set ENC_RTS = ENC_R * 64 * 64 + ENC_T * 64 + ENC_S +!set ENC_SBC = ENC_S * 64 * 64 + ENC_B * 64 + ENC_C +!set ENC_SEC = ENC_S * 64 * 64 + ENC_E * 64 + ENC_C +!set ENC_SED = ENC_S * 64 * 64 + ENC_E * 64 + ENC_D +!set ENC_SEE = ENC_S * 64 * 64 + ENC_E * 64 + ENC_E +!set ENC_SEI = ENC_S * 64 * 64 + ENC_E * 64 + ENC_I +!set ENC_SMB = ENC_S * 64 * 64 + ENC_M * 64 + ENC_B +!set ENC_STA = ENC_S * 64 * 64 + ENC_T * 64 + ENC_A +!set ENC_STX = ENC_S * 64 * 64 + ENC_T * 64 + ENC_X +!set ENC_STY = ENC_S * 64 * 64 + ENC_T * 64 + ENC_Y +!set ENC_STZ = ENC_S * 64 * 64 + ENC_T * 64 + ENC_Z +!set ENC_TAB = ENC_T * 64 * 64 + ENC_A * 64 + ENC_B +!set ENC_TAX = ENC_T * 64 * 64 + ENC_A * 64 + ENC_X +!set ENC_TAY = ENC_T * 64 * 64 + ENC_A * 64 + ENC_Y +!set ENC_TAZ = ENC_T * 64 * 64 + ENC_A * 64 + ENC_Z +!set ENC_TBA = ENC_T * 64 * 64 + ENC_B * 64 + ENC_A +!set ENC_TRB = ENC_T * 64 * 64 + ENC_R * 64 + ENC_B +!set ENC_TSB = ENC_T * 64 * 64 + ENC_S * 64 + ENC_B +!set ENC_TSX = ENC_T * 64 * 64 + ENC_S * 64 + ENC_X +!set ENC_TSY = ENC_T * 64 * 64 + ENC_S * 64 + ENC_Y +!set ENC_TXA = ENC_T * 64 * 64 + ENC_X * 64 + ENC_A +!set ENC_TXS = ENC_T * 64 * 64 + ENC_X * 64 + ENC_S +!set ENC_TYA = ENC_T * 64 * 64 + ENC_Y * 64 + ENC_A +!set ENC_TYS = ENC_T * 64 * 64 + ENC_Y * 64 + ENC_S +!set ENC_TZA = ENC_T * 64 * 64 + ENC_Z * 64 + ENC_A + ; *** MNE_L @@ -2655,7 +2770,7 @@ MNE_L .BYTE >"BRK" .BYTE >"BSR" .BYTE >"BVC" - .BYTE >"BVS" + .BYTE >"BVS" .BYTE >"CLC" .BYTE >"CLD" .BYTE >"CLE" @@ -2832,38 +2947,38 @@ MNE_Index ; an index for all 256 opcodes, describing ; where to find the 3-letter mnemonic - .BYTE $0f,$31,$15,$46,$53,$31,$02,$3d - .BYTE $33,$31,$02,$55,$53,$31,$02,$05 - .BYTE $0d,$31,$31,$0d,$52,$31,$02,$3d - .BYTE $13,$31,$22,$26,$52,$31,$02,$05 - .BYTE $28,$01,$28,$28,$0a,$01,$3e,$3d - .BYTE $39,$01,$3e,$59,$0a,$01,$3e,$05 - .BYTE $0b,$01,$01,$0b,$0a,$01,$3e,$3d - .BYTE $44,$01,$1c,$20,$0a,$01,$3e,$05 - .BYTE $41,$21,$2f,$03,$03,$21,$2d,$3d - .BYTE $32,$21,$2d,$50,$27,$21,$2d,$05 - .BYTE $11,$21,$21,$11,$03,$21,$2d,$3d - .BYTE $16,$21,$36,$4d,$2e,$21,$2d,$05 - .BYTE $42,$00,$42,$10,$4c,$00,$3f,$3d - .BYTE $38,$00,$3f,$5a,$27,$00,$3f,$05 - .BYTE $12,$00,$00,$12,$4c,$00,$3f,$3d - .BYTE $47,$00,$3b,$51,$27,$00,$3f,$05 - .BYTE $0e,$49,$49,$0e,$4b,$49,$4a,$48 - .BYTE $1f,$0a,$56,$4b,$4b,$49,$4a,$06 - .BYTE $07,$49,$49,$07,$4b,$49,$4a,$48 - .BYTE $58,$49,$57,$4a,$4c,$49,$4c,$06 - .BYTE $2b,$29,$2a,$2c,$2b,$29,$2a,$48 - .BYTE $4f,$29,$4e,$2c,$2b,$29,$2a,$06 - .BYTE $08,$29,$29,$08,$2b,$29,$2a,$48 - .BYTE $17,$29,$54,$2c,$2b,$29,$2a,$06 - .BYTE $1a,$18,$1b,$1d,$1a,$18,$1c,$48 - .BYTE $25,$18,$1e,$04,$1a,$18,$1c,$06 - .BYTE $0c,$18,$18,$0c,$1b,$18,$1c,$48 - .BYTE $14,$18,$35,$37,$1b,$18,$1c,$06 - .BYTE $19,$43,$29,$23,$19,$43,$22,$48 - .BYTE $24,$43,$30,$40,$19,$43,$22,$06 - .BYTE $09,$43,$43,$09,$34,$43,$22,$48 - .BYTE $45,$43,$3a,$3c,$34,$43,$22,$06 + !byte $0f,$31,$15,$46,$53,$31,$02,$3d + !byte $33,$31,$02,$55,$53,$31,$02,$05 + !byte $0d,$31,$31,$0d,$52,$31,$02,$3d + !byte $13,$31,$22,$26,$52,$31,$02,$05 + !byte $28,$01,$28,$28,$0a,$01,$3e,$3d + !byte $39,$01,$3e,$59,$0a,$01,$3e,$05 + !byte $0b,$01,$01,$0b,$0a,$01,$3e,$3d + !byte $44,$01,$1c,$20,$0a,$01,$3e,$05 + !byte $41,$21,$2f,$03,$03,$21,$2d,$3d + !byte $32,$21,$2d,$50,$27,$21,$2d,$05 + !byte $11,$21,$21,$11,$03,$21,$2d,$3d + !byte $16,$21,$36,$4d,$2e,$21,$2d,$05 + !byte $42,$00,$42,$10,$4c,$00,$3f,$3d + !byte $38,$00,$3f,$5a,$27,$00,$3f,$05 + !byte $12,$00,$00,$12,$4c,$00,$3f,$3d + !byte $47,$00,$3b,$51,$27,$00,$3f,$05 + !byte $0e,$49,$49,$0e,$4b,$49,$4a,$48 + !byte $1f,$0a,$56,$4b,$4b,$49,$4a,$06 + !byte $07,$49,$49,$07,$4b,$49,$4a,$48 + !byte $58,$49,$57,$4a,$4c,$49,$4c,$06 + !byte $2b,$29,$2a,$2c,$2b,$29,$2a,$48 + !byte $4f,$29,$4e,$2c,$2b,$29,$2a,$06 + !byte $08,$29,$29,$08,$2b,$29,$2a,$48 + !byte $17,$29,$54,$2c,$2b,$29,$2a,$06 + !byte $1a,$18,$1b,$1d,$1a,$18,$1c,$48 + !byte $25,$18,$1e,$04,$1a,$18,$1c,$06 + !byte $0c,$18,$18,$0c,$1b,$18,$1c,$48 + !byte $14,$18,$35,$37,$1b,$18,$1c,$06 + !byte $19,$43,$29,$23,$19,$43,$22,$48 + !byte $24,$43,$30,$40,$19,$43,$22,$06 + !byte $09,$43,$43,$09,$34,$43,$22,$48 + !byte $45,$43,$3a,$3c,$34,$43,$22,$06 ; *** BRAIN @@ -2872,7 +2987,7 @@ BRAIN ; index values for branch mnemonics ; BCC BCS BEQ BMI BNE BPL BRA BSR BVC BVS - .BYTE $07,$08,$09,$0b,$0c,$0d,$0e,$10,$11,$12 + !byte $07,$08,$09,$0b,$0c,$0d,$0e,$10,$11,$12 ; ***** LEN_ADM From a8d6420f74d0169ff9f8430912966d69a27c7984 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 11 Dec 2020 23:40:08 +0100 Subject: [PATCH 014/257] BSMON adaptations --- src/mon_m65/bsmon.s | 210 ++++++-------------------------------------- 1 file changed, 27 insertions(+), 183 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 80773079..23d80208 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -2746,199 +2746,43 @@ Close_Disk_Buffer !set ENC_TYA = ENC_T * 64 * 64 + ENC_Y * 64 + ENC_A !set ENC_TYS = ENC_T * 64 * 64 + ENC_Y * 64 + ENC_S !set ENC_TZA = ENC_T * 64 * 64 + ENC_Z * 64 + ENC_A - + ; *** MNE_L ; *** - .BYTE >"ADC" - .BYTE >"AND" - .BYTE >"ASL" - .BYTE >"ASR" - .BYTE >"ASW" - .BYTE >"BBR" - .BYTE >"BBS" - .BYTE >"BCC" - .BYTE >"BCS" - .BYTE >"BEQ" - .BYTE >"BIT" - .BYTE >"BMI" - .BYTE >"BNE" - .BYTE >"BPL" - .BYTE >"BRA" - .BYTE >"BRK" - .BYTE >"BSR" - .BYTE >"BVC" - .BYTE >"BVS" - .BYTE >"CLC" - .BYTE >"CLD" - .BYTE >"CLE" - .BYTE >"CLI" - .BYTE >"CLV" - .BYTE >"CMP" - .BYTE >"CPX" - .BYTE >"CPY" - .BYTE >"CPZ" - .BYTE >"DEC" - .BYTE >"DEW" - .BYTE >"DEX" - .BYTE >"DEY" - .BYTE >"DEZ" - .BYTE >"EOR" - .BYTE >"INC" - .BYTE >"INW" - .BYTE >"INX" - .BYTE >"INY" - .BYTE >"INZ" - .BYTE >"JMP" - .BYTE >"JSR" - .BYTE >"LDA" - .BYTE >"LDX" - .BYTE >"LDY" - .BYTE >"LDZ" - .BYTE >"LSR" - .BYTE >"MAP" - .BYTE >"NEG" - .BYTE >"NOP" - .BYTE >"ORA" - .BYTE >"PHA" - .BYTE >"PHP" - .BYTE >"PHW" - .BYTE >"PHX" - .BYTE >"PHY" - .BYTE >"PHZ" - .BYTE >"PLA" - .BYTE >"PLP" - .BYTE >"PLX" - .BYTE >"PLY" - .BYTE >"PLZ" - .BYTE >"RMB" - .BYTE >"ROL" - .BYTE >"ROR" - .BYTE >"ROW" - .BYTE >"RTI" - .BYTE >"RTS" - .BYTE >"SBC" - .BYTE >"SEC" - .BYTE >"SED" - .BYTE >"SEE" - .BYTE >"SEI" - .BYTE >"SMB" - .BYTE >"STA" - .BYTE >"STX" - .BYTE >"STY" - .BYTE >"STZ" - .BYTE >"TAB" - .BYTE >"TAX" - .BYTE >"TAY" - .BYTE >"TAZ" - .BYTE >"TBA" - .BYTE >"TRB" - .BYTE >"TSB" - .BYTE >"TSX" - .BYTE >"TSY" - .BYTE >"TXA" - .BYTE >"TXS" - .BYTE >"TYA" - .BYTE >"TYS" - .BYTE >"TZA" + !byte ENC_ADC, >ENC_AND, >ENC_ASL, >ENC_ASR, >ENC_ASW, >ENC_BBR, >ENC_BBS, >ENC_BCC + !byte >ENC_BCS, >ENC_BEQ, >ENC_BIT, >ENC_BMI, >ENC_BNE, >ENC_BPL, >ENC_BRA, >ENC_BRK + !byte >ENC_BSR, >ENC_BVC, >ENC_BVS, >ENC_CLC, >ENC_CLD, >ENC_CLE, >ENC_CLI, >ENC_CLV + !byte >ENC_CMP, >ENC_CPX, >ENC_CPY, >ENC_CPZ, >ENC_DEC, >ENC_DEW, >ENC_DEX, >ENC_DEY + !byte >ENC_DEZ, >ENC_EOR, >ENC_INC, >ENC_INW, >ENC_INX, >ENC_INY, >ENC_INZ, >ENC_JMP + !byte >ENC_JSR, >ENC_LDA, >ENC_LDX, >ENC_LDY, >ENC_LDZ, >ENC_LSR, >ENC_MAP, >ENC_NEG + !byte >ENC_NOP, >ENC_ORA, >ENC_PHA, >ENC_PHP, >ENC_PHW, >ENC_PHX, >ENC_PHY, >ENC_PHZ + !byte >ENC_PLA, >ENC_PLP, >ENC_PLX, >ENC_PLY, >ENC_PLZ, >ENC_RMB, >ENC_ROL, >ENC_ROR + !byte >ENC_ROW, >ENC_RTI, >ENC_RTS, >ENC_SBC, >ENC_SEC, >ENC_SED, >ENC_SEE, >ENC_SEI + !byte >ENC_SMB, >ENC_STA, >ENC_STX, >ENC_STY, >ENC_STZ, >ENC_TAB, >ENC_TAX, >ENC_TAY + !byte >ENC_TAZ, >ENC_TBA, >ENC_TRB, >ENC_TSB, >ENC_TSX, >ENC_TSY, >ENC_TXA, >ENC_TXS + !byte >ENC_TYA, >ENC_TYS, >ENC_TZA + ; ******* MNE_Index From ac2e7d2d5e4ca4e2e23e48dc6dd6538eb20d78f5 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 14 Dec 2020 10:28:59 +0100 Subject: [PATCH 015/257] BSMON adaptations --- src/mon_m65/bsmon.s | 62 ++++++++++++++++++++++----------------------- 1 file changed, 31 insertions(+), 31 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 23d80208..06d1283c 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -1325,7 +1325,7 @@ Mon_Assemble STA [Long_PC],Z @print JSR PRIMM - .BYTE 13,$91,"A \eQ",0 + !byte 13,$91,"A ", KEY_ESC, "Q",0 JSR Print_Code INC Op_Size LDA Op_Size @@ -1336,7 +1336,7 @@ Mon_Assemble ; for easy entry of next assembler instruction JSR PRIMM - .BYTE CR,"A ",0 + !pet CR,"a ",0 LDA #'A' STA Buffer @@ -1473,7 +1473,7 @@ Dis_Code ; ****** JSR PRIMM - .BYTE ". ",0 + !pet ". ",0 ; ******** Print_Code @@ -1555,7 +1555,7 @@ Print_Code @lpfill CPY #3 BCS @long JSR PRIMM - .BYTE " ",0 + !pet " ",0 INY BRA @lpfill @@ -1967,7 +1967,7 @@ CR_Erase ; ****** JSR PRIMM - .BYTE "\r\eQ",0 + !pet KEY_RETURN, KEY_ESC, "q",0 RTS ; ******* @@ -2925,17 +2925,17 @@ ACCUMODE !byte $0a,$1a,$2a,$3a,$4a,$6a,$42,$43 Num_Base !byte 16,10, 8, 2 ; hex, dec, oct, bin Num_Bits !byte 4, 3, 3, 1 ; hex, dec, oct, bin -Index_Char .BYTE "XYZ" +Index_Char !pet "xyz" -; 0123456789abcd -U1 .BYTE "U1:9 0 000 000",0 ; channel 9, drive, track, sector -BP_ZERO .BYTE "B-P 9 0",0 ; set buffer pointer to 0 +; 0123456789abcd +U1 !pet "u1:9 0 000 000",0 ; channel 9, drive, track, sector +BP_ZERO !pet "b-p 9 0",0 ; set buffer pointer to 0 ; ****** Reg_Text ; ****** JSR PRIMM - .BYTE "\r PC SR AC XR YR ZR BP SP NVEBDIZC\r; \eQ",0 + !pet KEY_RETURN, " pc sr ac xr yr zr bp sp nvebdizc", KEY_RETURN, "; ", KEY_ESC, "q",0 RTS ; ****** @@ -2943,27 +2943,27 @@ Mon_Help ; ****** JSR PRIMM - .BYTE LRED,"A",WHITE,"SSEMBLE - A ADDRESS MNEMONIC OPERAND",CR - .BYTE LRED,"B",WHITE,"ITMAPS - B [FROM [TO]]",CR - .BYTE LRED,"C",WHITE,"OMPARE - C FROM TO WITH",CR - .BYTE LRED,"D",WHITE,"ISASSEMBLE - D [FROM [TO]]",CR - .BYTE LRED,"F",WHITE,"ILL - F FROM TO FILLBYTE",CR - .BYTE LRED,"G",WHITE,"O - G [ADDRESS]",CR - .BYTE LRED,"H",WHITE,"UNT - H FROM TO (STRING OR BYTES)",CR - .BYTE LRED,"J",WHITE,"SR - J ADDRESS",CR - .BYTE LRED,"L",WHITE,"OAD - L FILENAME [UNIT [ADDRESS]]",CR - .BYTE LRED,"M",WHITE,"EMORY - M [FROM [TO]]",CR - .BYTE LRED,"R",WHITE,"EGISTERS - R",CR - .BYTE LRED,"S",WHITE,"AVE - S FILENAME UNIT FROM TO",CR - .BYTE LRED,"T",WHITE,"RANSFER - T FROM TO TARGET",CR - .BYTE LRED,"V",WHITE,"ERIFY - V FILENAME [UNIT [ADDRESS]]",CR - .BYTE "E",LRED,"X",WHITE,"IT - X",CR - .BYTE LRED,".",WHITE," - . ADDRESS MNEMONIC OPERAND",CR - .BYTE LRED,">",WHITE," - > ADDRESS BYTE SEQUENCE",CR - .BYTE LRED,";",WHITE," - ; REGISTER CONTENTS",CR - .BYTE LRED,"@",WHITE,"DOS - @ [DOS COMMAND]",CR - .BYTE LRED,"?",WHITE,"HELP - ?",CR - .BYTE 0 + !pet LRED,"a",WHITE,"ssemble - a address mnemonic operand",CR + !pet LRED,"b",WHITE,"itmaps - b [from [to]]",CR + !pet LRED,"c",WHITE,"ompare - c from to with",CR + !pet LRED,"d",WHITE,"isassemble - d [from [to]]",CR + !pet LRED,"f",WHITE,"ill - f from to fillbyte",CR + !pet LRED,"g",WHITE,"o - g [address]",CR + !pet LRED,"h",WHITE,"unt - h from to (string or bytes)",CR + !pet LRED,"j",WHITE,"sr - j address",CR + !pet LRED,"l",WHITE,"oad - l filename [uniy [address]]",CR + !pet LRED,"m",WHITE,"emory - m [from [to]]",CR + !pet LRED,"r",WHITE,"egisters - r",CR + !pet LRED,"s",WHITE,"ave - s filename unit from to",CR + !pet LRED,"t",WHITE,"ransfer - t from to target",CR + !pet LRED,"v",WHITE,"erify - v filename [unit [address]]",CR + !pet "e",LRED,"x",WHITE,"it - x",CR + !pet LRED,".",WHITE," - . address mnemonic operand",CR + !pet LRED,">",WHITE," - > address byte sequence",CR + !pet LRED,";",WHITE," - ; register contents",CR + !pet LRED,"@",WHITE,"dos - @ [dos command]",CR + !pet LRED,"?",WHITE,"help - ?",CR + !pet 0 JMP Main } From 017711e2b2c17533455c4f665c1ce5bf84f9a66a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 14 Dec 2020 10:57:05 +0100 Subject: [PATCH 016/257] various BSMON compilation fixes --- src/mon_m65/,glue.s | 3 + src/mon_m65/bsmon.s | 230 ++++++++++++++++++++++---------------------- 2 files changed, 119 insertions(+), 114 deletions(-) create mode 100644 src/mon_m65/,glue.s diff --git a/src/mon_m65/,glue.s b/src/mon_m65/,glue.s new file mode 100644 index 00000000..6ed67511 --- /dev/null +++ b/src/mon_m65/,glue.s @@ -0,0 +1,3 @@ + + +!macro NOP { eom } diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 06d1283c..0115cec7 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -83,11 +83,8 @@ !addr BA = $bd !addr FNBANK = $be -!addr NDX = $d0 ; length of keyboard buffer !addr MODE_80 = $d7 ; 80 column / 40 volumn flag -!addr QTSW = $f4 ; Quote switch - !addr Buffer = $0200 ; input buffer !addr IIRQ = $0314 @@ -106,11 +103,11 @@ !addr Disk_Sector = $40A ; logical sector 0 -> 255 !addr Disk_Status = $40B ; BCD value of status -Mon_Data .BSS 40 ; buffer for hunt and filename -Disk_Msg .BSS 40 ; disk status as text message +Mon_Data = $410 ; 40 bytes, buffer for hunt and filename +Disk_Msg = $440 ; 40 bytes, disk status as text message -!addr EXIT_OLD = $cf2e ; exit address for ROM 910110 -!addr EXIT = $cfa4 ; exit address for ROM 911001 +!addr EXIT_OLD = $cf2e ; exit address for ROM 910110 +!addr EXIT = $cfa4 ; exit address for ROM 911001 !addr PRIMM = $ff7d !addr CINT = $ff81 @@ -139,7 +136,7 @@ Mon_Break ; ******* JSR PRIMM - .BYTE "\rBREAK\a",0 + !pet KEY_RETURN, "break",0 ; ; XXX what is '\a'? JSR Print_Commands ; pull BP, Z, Y, X, A,SR,PCL,PCH @@ -207,7 +204,7 @@ Mon_Start LDA #$c0 JSR SETMSG CLI - NOP + +NOP ; ********** Mon_Register @@ -243,7 +240,7 @@ Mon_Register LDY #8 LDA SR -@loopc ASL A +@loopc ASL PHA LDA #'-' BCC @flag @@ -301,7 +298,7 @@ Mon_Error ; put a question mark at the end of the text JSR PRIMM - .BYTE "\eO",CRIGHT,'?',0 + !pet KEY_ESC, "o",CRIGHT,'?',0 LDX #$f8 ; reset stack pointer TXS BRA Main @@ -314,7 +311,7 @@ Mon_Select CPX #22 LBCS Load_Save TXA - ASL A + ASL TAX JMP (Jump_Table,X) @@ -323,26 +320,26 @@ Print_Commands ; ************ JSR PRIMM - .BYTE CR,YELLOW,REV,"BS MONITOR COMMANDS:" + !pet CR,YELLOW,REV,"bs monitor commands:" ; ********** Command_Char ; ********** - ; 0123456789abcdef - .BYTE "ABCDFGHJMRTX@.>;?" + ; 0123456789abcdef + !pet "abcdfghjmrtx@.>;?" ; ********* Cons_Prefix ; ********* - .BYTE "$+&%'" + !pet "$+&%'" ; ************** Load_Save_Verify ; ************** - .BYTE "LSV",WHITE,0 + !pet "lsv",WHITE,0 RTS ; ******** @@ -531,7 +528,7 @@ Fetch TYA TAZ BBS7 Long_PC+3,@banked ; trigger banked access - NOP ; use LDA [Long_PC],Z + +NOP ; use LDA [Long_PC],Z @banked LDA (Long_PC),Z PLZ AND #$ff @@ -647,7 +644,7 @@ Mon_Set_Memory BCS @exit LDA Long_AC BBS7 Long_PC+3,@banked ; trigger banked access - NOP ; use STA [Long_PC],Z + +NOP ; use STA [Long_PC],Z @banked STA (Long_PC),Z INZ CPZ #16 @@ -656,8 +653,8 @@ Mon_Set_Memory @next BCC @loop @exit JSR PRIMM - .BYTE "\eO" - .BYTE $91,$00 + !pet KEY_ESC, "o" + !pet $91,$00 JSR Dump_Row JMP Main @@ -665,24 +662,28 @@ Mon_Set_Memory Mon_Go ; **** - JSR Get_LAC ; get 1st. parameter - JSR LAC_To_PC - LDX SPL - TXS - JMP JMPFAR + ; XXX to be rewritten for Open ROMs! + rts + ; JSR Get_LAC ; get 1st. parameter + ; JSR LAC_To_PC + ; LDX SPL + ; TXS + ; JMP JMPFAR ; ***** Mon_JSR ; ***** - JSR Get_LAC ; get 1st. parameter - JSR LAC_To_PC - LDX SPL - TXS - JSR JSRFAR - TSX - STX SPL - JMP Main + ; XXX to be rewritten for Open ROMs! + rts + ; JSR Get_LAC ; get 1st. parameter + ; JSR LAC_To_PC + ; LDX SPL + ; TXS + ; JSR JSRFAR + ; TSX + ; STX SPL + ; JMP Main ; ********** Dump_4_Bytes @@ -690,7 +691,7 @@ Dump_4_Bytes JSR CHROUT ; colour @loop BBS7 Long_PC+3,@banked ; trigger banked access - NOP ; use LDA [Long_PC],Z + +NOP ; use LDA [Long_PC],Z @banked LDA (Long_PC),Z JSR Print_Hex_Blank INZ @@ -707,7 +708,7 @@ Dump_4_Chars STY QTSW ; disable quote mode JSR CHROUT ; colour @loop BBS7 Long_PC+3,@banked ; trigger banked access - NOP ; use LDA [Long_PC],Z + +NOP ; use LDA [Long_PC],Z @banked LDA (Long_PC),Z TAY AND #%01100000 @@ -743,7 +744,7 @@ Dump_Row BNE @loop JSR PRIMM - .BYTE $3a,$12,$00 ; : reverse on + !byte $3a,$12,$00 ; : reverse on LDZ #0 LDX #2 ; 4 blocks in 80 columns @@ -936,7 +937,7 @@ Load_Save LBEQ Mon_Error LBCS Main JSR PRIMM - .BYTE " ERROR",0 + !pet " error",0 JMP Main @load LDX Long_PC @@ -1006,7 +1007,7 @@ Mon_Assemble SEC SBC #$3f ; offset LDY #5 ; 5 bit code -@lpbit LSR A +@lpbit LSR ROR Long_DA ROR Long_DA+1 DEY @@ -1051,10 +1052,10 @@ Mon_Assemble LBCC Mon_Error CMP #'8' LBCS Mon_Error - ASL A - ASL A - ASL A - ASL A + ASL + ASL + ASL + ASL ORA Op_Code STA Op_Code @@ -1154,7 +1155,7 @@ Mon_Assemble @rbra CMP #']' BNE @right - BBR5 Op_Flag,_error + BBR5 Op_Flag,@error LDA Op_Ix LBEQ Mon_Error ; no value LDA Mode_Flags @@ -1267,7 +1268,7 @@ Mon_Assemble JSR Branch_Target LDA Op_Code LDY #1 ; short branch - BBR6 Op_Flag,_bran1 + BBR6 Op_Flag,@bran1 INY ; long branch ORA #3 @bran1 BRA @store @@ -1325,7 +1326,7 @@ Mon_Assemble STA [Long_PC],Z @print JSR PRIMM - !byte 13,$91,"A ", KEY_ESC, "Q",0 + !pet 13,$91,"a ", KEY_ESC, "q",0 JSR Print_Code INC Op_Size LDA Op_Size @@ -1374,7 +1375,7 @@ Branch_Target ; *********** DEW Long_AC - DEC A + DEC BNE Branch_Target ; Target - PC @@ -1431,9 +1432,9 @@ Size_To_Mode ; ********** LDA Op_Len - LSR A - ROR A - ROR A + LSR + ROR + ROR ORA Mode_Flags STA Mode_Flags LDX #0 @@ -1447,11 +1448,11 @@ Mon_Disassemble BCS @nopar JSR LAC_To_LPC ; Long_PC = start address JSR Get_LAC ; Long_AC = end address - BCC range + BCC @range @nopar LDA #32 ; disassemble 32 bytes STA Long_CT BRA @loop -range JSR LAC_Minus_LPC ; Long_CT = range +@range JSR LAC_Minus_LPC ; Long_CT = range LBCC Mon_Error ; -> negative @loop JSR CR_Erase ; prepare empty line @@ -1527,9 +1528,9 @@ Print_Code STA Adr_Flags ; store TYA ; A = length and address mode AND #%11000000 ; mask instruction length - ASL A ; rotate into lower two bits - ROL A - ROL A + ASL ; rotate into lower two bits + ROL + ROL STA Op_Size ; store BBR5 Op_Flag,@norm1 INC Op_Size @@ -1539,7 +1540,7 @@ Print_Code LDY #0 LDA #' ' - BBR4 Op_Flag,_blpr + BBR4 Op_Flag,@blpr LDA #'*' ; print * for NEG NEG @blpr JSR CHROUT @lphex JSR Fetch @@ -1587,7 +1588,7 @@ Print_Code LDY #5 ; 5 bits per letter @lplet ASL Long_AC ROL Long_AC+1 - ROL A ; rotate letter into A + ROL ; rotate letter into A DEY BNE @lplet ; next bit ADC #$3f ; add offset (C = 0) @@ -1597,7 +1598,7 @@ Print_Code JSR CHROUT ; and print it BRA @lpmne ; next letter -@lastc BBR4 Op_Flag,_lbra ; -> no Q +@lastc BBR4 Op_Flag,@lbra ; -> no Q CMP #'A' ; LDA, STA, ORA BEQ @Q3 CMP #'C' ; DEC, INC @@ -1615,7 +1616,7 @@ Print_Code BRA @mne5 @lbra JSR CHROUT ; 3rd. character - BBS6 Op_Flag,_mne5 ; long branch + BBS6 Op_Flag,@mne5 ; long branch ; check for 4-letter bit instructions @@ -1628,11 +1629,11 @@ Print_Code SMB7 Op_Flag ; flag two operands @biti LDA Op_Code AND #%01110000 - ASL A - ROL A - ROL A - ROL A - ROL A + ASL + ROL + ROL + ROL + ROL ORA #'0' JSR CHROUT BRA @mne5 @@ -1652,7 +1653,7 @@ Print_Code BNE @lpaccu LDA #'A' - BBR4 Op_Flag,_accu + BBR4 Op_Flag,@accu LDA #'Q' @accu JSR CHROUT JMP @return @@ -1692,7 +1693,7 @@ Print_Code ; print 16 bit operand hi/lo or 8 bit operand - BBR5 Op_Flag,_proper + BBR5 Op_Flag,@proper LDA Long_AC+1 JSR Print_Hex ; [$nn],Z LDA #']' @@ -1700,7 +1701,7 @@ Print_Code BRA @labf @proper LDY Op_Size - BBR7 Op_Flag,_lpoper + BBR7 Op_Flag,@lpoper LDY #1 @lpoper LDA Long_AC-1,Y JSR Print_Hex @@ -1725,13 +1726,13 @@ Print_Code LDA #')' JSR CHROUT -@labf BBR4 Op_Flag,_comch ; not a Q instruction +@labf BBR4 Op_Flag,@comch ; not a Q instruction LDA Adr_Flags AND #3 CMP #1 BNE @return ; Q only with ,X -_comch BBR2 Adr_Flags,@labg ; , flag +@comch BBR2 Adr_Flags,@labg ; , flag LDA #',' JSR CHROUT @@ -1762,8 +1763,8 @@ _comch BBR2 Adr_Flags,@labg ; , flag @rel LDA #2 ; offset for relative address @rela PHA LDA Op_Size ; 1:short 2:long - LSR A - ROR A + LSR + ROR AND Long_AC BPL @labh LDA #$ff ; backward branch @@ -1868,7 +1869,7 @@ Read_Number LDX #3 ; push Long_AC * 2 CLC @push LDA Long_AC,X - ROL A + ROL PHA DEX BPL @push @@ -1989,10 +1990,10 @@ A_To_Hex JSR @nibble TAX PLA - LSR A - LSR A - LSR A - LSR A + LSR + LSR + LSR + LSR @nibble AND #15 CMP #10 @@ -2058,16 +2059,17 @@ Add_LPC CLC ADC Long_PC STA Long_PC - BCC @return + BCC Inc_LPC_Page_return ; ********** Inc_LPC_Page ; ********** INC Long_PC+1 - BNE @return + BNE Inc_LPC_Page_return INW Long_PC+2 -@return RTS +Inc_LPC_Page_return + RTS ; ********* Param_Range @@ -2108,7 +2110,7 @@ Converter LDA Cons_Prefix,X JSR CHROUT TXA - ASL A + ASL TAX JSR (Conv_Tab,X) PLX @@ -2148,7 +2150,7 @@ Print_Octal_entry LDA #0 @loopb ASL Long_CT ROW Long_CT+1 - ROL A + ROL DEY BNE @loopb CPX #1 ; print last character @@ -2219,7 +2221,7 @@ Print_BCD @loopb ASL Long_PC ROL Long_PC+1 ROW Long_PC+2 - ROL A + ROL DEX BPL @loopb @@ -2275,10 +2277,10 @@ Get_Disk_Status JSR TKSA JSR ACPTR ; 1st. digit STA Disk_Msg - ASL A - ASL A - ASL A - ASL A + ASL + ASL + ASL + ASL STA Disk_Status ; BCD JSR ACPTR ; 2nd. digit STA Disk_Msg+1 @@ -2427,7 +2429,7 @@ DOS_U JSR Open_Disk_Buffer @loop LDA Mon_Data+1 - LSR A + LSR BEQ @write JSR Find_next_Sector BNE @error @@ -2628,32 +2630,32 @@ Close_Disk_Buffer ; 0 ; -!set ENC_A = %00010 -!set ENC_B = %00011 -!set ENC_C = %00100 -!set ENC_D = %00101 -!set ENC_E = %00110 -!set ENC_F = %00111 -!set ENC_G = %01000 -!set ENC_H = %01001 -!set ENC_I = %01010 -!set ENC_J = %01011 -!set ENC_K = %01100 -!set ENC_L = %01101 -!set ENC_M = %01110 -!set ENC_N = %01111 -!set ENC_O = %10000 -!set ENC_P = %10001 -!set ENC_Q = %10010 -!set ENC_R = %10011 -!set ENC_S = %11000 -!set ENC_T = %11001 -!set ENC_U = %11010 -!set ENC_V = %11011 -!set ENC_W = %11100 -!set ENC_X = %11101 -!set ENC_Y = %11110 -!set ENC_Z = %11111 +!set ENC_A = %00000010 +!set ENC_B = %00000011 +!set ENC_C = %00000100 +!set ENC_D = %00000101 +!set ENC_E = %00000110 +!set ENC_F = %00000111 +!set ENC_G = %00001000 +!set ENC_H = %00001001 +!set ENC_I = %00001010 +!set ENC_J = %00001011 +!set ENC_K = %00001100 +!set ENC_L = %00001101 +!set ENC_M = %00001110 +!set ENC_N = %00001111 +!set ENC_O = %00010000 +!set ENC_P = %00010001 +!set ENC_Q = %00010010 +!set ENC_R = %00010011 +!set ENC_S = %00011000 +!set ENC_T = %00011001 +!set ENC_U = %00011010 +!set ENC_V = %00011011 +!set ENC_W = %00011100 +!set ENC_X = %00011101 +!set ENC_Y = %00011110 +!set ENC_Z = %00011111 !set ENC_ADC = ENC_A * 64 * 64 + ENC_D * 64 + ENC_C !set ENC_AND = ENC_A * 64 * 64 + ENC_N * 64 + ENC_D @@ -2852,7 +2854,7 @@ LEN_ADM ; 3-0: index of address mode - ( %11...... BBR BBS) +; ( %11...... BBR BBS) !byte $00,$44,$00,$00,$40,$40,$40,$40 ; $00 !byte $00,$41,$00,$00,$80,$80,$80,$c0 ; $08 From 688213032e4b3c1007f6333eaf999fd712de5ad8 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 14 Dec 2020 11:36:39 +0100 Subject: [PATCH 017/257] replaced BSMON constants with Open ROMs ones --- src/mon_m65/{,glue.s => ,aliases_glue.s} | 0 src/mon_m65/bsmon.s | 285 +++++++++++------------ 2 files changed, 134 insertions(+), 151 deletions(-) rename src/mon_m65/{,glue.s => ,aliases_glue.s} (100%) diff --git a/src/mon_m65/,glue.s b/src/mon_m65/,aliases_glue.s similarity index 100% rename from src/mon_m65/,glue.s rename to src/mon_m65/,aliases_glue.s diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 0115cec7..fec0079a 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -9,20 +9,6 @@ ; XXX adapt all the addresses/constants! -; ************* -; * Constants * -; ************* - -!set WHITE = $05 -!set YELLOW = $9e -!set LRED = $96 - -!set CR = $0d -!set REV = $12 -!set CRIGHT = $1d -!set QUOTE = $22 -!set APOSTR = $27 - ; ************************************************ ; * Register storage for JMPFAR and JSRFAR calls * ; ************************************************ @@ -80,8 +66,6 @@ !addr SA = $b9 !addr FA = $ba !addr FNADR = $bb -!addr BA = $bd -!addr FNBANK = $be !addr MODE_80 = $d7 ; 80 column / 40 volumn flag @@ -103,32 +87,28 @@ !addr Disk_Sector = $40A ; logical sector 0 -> 255 !addr Disk_Status = $40B ; BCD value of status -Mon_Data = $410 ; 40 bytes, buffer for hunt and filename -Disk_Msg = $440 ; 40 bytes, disk status as text message +!addr Mon_Data = $410 ; 40 bytes, buffer for hunt and filename +!addr Disk_Msg = $440 ; 40 bytes, disk status as text message -!addr EXIT_OLD = $cf2e ; exit address for ROM 910110 -!addr EXIT = $cfa4 ; exit address for ROM 911001 +!addr EXIT_OLD = $cf2e ; exit address for ROM 910110 +!addr EXIT = $cfa4 ; exit address for ROM 911001 -!addr PRIMM = $ff7d -!addr CINT = $ff81 -!addr IOINIT = $ff84 -!addr SETMSG = $ff90 -!addr SECOND = $ff93 -!addr TKSA = $ff96 -!addr KEY = $ff9f -!addr ACPTR = $ffa5 -!addr CIOUT = $ffa8 -!addr UNTALK = $ffab -!addr UNLSN = $ffae -!addr LISTEN = $ffb1 -!addr TALK = $ffb4 -!addr OPEN = $ffc0 -!addr CLOSE = $ffc3 -!addr CHRIN = $ffcf -!addr CHROUT = $ffd2 -!addr LOAD = $ffd5 -!addr SAVE = $ffd8 -!addr STOP = $ffe1 +!addr PRIMM = $ff7d +!addr CINT = $ff81 +!addr SETMSG = $ff90 +!addr SECOND = $ff93 +!addr TKSA = $ff96 +!addr ACPTR = $ffa5 +!addr CIOUT = $ffa8 +!addr UNTALK = $ffab +!addr UNLSN = $ffae +!addr LISTEN = $ffb1 +!addr TALK = $ffb4 +!addr OPEN = $ffc0 +!addr CLOSE = $ffc3 +!addr CHRIN = $ffcf +!addr CHROUT = $ffd2 +!addr STOP = $ffe1 ; ******* @@ -268,7 +248,7 @@ Main_A INX CPX #80 BCS Mon_Error ; input too long - CMP #CR + CMP #KEY_RETURN BNE @loop LDA #0 @@ -298,7 +278,7 @@ Mon_Error ; put a question mark at the end of the text JSR PRIMM - !pet KEY_ESC, "o",CRIGHT,'?',0 + !pet KEY_ESC, "o",KEY_CRSR_RIGHT,'?',0 LDX #$f8 ; reset stack pointer TXS BRA Main @@ -320,7 +300,7 @@ Print_Commands ; ************ JSR PRIMM - !pet CR,YELLOW,REV,"bs monitor commands:" + !pet KEY_RETURN,KEY_YELLOW,KEY_RVS_ON,"bs monitor commands:" ; ********** Command_Char @@ -339,7 +319,7 @@ Cons_Prefix Load_Save_Verify ; ************** - !pet "lsv",WHITE,0 + !pet "lsv",KEY_WHITE,0 RTS ; ******** @@ -589,7 +569,7 @@ Mon_Bits BCS @lab JSR LAC_To_LPC ; Long_PC = start address @lab JSR Print_CR - LDA #WHITE + LDA #KEY_WHITE STA Long_DA+1 LDX #8 @@ -597,7 +577,7 @@ Mon_Bits JSR Hex_LPC LDZ #0 @col SEC - LDA #WHITE+LRED ; toggle colour + LDA #KEY_WHITE+KEY_LT_RED ; toggle colour SBC Long_DA+1 STA Long_DA+1 JSR CHROUT @@ -736,9 +716,9 @@ Dump_Row LDX #2 ; 2 blocks in 80 columns BBR7 MODE_80,@loop DEX ; 1 block in 40 columns -@loop LDA #LRED +@loop LDA #KEY_LT_RED JSR Dump_4_Bytes - LDA #WHITE + LDA #KEY_WHITE JSR Dump_4_Bytes DEX BNE @loop @@ -750,9 +730,9 @@ Dump_Row LDX #2 ; 4 blocks in 80 columns BBR7 MODE_80,@lchr DEX ; 2 blocks in 40 columns -@lchr LDA #LRED +@lchr LDA #KEY_LT_RED JSR Dump_4_Chars - LDA #WHITE + LDA #KEY_WHITE JSR Dump_4_Chars DEX BNE @lchr @@ -822,7 +802,7 @@ Mon_Hunt LBCS Mon_Error ; Long_CT = count LDY #0 JSR Get_Char - CMP #APOSTR + CMP #KEY_APOSTROPHE BNE @bin JSR Get_Char ; string hunt CMP #0 @@ -867,84 +847,87 @@ Mon_Hunt Load_Save ; ******* - LDY Disk_Unit - STY FA - LDY #8 - STY SA - LDY #0 - STY BA - STY FNLEN - STY FNBANK - STY STATUS - LDA #>Mon_Data - STA FNADR+1 - LDA #Mon_Data + ; STA FNADR+1 + ; LDA # load/verify - JSR Print_CR - LDX Long_AC ; X/Y = end address - LDY Long_AC+1 - LDA VERCK ; A = load/verify/save - CMP #'S' - LBNE Mon_Error ; must be Save - LDA #0 - STA SA ; set SA for PRG - LDA #Long_PC ; Long_PC = start address - JSR SAVE -@exit JMP Main + ; LDX Buf_Index +; @copyfn LDA Buffer,X ; copy filename + ; BEQ @do ; no more input + ; INX + ; CMP #KEY_QUOTE + ; BEQ @unit ; end of filename + ; STA (FNADR),Y ; store to filename + ; INC FNLEN + ; INY + ; CPY #19 ; max = 16 plus prefix "@0:" + ; BCC @copyfn + ; JMP Mon_Error ; filename too long -@do LDA VERCK - CMP #'V' ; Verify - BEQ @exec - CMP #'L' ; Load - LBNE Mon_Error - LDA #0 ; 0 = LOAD -@exec JSR LOAD ; A == 0 : LOAD else VERIFY - BBR4 STATUS,@exit - LDA VERCK - LBEQ Mon_Error - LBCS Main - JSR PRIMM - !pet " error",0 - JMP Main +; @unit STX Buf_Index ; update read position + ; JSR Get_Char + ; BEQ @do ; no more parameter + ; JSR Get_LAC + ; BCS @do + ; LDA Long_AC ; unit # + ; STA FA + ; JSR Get_LAC + ; BCS @do + ; JSR LAC_To_LPC ; Long_PC = start address + ; STA BA ; Bank + ; JSR Get_LAC ; Long_AC = end address + 1 + ; BCS @load ; no end address -> load/verify + ; JSR Print_CR + ; LDX Long_AC ; X/Y = end address + ; LDY Long_AC+1 + ; LDA VERCK ; A = load/verify/save + ; CMP #'S' + ; LBNE Mon_Error ; must be Save + ; LDA #0 + ; STA SA ; set SA for PRG + ; LDA #Long_PC ; Long_PC = start address + ; JSR SAVE +; @exit JMP Main -@load LDX Long_PC - LDY Long_PC+1 - LDA #0 ; 0 = use X/Y as load address - STA SA ; and ignore load address from file - BRA @do +; @do LDA VERCK + ; CMP #'V' ; Verify + ; BEQ @exec + ; CMP #'L' ; Load + ; LBNE Mon_Error + ; LDA #0 ; 0 = LOAD +; @exec JSR LOAD ; A == 0 : LOAD else VERIFY + ; BBR4 STATUS,@exit + ; LDA VERCK + ; LBEQ Mon_Error + ; LBCS Main + ; JSR PRIMM + ; !pet " error",0 + ; JMP Main + +; @load LDX Long_PC + ; LDY Long_PC+1 + ; LDA #0 ; 0 = use X/Y as load address + ; STA SA ; and ignore load address from file + ; BRA @do ; ****** Mon_Fill @@ -1337,7 +1320,7 @@ Mon_Assemble ; for easy entry of next assembler instruction JSR PRIMM - !pet CR,"a ",0 + !pet KEY_RETURN,"a ",0 LDA #'A' STA Buffer @@ -1562,7 +1545,7 @@ Print_Code ; detect long branches -@long LDA #YELLOW +@long LDA #KEY_YELLOW JSR CHROUT LDX Op_Code LDA LEN_ADM,X @@ -1640,7 +1623,7 @@ Print_Code @mne4 JSR Print_Blank @mne5 JSR Print_Blank - LDA #WHITE + LDA #KEY_WHITE JSR CHROUT ; check for accumulator operand @@ -1832,7 +1815,7 @@ Read_Number JSR Get_Glyph ; get 1st. character BEQ @exit - CMP #APOSTR ; character entry 'C + CMP #KEY_APOSTROPHE ; character entry 'C BNE @numeric JSR Get_Char ; character after ' STA Long_AC @@ -1919,13 +1902,13 @@ Hex_LPC LDX Long_PC+3 BEQ @laba - LDA #YELLOW + LDA #KEY_YELLOW JSR CHROUT TXA JSR Print_Hex LDA Long_PC+2 JSR Print_Hex - LDA #WHITE + LDA #KEY_WHITE JSR CHROUT BRA @labb @laba LDA Long_PC+2 @@ -2945,26 +2928,26 @@ Mon_Help ; ****** JSR PRIMM - !pet LRED,"a",WHITE,"ssemble - a address mnemonic operand",CR - !pet LRED,"b",WHITE,"itmaps - b [from [to]]",CR - !pet LRED,"c",WHITE,"ompare - c from to with",CR - !pet LRED,"d",WHITE,"isassemble - d [from [to]]",CR - !pet LRED,"f",WHITE,"ill - f from to fillbyte",CR - !pet LRED,"g",WHITE,"o - g [address]",CR - !pet LRED,"h",WHITE,"unt - h from to (string or bytes)",CR - !pet LRED,"j",WHITE,"sr - j address",CR - !pet LRED,"l",WHITE,"oad - l filename [uniy [address]]",CR - !pet LRED,"m",WHITE,"emory - m [from [to]]",CR - !pet LRED,"r",WHITE,"egisters - r",CR - !pet LRED,"s",WHITE,"ave - s filename unit from to",CR - !pet LRED,"t",WHITE,"ransfer - t from to target",CR - !pet LRED,"v",WHITE,"erify - v filename [unit [address]]",CR - !pet "e",LRED,"x",WHITE,"it - x",CR - !pet LRED,".",WHITE," - . address mnemonic operand",CR - !pet LRED,">",WHITE," - > address byte sequence",CR - !pet LRED,";",WHITE," - ; register contents",CR - !pet LRED,"@",WHITE,"dos - @ [dos command]",CR - !pet LRED,"?",WHITE,"help - ?",CR + !pet KEY_LT_RED,"a",KEY_WHITE,"ssemble - a address mnemonic operand",KEY_RETURN + !pet KEY_LT_RED,"b",KEY_WHITE,"itmaps - b [from [to]]",KEY_RETURN + !pet KEY_LT_RED,"c",KEY_WHITE,"ompare - c from to with",KEY_RETURN + !pet KEY_LT_RED,"d",KEY_WHITE,"isassemble - d [from [to]]",KEY_RETURN + !pet KEY_LT_RED,"f",KEY_WHITE,"ill - f from to fillbyte",KEY_RETURN + !pet KEY_LT_RED,"g",KEY_WHITE,"o - g [address]",KEY_RETURN + !pet KEY_LT_RED,"h",KEY_WHITE,"unt - h from to (string or bytes)",KEY_RETURN + !pet KEY_LT_RED,"j",KEY_WHITE,"sr - j address",KEY_RETURN + !pet KEY_LT_RED,"l",KEY_WHITE,"oad - l filename [uniy [address]]",KEY_RETURN + !pet KEY_LT_RED,"m",KEY_WHITE,"emory - m [from [to]]",KEY_RETURN + !pet KEY_LT_RED,"r",KEY_WHITE,"egisters - r",KEY_RETURN + !pet KEY_LT_RED,"s",KEY_WHITE,"ave - s filename unit from to",KEY_RETURN + !pet KEY_LT_RED,"t",KEY_WHITE,"ransfer - t from to target",KEY_RETURN + !pet KEY_LT_RED,"v",KEY_WHITE,"erify - v filename [unit [address]]",KEY_RETURN + !pet "e",KEY_LT_RED,"x",KEY_WHITE,"it - x",KEY_RETURN + !pet KEY_LT_RED,".",KEY_WHITE," - . address mnemonic operand",KEY_RETURN + !pet KEY_LT_RED,">",KEY_WHITE," - > address byte sequence",KEY_RETURN + !pet KEY_LT_RED,";",KEY_WHITE," - ; register contents",KEY_RETURN + !pet KEY_LT_RED,"@",KEY_WHITE,"dos - @ [dos command]",KEY_RETURN + !pet KEY_LT_RED,"?",KEY_WHITE,"help - ?",KEY_RETURN !pet 0 JMP Main From 62e4acdc89ed8424a4e950c466d8d02284042809 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 14 Dec 2020 15:54:39 +0100 Subject: [PATCH 018/257] some work on BASIC/KERNAL side of the monitor --- STATUS.md | 1 + doc/Extended-BASIC.md | 4 ++ src/basic/,imports.s | 1 + src/basic/basic_commands_01/cmd_old.s | 4 +- .../helper_ensure_direct_mode.s | 12 ++++ src/basic/basic_commands_04/cmd_monitor.s | 5 +- src/basic/board_m65/mega65_map_helpers.s | 2 +- src/kernal/board_m65/mega65_map_helpers.s | 22 ++++++- src/kernal/board_m65/mega65_monitor.s | 9 +++ src/kernal/jumptable_m65/jmonitor.s | 10 +++ src/mon_m65/bsmon.s | 65 ++++++++----------- 11 files changed, 90 insertions(+), 45 deletions(-) create mode 100644 src/basic/basic_commands_01/helper_ensure_direct_mode.s create mode 100644 src/kernal/board_m65/mega65_monitor.s create mode 100644 src/kernal/jumptable_m65/jmonitor.s diff --git a/STATUS.md b/STATUS.md index b68d16e2..ef7fdd6e 100644 --- a/STATUS.md +++ b/STATUS.md @@ -407,6 +407,7 @@ Note: this is likely to change in the future, possibly in an incompatible way! | Address | Name | Status | Remarks | | :-------: | :------- | :------: | :--------------------------------------------------------------------: | +| ? | MONITOR | WIP | launches a machine language monitor | | ? | PRHEX | DONE | print hex value from .A | | `$FF7D` | PRIMM | DONE | print immediate, address compatible with C128 and C65 ROMs | | `$FFF8` | | DONE | reset vector for usage within hypervisor, starts in legacy mode | diff --git a/doc/Extended-BASIC.md b/doc/Extended-BASIC.md index a6294845..cad3279c 100644 --- a/doc/Extended-BASIC.md +++ b/doc/Extended-BASIC.md @@ -98,6 +98,10 @@ Displays BASIC memory usage information: * `STRS` - bytes occupied by strings, also the ones belonging to arrays * `FREE` - unused space +### `MONITOR` (MEGA65) + +Invokes a machine language monitor + ### `SYSINFO` (MEGA65) Displays various system information. diff --git a/src/basic/,imports.s b/src/basic/,imports.s index 1024c047..2e144cc4 100644 --- a/src/basic/,imports.s +++ b/src/basic/,imports.s @@ -19,6 +19,7 @@ ;; #ALIAS# printf = KERNAL_0.printf ;; #ALIAS# PRIMM = KERNAL_0.PRIMM +;; #ALIAS# MONITOR = KERNAL_0.MONITOR ;; #ALIAS# plot_set = KERNAL_0.plot_set ;; #ALIAS# print_hex_byte = KERNAL_0.print_hex_byte diff --git a/src/basic/basic_commands_01/cmd_old.s b/src/basic/basic_commands_01/cmd_old.s index 6d2d4f9d..38524cd8 100644 --- a/src/basic/basic_commands_01/cmd_old.s +++ b/src/basic/basic_commands_01/cmd_old.s @@ -7,9 +7,7 @@ cmd_old: ; First make sure we are in direct mode - ldx CURLIN+1 - inx - +bne do_DIRECT_MODE_ONLY_error + jsr helper_ensure_direct_mode ; Now try to restore program linkage and VARTAB diff --git a/src/basic/basic_commands_01/helper_ensure_direct_mode.s b/src/basic/basic_commands_01/helper_ensure_direct_mode.s new file mode 100644 index 00000000..f16f4ab4 --- /dev/null +++ b/src/basic/basic_commands_01/helper_ensure_direct_mode.s @@ -0,0 +1,12 @@ +;; #LAYOUT# STD * #TAKE +;; #LAYOUT# * BASIC_0 #TAKE +;; #LAYOUT# * * #IGNORE + + +helper_ensure_direct_mode: + + ldx CURLIN+1 + inx + +bne do_DIRECT_MODE_ONLY_error + + rts diff --git a/src/basic/basic_commands_04/cmd_monitor.s b/src/basic/basic_commands_04/cmd_monitor.s index ddf52c04..46ba3215 100644 --- a/src/basic/basic_commands_04/cmd_monitor.s +++ b/src/basic/basic_commands_04/cmd_monitor.s @@ -4,6 +4,7 @@ cmd_monitor: - ; XXX implement this + jsr helper_ensure_native_mode + jsr helper_ensure_direct_mode - jmp do_NOT_IMPLEMENTED_error + jmp MONITOR diff --git a/src/basic/board_m65/mega65_map_helpers.s b/src/basic/board_m65/mega65_map_helpers.s index aee56e15..6cdfea00 100644 --- a/src/basic/board_m65/mega65_map_helpers.s +++ b/src/basic/board_m65/mega65_map_helpers.s @@ -23,6 +23,6 @@ map_BASIC_1: taz lda #$20 - ldx #$C2 ; $4000 <- map 16KB from $22000 + ldx #$C2 ; $4000 <- map 16KB from $26000 jmp map_end diff --git a/src/kernal/board_m65/mega65_map_helpers.s b/src/kernal/board_m65/mega65_map_helpers.s index 65abcf12..0aa629bf 100644 --- a/src/kernal/board_m65/mega65_map_helpers.s +++ b/src/kernal/board_m65/mega65_map_helpers.s @@ -62,7 +62,7 @@ map_KERNAL_1: tay taz - ldx #$42 ; $4000 <- map 8KB from $20000 + ldx #$42 ; $4000 <- map 8KB from $24000 bra map_end @@ -85,7 +85,7 @@ map_DOS_1: ldx #$C1 ; $4000 <- map 16KB ROM from $20000 map - bra map_end_no_eom ; no EOM, we do not want interrupts within DOS! + bra map_end_no_eom ; no EOM, we do not want interrupts within DOS! map_NORMAL_from_DOS_1: @@ -99,3 +99,21 @@ map_NORMAL_from_DOS_1: tab bra map_NORMAL_common + +map_MON_1: + + php + pha + phx + phy + phz + + lda #$00 + tay + taz + + lda #$E0 + ldx #$42 ; $4000 <- map 8KB from $30000 + + map + bra map_end diff --git a/src/kernal/board_m65/mega65_monitor.s b/src/kernal/board_m65/mega65_monitor.s new file mode 100644 index 00000000..6e2133aa --- /dev/null +++ b/src/kernal/board_m65/mega65_monitor.s @@ -0,0 +1,9 @@ +;; #LAYOUT# M65 KERNAL_0 #TAKE +;; #LAYOUT# * * #IGNORE + + +MONITOR: + + jsr map_MON_1 + ; XXX call the monitor here + jmp map_NORMAL diff --git a/src/kernal/jumptable_m65/jmonitor.s b/src/kernal/jumptable_m65/jmonitor.s new file mode 100644 index 00000000..18471ee9 --- /dev/null +++ b/src/kernal/jumptable_m65/jmonitor.s @@ -0,0 +1,10 @@ +;; #LAYOUT# M65 KERNAL_0 #TAKE +;; #LAYOUT# * * #IGNORE + + +; Launches the machine language monitor + + +JMONITOR: + + jmp MONITOR diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index fec0079a..dcdc7b36 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -60,17 +60,8 @@ ; operating system variables -!addr STATUS = $90 -!addr VERCK = $93 -!addr FNLEN = $b7 -!addr SA = $b9 -!addr FA = $ba -!addr FNADR = $bb - !addr MODE_80 = $d7 ; 80 column / 40 volumn flag -!addr Buffer = $0200 ; input buffer - !addr IIRQ = $0314 !addr IBRK = $0316 !addr EXMON = $032e @@ -244,7 +235,7 @@ Main_A ; **** @loop JSR CHRIN - STA Buffer,X + STA BUF,X INX CPX #80 BCS Mon_Error ; input too long @@ -253,7 +244,7 @@ Main_A LDA #0 STA Buf_Index - STA Buffer-1,X ; terminate buffer + STA BUF-1,X ; terminate buffer @getcomm JSR Get_Char BEQ Main CMP #' ' @@ -287,7 +278,7 @@ Mon_Error Mon_Select ; ******** - STA VERCK + STA VERCKK CPX #22 LBCS Load_Save TXA @@ -858,7 +849,7 @@ Load_Save ; STY BA ; STY FNLEN ; STY FNBANK - ; STY STATUS + ; STY IOSTATUS ; LDA #>Mon_Data ; STA FNADR+1 ; LDA # Date: Mon, 14 Dec 2020 17:39:34 +0100 Subject: [PATCH 019/257] fixed monitor memory mapping --- Makefile | 2 +- src/,,config_mega65.s | 3 --- src/kernal/board_m65/mega65_map_helpers.s | 2 +- src/kernal/board_m65/mega65_monitor.s | 2 +- src/mon_m65/4000.mon_vectable.s | 1 + src/mon_m65/bsmon.s | 3 --- 6 files changed, 4 insertions(+), 9 deletions(-) diff --git a/Makefile b/Makefile index 02dc7764..d86dc743 100644 --- a/Makefile +++ b/Makefile @@ -718,7 +718,7 @@ $(TARGET_U64CRT_X): $(SEG_LIST_U64CRT) $(CRT_BIN_LIST) build/padding_8_KB # $0:$A000 - 8 KB - BASIC segment 0 # $0:$C000 - 4 KB - KERNAL segment C # $0:$D000 - 4 KB - legacy mode chargen -# $0:$E000 - 9 KB - KERNAL segment 0 +# $0:$E000 - 8 KB - KERNAL segment 0 # $1:$0000 - 8 KB - Machine Language MONITOR # $1:$2000 - 56 KB - unused for now, padding diff --git a/src/,,config_mega65.s b/src/,,config_mega65.s index c2a2b642..8c5ea1f7 100644 --- a/src/,,config_mega65.s +++ b/src/,,config_mega65.s @@ -106,6 +106,3 @@ ; --- Other ;; #CONFIG# COMPRESSION_LVL_2 NO - - -;; #CONFIG# DEV_BSMON NO ; do not change, BSMON is not integrated yet diff --git a/src/kernal/board_m65/mega65_map_helpers.s b/src/kernal/board_m65/mega65_map_helpers.s index 0aa629bf..d5bb88cc 100644 --- a/src/kernal/board_m65/mega65_map_helpers.s +++ b/src/kernal/board_m65/mega65_map_helpers.s @@ -112,7 +112,7 @@ map_MON_1: tay taz - lda #$E0 + lda #$C0 ldx #$42 ; $4000 <- map 8KB from $30000 map diff --git a/src/kernal/board_m65/mega65_monitor.s b/src/kernal/board_m65/mega65_monitor.s index 6e2133aa..ddfb7600 100644 --- a/src/kernal/board_m65/mega65_monitor.s +++ b/src/kernal/board_m65/mega65_monitor.s @@ -5,5 +5,5 @@ MONITOR: jsr map_MON_1 - ; XXX call the monitor here + jsr ($4000) jmp map_NORMAL diff --git a/src/mon_m65/4000.mon_vectable.s b/src/mon_m65/4000.mon_vectable.s index 0b07704f..97c2796d 100644 --- a/src/mon_m65/4000.mon_vectable.s +++ b/src/mon_m65/4000.mon_vectable.s @@ -3,6 +3,7 @@ !ifdef CONFIG_DEV_BSMON { +!word xtest !word Mon_Call !word Mon_Break !word Mon_Switch diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index dcdc7b36..8d54a106 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -4,7 +4,6 @@ ; * (adaped for the Open ROMs) * ; ******************************* -!ifdef CONFIG_DEV_BSMON { ; XXX adapt all the addresses/constants! @@ -2941,5 +2940,3 @@ Mon_Help !pet KEY_LT_RED,"?",KEY_WHITE,"help - ?",KEY_RETURN !pet 0 JMP Main - -} From 2aa7acf240a5df83a62490ba72c45cec95c73bae Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 14 Dec 2020 17:55:06 +0100 Subject: [PATCH 020/257] added some basic proxies for monitor --- src/kernal/board_m65/mega65_proxies_monitor.s | 24 +++++++++++++++++ .../{,aliases_glue.s => ,aliases_monitor.s} | 0 src/mon_m65/,imports_monitor.s | 8 ++++++ src/mon_m65/4000.mon_vectable.s | 1 - src/mon_m65/bsmon.s | 3 --- src/mon_m65/bsmon_glue.s | 26 +++++++++++++++++++ 6 files changed, 58 insertions(+), 4 deletions(-) create mode 100644 src/kernal/board_m65/mega65_proxies_monitor.s rename src/mon_m65/{,aliases_glue.s => ,aliases_monitor.s} (100%) create mode 100644 src/mon_m65/,imports_monitor.s create mode 100644 src/mon_m65/bsmon_glue.s diff --git a/src/kernal/board_m65/mega65_proxies_monitor.s b/src/kernal/board_m65/mega65_proxies_monitor.s new file mode 100644 index 00000000..6cb1869c --- /dev/null +++ b/src/kernal/board_m65/mega65_proxies_monitor.s @@ -0,0 +1,24 @@ +;; #LAYOUT# M65 KERNAL_0 #TAKE +;; #LAYOUT# * * #IGNORE + +; +; Proxies for calling MEGA65 segment KERNAL_0 routines from KERNAL_1 +; + + +proxy_M1_CHRIN: + + jsr map_NORMAL + jsr CHRIN + bra proxy_M1_end + +proxy_M1_CHROUT: + + jsr map_NORMAL + jsr CHROUT + + ; FALLTROUGH + +proxy_M1_end: + + jmp map_MON_1 diff --git a/src/mon_m65/,aliases_glue.s b/src/mon_m65/,aliases_monitor.s similarity index 100% rename from src/mon_m65/,aliases_glue.s rename to src/mon_m65/,aliases_monitor.s diff --git a/src/mon_m65/,imports_monitor.s b/src/mon_m65/,imports_monitor.s new file mode 100644 index 00000000..b348b7a6 --- /dev/null +++ b/src/mon_m65/,imports_monitor.s @@ -0,0 +1,8 @@ +;; #IMPORT# KERNAL_0 = KERNAL_0_combined.sym + +; +; Definitions for calling MEGA65 segment KERNAL_0 routines from MON_1 +; + +;; #ALIAS# CHRIN = KERNAL_0.proxy_M1_CHRIN +;; #ALIAS# CHROUT = KERNAL_0.proxy_M1_CHROUT diff --git a/src/mon_m65/4000.mon_vectable.s b/src/mon_m65/4000.mon_vectable.s index 97c2796d..0b07704f 100644 --- a/src/mon_m65/4000.mon_vectable.s +++ b/src/mon_m65/4000.mon_vectable.s @@ -3,7 +3,6 @@ !ifdef CONFIG_DEV_BSMON { -!word xtest !word Mon_Call !word Mon_Break !word Mon_Switch diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 8d54a106..f9096b63 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -83,7 +83,6 @@ !addr EXIT_OLD = $cf2e ; exit address for ROM 910110 !addr EXIT = $cfa4 ; exit address for ROM 911001 -!addr PRIMM = $ff7d !addr CINT = $ff81 !addr SETMSG = $ff90 !addr SECOND = $ff93 @@ -96,8 +95,6 @@ !addr TALK = $ffb4 !addr OPEN = $ffc0 !addr CLOSE = $ffc3 -!addr CHRIN = $ffcf -!addr CHROUT = $ffd2 !addr STOP = $ffe1 diff --git a/src/mon_m65/bsmon_glue.s b/src/mon_m65/bsmon_glue.s new file mode 100644 index 00000000..f35929ad --- /dev/null +++ b/src/mon_m65/bsmon_glue.s @@ -0,0 +1,26 @@ +; 'Print immediate', original implementation by Mike Barry, adapted to 65CE02 +; see http://www.6502.org/source/io/primm.htm + +PRIMM: + + pla ; get low part of (string address-1) + sta PTR1 + pla ; get high part of (string address-1) + sta PTR2 + +bra @2 +@1: + jsr CHROUT ; output a string char +@2: + inc PTR1 ; advance the string pointer + bne @3 + inc PTR2 +@3: + ldy #$00 + lda (PTR1), y ; get string char + bne @1 ; output and continue if not NUL + lda PTR2 + pha + lda PTR1 + pha + + rts From 00a8d9430b7f55a7a0c339605fedeafafac18c97 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 14 Dec 2020 18:21:38 +0100 Subject: [PATCH 021/257] monitor visual improvements --- src/mon_m65/4000.mon_vectable.s | 4 --- src/mon_m65/bsmon.s | 51 +++++++++++++++++---------------- 2 files changed, 26 insertions(+), 29 deletions(-) diff --git a/src/mon_m65/4000.mon_vectable.s b/src/mon_m65/4000.mon_vectable.s index 0b07704f..5ad0be3a 100644 --- a/src/mon_m65/4000.mon_vectable.s +++ b/src/mon_m65/4000.mon_vectable.s @@ -1,10 +1,6 @@ ; A vector table to integrate BSMON with the MEGA65 Kernal -!ifdef CONFIG_DEV_BSMON { - !word Mon_Call !word Mon_Break !word Mon_Switch - -} else { rts } diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index f9096b63..b08fe62a 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -83,7 +83,6 @@ !addr EXIT_OLD = $cf2e ; exit address for ROM 910110 !addr EXIT = $cfa4 ; exit address for ROM 911001 -!addr CINT = $ff81 !addr SETMSG = $ff90 !addr SECOND = $ff93 !addr TKSA = $ff96 @@ -287,7 +286,7 @@ Print_Commands ; ************ JSR PRIMM - !pet KEY_RETURN,KEY_YELLOW,KEY_RVS_ON,"bs monitor commands:" + !pet KEY_RETURN,KEY_YELLOW,KEY_RVS_ON,"commands: " ; ********** Command_Char @@ -2913,27 +2912,29 @@ Reg_Text ; ****** Mon_Help ; ****** - JSR PRIMM + JSR PRIMM + + !pet KEY_RETURN + !pet KEY_LT_RED,"a",KEY_WHITE,"ssemble - a address mnemonic operand",KEY_RETURN + !pet KEY_LT_RED,"b",KEY_WHITE,"itmaps - b [from [to]]",KEY_RETURN + !pet KEY_LT_RED,"c",KEY_WHITE,"ompare - c from to with",KEY_RETURN + !pet KEY_LT_RED,"d",KEY_WHITE,"isassemble - d [from [to]]",KEY_RETURN + !pet KEY_LT_RED,"f",KEY_WHITE,"ill - f from to fillbyte",KEY_RETURN + !pet KEY_LT_RED,"g",KEY_WHITE,"o - g [address]",KEY_RETURN + !pet KEY_LT_RED,"h",KEY_WHITE,"unt - h from to (string or bytes)",KEY_RETURN + !pet KEY_LT_RED,"j",KEY_WHITE,"sr - j address",KEY_RETURN + !pet KEY_LT_RED,"l",KEY_WHITE,"oad - l filename [uniy [address]]",KEY_RETURN + !pet KEY_LT_RED,"m",KEY_WHITE,"emory - m [from [to]]",KEY_RETURN + !pet KEY_LT_RED,"r",KEY_WHITE,"egisters - r",KEY_RETURN + !pet KEY_LT_RED,"s",KEY_WHITE,"ave - s filename unit from to",KEY_RETURN + !pet KEY_LT_RED,"t",KEY_WHITE,"ransfer - t from to target",KEY_RETURN + !pet KEY_LT_RED,"v",KEY_WHITE,"erify - v filename [unit [address]]",KEY_RETURN + !pet "e",KEY_LT_RED,"x",KEY_WHITE,"it - x",KEY_RETURN + !pet KEY_LT_RED,".",KEY_WHITE," - . address mnemonic operand",KEY_RETURN + !pet KEY_LT_RED,">",KEY_WHITE," - > address byte sequence",KEY_RETURN + !pet KEY_LT_RED,";",KEY_WHITE," - ; register contents",KEY_RETURN + !pet KEY_LT_RED,"@",KEY_WHITE,"dos - @ [dos command]",KEY_RETURN + !pet KEY_LT_RED,"?",KEY_WHITE,"help - ?",KEY_RETURN + !pet 0 - !pet KEY_LT_RED,"a",KEY_WHITE,"ssemble - a address mnemonic operand",KEY_RETURN - !pet KEY_LT_RED,"b",KEY_WHITE,"itmaps - b [from [to]]",KEY_RETURN - !pet KEY_LT_RED,"c",KEY_WHITE,"ompare - c from to with",KEY_RETURN - !pet KEY_LT_RED,"d",KEY_WHITE,"isassemble - d [from [to]]",KEY_RETURN - !pet KEY_LT_RED,"f",KEY_WHITE,"ill - f from to fillbyte",KEY_RETURN - !pet KEY_LT_RED,"g",KEY_WHITE,"o - g [address]",KEY_RETURN - !pet KEY_LT_RED,"h",KEY_WHITE,"unt - h from to (string or bytes)",KEY_RETURN - !pet KEY_LT_RED,"j",KEY_WHITE,"sr - j address",KEY_RETURN - !pet KEY_LT_RED,"l",KEY_WHITE,"oad - l filename [uniy [address]]",KEY_RETURN - !pet KEY_LT_RED,"m",KEY_WHITE,"emory - m [from [to]]",KEY_RETURN - !pet KEY_LT_RED,"r",KEY_WHITE,"egisters - r",KEY_RETURN - !pet KEY_LT_RED,"s",KEY_WHITE,"ave - s filename unit from to",KEY_RETURN - !pet KEY_LT_RED,"t",KEY_WHITE,"ransfer - t from to target",KEY_RETURN - !pet KEY_LT_RED,"v",KEY_WHITE,"erify - v filename [unit [address]]",KEY_RETURN - !pet "e",KEY_LT_RED,"x",KEY_WHITE,"it - x",KEY_RETURN - !pet KEY_LT_RED,".",KEY_WHITE," - . address mnemonic operand",KEY_RETURN - !pet KEY_LT_RED,">",KEY_WHITE," - > address byte sequence",KEY_RETURN - !pet KEY_LT_RED,";",KEY_WHITE," - ; register contents",KEY_RETURN - !pet KEY_LT_RED,"@",KEY_WHITE,"dos - @ [dos command]",KEY_RETURN - !pet KEY_LT_RED,"?",KEY_WHITE,"help - ?",KEY_RETURN - !pet 0 - JMP Main + JMP Main From 264396340f20f33c997cea30fe7e39c9e4f447a1 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 14 Dec 2020 23:02:37 +0100 Subject: [PATCH 022/257] fixed monitor PC display and 'X' command --- src/kernal/board_m65/mega65_monitor.s | 5 ++-- src/mon_m65/,imports_monitor.s | 2 ++ src/mon_m65/bsmon.s | 40 +++++++++++---------------- 3 files changed, 21 insertions(+), 26 deletions(-) diff --git a/src/kernal/board_m65/mega65_monitor.s b/src/kernal/board_m65/mega65_monitor.s index ddfb7600..5ffcfe6a 100644 --- a/src/kernal/board_m65/mega65_monitor.s +++ b/src/kernal/board_m65/mega65_monitor.s @@ -5,5 +5,6 @@ MONITOR: jsr map_MON_1 - jsr ($4000) - jmp map_NORMAL + jmp ($4000) + + ; Monitor knows, that it should exit via map_NORMAL diff --git a/src/mon_m65/,imports_monitor.s b/src/mon_m65/,imports_monitor.s index b348b7a6..3c916417 100644 --- a/src/mon_m65/,imports_monitor.s +++ b/src/mon_m65/,imports_monitor.s @@ -4,5 +4,7 @@ ; Definitions for calling MEGA65 segment KERNAL_0 routines from MON_1 ; +;; #ALIAS# map_NORMAL = KERNAL_0.map_NORMAL + ;; #ALIAS# CHRIN = KERNAL_0.proxy_M1_CHRIN ;; #ALIAS# CHROUT = KERNAL_0.proxy_M1_CHROUT diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index b08fe62a..b4ceb42f 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -80,7 +80,6 @@ !addr Mon_Data = $410 ; 40 bytes, buffer for hunt and filename !addr Disk_Msg = $440 ; 40 bytes, disk status as text message -!addr EXIT_OLD = $cf2e ; exit address for ROM 910110 !addr EXIT = $cfa4 ; exit address for ROM 911001 !addr SETMSG = $ff90 @@ -145,15 +144,11 @@ Mon_Call DEX BPL @loop -; set default PC to "exit to BASIC" +; set default PC to monitor exit point - LDA #EXIT - BIT EXIT ; $20 (JSR) or $ff ? - BPL @store - LDA #EXIT_OLD -@store STA PCL + LDA #map_NORMAL + STA PCL STA X_Vector STX PCH STX X_Vector+1 @@ -178,21 +173,18 @@ Mon_Register JSR Reg_Text -; print Bank,PCH +; print PCH + + LDA PCH + JSR Print_Hex + +; print PCL,SR,PCL,A,X,Y,Z,BP LDY #0 -@loopa LDA Bank,Y - JSR Print_Hex - INY - CPY #2 - BCC @loopa - -; print SR,PCL,A,X,Y,Z,BP - -@loopb LDA Bank,Y +@loopb LDA PCL,Y JSR Print_Hex_Blank INY - CPY #9 + CPY #7 BCC @loopb ; print 16 bit stack pointer @@ -286,7 +278,7 @@ Print_Commands ; ************ JSR PRIMM - !pet KEY_RETURN,KEY_YELLOW,KEY_RVS_ON,"commands: " + !pet KEY_RETURN,KEY_YELLOW,KEY_RVS_ON," commands: " ; ********** Command_Char @@ -305,7 +297,7 @@ Cons_Prefix Load_Save_Verify ; ************** - !pet "lsv",KEY_WHITE,0 + !pet "lsv ",KEY_WHITE,KEY_RETURN,0 RTS ; ******** @@ -2906,7 +2898,7 @@ BP_ZERO !pet "b-p 9 0",0 ; set buffer pointer to 0 Reg_Text ; ****** JSR PRIMM - !pet KEY_RETURN, " pc sr ac xr yr zr bp sp nvebdizc", KEY_RETURN, "; ", KEY_ESC, "q",0 + !pet KEY_RETURN, " pc sr ac xr yr zr bp sp nvebdizc", KEY_RETURN, "; ", KEY_ESC, "q",0 RTS ; ****** @@ -2914,7 +2906,7 @@ Mon_Help ; ****** JSR PRIMM - !pet KEY_RETURN + !pet KEY_RETURN, KEY_RETURN !pet KEY_LT_RED,"a",KEY_WHITE,"ssemble - a address mnemonic operand",KEY_RETURN !pet KEY_LT_RED,"b",KEY_WHITE,"itmaps - b [from [to]]",KEY_RETURN !pet KEY_LT_RED,"c",KEY_WHITE,"ompare - c from to with",KEY_RETURN From 9a4d52cce3f19022771b41c12cddca544ad8f2e1 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 14 Dec 2020 23:22:34 +0100 Subject: [PATCH 023/257] small cleanup --- src/mon_m65/,aliases_monitor.s | 3 --- src/mon_m65/4000.mon_vectable.s | 1 - src/mon_m65/bsmon.s | 23 ++++++++++------------- 3 files changed, 10 insertions(+), 17 deletions(-) delete mode 100644 src/mon_m65/,aliases_monitor.s diff --git a/src/mon_m65/,aliases_monitor.s b/src/mon_m65/,aliases_monitor.s deleted file mode 100644 index 6ed67511..00000000 --- a/src/mon_m65/,aliases_monitor.s +++ /dev/null @@ -1,3 +0,0 @@ - - -!macro NOP { eom } diff --git a/src/mon_m65/4000.mon_vectable.s b/src/mon_m65/4000.mon_vectable.s index 5ad0be3a..78bace5c 100644 --- a/src/mon_m65/4000.mon_vectable.s +++ b/src/mon_m65/4000.mon_vectable.s @@ -3,4 +3,3 @@ !word Mon_Call !word Mon_Break -!word Mon_Switch diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index b4ceb42f..fa132dcc 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -5,14 +5,16 @@ ; ******************************* +!macro NOP { eom } ; ACME does not allow NOP for MEGA65 CPU + ; XXX adapt all the addresses/constants! -; ************************************************ -; * Register storage for JMPFAR and JSRFAR calls * -; ************************************************ +; ******************** +; * Register storage * +; ******************** -!addr Bank = 2 +!addr Bank = 2 ; XXX get rid of it! !addr PCH = 3 !addr PCL = 4 !addr SR = 5 @@ -48,10 +50,10 @@ !addr Adr_Flags = $69 !addr Mode_Flags = $6a !addr Op_Code = $6b -!addr Op_Flag = $6c ; 7: two operands - ; 6: long branch - ; 5: 32 bit address - ; 4: Q register +!addr Op_Flag = $6c ; 7: two operands + ; 6: long branch + ; 5: 32 bit address + ; 4: Q register !addr Op_Size = $6d !addr Dig_Cnt = $6e !addr Buf_Index = $6f @@ -100,17 +102,12 @@ Mon_Break ; ******* - JSR PRIMM - !pet KEY_RETURN, "break",0 ; ; XXX what is '\a'? JSR Print_Commands ; pull BP, Z, Y, X, A,SR,PCL,PCH ; 7 6 5 4 3 2 1 0 LDX #7 - BIT EXIT ; version - BPL @loop - DEX @loop PLA STA PCH,X DEX From 30366d71f805a6e7a29381608457754e0e095c34 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 15 Dec 2020 00:04:19 +0100 Subject: [PATCH 024/257] further cleanup --- src/mon_m65/bsmon.s | 128 ++++---------------------------------------- 1 file changed, 10 insertions(+), 118 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index fa132dcc..5dda8ab3 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -58,17 +58,8 @@ !addr Dig_Cnt = $6e !addr Buf_Index = $6f -; operating system variables - - !addr MODE_80 = $d7 ; 80 column / 40 volumn flag -!addr IIRQ = $0314 -!addr IBRK = $0316 -!addr EXMON = $032e - - ; bottom of BASIC runtime stack - ; should be a safe space !addr X_Vector = $400 ; exit vector (ROM version dependent) !addr Ix_Mne = $402 ; index to mnemonics table !addr Op_Mne = $403 ; 3 bytes for mnemonic @@ -82,8 +73,6 @@ !addr Mon_Data = $410 ; 40 bytes, buffer for hunt and filename !addr Disk_Msg = $440 ; 40 bytes, disk status as text message -!addr EXIT = $cfa4 ; exit address for ROM 911001 - !addr SETMSG = $ff90 !addr SECOND = $ff93 !addr TKSA = $ff96 @@ -93,8 +82,6 @@ !addr UNLSN = $ffae !addr LISTEN = $ffb1 !addr TALK = $ffb4 -!addr OPEN = $ffc0 -!addr CLOSE = $ffc3 !addr STOP = $ffe1 @@ -618,7 +605,7 @@ Mon_Go ; **** ; XXX to be rewritten for Open ROMs! - rts + jmp Main ; JSR Get_LAC ; get 1st. parameter ; JSR LAC_To_PC ; LDX SPL @@ -630,7 +617,7 @@ Mon_JSR ; ***** ; XXX to be rewritten for Open ROMs! - rts + jmp Main ; JSR Get_LAC ; get 1st. parameter ; JSR LAC_To_PC ; LDX SPL @@ -822,8 +809,8 @@ Mon_Hunt Load_Save ; ******* - ; XXX to be rewritten for OpenROMs! - rts + ; XXX to be rewritten for Open ROMs! + jmp Main ; LDY Disk_Unit ; STY FA @@ -2197,33 +2184,6 @@ Print_BCD BNE @loopa RTS -; ****** -Mon_Disk -; ****** - - DEC Buf_Index - LDX Buf_Index - LDA BUF,X - BEQ Print_Disk_Status - STA Long_CT ; dir marker - LDY #$ff ; SA = 15 - CMP #'$' - BNE @lab - LDY #$f0 ; SA = 0 -@lab LDA FA - JSR LISTEN - TYA ; SA - JSR SECOND -@loop LDA BUF,X - BEQ @close - JSR CIOUT - INX - BRA @loop -@close JSR UNLSN - LDA Long_CT - CMP #'$' - BNE Print_Disk_Status - JMP Directory ; ************* Get_Disk_Status @@ -2277,88 +2237,20 @@ Print_Disk_Msg BRA @loop @exit JMP Print_CR -; @[u] : print disk status for unit u -; @[u],$[=pattern] : print directory -; @[u],command : send disk command and read status -; @[u],U1 mem track startsec [endsec] : read disk sector(s) -; @[u],U2 mem track startsec [endsec] : write disk sector(s) - ; ***** Mon_DOS ; ***** - LDX #8 ; default device - JSR Get_Glyph - CMP #'0' - BCC @unit - CMP #':' - BCS @unit - DEC Buf_Index - JSR Read_Number - BCS @unit - LDX Long_AC ; unit - CPX #4 - LBCC Mon_Error - CPX #31 - LBCS Mon_Error -@unit STX FA - DEC Buf_Index -@next JSR Get_Char - BEQ @status ; only @u - CMP #' ' - BEQ @next - CMP #',' - BEQ @next - CMP #'U' ; sector read/write - BEQ DOS_U -@status JSR Mon_Disk - JMP Main - -; ******* -Directory -; ******* - - LDA FA - JSR TALK - LDA #$60 - STA SA - JSR TKSA - LDA #0 - STA IOSTATUS - - LDZ #6 ; load address, pseudo link, pseudo number -@loopb TAX ; X = previous byte - JSR ACPTR ; A = current byte - LDY IOSTATUS - BNE @exit - DEZ - BNE @loopb ; X/A = last read word - - STX Long_AC - STA Long_AC+1 - STZ Long_AC+2 - STZ Long_AC+3 - JSR Print_Decimal ; file size - JSR Print_Blank - -@loopc JSR ACPTR ; print file entry - BEQ @cr - LDY IOSTATUS - BNE @exit - JSR CHROUT - BCC @loopc - -@cr JSR Print_CR - JSR STOP - BEQ @exit - LDZ #4 - BRA @loopb ; next file -@exit JMP UNTALK + ; XXX for Open ROMs it should invoke internal DOS wedge! + jmp Main ; *** -DOS_U +DOS_U ; XXX connect it somehow to command list ; *** +; @[u],U1 mem track startsec [endsec] : read disk sector(s) +; @[u],U2 mem track startsec [endsec] : write disk sector(s) + JSR Get_Char CMP #'1' ; U1: read LBCC Mon_Error From 0190a0300ce462541733f91e2a65816a7368d8c1 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 15 Dec 2020 22:17:27 +0100 Subject: [PATCH 025/257] added more proxies, small fixes to MONITOR integration --- Makefile | 108 ++++++++------- src/aliases/,aliases_ram_lowmem_m65.s | 13 +- src/kernal/board_m65/mega65_proxies_monitor.s | 46 ++++++- src/mon_m65/,imports_monitor.s | 14 +- src/mon_m65/bsmon.s | 125 ++++++++---------- src/zvm_m65/dummy.s | 4 + 6 files changed, 186 insertions(+), 124 deletions(-) create mode 100644 src/zvm_m65/dummy.s diff --git a/Makefile b/Makefile index d86dc743..b3cbdd37 100644 --- a/Makefile +++ b/Makefile @@ -68,52 +68,56 @@ SRCDIR_DOS_M65 = $(SRCDIR_COMMON) \ SRCDIR_MON_M65 = $(SRCDIR_COMMON) \ src/mon_m65 -SRC_BASIC = $(foreach dir,$(SRCDIR_BASIC),$(wildcard $(dir)/*.s)) -SRC_KERNAL = $(foreach dir,$(SRCDIR_KERNAL),$(wildcard $(dir)/*.s)) -SRC_DOS_M65 = $(foreach dir,$(SRCDIR_DOS_M65),$(wildcard $(dir)/*.s)) -SRC_MON_M65 = $(foreach dir,$(SRCDIR_MON_M65),$(wildcard $(dir)/*.s)) -SRC_TOOLS = $(wildcard tools/*.c,tools/*.cc) +SRCDIR_ZVM_M65 = $(SRCDIR_COMMON) \ + src/zvm_m65 -DIR_ACME = assembler/acme/src -HDR_ACME = $(filter-out $(wildcard $(DIR_ACME)/_*.h),$(wildcard $(DIR_ACME)/*.h)) -SRC_ACME = $(DIR_ACME)/acme.c $(DIR_ACME)/platform.c $(DIR_ACME)/alu.c $(DIR_ACME)/typesystem.c \ - $(DIR_ACME)/cliargs.c $(DIR_ACME)/global.c $(DIR_ACME)/output.c $(DIR_ACME)/flow.c \ - $(DIR_ACME)/macro.c $(DIR_ACME)/cpu.c $(DIR_ACME)/encoding.c $(DIR_ACME)/pseudoopcodes.c \ - $(DIR_ACME)/dynabuf.c $(DIR_ACME)/mnemo.c $(DIR_ACME)/input.c $(DIR_ACME)/section.c \ - $(DIR_ACME)/symbol.c $(DIR_ACME)/tree.c +SRC_BASIC = $(foreach dir,$(SRCDIR_BASIC),$(wildcard $(dir)/*.s)) +SRC_KERNAL = $(foreach dir,$(SRCDIR_KERNAL),$(wildcard $(dir)/*.s)) +SRC_DOS_M65 = $(foreach dir,$(SRCDIR_DOS_M65),$(wildcard $(dir)/*.s)) +SRC_MON_M65 = $(foreach dir,$(SRCDIR_MON_M65),$(wildcard $(dir)/*.s)) +SRC_ZVM_M65 = $(foreach dir,$(SRCDIR_ZVM_M65),$(wildcard $(dir)/*.s)) +SRC_TOOLS = $(wildcard tools/*.c,tools/*.cc) -CRT_BIN_LIST = assets/cartridge/header-cart.bin \ - assets/cartridge/header-seg0.bin \ - assets/cartridge/header-seg1.bin \ - assets/cartridge/header-seg2.bin \ - assets/cartridge/header-seg3.bin +DIR_ACME = assembler/acme/src +HDR_ACME = $(filter-out $(wildcard $(DIR_ACME)/_*.h),$(wildcard $(DIR_ACME)/*.h)) +SRC_ACME = $(DIR_ACME)/acme.c $(DIR_ACME)/platform.c $(DIR_ACME)/alu.c $(DIR_ACME)/typesystem.c \ + $(DIR_ACME)/cliargs.c $(DIR_ACME)/global.c $(DIR_ACME)/output.c $(DIR_ACME)/flow.c \ + $(DIR_ACME)/macro.c $(DIR_ACME)/cpu.c $(DIR_ACME)/encoding.c $(DIR_ACME)/pseudoopcodes.c \ + $(DIR_ACME)/dynabuf.c $(DIR_ACME)/mnemo.c $(DIR_ACME)/input.c $(DIR_ACME)/section.c \ + $(DIR_ACME)/symbol.c $(DIR_ACME)/tree.c + +CRT_BIN_LIST = assets/cartridge/header-cart.bin \ + assets/cartridge/header-seg0.bin \ + assets/cartridge/header-seg1.bin \ + assets/cartridge/header-seg2.bin \ + assets/cartridge/header-seg3.bin # Generated files -GEN_BASIC = build/,generated/,float_constants.s -GEN_KERNAL = +GEN_BASIC = build/,generated/,float_constants.s +GEN_KERNAL = # List of build directories -DIR_CUS = build/target_custom -DIR_GEN = build/target_generic -DIR_GENCRT = build/target_generic_crt -DIR_TST = build/target_testing -DIR_M65 = build/target_mega65 -DIR_U64 = build/target_ultimate64 -DIR_U64CRT = build/target_ultimate64_crt -DIR_X16 = build/target_cx16 +DIR_CUS = build/target_custom +DIR_GEN = build/target_generic +DIR_GENCRT = build/target_generic_crt +DIR_TST = build/target_testing +DIR_M65 = build/target_mega65 +DIR_U64 = build/target_ultimate64 +DIR_U64CRT = build/target_ultimate64_crt +DIR_X16 = build/target_cx16 # List of config files -CFG_CUS = src/,,config_custom.s -CFG_GEN = src/,,config_generic.s -CFG_GENCRT = src/,,config_generic_crt.s -CFG_TST = src/,,config_testing.s -CFG_M65 = src/,,config_mega65.s -CFG_U64 = src/,,config_ultimate64.s -CFG_X16 = src/,,config_cx16.s -CFG_U64CRT = src/,,config_ultimate64_crt.s +CFG_CUS = src/,,config_custom.s +CFG_GEN = src/,,config_generic.s +CFG_GENCRT = src/,,config_generic_crt.s +CFG_TST = src/,,config_testing.s +CFG_M65 = src/,,config_mega65.s +CFG_U64 = src/,,config_ultimate64.s +CFG_X16 = src/,,config_cx16.s +CFG_U64CRT = src/,,config_ultimate64_crt.s # List of files with generated strings @@ -128,10 +132,11 @@ GEN_STR_X16 = $(DIR_X16)/,generated/,packed_strings.s # Dependencies - helper variables -DEP_BASIC = $(SRC_BASIC) $(SRCDIR_BASIC) $(GEN_BASIC) -DEP_KERNAL = $(SRC_KERNAL) $(SRCDIR_KERNAL) $(GEN_KERNAL) -DEP_DOS_M65 = $(SRC_DOS_M65) $(SRCDIR_DOS_M65) -DEP_MON_M65 = $(SRC_MON_M65) $(SRCDIR_MON_M65) +DEP_BASIC = $(SRC_BASIC) $(SRCDIR_BASIC) $(GEN_BASIC) +DEP_KERNAL = $(SRC_KERNAL) $(SRCDIR_KERNAL) $(GEN_KERNAL) +DEP_DOS_M65 = $(SRC_DOS_M65) $(SRCDIR_DOS_M65) +DEP_MON_M65 = $(SRC_MON_M65) $(SRCDIR_MON_M65) +DEP_ZVM_M65 = $(SRC_ZVM_M65) $(SRCDIR_ZVM_M65) # List of tools @@ -210,7 +215,8 @@ SEG_LIST_M65 = $(DIR_M65)/basic.seg_0 \ $(DIR_M65)/kernal.seg_C \ $(DIR_M65)/kernal.seg_1 \ $(DIR_M65)/dos.seg_1 \ - $(DIR_M65)/mon.seg_1 + $(DIR_M65)/mon.seg_1 \ + $(DIR_M65)/zvm.seg_1 SEG_LIST_X16 = $(DIR_X16)/basic.seg_0 \ $(DIR_X16)/basic.seg_1 \ @@ -368,7 +374,9 @@ $(DIR_M65)/kernal.seg_1 $(DIR_M65)/KERNAL_1_combined.vs $(DIR_M65)/KERNAL_1_comb $(DIR_M65)/dos.seg_1 $(DIR_M65)/DOS_1_combined.vs $(DIR_M65)/DOS_1_combined.sym: \ $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_DOS_M65) $(CFG_M65) $(DIR_M65)/mon.seg_1 $(DIR_M65)/MON_1_combined.vs $(DIR_M65)/MON_1_combined.sym: \ - $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_MON_M65) $(CFG_M65) + $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_MON_M65) $(CFG_M65) $(DIR_M65)/KERNAL_0_combined.sym +$(DIR_M65)/zvm.seg_1 $(DIR_M65)/ZVM_1_combined.vs $(DIR_M65)/ZVM_1_combined.sym: \ + $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_ZVM_M65) $(CFG_M65) $(DIR_M65)/KERNAL_0_combined.sym $(DIR_X16)/basic.seg_1 $(DIR_X16)/BASIC_1_combined.vs $(DIR_X16)/BASIC_1_combined.sym: \ $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_BASIC) $(CFG_X16) $(GEN_STR_X16) $(DIR_X16)/KERNAL_0_combined.sym $(DIR_X16)/BASIC_0_combined.sym @@ -502,7 +510,7 @@ $(DIR_U64CRT)/kernal.seg_1 $(DIR_U64CRT)/KERNAL_1_combined.vs $(DIR_U64CRT)/KERN @rm -f $@* $(DIR_U64CRT)/kernal.seg_1 $(DIR_U64CRT)/KERNAL_1* @$(TOOL_BUILD_SEGMENT) -a ../../$(TOOL_ASSEMBLER) -r CRT -s KERNAL_1 -i KERNAL_1-ultimate64-crt -o kernal.seg_1 -d $(DIR_U64CRT) -l 8000 -h 9fff $(CFG_U64CRT) $(GEN_STR_U64CRT) $(SRCDIR_KERNAL) $(GEN_KERNAL) -# Rules - BASIC, KERNAL, DOS and MON intermediate files, for MEGA65 +# Rules - BASIC, KERNAL, DOS, MON, and ZVM intermediate files, for MEGA65 $(DIR_M65)/OUTB_0.BIN $(DIR_M65)/BASIC_0_combined.vs $(DIR_M65)/BASIC_0_combined.sym: @mkdir -p $(DIR_M65) @@ -539,6 +547,11 @@ $(DIR_M65)/mon.seg_1 $(DIR_M65)/MON_1_combined.vs $(DIR_M65)/MON_1_combined.sym: @rm -f $@* $(DIR_M65)/mon.seg_1 $(DIR_M65)/MON_1* @$(TOOL_BUILD_SEGMENT) -a ../../$(TOOL_ASSEMBLER) -r M65 -s MON_1 -i MON_1-mega65 -o mon.seg_1 -d $(DIR_M65) -l 4000 -h 5fff $(CFG_M65) $(SRCDIR_MON_M65) +$(DIR_M65)/zvm.seg_1 $(DIR_M65)/ZVM_1_combined.vs $(DIR_M65)/ZVM_1_combined.sym: + @mkdir -p $(DIR_M65) + @rm -f $@* $(DIR_M65)/zvm.seg_1 $(DIR_M65)/ZVM_1* + @$(TOOL_BUILD_SEGMENT) -a ../../$(TOOL_ASSEMBLER) -r M65 -s ZVM_1 -i ZVM_1-mega65 -o zvm.seg_1 -d $(DIR_M65) -l 2000 -h 7fff $(CFG_M65) $(SRCDIR_ZVM_M65) + # Rules - BASIC and KERNAL intermediate files, for Commander X16 $(DIR_X16)/OUTB_0.BIN $(DIR_X16)/BASIC_0_combined.vs $(DIR_X16)/BASIC_0_combined.sym: @@ -720,9 +733,10 @@ $(TARGET_U64CRT_X): $(SEG_LIST_U64CRT) $(CRT_BIN_LIST) build/padding_8_KB # $0:$D000 - 4 KB - legacy mode chargen # $0:$E000 - 8 KB - KERNAL segment 0 # $1:$0000 - 8 KB - Machine Language MONITOR -# $1:$2000 - 56 KB - unused for now, padding +# $1:$2000 - 24 KB - Z80 Virtual Machine for CP/M +# $1:$8000 - 32 KB - unused for now, padding; most likely will be used for BASIC extensions -$(TARGET_M65_x_ORF) $(TARGET_M65_x_PXL): $(SEG_LIST_M65) build/padding_16_KB build/padding_4_KB $(TARGET_CHR_ORF) build/chargen_openroms.patched $(TARGET_CHR_PXL) build/chargen_pxlfont.patched +$(TARGET_M65_x_ORF) $(TARGET_M65_x_PXL): $(SEG_LIST_M65) build/padding_16_KB $(TARGET_CHR_ORF) build/chargen_openroms.patched $(TARGET_CHR_PXL) build/chargen_pxlfont.patched @echo @echo @echo @@ -738,8 +752,7 @@ $(TARGET_M65_x_ORF) $(TARGET_M65_x_PXL): $(SEG_LIST_M65) build/padding_16_KB bui @cat $(TARGET_CHR_ORF) >> $(TARGET_M65_x_ORF) @cat $(DIR_M65)/kernal.seg_0 >> $(TARGET_M65_x_ORF) @cat $(DIR_M65)/mon.seg_1 >> $(TARGET_M65_x_ORF) - @cat build/padding_8_KB >> $(TARGET_M65_x_ORF) - @cat build/padding_16_KB >> $(TARGET_M65_x_ORF) + @cat $(DIR_M65)/zvm.seg_1 >> $(TARGET_M65_x_ORF) @cat build/padding_16_KB >> $(TARGET_M65_x_ORF) @cat build/padding_16_KB >> $(TARGET_M65_x_ORF) @echo @@ -757,8 +770,7 @@ $(TARGET_M65_x_ORF) $(TARGET_M65_x_PXL): $(SEG_LIST_M65) build/padding_16_KB bui @cat $(TARGET_CHR_PXL) >> $(TARGET_M65_x_PXL) @cat $(DIR_M65)/kernal.seg_0 >> $(TARGET_M65_x_PXL) @cat $(DIR_M65)/mon.seg_1 >> $(TARGET_M65_x_PXL) - @cat build/padding_8_KB >> $(TARGET_M65_x_PXL) - @cat build/padding_16_KB >> $(TARGET_M65_x_PXL) + @cat $(DIR_M65)/zvm.seg_1 >> $(TARGET_M65_x_PXL) @cat build/padding_16_KB >> $(TARGET_M65_x_PXL) @cat build/padding_16_KB >> $(TARGET_M65_x_PXL) @echo diff --git a/src/aliases/,aliases_ram_lowmem_m65.s b/src/aliases/,aliases_ram_lowmem_m65.s index ee955201..b4b050ee 100644 --- a/src/aliases/,aliases_ram_lowmem_m65.s +++ b/src/aliases/,aliases_ram_lowmem_m65.s @@ -35,7 +35,18 @@ ; $400-$57F - reserved for BASIC - ; $400-$57F -- UNUSED -- reserved for BASIC + ; $400-$54F -- UNUSED -- reserved for BASIC + + ; $558-$57F - reserved for MONITOR + + !addr MON_XVEC = $550 ; $550-$551 monitor exit vector + !addr MON_Ix_Mne = $552 ; index to mnemonics table + !addr MON_Op_Mne = $553 ; 3 bytes for mnemonic + !addr MON_Op_Ix = $554 ; type of constant + !addr MON_Op_Len = $555 ; length of operand + !addr MON_Disk_Track = $556 ; logical track 1 -> 255 + !addr MON_Disk_Sector = $557 ; logical sector 0 -> 255 + !addr MON_DATA = $558 ; $558-$57F 40 bytes, buffer for hunt and filename ; $580-$5FF - reserved for KERNAL diff --git a/src/kernal/board_m65/mega65_proxies_monitor.s b/src/kernal/board_m65/mega65_proxies_monitor.s index 6cb1869c..5329b781 100644 --- a/src/kernal/board_m65/mega65_proxies_monitor.s +++ b/src/kernal/board_m65/mega65_proxies_monitor.s @@ -2,7 +2,7 @@ ;; #LAYOUT# * * #IGNORE ; -; Proxies for calling MEGA65 segment KERNAL_0 routines from KERNAL_1 +; Proxies for calling MEGA65 segment KERNAL_0 routines from MON_1 ; @@ -22,3 +22,47 @@ proxy_M1_CHROUT: proxy_M1_end: jmp map_MON_1 + + +; Routines below typicaly do not change mapping - but it is still possible they'll do + + +proxy_M1_SECOND: + + jsr SECOND + bra proxy_M1_end + +proxy_M1_TKSA: + + jsr TKSA + bra proxy_M1_end + +proxy_M1_ACPTR: + + jsr ACPTR + bra proxy_M1_end + +proxy_M1_CIOUT: + + jsr CIOUT + bra proxy_M1_end + +proxy_M1_UNTLK: + + jsr UNTLK + bra proxy_M1_end + +proxy_M1_UNLSN: + + jsr UNLSN + bra proxy_M1_end + +proxy_M1_LISTEN: + + jsr LISTEN + bra proxy_M1_end + +proxy_M1_TALK: + + jsr TALK + bra proxy_M1_end diff --git a/src/mon_m65/,imports_monitor.s b/src/mon_m65/,imports_monitor.s index 3c916417..139f9d09 100644 --- a/src/mon_m65/,imports_monitor.s +++ b/src/mon_m65/,imports_monitor.s @@ -4,7 +4,19 @@ ; Definitions for calling MEGA65 segment KERNAL_0 routines from MON_1 ; +;; #ALIAS# SETMSG = KERNAL_0.SETMSG +;; #ALIAS# STOP = KERNAL_0.STOP + ;; #ALIAS# map_NORMAL = KERNAL_0.map_NORMAL - +;; #ALIAS# map_MON_1 = KERNAL_0.map_MON_1 + ;; #ALIAS# CHRIN = KERNAL_0.proxy_M1_CHRIN ;; #ALIAS# CHROUT = KERNAL_0.proxy_M1_CHROUT +;; #ALIAS# SECOND = KERNAL_0.proxy_M1_SECOND +;; #ALIAS# TKSA = KERNAL_0.proxy_M1_TKSA +;; #ALIAS# ACPTR = KERNAL_0.proxy_M1_ACPTR +;; #ALIAS# CIOUT = KERNAL_0.proxy_M1_CIOUT +;; #ALIAS# UNTLK = KERNAL_0.proxy_M1_UNTLK +;; #ALIAS# UNLSN = KERNAL_0.proxy_M1_UNLSN +;; #ALIAS# LISTEN = KERNAL_0.proxy_M1_LISTEN +;; #ALIAS# TALK = KERNAL_0.proxy_M1_TALK diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 5dda8ab3..4c81e588 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -58,31 +58,10 @@ !addr Dig_Cnt = $6e !addr Buf_Index = $6f -!addr MODE_80 = $d7 ; 80 column / 40 volumn flag +!addr MODE_80 = $d7 ; 80 column / 40 volumn flag ; XXX add routine to detect this -!addr X_Vector = $400 ; exit vector (ROM version dependent) -!addr Ix_Mne = $402 ; index to mnemonics table -!addr Op_Mne = $403 ; 3 bytes for mnemonic -!addr Op_Ix = $406 ; type of constant -!addr Op_Len = $407 ; length of operand -!addr Disk_Unit = $408 ; unit = device -!addr Disk_Track = $409 ; logical track 1 -> 255 -!addr Disk_Sector = $40A ; logical sector 0 -> 255 -!addr Disk_Status = $40B ; BCD value of status - -!addr Mon_Data = $410 ; 40 bytes, buffer for hunt and filename -!addr Disk_Msg = $440 ; 40 bytes, disk status as text message - -!addr SETMSG = $ff90 -!addr SECOND = $ff93 -!addr TKSA = $ff96 -!addr ACPTR = $ffa5 -!addr CIOUT = $ffa8 -!addr UNTALK = $ffab -!addr UNLSN = $ffae -!addr LISTEN = $ffb1 -!addr TALK = $ffb4 -!addr STOP = $ffe1 +!addr Disk_Status = $40A ; BCD value of status +!addr Disk_Msg = $410 ; 40 bytes, disk status as text message ; XXX get rid of this buffer ; ******* @@ -133,9 +112,9 @@ Mon_Call LDA #map_NORMAL STA PCL - STA X_Vector + STA MON_XVEC STX PCH - STX X_Vector+1 + STX MON_XVEC+1 ; ******* Mon_Start @@ -315,7 +294,7 @@ Jump_Table Mon_Exit ; ****** - JMP (X_Vector) + JMP (MON_XVEC) ; ******* LAC_To_PC @@ -770,7 +749,7 @@ Mon_Hunt CMP #0 LBEQ Mon_Error ; null string -@lpstr STA Mon_Data,Y +@lpstr STA MON_DATA,Y INY JSR Get_Char BEQ @hunt @@ -780,7 +759,7 @@ Mon_Hunt @bin JSR Got_LAC @lpbin LDA Long_AC - STA Mon_Data,Y + STA MON_DATA,Y INY JSR Get_LAC BCS @hunt @@ -792,7 +771,7 @@ Mon_Hunt @lpstart LDY #0 @lpins JSR Fetch - CMP Mon_Data,Y + CMP MON_DATA,Y BNE @next INY CPY Long_DA @@ -821,9 +800,9 @@ Load_Save ; STY FNLEN ; STY FNBANK ; STY IOSTATUS - ; LDA #>Mon_Data + ; LDA #>MON_DATA ; STA FNADR+1 - ; LDA # not 2nd. char CMP #'B' BNE @labb ; 2nd. char != 'B' - LDZ Op_Mne + LDZ MON_Op_Mne CPZ #'L' BNE @labb ; 1st. Char != 'L' SMB6 Op_Flag ; flag long branch DEX ; skip 'L' -@labb STA Op_Mne,X ; next mne character +@labb STA MON_Op_Mne,X ; next mne character INX CPX #3 BNE @getin ; encode 3 letter mnemonic -@lpenc LDA Op_Mne-1,X +@lpenc LDA MON_Op_Mne-1,X SEC SBC #$3f ; offset LDY #5 ; 5 bit code @@ -973,7 +952,7 @@ Mon_Assemble BPL @lpfind JMP Mon_Error -@found STX Ix_Mne +@found STX MON_Ix_Mne ; find 1st. opcode for this mnemonic @@ -1021,10 +1000,10 @@ Mon_Assemble LDA Long_AC+1 BNE @labf ; high byte not zero DEY ; Y=1 byte operand -@labf LDX Op_Ix ; X = operand value # +@labf LDX MON_Op_Ix ; X = operand value # TYA ; A = 1:byte or 2:word - STA Op_Len,X ; store operand length - INC Op_Ix ; ++index to operand value + STA MON_Op_Len,X ; store operand length + INC MON_Op_Ix ; ++index to operand value TXA ; A = current index BNE @labg ; -> at 2nd. byte JSR LAC_To_LCT ; Long_CT = 1st. operand @@ -1067,7 +1046,7 @@ Mon_Assemble @comma CMP #',' BNE @stack - LDA Op_Ix ; operand value # + LDA MON_Op_Ix ; operand value # BEQ @error LDX #4 ; outside comma LDA Mode_Flags @@ -1101,7 +1080,7 @@ Mon_Assemble @rbra CMP #']' BNE @right BBR5 Op_Flag,@error - LDA Op_Ix + LDA MON_Op_Ix LBEQ Mon_Error ; no value LDA Mode_Flags CMP #$40 ; ( @@ -1115,7 +1094,7 @@ Mon_Assemble @right CMP #')' BNE @X - LDA Op_Ix + LDA MON_Op_Ix LBEQ Mon_Error ; no value LDA Mode_Flags CMP #$40 ; ( @@ -1129,7 +1108,7 @@ Mon_Assemble @X CMP #'X' BNE @Y - LDA Op_Ix + LDA MON_Op_Ix LBEQ Mon_Error LDA Mode_Flags CMP #$60 @@ -1143,7 +1122,7 @@ Mon_Assemble @Y CMP #'Y' BNE @Z - LDA Op_Ix + LDA MON_Op_Ix LBEQ Mon_Error LDA Mode_Flags CMP #$4c ; ($nn), @@ -1159,7 +1138,7 @@ Mon_Assemble @Z CMP #'Z' LBNE Mon_Error - LDA Op_Ix + LDA MON_Op_Ix LBEQ Mon_Error LDA Mode_Flags CMP #$4c ; $nn, @@ -1169,11 +1148,11 @@ Mon_Assemble ; BBR BBS RMB SMB two operands -@adjust LDA Ix_Mne - LDX Op_Ix ; # if values +@adjust LDA MON_Ix_Mne + LDX MON_Op_Ix ; # if values BEQ @match ; -> no operand DEX - BEQ @one ; -> one operand + BEQ @one ; -> one operand DEX LBNE Mon_Error ; -> error if more than 2 CMP #5 ; BBR @@ -1223,16 +1202,16 @@ Mon_Assemble @match JSR Mode_Index @lpmatch JSR Match_Mode BEQ @okmat - LDA Op_Len + LDA MON_Op_Len LBEQ Mon_Error LDA Mode_Flags LBMI Mon_Error AND #%00111111 STA Mode_Flags - INC Op_Len + INC MON_Op_Len JSR Size_To_Mode BRA @lpmatch -@okmat LDY Op_Len +@okmat LDY MON_Op_Len TXA ; store instruction bytes @@ -1350,7 +1329,7 @@ Match_Mode @next INX ; next opcode BEQ @error LDY MNE_Index,X - CPY Ix_Mne ; same mnemonic ? + CPY MON_Ix_Mne ; same mnemonic ? BEQ @loop ; -> compare again BRA @next @@ -1376,7 +1355,7 @@ Mode_Index Size_To_Mode ; ********** - LDA Op_Len + LDA MON_Op_Len LSR ROR ROR @@ -2214,7 +2193,7 @@ Get_Disk_Status BCS @loop LDA #0 STA Disk_Msg,Y - JSR UNTALK + JSR UNTLK LDA Disk_Status RTS @@ -2256,7 +2235,7 @@ DOS_U ; XXX connect it somehow to command list LBCC Mon_Error CMP #'3' ; U2: write LBCS Mon_Error - STA Mon_Data+1 ; U type + STA MON_DATA+1 ; U type INC Buf_Index JSR Get_LAC LBCS Mon_Error @@ -2265,12 +2244,12 @@ DOS_U ; XXX connect it somehow to command list JSR Get_LAC LBCS Mon_Error LDA Long_AC - STA Disk_Track + STA MON_Disk_Track JSR Get_LAC LBCS Mon_Error LDA Long_AC - STA Disk_Sector + STA MON_Disk_Sector JSR Get_LAC JSR LAC_To_LCT ; Long_CT = sector count @@ -2278,7 +2257,7 @@ DOS_U ; XXX connect it somehow to command list JSR Open_Disk_Buffer -@loop LDA Mon_Data+1 +@loop LDA MON_DATA+1 LSR BEQ @write JSR Find_next_Sector @@ -2291,7 +2270,7 @@ DOS_U ; XXX connect it somehow to command list BNE @error @next JSR Inc_LPC_Page - INC Disk_Sector + INC MON_Disk_Sector DEW Long_CT BPL @loop @@ -2310,8 +2289,8 @@ Find_next_Sector CMP #$66 ; illegal track or sector BNE @error ; error LDA #0 - STA Disk_Sector - INC Disk_Track ; try next track + STA MON_Disk_Sector + INC MON_Disk_Track ; try next track JSR Build_U_String JSR Send_Disk_Command JSR Get_Disk_Status @@ -2349,7 +2328,7 @@ Send_Disk_Command ; *************** JSR Open_Command_Channel -@loop LDA Mon_Data,Y +@loop LDA MON_DATA,Y BEQ @end JSR CIOUT INY @@ -2370,7 +2349,7 @@ Read_Sector STA [Long_PC],Z INZ BNE @loop - JMP UNTALK + JMP UNTLK ; ********** Write_Sector @@ -2399,16 +2378,16 @@ Set_TS @100 CMP #100 BCC @10 - INC Mon_Data,X + INC MON_DATA,X SBC #100 BRA @100 @10 CMP #10 BCC @1 - INC Mon_Data+1,X + INC MON_DATA+1,X SBC #10 BRA @10 @1 ORA #'0' - STA Mon_Data+2,X + STA MON_DATA+2,X RTS ; @[u],U1 mem track startsec [endsec] : read disk sector(s) @@ -2421,16 +2400,16 @@ Build_U_String LDX #14 @loop LDA U1,X - STA Mon_Data,X + STA MON_DATA,X DEX CPX #2 BCS @loop LDA #'U' - STA Mon_Data - LDA Disk_Track + STA MON_DATA + LDA MON_Disk_Track LDX #7 JSR Set_TS - LDA Disk_Sector + LDA MON_Disk_Sector LDX #11 JMP Set_TS @@ -2787,7 +2766,7 @@ BP_ZERO !pet "b-p 9 0",0 ; set buffer pointer to 0 Reg_Text ; ****** JSR PRIMM - !pet KEY_RETURN, " pc sr ac xr yr zr bp sp nvebdizc", KEY_RETURN, "; ", KEY_ESC, "q",0 + !pet KEY_RETURN, " pc sr ac xr yr zr bp sp nvebdizc", KEY_RETURN, "; ",0 RTS ; ****** diff --git a/src/zvm_m65/dummy.s b/src/zvm_m65/dummy.s new file mode 100644 index 00000000..14351f49 --- /dev/null +++ b/src/zvm_m65/dummy.s @@ -0,0 +1,4 @@ + +; Z80 virtual machine - stub + + rts From 655fbd96e7eeee277bdf671ea93bfe0aa17ed5d2 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 15 Dec 2020 23:01:40 +0100 Subject: [PATCH 026/257] modified PRIMM to preserve .Y --- src/kernal/print/primm.s | 4 +++- src/mon_m65/bsmon_glue.s | 6 ++++-- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/src/kernal/print/primm.s b/src/kernal/print/primm.s index 00df50ea..466bcbf0 100644 --- a/src/kernal/print/primm.s +++ b/src/kernal/print/primm.s @@ -2,7 +2,7 @@ ;; #LAYOUT# * * #IGNORE -; 'Print immediate', original implementation by Mike Barry, adapted to 65CE02 +; 'Print immediate', original implementation by Mike Barry, adapted to 65CE02, modified to preserve .Y ; see http://www.6502.org/source/io/primm.htm @@ -12,6 +12,7 @@ PRIMM: sta PTR1 pla ; get high part of (string address-1) sta PTR2 + phy +bra @2 @1: jsr JCHROUT ; output a string char @@ -23,6 +24,7 @@ PRIMM: ldy #$00 lda (PTR1), y ; get string char bne @1 ; output and continue if not NUL + ply lda PTR2 pha lda PTR1 diff --git a/src/mon_m65/bsmon_glue.s b/src/mon_m65/bsmon_glue.s index f35929ad..031db660 100644 --- a/src/mon_m65/bsmon_glue.s +++ b/src/mon_m65/bsmon_glue.s @@ -1,4 +1,4 @@ -; 'Print immediate', original implementation by Mike Barry, adapted to 65CE02 +; 'Print immediate', original implementation by Mike Barry, adapted to 65CE02, modified to preserve .Y ; see http://www.6502.org/source/io/primm.htm PRIMM: @@ -7,9 +7,10 @@ PRIMM: sta PTR1 pla ; get high part of (string address-1) sta PTR2 + phy +bra @2 @1: - jsr CHROUT ; output a string char + jsr CHROUT ; output a string char @2: inc PTR1 ; advance the string pointer bne @3 @@ -18,6 +19,7 @@ PRIMM: ldy #$00 lda (PTR1), y ; get string char bne @1 ; output and continue if not NUL + ply lda PTR2 pha lda PTR1 From a701a5b7fe4942c240f033c4909609988cecb5c5 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 15 Dec 2020 23:26:30 +0100 Subject: [PATCH 027/257] fixed mnemonics encoding in monitor --- src/mon_m65/bsmon.s | 218 ++++++++++++++++++++++---------------------- 1 file changed, 109 insertions(+), 109 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 4c81e588..755c3ada 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -2486,119 +2486,101 @@ Close_Disk_Buffer !set ENC_Y = %00011110 !set ENC_Z = %00011111 -!set ENC_ADC = ENC_A * 64 * 64 + ENC_D * 64 + ENC_C -!set ENC_AND = ENC_A * 64 * 64 + ENC_N * 64 + ENC_D -!set ENC_ASL = ENC_A * 64 * 64 + ENC_S * 64 + ENC_L -!set ENC_ASR = ENC_A * 64 * 64 + ENC_S * 64 + ENC_R -!set ENC_ASW = ENC_A * 64 * 64 + ENC_S * 64 + ENC_W -!set ENC_BBR = ENC_B * 64 * 64 + ENC_B * 64 + ENC_R -!set ENC_BBS = ENC_B * 64 * 64 + ENC_B * 64 + ENC_S -!set ENC_BCC = ENC_B * 64 * 64 + ENC_C * 64 + ENC_C -!set ENC_BCS = ENC_B * 64 * 64 + ENC_C * 64 + ENC_S -!set ENC_BEQ = ENC_B * 64 * 64 + ENC_E * 64 + ENC_Q -!set ENC_BIT = ENC_B * 64 * 64 + ENC_I * 64 + ENC_T -!set ENC_BMI = ENC_B * 64 * 64 + ENC_M * 64 + ENC_I -!set ENC_BNE = ENC_B * 64 * 64 + ENC_N * 64 + ENC_E -!set ENC_BPL = ENC_B * 64 * 64 + ENC_P * 64 + ENC_L -!set ENC_BRA = ENC_B * 64 * 64 + ENC_R * 64 + ENC_A -!set ENC_BRK = ENC_B * 64 * 64 + ENC_R * 64 + ENC_K -!set ENC_BSR = ENC_B * 64 * 64 + ENC_S * 64 + ENC_R -!set ENC_BVC = ENC_B * 64 * 64 + ENC_V * 64 + ENC_C -!set ENC_BVS = ENC_B * 64 * 64 + ENC_V * 64 + ENC_S -!set ENC_CLC = ENC_C * 64 * 64 + ENC_L * 64 + ENC_C -!set ENC_CLD = ENC_C * 64 * 64 + ENC_L * 64 + ENC_D -!set ENC_CLE = ENC_C * 64 * 64 + ENC_L * 64 + ENC_E -!set ENC_CLI = ENC_C * 64 * 64 + ENC_L * 64 + ENC_I -!set ENC_CLV = ENC_C * 64 * 64 + ENC_L * 64 + ENC_V -!set ENC_CMP = ENC_C * 64 * 64 + ENC_M * 64 + ENC_P -!set ENC_CPX = ENC_C * 64 * 64 + ENC_P * 64 + ENC_X -!set ENC_CPY = ENC_C * 64 * 64 + ENC_P * 64 + ENC_Y -!set ENC_CPZ = ENC_C * 64 * 64 + ENC_P * 64 + ENC_Z -!set ENC_DEC = ENC_D * 64 * 64 + ENC_E * 64 + ENC_C -!set ENC_DEW = ENC_D * 64 * 64 + ENC_E * 64 + ENC_W -!set ENC_DEX = ENC_D * 64 * 64 + ENC_E * 64 + ENC_X -!set ENC_DEY = ENC_D * 64 * 64 + ENC_E * 64 + ENC_Y -!set ENC_DEZ = ENC_D * 64 * 64 + ENC_E * 64 + ENC_Z -!set ENC_EOR = ENC_E * 64 * 64 + ENC_O * 64 + ENC_R -!set ENC_INC = ENC_I * 64 * 64 + ENC_N * 64 + ENC_C -!set ENC_INW = ENC_I * 64 * 64 + ENC_N * 64 + ENC_W -!set ENC_INX = ENC_I * 64 * 64 + ENC_N * 64 + ENC_X -!set ENC_INY = ENC_I * 64 * 64 + ENC_N * 64 + ENC_Y -!set ENC_INZ = ENC_I * 64 * 64 + ENC_N * 64 + ENC_Z -!set ENC_JMP = ENC_J * 64 * 64 + ENC_M * 64 + ENC_P -!set ENC_JSR = ENC_J * 64 * 64 + ENC_S * 64 + ENC_R -!set ENC_LDA = ENC_L * 64 * 64 + ENC_D * 64 + ENC_A -!set ENC_LDX = ENC_L * 64 * 64 + ENC_D * 64 + ENC_X -!set ENC_LDY = ENC_L * 64 * 64 + ENC_D * 64 + ENC_Y -!set ENC_LDZ = ENC_L * 64 * 64 + ENC_D * 64 + ENC_Z -!set ENC_LSR = ENC_L * 64 * 64 + ENC_S * 64 + ENC_R -!set ENC_MAP = ENC_M * 64 * 64 + ENC_A * 64 + ENC_P -!set ENC_NEG = ENC_N * 64 * 64 + ENC_E * 64 + ENC_G -!set ENC_NOP = ENC_N * 64 * 64 + ENC_O * 64 + ENC_P -!set ENC_ORA = ENC_O * 64 * 64 + ENC_R * 64 + ENC_A -!set ENC_PHA = ENC_P * 64 * 64 + ENC_H * 64 + ENC_A -!set ENC_PHP = ENC_P * 64 * 64 + ENC_H * 64 + ENC_P -!set ENC_PHW = ENC_P * 64 * 64 + ENC_H * 64 + ENC_W -!set ENC_PHX = ENC_P * 64 * 64 + ENC_H * 64 + ENC_X -!set ENC_PHY = ENC_P * 64 * 64 + ENC_H * 64 + ENC_Y -!set ENC_PHZ = ENC_P * 64 * 64 + ENC_H * 64 + ENC_Z -!set ENC_PLA = ENC_P * 64 * 64 + ENC_L * 64 + ENC_A -!set ENC_PLP = ENC_P * 64 * 64 + ENC_L * 64 + ENC_P -!set ENC_PLX = ENC_P * 64 * 64 + ENC_L * 64 + ENC_X -!set ENC_PLY = ENC_P * 64 * 64 + ENC_L * 64 + ENC_Y -!set ENC_PLZ = ENC_P * 64 * 64 + ENC_L * 64 + ENC_Z -!set ENC_RMB = ENC_R * 64 * 64 + ENC_M * 64 + ENC_B -!set ENC_ROL = ENC_R * 64 * 64 + ENC_O * 64 + ENC_L -!set ENC_ROR = ENC_R * 64 * 64 + ENC_O * 64 + ENC_R -!set ENC_ROW = ENC_R * 64 * 64 + ENC_O * 64 + ENC_W -!set ENC_RTI = ENC_R * 64 * 64 + ENC_T * 64 + ENC_I -!set ENC_RTS = ENC_R * 64 * 64 + ENC_T * 64 + ENC_S -!set ENC_SBC = ENC_S * 64 * 64 + ENC_B * 64 + ENC_C -!set ENC_SEC = ENC_S * 64 * 64 + ENC_E * 64 + ENC_C -!set ENC_SED = ENC_S * 64 * 64 + ENC_E * 64 + ENC_D -!set ENC_SEE = ENC_S * 64 * 64 + ENC_E * 64 + ENC_E -!set ENC_SEI = ENC_S * 64 * 64 + ENC_E * 64 + ENC_I -!set ENC_SMB = ENC_S * 64 * 64 + ENC_M * 64 + ENC_B -!set ENC_STA = ENC_S * 64 * 64 + ENC_T * 64 + ENC_A -!set ENC_STX = ENC_S * 64 * 64 + ENC_T * 64 + ENC_X -!set ENC_STY = ENC_S * 64 * 64 + ENC_T * 64 + ENC_Y -!set ENC_STZ = ENC_S * 64 * 64 + ENC_T * 64 + ENC_Z -!set ENC_TAB = ENC_T * 64 * 64 + ENC_A * 64 + ENC_B -!set ENC_TAX = ENC_T * 64 * 64 + ENC_A * 64 + ENC_X -!set ENC_TAY = ENC_T * 64 * 64 + ENC_A * 64 + ENC_Y -!set ENC_TAZ = ENC_T * 64 * 64 + ENC_A * 64 + ENC_Z -!set ENC_TBA = ENC_T * 64 * 64 + ENC_B * 64 + ENC_A -!set ENC_TRB = ENC_T * 64 * 64 + ENC_R * 64 + ENC_B -!set ENC_TSB = ENC_T * 64 * 64 + ENC_S * 64 + ENC_B -!set ENC_TSX = ENC_T * 64 * 64 + ENC_S * 64 + ENC_X -!set ENC_TSY = ENC_T * 64 * 64 + ENC_S * 64 + ENC_Y -!set ENC_TXA = ENC_T * 64 * 64 + ENC_X * 64 + ENC_A -!set ENC_TXS = ENC_T * 64 * 64 + ENC_X * 64 + ENC_S -!set ENC_TYA = ENC_T * 64 * 64 + ENC_Y * 64 + ENC_A -!set ENC_TYS = ENC_T * 64 * 64 + ENC_Y * 64 + ENC_S -!set ENC_TZA = ENC_T * 64 * 64 + ENC_Z * 64 + ENC_A +!set ENC_ADC = (ENC_A * 32 * 32 + ENC_D * 32 + ENC_C) * 2 +!set ENC_AND = (ENC_A * 32 * 32 + ENC_N * 32 + ENC_D) * 2 +!set ENC_ASL = (ENC_A * 32 * 32 + ENC_S * 32 + ENC_L) * 2 +!set ENC_ASR = (ENC_A * 32 * 32 + ENC_S * 32 + ENC_R) * 2 +!set ENC_ASW = (ENC_A * 32 * 32 + ENC_S * 32 + ENC_W) * 2 +!set ENC_BBR = (ENC_B * 32 * 32 + ENC_B * 32 + ENC_R) * 2 +!set ENC_BBS = (ENC_B * 32 * 32 + ENC_B * 32 + ENC_S) * 2 +!set ENC_BCC = (ENC_B * 32 * 32 + ENC_C * 32 + ENC_C) * 2 +!set ENC_BCS = (ENC_B * 32 * 32 + ENC_C * 32 + ENC_S) * 2 +!set ENC_BEQ = (ENC_B * 32 * 32 + ENC_E * 32 + ENC_Q) * 2 +!set ENC_BIT = (ENC_B * 32 * 32 + ENC_I * 32 + ENC_T) * 2 +!set ENC_BMI = (ENC_B * 32 * 32 + ENC_M * 32 + ENC_I) * 2 +!set ENC_BNE = (ENC_B * 32 * 32 + ENC_N * 32 + ENC_E) * 2 +!set ENC_BPL = (ENC_B * 32 * 32 + ENC_P * 32 + ENC_L) * 2 +!set ENC_BRA = (ENC_B * 32 * 32 + ENC_R * 32 + ENC_A) * 2 +!set ENC_BRK = (ENC_B * 32 * 32 + ENC_R * 32 + ENC_K) * 2 +!set ENC_BSR = (ENC_B * 32 * 32 + ENC_S * 32 + ENC_R) * 2 +!set ENC_BVC = (ENC_B * 32 * 32 + ENC_V * 32 + ENC_C) * 2 +!set ENC_BVS = (ENC_B * 32 * 32 + ENC_V * 32 + ENC_S) * 2 +!set ENC_CLC = (ENC_C * 32 * 32 + ENC_L * 32 + ENC_C) * 2 +!set ENC_CLD = (ENC_C * 32 * 32 + ENC_L * 32 + ENC_D) * 2 +!set ENC_CLE = (ENC_C * 32 * 32 + ENC_L * 32 + ENC_E) * 2 +!set ENC_CLI = (ENC_C * 32 * 32 + ENC_L * 32 + ENC_I) * 2 +!set ENC_CLV = (ENC_C * 32 * 32 + ENC_L * 32 + ENC_V) * 2 +!set ENC_CMP = (ENC_C * 32 * 32 + ENC_M * 32 + ENC_P) * 2 +!set ENC_CPX = (ENC_C * 32 * 32 + ENC_P * 32 + ENC_X) * 2 +!set ENC_CPY = (ENC_C * 32 * 32 + ENC_P * 32 + ENC_Y) * 2 +!set ENC_CPZ = (ENC_C * 32 * 32 + ENC_P * 32 + ENC_Z) * 2 +!set ENC_DEC = (ENC_D * 32 * 32 + ENC_E * 32 + ENC_C) * 2 +!set ENC_DEW = (ENC_D * 32 * 32 + ENC_E * 32 + ENC_W) * 2 +!set ENC_DEX = (ENC_D * 32 * 32 + ENC_E * 32 + ENC_X) * 2 +!set ENC_DEY = (ENC_D * 32 * 32 + ENC_E * 32 + ENC_Y) * 2 +!set ENC_DEZ = (ENC_D * 32 * 32 + ENC_E * 32 + ENC_Z) * 2 +!set ENC_EOR = (ENC_E * 32 * 32 + ENC_O * 32 + ENC_R) * 2 +!set ENC_INC = (ENC_I * 32 * 32 + ENC_N * 32 + ENC_C) * 2 +!set ENC_INW = (ENC_I * 32 * 32 + ENC_N * 32 + ENC_W) * 2 +!set ENC_INX = (ENC_I * 32 * 32 + ENC_N * 32 + ENC_X) * 2 +!set ENC_INY = (ENC_I * 32 * 32 + ENC_N * 32 + ENC_Y) * 2 +!set ENC_INZ = (ENC_I * 32 * 32 + ENC_N * 32 + ENC_Z) * 2 +!set ENC_JMP = (ENC_J * 32 * 32 + ENC_M * 32 + ENC_P) * 2 +!set ENC_JSR = (ENC_J * 32 * 32 + ENC_S * 32 + ENC_R) * 2 +!set ENC_LDA = (ENC_L * 32 * 32 + ENC_D * 32 + ENC_A) * 2 +!set ENC_LDX = (ENC_L * 32 * 32 + ENC_D * 32 + ENC_X) * 2 +!set ENC_LDY = (ENC_L * 32 * 32 + ENC_D * 32 + ENC_Y) * 2 +!set ENC_LDZ = (ENC_L * 32 * 32 + ENC_D * 32 + ENC_Z) * 2 +!set ENC_LSR = (ENC_L * 32 * 32 + ENC_S * 32 + ENC_R) * 2 +!set ENC_MAP = (ENC_M * 32 * 32 + ENC_A * 32 + ENC_P) * 2 +!set ENC_NEG = (ENC_N * 32 * 32 + ENC_E * 32 + ENC_G) * 2 +!set ENC_NOP = (ENC_N * 32 * 32 + ENC_O * 32 + ENC_P) * 2 +!set ENC_ORA = (ENC_O * 32 * 32 + ENC_R * 32 + ENC_A) * 2 +!set ENC_PHA = (ENC_P * 32 * 32 + ENC_H * 32 + ENC_A) * 2 +!set ENC_PHP = (ENC_P * 32 * 32 + ENC_H * 32 + ENC_P) * 2 +!set ENC_PHW = (ENC_P * 32 * 32 + ENC_H * 32 + ENC_W) * 2 +!set ENC_PHX = (ENC_P * 32 * 32 + ENC_H * 32 + ENC_X) * 2 +!set ENC_PHY = (ENC_P * 32 * 32 + ENC_H * 32 + ENC_Y) * 2 +!set ENC_PHZ = (ENC_P * 32 * 32 + ENC_H * 32 + ENC_Z) * 2 +!set ENC_PLA = (ENC_P * 32 * 32 + ENC_L * 32 + ENC_A) * 2 +!set ENC_PLP = (ENC_P * 32 * 32 + ENC_L * 32 + ENC_P) * 2 +!set ENC_PLX = (ENC_P * 32 * 32 + ENC_L * 32 + ENC_X) * 2 +!set ENC_PLY = (ENC_P * 32 * 32 + ENC_L * 32 + ENC_Y) * 2 +!set ENC_PLZ = (ENC_P * 32 * 32 + ENC_L * 32 + ENC_Z) * 2 +!set ENC_RMB = (ENC_R * 32 * 32 + ENC_M * 32 + ENC_B) * 2 +!set ENC_ROL = (ENC_R * 32 * 32 + ENC_O * 32 + ENC_L) * 2 +!set ENC_ROR = (ENC_R * 32 * 32 + ENC_O * 32 + ENC_R) * 2 +!set ENC_ROW = (ENC_R * 32 * 32 + ENC_O * 32 + ENC_W) * 2 +!set ENC_RTI = (ENC_R * 32 * 32 + ENC_T * 32 + ENC_I) * 2 +!set ENC_RTS = (ENC_R * 32 * 32 + ENC_T * 32 + ENC_S) * 2 +!set ENC_SBC = (ENC_S * 32 * 32 + ENC_B * 32 + ENC_C) * 2 +!set ENC_SEC = (ENC_S * 32 * 32 + ENC_E * 32 + ENC_C) * 2 +!set ENC_SED = (ENC_S * 32 * 32 + ENC_E * 32 + ENC_D) * 2 +!set ENC_SEE = (ENC_S * 32 * 32 + ENC_E * 32 + ENC_E) * 2 +!set ENC_SEI = (ENC_S * 32 * 32 + ENC_E * 32 + ENC_I) * 2 +!set ENC_SMB = (ENC_S * 32 * 32 + ENC_M * 32 + ENC_B) * 2 +!set ENC_STA = (ENC_S * 32 * 32 + ENC_T * 32 + ENC_A) * 2 +!set ENC_STX = (ENC_S * 32 * 32 + ENC_T * 32 + ENC_X) * 2 +!set ENC_STY = (ENC_S * 32 * 32 + ENC_T * 32 + ENC_Y) * 2 +!set ENC_STZ = (ENC_S * 32 * 32 + ENC_T * 32 + ENC_Z) * 2 +!set ENC_TAB = (ENC_T * 32 * 32 + ENC_A * 32 + ENC_B) * 2 +!set ENC_TAX = (ENC_T * 32 * 32 + ENC_A * 32 + ENC_X) * 2 +!set ENC_TAY = (ENC_T * 32 * 32 + ENC_A * 32 + ENC_Y) * 2 +!set ENC_TAZ = (ENC_T * 32 * 32 + ENC_A * 32 + ENC_Z) * 2 +!set ENC_TBA = (ENC_T * 32 * 32 + ENC_B * 32 + ENC_A) * 2 +!set ENC_TRB = (ENC_T * 32 * 32 + ENC_R * 32 + ENC_B) * 2 +!set ENC_TSB = (ENC_T * 32 * 32 + ENC_S * 32 + ENC_B) * 2 +!set ENC_TSX = (ENC_T * 32 * 32 + ENC_S * 32 + ENC_X) * 2 +!set ENC_TSY = (ENC_T * 32 * 32 + ENC_S * 32 + ENC_Y) * 2 +!set ENC_TXA = (ENC_T * 32 * 32 + ENC_X * 32 + ENC_A) * 2 +!set ENC_TXS = (ENC_T * 32 * 32 + ENC_X * 32 + ENC_S) * 2 +!set ENC_TYA = (ENC_T * 32 * 32 + ENC_Y * 32 + ENC_A) * 2 +!set ENC_TYS = (ENC_T * 32 * 32 + ENC_Y * 32 + ENC_S) * 2 +!set ENC_TZA = (ENC_T * 32 * 32 + ENC_Z * 32 + ENC_A) * 2 ; *** MNE_L -; *** - - !byte ENC_ADC, >ENC_AND, >ENC_ASL, >ENC_ASR, >ENC_ASW, >ENC_BBR, >ENC_BBS, >ENC_BCC @@ -2615,6 +2597,24 @@ MNE_R !byte >ENC_TYA, >ENC_TYS, >ENC_TZA +; *** +MNE_R +; *** + + !byte Date: Wed, 16 Dec 2020 16:07:32 +0100 Subject: [PATCH 028/257] added Z80 emulator skeleton --- src/zvm_m65/2000.zvm_vectable.s | 376 +++++++++++++++ src/zvm_m65/dummy.s | 4 - src/zvm_m65/z80_bit.s | 4 + src/zvm_m65/z80_block.s | 4 + src/zvm_m65/z80_call_return.s | 4 + src/zvm_m65/z80_exchange.s | 4 + src/zvm_m65/z80_general.s | 14 + src/zvm_m65/z80_io.s | 4 + src/zvm_m65/z80_jump.s | 4 + src/zvm_m65/z80_load_16bit.s | 4 + src/zvm_m65/z80_load_8bit.s | 4 + src/zvm_m65/z80_math_16bit.s | 4 + src/zvm_m65/z80_math_8bit.s | 4 + src/zvm_m65/z80_rotate_shift.s | 4 + src/zvm_m65/zvm_bios.s | 6 + src/zvm_m65/zvm_core.s | 825 ++++++++++++++++++++++++++++++++ 16 files changed, 1265 insertions(+), 4 deletions(-) create mode 100644 src/zvm_m65/2000.zvm_vectable.s delete mode 100644 src/zvm_m65/dummy.s create mode 100644 src/zvm_m65/z80_bit.s create mode 100644 src/zvm_m65/z80_block.s create mode 100644 src/zvm_m65/z80_call_return.s create mode 100644 src/zvm_m65/z80_exchange.s create mode 100644 src/zvm_m65/z80_general.s create mode 100644 src/zvm_m65/z80_io.s create mode 100644 src/zvm_m65/z80_jump.s create mode 100644 src/zvm_m65/z80_load_16bit.s create mode 100644 src/zvm_m65/z80_load_8bit.s create mode 100644 src/zvm_m65/z80_math_16bit.s create mode 100644 src/zvm_m65/z80_math_8bit.s create mode 100644 src/zvm_m65/z80_rotate_shift.s create mode 100644 src/zvm_m65/zvm_bios.s create mode 100644 src/zvm_m65/zvm_core.s diff --git a/src/zvm_m65/2000.zvm_vectable.s b/src/zvm_m65/2000.zvm_vectable.s new file mode 100644 index 00000000..b3abe91b --- /dev/null +++ b/src/zvm_m65/2000.zvm_vectable.s @@ -0,0 +1,376 @@ + +; +; Z80 Virtual Machine jumptables +; + + +!word ZVM_entry + + +; +; Vector table for executing Z80 instructions +; + +Z80_vectab_0: + + !word Z80_instr_00, Z80_instr_01, Z80_instr_02, Z80_instr_03, Z80_instr_04, Z80_instr_05, Z80_instr_06, Z80_instr_07 + !word Z80_instr_08, Z80_instr_09, Z80_instr_0A, Z80_instr_0B, Z80_instr_0C, Z80_instr_0D, Z80_instr_0E, Z80_instr_0F + + !word Z80_instr_10, Z80_instr_11, Z80_instr_12, Z80_instr_13, Z80_instr_14, Z80_instr_15, Z80_instr_16, Z80_instr_17 + !word Z80_instr_18, Z80_instr_19, Z80_instr_1A, Z80_instr_1B, Z80_instr_1C, Z80_instr_1D, Z80_instr_1E, Z80_instr_1F + + !word Z80_instr_20, Z80_instr_21, Z80_instr_22, Z80_instr_23, Z80_instr_24, Z80_instr_25, Z80_instr_26, Z80_instr_27 + !word Z80_instr_28, Z80_instr_29, Z80_instr_2A, Z80_instr_2B, Z80_instr_2C, Z80_instr_2D, Z80_instr_2E, Z80_instr_2F + + !word Z80_instr_30, Z80_instr_31, Z80_instr_32, Z80_instr_33, Z80_instr_34, Z80_instr_35, Z80_instr_36, Z80_instr_37 + !word Z80_instr_38, Z80_instr_39, Z80_instr_3A, Z80_instr_3B, Z80_instr_3C, Z80_instr_3D, Z80_instr_3E, Z80_instr_3F + + !word Z80_instr_40, Z80_instr_41, Z80_instr_42, Z80_instr_43, Z80_instr_44, Z80_instr_45, Z80_instr_46, Z80_instr_47 + !word Z80_instr_48, Z80_instr_49, Z80_instr_4A, Z80_instr_4B, Z80_instr_4C, Z80_instr_4D, Z80_instr_4E, Z80_instr_4F + + !word Z80_instr_50, Z80_instr_51, Z80_instr_52, Z80_instr_53, Z80_instr_54, Z80_instr_55, Z80_instr_56, Z80_instr_57 + !word Z80_instr_58, Z80_instr_59, Z80_instr_5A, Z80_instr_5B, Z80_instr_5C, Z80_instr_5D, Z80_instr_5E, Z80_instr_5F + + !word Z80_instr_60, Z80_instr_61, Z80_instr_62, Z80_instr_63, Z80_instr_64, Z80_instr_65, Z80_instr_66, Z80_instr_67 + !word Z80_instr_68, Z80_instr_69, Z80_instr_6A, Z80_instr_6B, Z80_instr_6C, Z80_instr_6D, Z80_instr_6E, Z80_instr_6F + + !word Z80_instr_70, Z80_instr_71, Z80_instr_72, Z80_instr_73, Z80_instr_74, Z80_instr_75, Z80_instr_76, Z80_instr_77 + !word Z80_instr_78, Z80_instr_79, Z80_instr_7A, Z80_instr_7B, Z80_instr_7C, Z80_instr_7D, Z80_instr_7E, Z80_instr_7F + +Z80_vectab_1: + + !word Z80_instr_80, Z80_instr_81, Z80_instr_82, Z80_instr_83, Z80_instr_84, Z80_instr_85, Z80_instr_86, Z80_instr_87 + !word Z80_instr_88, Z80_instr_89, Z80_instr_8A, Z80_instr_8B, Z80_instr_8C, Z80_instr_8D, Z80_instr_8E, Z80_instr_8F + + !word Z80_instr_90, Z80_instr_91, Z80_instr_92, Z80_instr_93, Z80_instr_94, Z80_instr_95, Z80_instr_96, Z80_instr_97 + !word Z80_instr_98, Z80_instr_99, Z80_instr_9A, Z80_instr_9B, Z80_instr_9C, Z80_instr_9D, Z80_instr_9E, Z80_instr_9F + + !word Z80_instr_A0, Z80_instr_A1, Z80_instr_A2, Z80_instr_A3, Z80_instr_A4, Z80_instr_A5, Z80_instr_A6, Z80_instr_A7 + !word Z80_instr_A8, Z80_instr_A9, Z80_instr_AA, Z80_instr_AB, Z80_instr_AC, Z80_instr_AD, Z80_instr_AE, Z80_instr_AF + + !word Z80_instr_B0, Z80_instr_B1, Z80_instr_B2, Z80_instr_B3, Z80_instr_B4, Z80_instr_B5, Z80_instr_B6, Z80_instr_B7 + !word Z80_instr_B8, Z80_instr_B9, Z80_instr_BA, Z80_instr_BB, Z80_instr_BC, Z80_instr_BD, Z80_instr_BE, Z80_instr_BF + + !word Z80_instr_C0, Z80_instr_C1, Z80_instr_C2, Z80_instr_C3, Z80_instr_C4, Z80_instr_C5, Z80_instr_C6, Z80_instr_C7 + !word Z80_instr_C8, Z80_instr_C9, Z80_instr_CA, Z80_instr_CB, Z80_instr_CC, Z80_instr_CD, Z80_instr_CE, Z80_instr_CF + + !word Z80_instr_D0, Z80_instr_D1, Z80_instr_D2, Z80_instr_D3, Z80_instr_D4, Z80_instr_D5, Z80_instr_D6, Z80_instr_D7 + !word Z80_instr_D8, Z80_instr_D9, Z80_instr_DA, Z80_instr_DB, Z80_instr_DC, Z80_instr_DD, Z80_instr_DE, Z80_instr_DF + + !word Z80_instr_E0, Z80_instr_E1, Z80_instr_E2, Z80_instr_E3, Z80_instr_E4, Z80_instr_E5, Z80_instr_E6, Z80_instr_E7 + !word Z80_instr_E8, Z80_instr_E9, Z80_instr_EA, Z80_instr_EB, Z80_instr_EC, Z80_instr_ED, Z80_instr_EE, Z80_instr_EF + + !word Z80_instr_F0, Z80_instr_F1, Z80_instr_F2, Z80_instr_F3, Z80_instr_F4, Z80_instr_F5, Z80_instr_F6, Z80_instr_F7 + !word Z80_instr_F8, Z80_instr_F9, Z80_instr_FA, Z80_instr_FB, Z80_instr_FC, Z80_instr_FD, Z80_instr_FE, Z80_instr_FF + +Z80_vectab_CB_0: + + !word Z80_instr_CB_00, Z80_instr_CB_01, Z80_instr_CB_02, Z80_instr_CB_03, Z80_instr_CB_04, Z80_instr_CB_05, Z80_instr_CB_06, Z80_instr_CB_07 + !word Z80_instr_CB_08, Z80_instr_CB_09, Z80_instr_CB_0A, Z80_instr_CB_0B, Z80_instr_CB_0C, Z80_instr_CB_0D, Z80_instr_CB_0E, Z80_instr_CB_0F + + !word Z80_instr_CB_10, Z80_instr_CB_11, Z80_instr_CB_12, Z80_instr_CB_13, Z80_instr_CB_14, Z80_instr_CB_15, Z80_instr_CB_16, Z80_instr_CB_17 + !word Z80_instr_CB_18, Z80_instr_CB_19, Z80_instr_CB_1A, Z80_instr_CB_1B, Z80_instr_CB_1C, Z80_instr_CB_1D, Z80_instr_CB_1E, Z80_instr_CB_1F + + !word Z80_instr_CB_20, Z80_instr_CB_21, Z80_instr_CB_22, Z80_instr_CB_23, Z80_instr_CB_24, Z80_instr_CB_25, Z80_instr_CB_26, Z80_instr_CB_27 + !word Z80_instr_CB_28, Z80_instr_CB_29, Z80_instr_CB_2A, Z80_instr_CB_2B, Z80_instr_CB_2C, Z80_instr_CB_2D, Z80_instr_CB_2E, Z80_instr_CB_2F + + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_instr_CB_38, Z80_instr_CB_39, Z80_instr_CB_3A, Z80_instr_CB_3B, Z80_instr_CB_3C, Z80_instr_CB_3D, Z80_instr_CB_3E, Z80_instr_CB_3F + + !word Z80_instr_CB_40, Z80_instr_CB_41, Z80_instr_CB_42, Z80_instr_CB_43, Z80_instr_CB_44, Z80_instr_CB_45, Z80_instr_CB_46, Z80_instr_CB_47 + !word Z80_instr_CB_48, Z80_instr_CB_49, Z80_instr_CB_4A, Z80_instr_CB_4B, Z80_instr_CB_4C, Z80_instr_CB_4D, Z80_instr_CB_4E, Z80_instr_CB_4F + + !word Z80_instr_CB_50, Z80_instr_CB_51, Z80_instr_CB_52, Z80_instr_CB_53, Z80_instr_CB_54, Z80_instr_CB_55, Z80_instr_CB_56, Z80_instr_CB_57 + !word Z80_instr_CB_58, Z80_instr_CB_59, Z80_instr_CB_5A, Z80_instr_CB_5B, Z80_instr_CB_5C, Z80_instr_CB_5D, Z80_instr_CB_5E, Z80_instr_CB_5F + + !word Z80_instr_CB_60, Z80_instr_CB_61, Z80_instr_CB_62, Z80_instr_CB_63, Z80_instr_CB_64, Z80_instr_CB_65, Z80_instr_CB_66, Z80_instr_CB_67 + !word Z80_instr_CB_68, Z80_instr_CB_69, Z80_instr_CB_6A, Z80_instr_CB_6B, Z80_instr_CB_6C, Z80_instr_CB_6D, Z80_instr_CB_6E, Z80_instr_CB_6F + + !word Z80_instr_CB_70, Z80_instr_CB_71, Z80_instr_CB_72, Z80_instr_CB_73, Z80_instr_CB_74, Z80_instr_CB_75, Z80_instr_CB_76, Z80_instr_CB_77 + !word Z80_instr_CB_78, Z80_instr_CB_79, Z80_instr_CB_7A, Z80_instr_CB_7B, Z80_instr_CB_7C, Z80_instr_CB_7D, Z80_instr_CB_7E, Z80_instr_CB_7F + +Z80_vectab_CB_1: + + !word Z80_instr_CB_80, Z80_instr_CB_81, Z80_instr_CB_82, Z80_instr_CB_83, Z80_instr_CB_84, Z80_instr_CB_85, Z80_instr_CB_86, Z80_instr_CB_87 + !word Z80_instr_CB_88, Z80_instr_CB_89, Z80_instr_CB_8A, Z80_instr_CB_8B, Z80_instr_CB_8C, Z80_instr_CB_8D, Z80_instr_CB_8E, Z80_instr_CB_8F + + !word Z80_instr_CB_90, Z80_instr_CB_91, Z80_instr_CB_92, Z80_instr_CB_93, Z80_instr_CB_94, Z80_instr_CB_95, Z80_instr_CB_96, Z80_instr_CB_97 + !word Z80_instr_CB_98, Z80_instr_CB_99, Z80_instr_CB_9A, Z80_instr_CB_9B, Z80_instr_CB_9C, Z80_instr_CB_9D, Z80_instr_CB_9E, Z80_instr_CB_9F + + !word Z80_instr_CB_A0, Z80_instr_CB_A1, Z80_instr_CB_A2, Z80_instr_CB_A3, Z80_instr_CB_A4, Z80_instr_CB_A5, Z80_instr_CB_A6, Z80_instr_CB_A7 + !word Z80_instr_CB_A8, Z80_instr_CB_A9, Z80_instr_CB_AA, Z80_instr_CB_AB, Z80_instr_CB_AC, Z80_instr_CB_AD, Z80_instr_CB_AE, Z80_instr_CB_AF + + !word Z80_instr_CB_B0, Z80_instr_CB_B1, Z80_instr_CB_B2, Z80_instr_CB_B3, Z80_instr_CB_B4, Z80_instr_CB_B5, Z80_instr_CB_B6, Z80_instr_CB_B7 + !word Z80_instr_CB_B8, Z80_instr_CB_B9, Z80_instr_CB_BA, Z80_instr_CB_BB, Z80_instr_CB_BC, Z80_instr_CB_BD, Z80_instr_CB_BE, Z80_instr_CB_BF + + !word Z80_instr_CB_C0, Z80_instr_CB_C1, Z80_instr_CB_C2, Z80_instr_CB_C3, Z80_instr_CB_C4, Z80_instr_CB_C5, Z80_instr_CB_C6, Z80_instr_CB_C7 + !word Z80_instr_CB_C8, Z80_instr_CB_C9, Z80_instr_CB_CA, Z80_instr_CB_CB, Z80_instr_CB_CC, Z80_instr_CB_CD, Z80_instr_CB_CE, Z80_instr_CB_CF + + !word Z80_instr_CB_D0, Z80_instr_CB_D1, Z80_instr_CB_D2, Z80_instr_CB_D3, Z80_instr_CB_D4, Z80_instr_CB_D5, Z80_instr_CB_D6, Z80_instr_CB_D7 + !word Z80_instr_CB_D8, Z80_instr_CB_D9, Z80_instr_CB_DA, Z80_instr_CB_DB, Z80_instr_CB_DC, Z80_instr_CB_DD, Z80_instr_CB_DE, Z80_instr_CB_DF + + !word Z80_instr_CB_E0, Z80_instr_CB_E1, Z80_instr_CB_E2, Z80_instr_CB_E3, Z80_instr_CB_E4, Z80_instr_CB_E5, Z80_instr_CB_E6, Z80_instr_CB_E7 + !word Z80_instr_CB_E8, Z80_instr_CB_E9, Z80_instr_CB_EA, Z80_instr_CB_EB, Z80_instr_CB_EC, Z80_instr_CB_ED, Z80_instr_CB_EE, Z80_instr_CB_EF + + !word Z80_instr_CB_F0, Z80_instr_CB_F1, Z80_instr_CB_F2, Z80_instr_CB_F3, Z80_instr_CB_F4, Z80_instr_CB_F5, Z80_instr_CB_F6, Z80_instr_CB_F7 + !word Z80_instr_CB_F8, Z80_instr_CB_F9, Z80_instr_CB_FA, Z80_instr_CB_FB, Z80_instr_CB_FC, Z80_instr_CB_FD, Z80_instr_CB_FE, Z80_instr_CB_FF + +Z80_vectab_DD_0: + + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_illegal__DD, Z80_instr_DD_09, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_illegal__DD, Z80_instr_DD_19, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + + !word Z80_illegal__DD, Z80_instr_DD_21, Z80_instr_DD_22, Z80_instr_DD_23, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_illegal__DD, Z80_instr_DD_29, Z80_instr_DD_2A, Z80_instr_DD_2B, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_34, Z80_instr_DD_35, Z80_illegal__DD, Z80_illegal__DD + !word Z80_illegal__DD, Z80_instr_DD_39, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_46, Z80_illegal__DD + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_4E, Z80_illegal__DD + + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_56, Z80_illegal__DD + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_5E, Z80_illegal__DD + + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_66, Z80_illegal__DD + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_6E, Z80_illegal__DD + + !word Z80_instr_DD_70, Z80_instr_DD_71, Z80_instr_DD_72, Z80_instr_DD_73, Z80_instr_DD_74, Z80_instr_DD_75, Z80_illegal__DD, Z80_instr_DD_77 + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_7E, Z80_illegal__DD + +Z80_vectab_DD_1: + + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_86, Z80_illegal__DD + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_8E, Z80_illegal__DD + + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_96, Z80_illegal__DD + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_9E, Z80_illegal__DD + + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_A6, Z80_illegal__DD + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_AE, Z80_illegal__DD + + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_B6, Z80_illegal__DD + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_BE, Z80_illegal__DD + + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_CB, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + + !word Z80_illegal__DD, Z80_instr_DD_E1, Z80_illegal__DD, Z80_instr_DD_E3, Z80_illegal__DD, Z80_instr_DD_E5, Z80_illegal__DD, Z80_illegal__DD + !word Z80_illegal__DD, Z80_instr_DD_E9, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + + !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_illegal__DD, Z80_instr_DD_F9, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + +Z80_vectab_ED_0: + + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + + !word Z80_instr_ED_40, Z80_instr_ED_41, Z80_instr_ED_42, Z80_instr_ED_43, Z80_instr_ED_44, Z80_instr_ED_45, Z80_instr_ED_46, Z80_instr_ED_47 + !word Z80_instr_ED_48, Z80_instr_ED_49, Z80_instr_ED_4A, Z80_instr_ED_4B, Z80_illegal__ED, Z80_instr_ED_4D, Z80_illegal__ED, Z80_instr_ED_4F + + !word Z80_instr_ED_50, Z80_instr_ED_51, Z80_instr_ED_52, Z80_instr_ED_53, Z80_illegal__ED, Z80_illegal__ED, Z80_instr_ED_56, Z80_instr_ED_57 + !word Z80_instr_ED_58, Z80_instr_ED_59, Z80_instr_ED_5A, Z80_instr_ED_5B, Z80_illegal__ED, Z80_illegal__ED, Z80_instr_ED_5E, Z80_instr_ED_5F + + !word Z80_instr_ED_60, Z80_instr_ED_61, Z80_instr_ED_62, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_instr_ED_67 + !word Z80_instr_ED_68, Z80_instr_ED_69, Z80_instr_ED_6A, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_instr_ED_6F + + !word Z80_illegal__ED, Z80_illegal__ED, Z80_instr_ED_72, Z80_instr_ED_73, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_instr_ED_78, Z80_instr_ED_79, Z80_instr_ED_7A, Z80_instr_ED_7B, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + +Z80_vectab_ED_1: + + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + + !word Z80_instr_ED_A0, Z80_instr_ED_A1, Z80_instr_ED_A2, Z80_instr_ED_A3, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_instr_ED_A8, Z80_instr_ED_A9, Z80_instr_ED_AA, Z80_instr_ED_AB, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + + !word Z80_instr_ED_B0, Z80_instr_ED_B1, Z80_instr_ED_B2, Z80_instr_ED_B3, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_instr_ED_B8, Z80_instr_ED_B9, Z80_instr_ED_BA, Z80_instr_ED_BB, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + +Z80_vectab_FD_0: + + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + !word Z80_illegal__FD, Z80_instr_FD_09, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + !word Z80_illegal__FD, Z80_instr_FD_19, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + + !word Z80_illegal__FD, Z80_instr_FD_21, Z80_instr_FD_22, Z80_instr_FD_23, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + !word Z80_illegal__FD, Z80_instr_FD_29, Z80_instr_FD_2A, Z80_instr_FD_2B, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_34, Z80_instr_FD_35, Z80_illegal__FD, Z80_illegal__FD + !word Z80_illegal__FD, Z80_instr_FD_39, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_46, Z80_illegal__FD + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_4E, Z80_illegal__FD + + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_56, Z80_illegal__FD + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_5E, Z80_illegal__FD + + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_66, Z80_illegal__FD + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_6E, Z80_illegal__FD + + !word Z80_instr_FD_70, Z80_instr_FD_71, Z80_instr_FD_72, Z80_instr_FD_73, Z80_instr_FD_74, Z80_instr_FD_75, Z80_illegal__FD, Z80_instr_FD_77 + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_7E, Z80_illegal__FD + +Z80_vectab_FD_1: + + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_86, Z80_illegal__FD + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_8E, Z80_illegal__FD + + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_96, Z80_illegal__FD + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_9E, Z80_illegal__FD + + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_A6, Z80_illegal__FD + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_AE, Z80_illegal__FD + + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_B6, Z80_illegal__FD + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_BE, Z80_illegal__FD + + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_CB, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + + !word Z80_illegal__FD, Z80_instr_FD_E1, Z80_illegal__FD, Z80_instr_FD_E3, Z80_illegal__FD, Z80_instr_FD_E5, Z80_illegal__FD, Z80_illegal__FD + !word Z80_illegal__FD, Z80_instr_FD_E9, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + + !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + !word Z80_illegal__FD, Z80_instr_FD_F9, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + +Z80_vectab_DDCB_0: + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_06, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_0E, Z80_illegal__DDCB + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_16, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_1E, Z80_illegal__DDCB + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_26, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_2E, Z80_illegal__DDCB + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_3E, Z80_illegal__DDCB + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_46, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_4E, Z80_illegal__DDCB + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_56, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_5E, Z80_illegal__DDCB + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_66, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_6E, Z80_illegal__DDCB + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_76, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_6E, Z80_illegal__DDCB + +Z80_vectab_DDCB_1: + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_86, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_7E, Z80_illegal__DDCB + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_96, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_9E, Z80_illegal__DDCB + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_A6, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_AE, Z80_illegal__DDCB + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_B6, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_BE, Z80_illegal__DDCB + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_C6, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_CE, Z80_illegal__DDCB + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_D6, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_DE, Z80_illegal__DDCB + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_E6, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_EE, Z80_illegal__DDCB + + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_F6, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_FE, Z80_illegal__DDCB + +Z80_vectab_FDCB_0: + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_06, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_0E, Z80_illegal__FDCB + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_16, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_1E, Z80_illegal__FDCB + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_26, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_2E, Z80_illegal__FDCB + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_3E, Z80_illegal__FDCB + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_46, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_4E, Z80_illegal__FDCB + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_56, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_5E, Z80_illegal__FDCB + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_66, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_6E, Z80_illegal__FDCB + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_76, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_7E, Z80_illegal__FDCB + +Z80_vectab_FDCB_1: + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_86, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_8E, Z80_illegal__FDCB + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_96, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_9E, Z80_illegal__FDCB + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_A6, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_AE, Z80_illegal__FDCB + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_B6, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_BE, Z80_illegal__FDCB + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_C6, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_CE, Z80_illegal__FDCB + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_D6, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_DE, Z80_illegal__FDCB + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_E6, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_EE, Z80_illegal__FDCB + + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_F6, Z80_illegal__FDCB + !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_FE, Z80_illegal__FDCB diff --git a/src/zvm_m65/dummy.s b/src/zvm_m65/dummy.s deleted file mode 100644 index 14351f49..00000000 --- a/src/zvm_m65/dummy.s +++ /dev/null @@ -1,4 +0,0 @@ - -; Z80 virtual machine - stub - - rts diff --git a/src/zvm_m65/z80_bit.s b/src/zvm_m65/z80_bit.s new file mode 100644 index 00000000..9f127d3d --- /dev/null +++ b/src/zvm_m65/z80_bit.s @@ -0,0 +1,4 @@ + +; +; Z80 bit set/reset/test instructions +; diff --git a/src/zvm_m65/z80_block.s b/src/zvm_m65/z80_block.s new file mode 100644 index 00000000..49c835dd --- /dev/null +++ b/src/zvm_m65/z80_block.s @@ -0,0 +1,4 @@ + +; +; Z80 block processing and search instructions +; diff --git a/src/zvm_m65/z80_call_return.s b/src/zvm_m65/z80_call_return.s new file mode 100644 index 00000000..552f3b61 --- /dev/null +++ b/src/zvm_m65/z80_call_return.s @@ -0,0 +1,4 @@ + +; +; Z80 call/return instructions +; diff --git a/src/zvm_m65/z80_exchange.s b/src/zvm_m65/z80_exchange.s new file mode 100644 index 00000000..dc6a3802 --- /dev/null +++ b/src/zvm_m65/z80_exchange.s @@ -0,0 +1,4 @@ + +; +; Z80 data exchange instructions +; diff --git a/src/zvm_m65/z80_general.s b/src/zvm_m65/z80_general.s new file mode 100644 index 00000000..a263a50f --- /dev/null +++ b/src/zvm_m65/z80_general.s @@ -0,0 +1,14 @@ + +; +; Z80 general purpose instructions +; + + +Z80_illegal__DD: +Z80_illegal__ED: +Z80_illegal__FD: +Z80_illegal__DDCB: +Z80_illegal__FDCB: +Z80_instr_00: ; NOP + + rts diff --git a/src/zvm_m65/z80_io.s b/src/zvm_m65/z80_io.s new file mode 100644 index 00000000..fa10ff58 --- /dev/null +++ b/src/zvm_m65/z80_io.s @@ -0,0 +1,4 @@ + +; +; Z80 input/output instructions +; diff --git a/src/zvm_m65/z80_jump.s b/src/zvm_m65/z80_jump.s new file mode 100644 index 00000000..5adcf53e --- /dev/null +++ b/src/zvm_m65/z80_jump.s @@ -0,0 +1,4 @@ + +; +; Z80 jump instructions +; diff --git a/src/zvm_m65/z80_load_16bit.s b/src/zvm_m65/z80_load_16bit.s new file mode 100644 index 00000000..22a5f30b --- /dev/null +++ b/src/zvm_m65/z80_load_16bit.s @@ -0,0 +1,4 @@ + +; +; Z80 data load instructions, 16 bit +; diff --git a/src/zvm_m65/z80_load_8bit.s b/src/zvm_m65/z80_load_8bit.s new file mode 100644 index 00000000..5b885f4c --- /dev/null +++ b/src/zvm_m65/z80_load_8bit.s @@ -0,0 +1,4 @@ + +; +; Z80 data load instructions, 8 bit +; diff --git a/src/zvm_m65/z80_math_16bit.s b/src/zvm_m65/z80_math_16bit.s new file mode 100644 index 00000000..e06286be --- /dev/null +++ b/src/zvm_m65/z80_math_16bit.s @@ -0,0 +1,4 @@ + +; +; Z80 arithmetic instructions, 16 bit +; diff --git a/src/zvm_m65/z80_math_8bit.s b/src/zvm_m65/z80_math_8bit.s new file mode 100644 index 00000000..633d59b8 --- /dev/null +++ b/src/zvm_m65/z80_math_8bit.s @@ -0,0 +1,4 @@ + +; +; Z80 arithmetic instructions, 8 bit +; diff --git a/src/zvm_m65/z80_rotate_shift.s b/src/zvm_m65/z80_rotate_shift.s new file mode 100644 index 00000000..c46b5e13 --- /dev/null +++ b/src/zvm_m65/z80_rotate_shift.s @@ -0,0 +1,4 @@ + +; +; Z80 rotate/shift instructions +; diff --git a/src/zvm_m65/zvm_bios.s b/src/zvm_m65/zvm_bios.s new file mode 100644 index 00000000..5120a799 --- /dev/null +++ b/src/zvm_m65/zvm_bios.s @@ -0,0 +1,6 @@ + +; +; Z80 Virtual Machine BIOS for CP/M +; + +; XXX implement diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s new file mode 100644 index 00000000..34af8e38 --- /dev/null +++ b/src/zvm_m65/zvm_core.s @@ -0,0 +1,825 @@ + +; +; Z80 Virtual Machine core routines +; + +!addr REG_A = $02 ; 8-bit accumulator +!addr REG_F = $03 ; 8-bit flag register +!addr REG_B = $04 ; general purpose 8-bit registers +!addr REG_C = $05 +!addr REG_D = $06 +!addr REG_E = $07 +!addr REG_H = $08 +!addr REG_L = $09 + +!addr REG_A_SH = $0A ; shadow registers +!addr REG_F_SH = $0B +!addr REG_B_SH = $0C +!addr REG_C_SH = $0D +!addr REG_D_SH = $0E +!addr REG_E_SH = $0F +!addr REG_H_SH = $10 +!addr REG_L_SH = $11 + +!addr REG_IX = $12 ; 16-bit index register +!addr REG_IY = $14 ; 16-bit index register +!addr REG_SP = $16 ; 16-bit stack pointer +!addr REG_PC = $18 ; 16-bit program counter + +!addr REG_I = $1A ; 8-bit interrupt vector base +!addr REG_R06 = $1B ; refresh counter, bits 0-6 (bit 7 is garbage) +!addr REG_R7 = $1C ; refresh counter, bit 7 (bits 0-6 are 0's) + +!addr VEC_fetch_instr = $1D ; vector to instruction-fetch function + + + +ZVM_entry: + + jsr ZVM_init + ; XXX fetch BDOS and Command Processor + jmp ZVM_run + +ZVM_init: + + ; Reset all the registers + + lda #$00 + tay +@1: + sta REG_A, y + iny + cmp #(REG_R7+1) + bne @1 + + ; XXX what is the initial SP value? + ; XXX clean memory + + ; FALLTROUGH + +ZVM_bank_0: + + lda #ZVM_fetch_instr_bank_0 + sta VEC_fetch_instr+1 + + rts + +ZVM_bank_1: + + lda #ZVM_fetch_instr_bank_1 + sta VEC_fetch_instr+1 + + rts + +ZVM_fetch_instr_bank_0: + + ; XXX implement, should return byte in .A + +ZVM_fetch_instr_bank_1: + + ; XXX implement, should return byte in .A + +ZVM_run: + + ; CPU main loop + + jsr (VEC_fetch_instr) + asl + bcs @1 + + ; Execute mnemonic $00-$7F + + ; XXX +@1: + ; Execute mnemonic $80-$FF + + ; XXX + + + + + + + + + + + + + + +; +; Not implemented yet - XXX implement them! +; + +Z80_instr_01: ; LD BC,nn +Z80_instr_02: ; LD (BC),A +Z80_instr_03: ; INC BC +Z80_instr_04: ; INC B +Z80_instr_05: ; DEC B +Z80_instr_06: ; LD B,n +Z80_instr_07: ; RLCA +Z80_instr_08: ; EX AF,AF'' +Z80_instr_09: ; ADD HL,BC +Z80_instr_0A: ; LD A,(BC) +Z80_instr_0B: ; DEC BC +Z80_instr_0C: ; INC C +Z80_instr_0D: ; DEC C +Z80_instr_0E: ; LD C,n +Z80_instr_0F: ; RRCA +Z80_instr_10: ; DJNZ e +Z80_instr_11: ; LD DE,nn +Z80_instr_12: ; LD (DE),A +Z80_instr_13: ; INC DE +Z80_instr_14: ; INC D +Z80_instr_15: ; DEC D +Z80_instr_16: ; LD D,n +Z80_instr_17: ; RLA +Z80_instr_18: ; JR e +Z80_instr_19: ; ADD HL,DE +Z80_instr_1A: ; LD A,(DE) +Z80_instr_1B: ; DEC DE +Z80_instr_1C: ; INC E +Z80_instr_1D: ; DEC E +Z80_instr_1E: ; LD E,n +Z80_instr_1F: ; RRA +Z80_instr_20: ; JR NZ,e +Z80_instr_21: ; LD HL,nn +Z80_instr_22: ; LD (nn),HL +Z80_instr_23: ; INC HL +Z80_instr_24: ; INC H +Z80_instr_25: ; DEC H +Z80_instr_26: ; LD H,n +Z80_instr_27: ; DAA +Z80_instr_28: ; JR Z,e +Z80_instr_29: ; ADD HL,HL +Z80_instr_2A: ; LD HL,(nn) +Z80_instr_2B: ; DEC HL +Z80_instr_2C: ; INC L +Z80_instr_2D: ; DEC L +Z80_instr_2E: ; LD L,n +Z80_instr_2F: ; CPL +Z80_instr_30: ; JR NC,e +Z80_instr_31: ; LD SP,nn +Z80_instr_32: ; LD (nn),A +Z80_instr_33: ; INC SP +Z80_instr_34: ; INC (HL) +Z80_instr_35: ; DEC (HL) +Z80_instr_36: ; LD (HL),n +Z80_instr_37: ; SCF +Z80_instr_38: ; JR C,e +Z80_instr_39: ; ADD HL,SP +Z80_instr_3A: ; LD A,(nn) +Z80_instr_3B: ; DEC SP +Z80_instr_3C: ; INC A +Z80_instr_3D: ; DEC A +Z80_instr_3E: ; LD A,n +Z80_instr_3F: ; CCF +Z80_instr_40: ; LD B,B +Z80_instr_41: ; LD B,C +Z80_instr_42: ; LD B,D +Z80_instr_43: ; LD B,e +Z80_instr_44: ; LD B,H +Z80_instr_45: ; LD B,L +Z80_instr_46: ; LD B,(HL) +Z80_instr_47: ; LD B,A +Z80_instr_48: ; LD C,B +Z80_instr_49: ; LD C,C +Z80_instr_4A: ; LD C,D +Z80_instr_4B: ; LD C,E +Z80_instr_4C: ; LD C,H +Z80_instr_4D: ; LD C,L +Z80_instr_4E: ; LD C,(HL) +Z80_instr_4F: ; LD C,A +Z80_instr_50: ; LD D,B +Z80_instr_51: ; LD D,C +Z80_instr_52: ; LD D,D +Z80_instr_53: ; LD D,E +Z80_instr_54: ; LD D,H +Z80_instr_55: ; LD D,L +Z80_instr_56: ; LD D,(HL) +Z80_instr_57: ; LD D,A +Z80_instr_58: ; LD E,B +Z80_instr_59: ; LD E,C +Z80_instr_5A: ; LD E,D +Z80_instr_5B: ; LD E,E +Z80_instr_5C: ; LD E,H +Z80_instr_5D: ; LD E,L +Z80_instr_5E: ; LD E,(HL) +Z80_instr_5F: ; LD E,A +Z80_instr_60: ; LD H,B +Z80_instr_61: ; LD H,C +Z80_instr_62: ; LD H,D +Z80_instr_63: ; LD H,E +Z80_instr_64: ; LH H,H +Z80_instr_65: ; LH H,L +Z80_instr_66: ; LH H,(HL) +Z80_instr_67: ; LD H,A +Z80_instr_68: ; LD L,B +Z80_instr_69: ; LD L,C +Z80_instr_6A: ; LD L,D +Z80_instr_6B: ; LD L,E +Z80_instr_6C: ; LD L,H +Z80_instr_6D: ; LD L,L +Z80_instr_6E: ; LD L,(HL) +Z80_instr_6F: ; LD L,A +Z80_instr_70: ; LD (HL),B +Z80_instr_71: ; LD (HL),C +Z80_instr_72: ; LD (HL),D +Z80_instr_73: ; LD (HL),E +Z80_instr_74: ; LD (HL),H +Z80_instr_75: ; LD (HL),L +Z80_instr_76: ; HALT +Z80_instr_77: ; LD (HL),A +Z80_instr_78: ; LD A,B +Z80_instr_79: ; LD A,C +Z80_instr_7A: ; LD A,D +Z80_instr_7B: ; LD A,E +Z80_instr_7C: ; LD A,H +Z80_instr_7D: ; LD A,L +Z80_instr_7E: ; LD A,(HL) +Z80_instr_7F: ; LD A,A +Z80_instr_80: ; ADD A,B +Z80_instr_81: ; ADD A,C +Z80_instr_82: ; ADD A,D +Z80_instr_83: ; ADD A,E +Z80_instr_84: ; ADD A,H +Z80_instr_85: ; ADD A,L +Z80_instr_86: ; ADD A,(HL) +Z80_instr_87: ; ADD A,A +Z80_instr_88: ; ADC A,B +Z80_instr_89: ; ADC A,C +Z80_instr_8A: ; ADC A,D +Z80_instr_8B: ; ADC A,E +Z80_instr_8C: ; ADC A,H +Z80_instr_8D: ; ADC A,L +Z80_instr_8E: ; ADC A,(HL) +Z80_instr_8F: ; ADC A,A +Z80_instr_90: ; SUB B +Z80_instr_91: ; SUB C +Z80_instr_92: ; SUB D +Z80_instr_93: ; SUB E +Z80_instr_94: ; SUB H +Z80_instr_95: ; SUB L +Z80_instr_96: ; SUB (HL) +Z80_instr_97: ; SUB A +Z80_instr_98: ; SBC B +Z80_instr_99: ; SBC C +Z80_instr_9A: ; SBC D +Z80_instr_9B: ; SBC E +Z80_instr_9C: ; SBC H +Z80_instr_9D: ; SBC L +Z80_instr_9E: ; SBC (HL) +Z80_instr_9F: ; SBC A +Z80_instr_A0: ; AND B +Z80_instr_A1: ; AND C +Z80_instr_A2: ; AND D +Z80_instr_A3: ; AND E +Z80_instr_A4: ; AND H +Z80_instr_A5: ; AND L +Z80_instr_A6: ; AND (HL) +Z80_instr_A7: ; AND A +Z80_instr_A8: ; XOR B +Z80_instr_A9: ; XOR C +Z80_instr_AA: ; XOR D +Z80_instr_AB: ; XOR E +Z80_instr_AC: ; XOR H +Z80_instr_AD: ; XOR L +Z80_instr_AE: ; XOR (HL) +Z80_instr_AF: ; XOR A +Z80_instr_B0: ; OR B +Z80_instr_B1: ; OR C +Z80_instr_B2: ; OR D +Z80_instr_B3: ; OR E +Z80_instr_B4: ; OR H +Z80_instr_B5: ; OR L +Z80_instr_B6: ; OR (HL) +Z80_instr_B7: ; OR A +Z80_instr_B8: ; CP B +Z80_instr_B9: ; CP C +Z80_instr_BA: ; CP D +Z80_instr_BB: ; CP E +Z80_instr_BC: ; CP H +Z80_instr_BD: ; CP L +Z80_instr_BE: ; CP (HL) +Z80_instr_BF: ; CP A +Z80_instr_C0: ; RET NZ +Z80_instr_C1: ; POP BC +Z80_instr_C2: ; JP NZ,nn +Z80_instr_C3: ; JP nn +Z80_instr_C4: ; CALL NZ,nn +Z80_instr_C5: ; PUSH BC +Z80_instr_C6: ; ADD A,n +Z80_instr_C7: ; RST 00H +Z80_instr_C8: ; RET z +Z80_instr_C9: ; RET +Z80_instr_CA: ; JP Z,nn +Z80_instr_CB: ; #CB +Z80_instr_CC: ; CALL Z,nn +Z80_instr_CD: ; CALL nn +Z80_instr_CE: ; ADC A,n +Z80_instr_CF: ; RST 08H +Z80_instr_D0: ; RET NC +Z80_instr_D1: ; POP DE +Z80_instr_D2: ; JP NC,nn +Z80_instr_D3: ; OUT (n), A +Z80_instr_D4: ; CALL NC,nn +Z80_instr_D5: ; PUSH DE +Z80_instr_D6: ; SUB n +Z80_instr_D7: ; RST 10H +Z80_instr_D8: ; RET C +Z80_instr_D9: ; EXX +Z80_instr_DA: ; JP C,nn +Z80_instr_DB: ; IN A,(n) +Z80_instr_DC: ; CALL C,nn +Z80_instr_DD: ; #DD +Z80_instr_DE: ; SBC A,n +Z80_instr_DF: ; RST 18H +Z80_instr_E0: ; RET PO +Z80_instr_E1: ; POP HL +Z80_instr_E2: ; JP PO,nn +Z80_instr_E3: ; EX (SP),HL +Z80_instr_E4: ; CALL PO,nn +Z80_instr_E5: ; PUSH HL +Z80_instr_E6: ; AND n +Z80_instr_E7: ; RST 20H +Z80_instr_E8: ; RET PE +Z80_instr_E9: ; JP (HL) +Z80_instr_EA: ; JP PE,nn +Z80_instr_EB: ; EX DE,HL +Z80_instr_EC: ; CALL PE,nn +Z80_instr_ED: ; #ED +Z80_instr_EE: ; XOR n +Z80_instr_EF: ; RST 28H +Z80_instr_F0: ; RET P +Z80_instr_F1: ; POP AF +Z80_instr_F2: ; JP P,nn +Z80_instr_F3: ; DI +Z80_instr_F4: ; CALL P,nn +Z80_instr_F5: ; PUSH AF +Z80_instr_F6: ; OR n +Z80_instr_F7: ; RST 30H +Z80_instr_F8: ; RET M +Z80_instr_F9: ; LD SP,HL +Z80_instr_FA: ; JP M,nn +Z80_instr_FB: ; EI +Z80_instr_FC: ; CALL M,nn +Z80_instr_FD: ; #FD +Z80_instr_FE: ; CP n +Z80_instr_FF: ; RST 38H + +Z80_instr_CB_00: ; RLC B +Z80_instr_CB_01: ; RLC C +Z80_instr_CB_02: ; RLC D +Z80_instr_CB_03: ; RLC E +Z80_instr_CB_04: ; RLC H +Z80_instr_CB_05: ; RLC L +Z80_instr_CB_06: ; RLC (HL) +Z80_instr_CB_07: ; RLC A +Z80_instr_CB_08: ; RRC B +Z80_instr_CB_09: ; RRC C +Z80_instr_CB_0A: ; RRC D +Z80_instr_CB_0B: ; RRC E +Z80_instr_CB_0C: ; RRC H +Z80_instr_CB_0D: ; RRC L +Z80_instr_CB_0E: ; RRC (HL) +Z80_instr_CB_0F: ; RRC A +Z80_instr_CB_10: ; RL B +Z80_instr_CB_11: ; RL C +Z80_instr_CB_12: ; RL D +Z80_instr_CB_13: ; RL E +Z80_instr_CB_14: ; RL H +Z80_instr_CB_15: ; RL L +Z80_instr_CB_16: ; RL (HL) +Z80_instr_CB_17: ; RL A +Z80_instr_CB_18: ; RR B +Z80_instr_CB_19: ; RR C +Z80_instr_CB_1A: ; RR D +Z80_instr_CB_1B: ; RR E +Z80_instr_CB_1C: ; RR H +Z80_instr_CB_1D: ; RR L +Z80_instr_CB_1E: ; RR (HL) +Z80_instr_CB_1F: ; RR A +Z80_instr_CB_20: ; SLA B +Z80_instr_CB_21: ; SLA C +Z80_instr_CB_22: ; SLA D +Z80_instr_CB_23: ; SLA E +Z80_instr_CB_24: ; SLA H +Z80_instr_CB_25: ; SLA L +Z80_instr_CB_26: ; SLA (HL) +Z80_instr_CB_27: ; SLA A +Z80_instr_CB_28: ; SRA B +Z80_instr_CB_29: ; SRA C +Z80_instr_CB_2A: ; SRA D +Z80_instr_CB_2B: ; SRA E +Z80_instr_CB_2C: ; SRA H +Z80_instr_CB_2D: ; SRA L +Z80_instr_CB_2E: ; SRA (HL) +Z80_instr_CB_2F: ; SRA A +Z80_instr_CB_38: ; SRL B +Z80_instr_CB_39: ; SRL C +Z80_instr_CB_3A: ; SRL D +Z80_instr_CB_3B: ; SRL E +Z80_instr_CB_3C: ; SRL H +Z80_instr_CB_3D: ; SRL L +Z80_instr_CB_3E: ; SRL (HL) +Z80_instr_CB_3F: ; SRL A +Z80_instr_CB_40: ; BIT 0,B +Z80_instr_CB_41: ; BIT 0,C +Z80_instr_CB_42: ; BIT 0,D +Z80_instr_CB_43: ; BIT 0,E +Z80_instr_CB_44: ; BIT 0,H +Z80_instr_CB_45: ; BIT 0,L +Z80_instr_CB_46: ; BIT 0,(HL) +Z80_instr_CB_47: ; BIT 0,A +Z80_instr_CB_48: ; BIT 1,B +Z80_instr_CB_49: ; BIT 1,C +Z80_instr_CB_4A: ; BIT 1,D +Z80_instr_CB_4B: ; BIT 1,E +Z80_instr_CB_4C: ; BIT 1,H +Z80_instr_CB_4D: ; BIT 1,L +Z80_instr_CB_4E: ; BIT 1,(HL) +Z80_instr_CB_4F: ; BIT 1,A +Z80_instr_CB_50: ; BIT 2,B +Z80_instr_CB_51: ; BIT 2,C +Z80_instr_CB_52: ; BIT 2,D +Z80_instr_CB_53: ; BIT 2,E +Z80_instr_CB_54: ; BIT 2,H +Z80_instr_CB_55: ; BIT 2,L +Z80_instr_CB_56: ; BIT 2,(HL) +Z80_instr_CB_57: ; BIT 2,A +Z80_instr_CB_58: ; BIT 3,B +Z80_instr_CB_59: ; BIT 3,C +Z80_instr_CB_5A: ; BIT 3,D +Z80_instr_CB_5B: ; BIT 3,E +Z80_instr_CB_5C: ; BIT 3,H +Z80_instr_CB_5D: ; BIT 3,L +Z80_instr_CB_5E: ; BIT 3,(HL) +Z80_instr_CB_5F: ; BIT 3,A +Z80_instr_CB_60: ; BIT 4,B +Z80_instr_CB_61: ; BIT 4,C +Z80_instr_CB_62: ; BIT 4,D +Z80_instr_CB_63: ; BIT 4,E +Z80_instr_CB_64: ; BIT 4,H +Z80_instr_CB_65: ; BIT 4,L +Z80_instr_CB_66: ; BIT 4,(HL) +Z80_instr_CB_67: ; BIT 4,A +Z80_instr_CB_68: ; BIT 5,B +Z80_instr_CB_69: ; BIT 5,C +Z80_instr_CB_6A: ; BIT 5,D +Z80_instr_CB_6B: ; BIT 5,E +Z80_instr_CB_6C: ; BIT 5,H +Z80_instr_CB_6D: ; BIT 5,L +Z80_instr_CB_6E: ; BIT 5,(HL) +Z80_instr_CB_6F: ; BIT 5,A +Z80_instr_CB_70: ; BIT 6,B +Z80_instr_CB_71: ; BIT 6,C +Z80_instr_CB_72: ; BIT 6,D +Z80_instr_CB_73: ; BIT 6,E +Z80_instr_CB_74: ; BIT 6,H +Z80_instr_CB_75: ; BIT 6,L +Z80_instr_CB_76: ; BIT 6,(HL) +Z80_instr_CB_77: ; BIT 6,A +Z80_instr_CB_78: ; BIT 7,B +Z80_instr_CB_79: ; BIT 7,C +Z80_instr_CB_7A: ; BIT 7,D +Z80_instr_CB_7B: ; BIT 7,E +Z80_instr_CB_7C: ; BIT 7,H +Z80_instr_CB_7D: ; BIT 7,L +Z80_instr_CB_7E: ; BIT 7,(HL) +Z80_instr_CB_7F: ; BIT 7,A +Z80_instr_CB_80: ; RES 0,B +Z80_instr_CB_81: ; RES 0,C +Z80_instr_CB_82: ; RES 0,D +Z80_instr_CB_83: ; RES 0,E +Z80_instr_CB_84: ; RES 0,H +Z80_instr_CB_85: ; RES 0,L +Z80_instr_CB_86: ; RES 0,(HL) +Z80_instr_CB_87: ; RES 0,A +Z80_instr_CB_88: ; RES 1,B +Z80_instr_CB_89: ; RES 1,C +Z80_instr_CB_8A: ; RES 1,D +Z80_instr_CB_8B: ; RES 1,E +Z80_instr_CB_8C: ; RES 1,H +Z80_instr_CB_8D: ; RES 1,L +Z80_instr_CB_8E: ; RES 1,(HL) +Z80_instr_CB_8F: ; RES 1,A +Z80_instr_CB_90: ; RES 2,B +Z80_instr_CB_91: ; RES 2,C +Z80_instr_CB_92: ; RES 2,D +Z80_instr_CB_93: ; RES 2,E +Z80_instr_CB_94: ; RES 2,H +Z80_instr_CB_95: ; RES 2,L +Z80_instr_CB_96: ; RES 2,(HL) +Z80_instr_CB_97: ; RES 2,A +Z80_instr_CB_98: ; RES 3,B +Z80_instr_CB_99: ; RES 3,C +Z80_instr_CB_9A: ; RES 3,D +Z80_instr_CB_9B: ; RES 3,E +Z80_instr_CB_9C: ; RES 3,H +Z80_instr_CB_9D: ; RES 3,L +Z80_instr_CB_9E: ; RES 3,(HL) +Z80_instr_CB_9F: ; RES 3,A +Z80_instr_CB_A0: ; RES 4,B +Z80_instr_CB_A1: ; RES 4,C +Z80_instr_CB_A2: ; RES 4,D +Z80_instr_CB_A3: ; RES 4,E +Z80_instr_CB_A4: ; RES 4,H +Z80_instr_CB_A5: ; RES 4,L +Z80_instr_CB_A6: ; RES 4,(HL) +Z80_instr_CB_A7: ; RES 4,A +Z80_instr_CB_A8: ; RES 5,B +Z80_instr_CB_A9: ; RES 5,C +Z80_instr_CB_AA: ; RES 5,D +Z80_instr_CB_AB: ; RES 5,E +Z80_instr_CB_AC: ; RES 5,H +Z80_instr_CB_AD: ; RES 5,L +Z80_instr_CB_AE: ; RES 5,(HL) +Z80_instr_CB_AF: ; RES 5,A +Z80_instr_CB_B0: ; RES 6,B +Z80_instr_CB_B1: ; RES 6,C +Z80_instr_CB_B2: ; RES 6,D +Z80_instr_CB_B3: ; RES 6,E +Z80_instr_CB_B4: ; RES 6,H +Z80_instr_CB_B5: ; RES 6,L +Z80_instr_CB_B6: ; RES 6,(HL) +Z80_instr_CB_B7: ; RES 6,A +Z80_instr_CB_B8: ; RES 7,B +Z80_instr_CB_B9: ; RES 7,C +Z80_instr_CB_BA: ; RES 7,D +Z80_instr_CB_BB: ; RES 7,E +Z80_instr_CB_BC: ; RES 7,H +Z80_instr_CB_BD: ; RES 7,L +Z80_instr_CB_BE: ; RES 7,(HL) +Z80_instr_CB_BF: ; RES 7,A +Z80_instr_CB_C0: ; SET 0,B +Z80_instr_CB_C1: ; SET 0,C +Z80_instr_CB_C2: ; SET 0,D +Z80_instr_CB_C3: ; SET 0,E +Z80_instr_CB_C4: ; SET 0,H +Z80_instr_CB_C5: ; SET 0,L +Z80_instr_CB_C6: ; SET 0,(HL) +Z80_instr_CB_C7: ; SET 0,A +Z80_instr_CB_C8: ; SET 1,B +Z80_instr_CB_C9: ; SET 1,C +Z80_instr_CB_CA: ; SET 1,D +Z80_instr_CB_CB: ; SET 1,E +Z80_instr_CB_CC: ; SET 1,H +Z80_instr_CB_CD: ; SET 1,L +Z80_instr_CB_CE: ; SET 1,(HL) +Z80_instr_CB_CF: ; SET 1,A +Z80_instr_CB_D0: ; SET 2,B +Z80_instr_CB_D1: ; SET 2,C +Z80_instr_CB_D2: ; SET 2,D +Z80_instr_CB_D3: ; SET 2,E +Z80_instr_CB_D4: ; SET 2,H +Z80_instr_CB_D5: ; SET 2,L +Z80_instr_CB_D6: ; SET 2,(HL) +Z80_instr_CB_D7: ; SET 2,A +Z80_instr_CB_D8: ; SET 3,B +Z80_instr_CB_D9: ; SET 3,C +Z80_instr_CB_DA: ; SET 3,D +Z80_instr_CB_DB: ; SET 3,E +Z80_instr_CB_DC: ; SET 3,H +Z80_instr_CB_DD: ; SET 3,L +Z80_instr_CB_DE: ; SET 3,(HL) +Z80_instr_CB_DF: ; SET 3,A +Z80_instr_CB_E0: ; SET 4,B +Z80_instr_CB_E1: ; SET 4,C +Z80_instr_CB_E2: ; SET 4,D +Z80_instr_CB_E3: ; SET 4,E +Z80_instr_CB_E4: ; SET 4,H +Z80_instr_CB_E5: ; SET 4,L +Z80_instr_CB_E6: ; SET 4,(HL) +Z80_instr_CB_E7: ; SET 4,A +Z80_instr_CB_E8: ; SET 5,B +Z80_instr_CB_E9: ; SET 5,C +Z80_instr_CB_EA: ; SET 5,D +Z80_instr_CB_EB: ; SET 5,E +Z80_instr_CB_EC: ; SET 5,H +Z80_instr_CB_ED: ; SET 5,L +Z80_instr_CB_EE: ; SET 5,(HL) +Z80_instr_CB_EF: ; SET 5,A +Z80_instr_CB_F0: ; SET 6,B +Z80_instr_CB_F1: ; SET 6,C +Z80_instr_CB_F2: ; SET 6,D +Z80_instr_CB_F3: ; SET 6,E +Z80_instr_CB_F4: ; SET 6,H +Z80_instr_CB_F5: ; SET 6,L +Z80_instr_CB_F6: ; SET 6,(HL) +Z80_instr_CB_F7: ; SET 6,A +Z80_instr_CB_F8: ; SET 7,B +Z80_instr_CB_F9: ; SET 7,C +Z80_instr_CB_FA: ; SET 7,D +Z80_instr_CB_FB: ; SET 7,E +Z80_instr_CB_FC: ; SET 7,H +Z80_instr_CB_FD: ; SET 7,L +Z80_instr_CB_FE: ; SET 7,(HL) +Z80_instr_CB_FF: ; SET 7,A + +Z80_instr_DD_09: ; ADD IX,BC +Z80_instr_DD_19: ; ADD IX,DE +Z80_instr_DD_21: ; LD IX,nn +Z80_instr_DD_22: ; LD (nn),IX +Z80_instr_DD_23: ; DEC IX +Z80_instr_DD_29: ; ADD IX,IX +Z80_instr_DD_2A: ; LD IX,(nn) +Z80_instr_DD_2B: ; DEC IX +Z80_instr_DD_34: ; INC (IX+d) +Z80_instr_DD_35: ; DEC (IX+d) +Z80_instr_DD_39: ; ADD IX,SP +Z80_instr_DD_46: ; LD B,(IX+d) +Z80_instr_DD_4E: ; LD C,(IX+d) +Z80_instr_DD_56: ; LD D,(IX+d) +Z80_instr_DD_5E: ; LD E,(IX+d) +Z80_instr_DD_66: ; LD H,(IX+d) +Z80_instr_DD_6E: ; LD L,(IX+d) +Z80_instr_DD_70: ; LD (IX+d),B +Z80_instr_DD_71: ; LD (IX+d),C +Z80_instr_DD_72: ; LD (IX+d),D +Z80_instr_DD_73: ; LD (IX+d),E +Z80_instr_DD_74: ; LD (IX+d),H +Z80_instr_DD_75: ; LD (IX+d),L +Z80_instr_DD_77: ; LD (IX+d),A +Z80_instr_DD_7E: ; LD A,(IX+d) +Z80_instr_DD_86: ; ADD A,(IX+d) +Z80_instr_DD_8E: ; ADC A,(IX+d) +Z80_instr_DD_96: ; SUB (IX+d) +Z80_instr_DD_9E: ; SBC (IX+d) +Z80_instr_DD_A6: ; AND (IX+d) +Z80_instr_DD_AE: ; XOR (IX+d) +Z80_instr_DD_B6: ; OR (IX+d) +Z80_instr_DD_BE: ; CP (IX+d) +Z80_instr_DD_CB: ; #DDCB +Z80_instr_DD_E1: ; POP IX +Z80_instr_DD_E3: ; EX (SP),IX +Z80_instr_DD_E5: ; PUSH IX +Z80_instr_DD_E9: ; JP (IX) +Z80_instr_DD_F9: ; LD SP,IX + +Z80_instr_ED_40: ; IN B,(C) +Z80_instr_ED_41: ; OUT (C),B +Z80_instr_ED_42: ; SBC HL,BC +Z80_instr_ED_43: ; LD (nn),BC +Z80_instr_ED_44: ; NEG +Z80_instr_ED_45: ; RETN +Z80_instr_ED_46: ; IM 0 +Z80_instr_ED_47: ; LD I,A +Z80_instr_ED_48: ; IN C,(C) +Z80_instr_ED_49: ; OUT (C),C +Z80_instr_ED_4A: ; ADC HL,BC +Z80_instr_ED_4B: ; LD BC,(nn) +Z80_instr_ED_4D: ; RETTI +Z80_instr_ED_4F: ; LD R,A +Z80_instr_ED_50: ; IN D,(C) +Z80_instr_ED_51: ; OUT (C),D +Z80_instr_ED_52: ; SBC HL,DE +Z80_instr_ED_53: ; LD (nn),DE +Z80_instr_ED_56: ; IM 1 +Z80_instr_ED_57: ; LD A,I +Z80_instr_ED_58: ; IN E,(C) +Z80_instr_ED_59: ; OUT (C),E +Z80_instr_ED_5A: ; ADC HL,DE +Z80_instr_ED_5B: ; LD DE,(nn) +Z80_instr_ED_5E: ; IM 2 +Z80_instr_ED_5F: ; LD A,R +Z80_instr_ED_60: ; IN H,(C) +Z80_instr_ED_61: ; OUT (C),H +Z80_instr_ED_62: ; SBC HL,HL +Z80_instr_ED_67: ; RRD +Z80_instr_ED_68: ; IN L,(C) +Z80_instr_ED_69: ; OUT (C),L +Z80_instr_ED_6A: ; ADC HL,HL +Z80_instr_ED_6F: ; RLD +Z80_instr_ED_72: ; SBC HL,SP +Z80_instr_ED_73: ; LD (nn),SP +Z80_instr_ED_78: ; IN A,(C) +Z80_instr_ED_79: ; OUT (C),A +Z80_instr_ED_7A: ; ADC HL,SP +Z80_instr_ED_7B: ; LD SP,(nn) +Z80_instr_ED_A0: ; LDI +Z80_instr_ED_A1: ; CPI +Z80_instr_ED_A2: ; INI +Z80_instr_ED_A3: ; OUTI +Z80_instr_ED_A8: ; LDD +Z80_instr_ED_A9: ; CPD +Z80_instr_ED_AA: ; IND +Z80_instr_ED_AB: ; OUTD +Z80_instr_ED_B0: ; LDIR +Z80_instr_ED_B1: ; CPIR +Z80_instr_ED_B2: ; INIR +Z80_instr_ED_B3: ; OTIR +Z80_instr_ED_B8: ; LDDR +Z80_instr_ED_B9: ; CPDR +Z80_instr_ED_BA: ; INDR +Z80_instr_ED_BB: ; OTDR + +Z80_instr_FD_09: ; ADD IY,BC +Z80_instr_FD_19: ; ADD IY,DE +Z80_instr_FD_21: ; LD IY,nn +Z80_instr_FD_22: ; LD (nn),IY +Z80_instr_FD_23: ; INC IY +Z80_instr_FD_29: ; ADD IY,IY +Z80_instr_FD_2A: ; LD IY,(nn) +Z80_instr_FD_2B: ; DEC IY +Z80_instr_FD_34: ; INC (IY+d) +Z80_instr_FD_35: ; DEC (IY+d) +Z80_instr_FD_39: ; ADD IY,SP +Z80_instr_FD_46: ; LD B,(IY+d) +Z80_instr_FD_4E: ; LD C,(IY+d) +Z80_instr_FD_56: ; LD D,(IY+d) +Z80_instr_FD_5E: ; LD E,(IY+d) +Z80_instr_FD_66: ; LD H,(IY+d) +Z80_instr_FD_6E: ; LD L,(IY+d) +Z80_instr_FD_70: ; LD (IY+d),B +Z80_instr_FD_71: ; LD (IY+d),C +Z80_instr_FD_72: ; LD (IY+d),D +Z80_instr_FD_73: ; LD (IY+d),E +Z80_instr_FD_74: ; LD (IY+d),H +Z80_instr_FD_75: ; LD (IY+d),L +Z80_instr_FD_77: ; LD (IY+d),A +Z80_instr_FD_7E: ; LD A,(IY+d) +Z80_instr_FD_86: ; ADD A,(IY+d) +Z80_instr_FD_8E: ; ADC A,(IY+d) +Z80_instr_FD_96: ; SUB (IY+d) +Z80_instr_FD_9E: ; SBC (IY+d) +Z80_instr_FD_A6: ; AND (IY+d) +Z80_instr_FD_AE: ; XOR (IY+d) +Z80_instr_FD_B6: ; OR (IY+d) +Z80_instr_FD_BE: ; CP (IY+d) +Z80_instr_FD_CB: ; #FDCB +Z80_instr_FD_E1: ; POP IY +Z80_instr_FD_E3: ; EX (SP),IY +Z80_instr_FD_E5: ; PUSH IY +Z80_instr_FD_E9: ; JP (IY) +Z80_instr_FD_F9: ; LD SP,IY + +Z80_instr_DDCB_06: ; RLC (IX+d) +Z80_instr_DDCB_0E: ; RRC (IX+d) +Z80_instr_DDCB_16: ; RL (IX+d) +Z80_instr_DDCB_1E: ; RR (IX+d) +Z80_instr_DDCB_26: ; SLA (IX+d) +Z80_instr_DDCB_2E: ; SRA (IX+d) +Z80_instr_DDCB_3E: ; SRL (IX+d) +Z80_instr_DDCB_46: ; BIT 0,(IX+d) +Z80_instr_DDCB_4E: ; BIT 1,(IX+d) +Z80_instr_DDCB_56: ; BIT 2,(IX+d) +Z80_instr_DDCB_5E: ; BIT 3,(IX+d) +Z80_instr_DDCB_66: ; BIT 4,(IX+d) +Z80_instr_DDCB_6E: ; BIT 5,(IX+d) +Z80_instr_DDCB_76: ; BIT 6,(IX+d) +Z80_instr_DDCB_7E: ; BIT 7,(IX+d) +Z80_instr_DDCB_86: ; RES 0,(IX+d) +Z80_instr_DDCB_8E: ; RES 1,(IX+d) +Z80_instr_DDCB_96: ; RES 2,(IX+d) +Z80_instr_DDCB_9E: ; RES 3,(IX+d) +Z80_instr_DDCB_A6: ; RES 4,(IX+d) +Z80_instr_DDCB_AE: ; RES 5,(IX+d) +Z80_instr_DDCB_B6: ; RES 6,(IX+d) +Z80_instr_DDCB_BE: ; RES 7,(IX+d) +Z80_instr_DDCB_C6: ; SET 0,(IX+d) +Z80_instr_DDCB_CE: ; SET 1,(IX+d) +Z80_instr_DDCB_D6: ; SET 2,(IX+d) +Z80_instr_DDCB_DE: ; SET 3,(IX+d) +Z80_instr_DDCB_E6: ; SET 4,(IX+d) +Z80_instr_DDCB_EE: ; SET 5,(IX+d) +Z80_instr_DDCB_F6: ; SET 6,(IX+d) +Z80_instr_DDCB_FE: ; SET 7,(IX+d) + +Z80_instr_FDCB_06: ; RLC (IY+d) +Z80_instr_FDCB_0E: ; RRC (IY+d) +Z80_instr_FDCB_16: ; RL (IY+d) +Z80_instr_FDCB_1E: ; RR (IY+d) +Z80_instr_FDCB_26: ; SLA (IY+d) +Z80_instr_FDCB_2E: ; SRA (IY+d) +Z80_instr_FDCB_3E: ; SRL (IY+d) +Z80_instr_FDCB_46: ; BIT 0,(IY+d) +Z80_instr_FDCB_4E: ; BIT 1,(IY+d) +Z80_instr_FDCB_56: ; BIT 2,(IY+d) +Z80_instr_FDCB_5E: ; BIT 3,(IY+d) +Z80_instr_FDCB_66: ; BIT 4,(IY+d) +Z80_instr_FDCB_6E: ; BIT 5,(IY+d) +Z80_instr_FDCB_76: ; BIT 6,(IY+d) +Z80_instr_FDCB_7E: ; BIT 7,(IY+d) +Z80_instr_FDCB_86: ; RES 0,(IY+d) +Z80_instr_FDCB_8E: ; RES 1,(IY+d) +Z80_instr_FDCB_96: ; RES 2,(IY+d) +Z80_instr_FDCB_9E: ; RES 3,(IY+d) +Z80_instr_FDCB_A6: ; RES 4,(IY+d) +Z80_instr_FDCB_AE: ; RES 5,(IY+d) +Z80_instr_FDCB_B6: ; RES 6,(IY+d) +Z80_instr_FDCB_BE: ; RES 7,(IY+d) +Z80_instr_FDCB_C6: ; SET 0,(IY+d) +Z80_instr_FDCB_CE: ; SET 1,(IY+d) +Z80_instr_FDCB_D6: ; SET 2,(IY+d) +Z80_instr_FDCB_DE: ; SET 3,(IY+d) +Z80_instr_FDCB_E6: ; SET 4,(IY+d) +Z80_instr_FDCB_EE: ; SET 5,(IY+d) +Z80_instr_FDCB_F6: ; SET 6,(IY+d) +Z80_instr_FDCB_FE: ; SET 7,(IY+d) + + rts ; XXX From 312f9a0072e5dc43030b906a362d47132af967de Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 16 Dec 2020 16:35:19 +0100 Subject: [PATCH 029/257] added several Z80 instructions --- src/zvm_m65/z80_general.s | 7 + src/zvm_m65/z80_load_8bit.s | 330 ++++++++++++++++++++++++++++++++++++ src/zvm_m65/zvm_core.s | 133 ++++----------- 3 files changed, 370 insertions(+), 100 deletions(-) diff --git a/src/zvm_m65/z80_general.s b/src/zvm_m65/z80_general.s index a263a50f..c32685a9 100644 --- a/src/zvm_m65/z80_general.s +++ b/src/zvm_m65/z80_general.s @@ -9,6 +9,13 @@ Z80_illegal__ED: Z80_illegal__FD: Z80_illegal__DDCB: Z80_illegal__FDCB: +Z80_instr_40: ; LD B,B +Z80_instr_49: ; LD C,C +Z80_instr_52: ; LD D,D +Z80_instr_5B: ; LD E,E +Z80_instr_64: ; LH H,H +Z80_instr_6D: ; LD L,L +Z80_instr_7F: ; LD A,A Z80_instr_00: ; NOP rts diff --git a/src/zvm_m65/z80_load_8bit.s b/src/zvm_m65/z80_load_8bit.s index 5b885f4c..011e775d 100644 --- a/src/zvm_m65/z80_load_8bit.s +++ b/src/zvm_m65/z80_load_8bit.s @@ -2,3 +2,333 @@ ; ; Z80 data load instructions, 8 bit ; + + +Z80_instr_41: ; LD B,C + + lda REG_C + sta REG_B + rts + +Z80_instr_42: ; LD B,D + + lda REG_D + sta REG_B + rts + +Z80_instr_43: ; LD B,E + + lda REG_E + sta REG_B + rts + +Z80_instr_44: ; LD B,H + + lda REG_H + sta REG_B + rts + +Z80_instr_45: ; LD B,L + + lda REG_L + sta REG_B + rts + +Z80_instr_46: ; LD B,(HL) + + jsr (VEC_fetch_via_HL) + sta REG_B + rts + +Z80_instr_47: ; LD B,A + + lda REG_A + sta REG_B + rts + +Z80_instr_48: ; LD C,B + + lda REG_B + sta REG_C + rts + +Z80_instr_4A: ; LD C,D + + lda REG_D + sta REG_C + rts + +Z80_instr_4B: ; LD C,E + + lda REG_E + sta REG_C + rts + +Z80_instr_4C: ; LD C,H + + lda REG_H + sta REG_C + rts + +Z80_instr_4D: ; LD C,L + + lda REG_L + sta REG_C + rts + +Z80_instr_4E: ; LD C,(HL) + + jsr (VEC_fetch_via_HL) + sta REG_C + rts + +Z80_instr_4F: ; LD C,A + + lda REG_Z + sta REG_C + rts + +Z80_instr_50: ; LD D,B + + lda REG_B + sta REG_D + rts + +Z80_instr_51: ; LD D,C + + lda REG_C + sta REG_D + rts + +Z80_instr_53: ; LD D,E + + lda REG_E + sta REG_D + rts + +Z80_instr_54: ; LD D,H + + lda REG_H + sta REG_D + rts + +Z80_instr_55: ; LD D,L + + lda REG_L + sta REG_D + rts + +Z80_instr_56: ; LD D,(HL) + + jsr (VEC_fetch_via_HL) + sta REG_D + rts + +Z80_instr_57: ; LD D,A + + lda REG_A + sta REG_D + rts + +Z80_instr_58: ; LD E,B + + lda REG_B + sta REG_E + rts + +Z80_instr_59: ; LD E,C + + lda REG_C + sta REG_E + rts + +Z80_instr_5A: ; LD E,D + + lda REG_D + sta REG_E + rts + +Z80_instr_5C: ; LD E,H + + lda REG_H + sta REG_E + rts + +Z80_instr_5D: ; LD E,L + + lda REG_L + sta REG_E + rts + +Z80_instr_5E: ; LD E,(HL) + + jsr (VEC_fetch_via_HL) + sta REG_E + rts + +Z80_instr_5F: ; LD E,A + + lda REG_A + sta REG_E + rts + +Z80_instr_60: ; LD H,B + + lda REG_B + sta REG_H + rts + +Z80_instr_61: ; LD H,C + + lda REG_C + sta REG_H + rts + +Z80_instr_62: ; LD H,D + + lda REG_D + sta REG_H + rts + +Z80_instr_63: ; LD H,E + + lda REG_E + sta REG_H + rts + +Z80_instr_65: ; LD H,L + + lda REG_L + sta REG_H + rts + +Z80_instr_66: ; LD H,(HL) + + jsr (VEC_fetch_via_HL) + sta REG_H + rts + +Z80_instr_67: ; LD H,A + + lda REG_A + sta REG_H + rts + +Z80_instr_68: ; LD L,B + + lda REG_B + sta REG_L + rts + +Z80_instr_69: ; LD L,C + + lda REG_C + sta REG_L + rts + +Z80_instr_6A: ; LD L,D + + lda REG_D + sta REG_L + rts + +Z80_instr_6B: ; LD L,E + + lda REG_E + sta REG_L + rts + +Z80_instr_6C: ; LD L,H + + lda REG_H + sta REG_L + rts + +Z80_instr_6E: ; LD L,(HL) + + jsr (VEC_fetch_via_HL) + sta REG_L + rts + +Z80_instr_6F: ; LD L,A + + lda REG_A + sta REG_L + rts + +Z80_instr_70: ; LD (HL),B + + lda REG_B + jmp (VEC_store_via_HL) + +Z80_instr_71: ; LD (HL),C + + lda REG_C + jmp (VEC_store_via_HL) + +Z80_instr_72: ; LD (HL),D + + lda REG_D + jmp (VEC_store_via_HL) + +Z80_instr_73: ; LD (HL),E + + lda REG_E + jmp (VEC_store_via_HL) + +Z80_instr_74: ; LD (HL),H + + lda REG_H + jmp (VEC_store_via_HL) + +Z80_instr_75: ; LD (HL),L + + lda REG_L + jmp (VEC_store_via_HL) + +Z80_instr_77: ; LD (HL),A + + lda REG_A + jmp (VEC_store_via_HL) + +Z80_instr_78: ; LD A,B + + lda REG_B + sta REG_A + rts + +Z80_instr_79: ; LD A,C + + lda REG_C + sta REG_A + rts + +Z80_instr_7A: ; LD A,D + + lda REG_D + sta REG_A + rts + +Z80_instr_7B: ; LD A,E + + lda REG_E + sta REG_A + rts + +Z80_instr_7C: ; LD A,H + + lda REG_H + sta REG_A + rts + +Z80_instr_7D: ; LD A,L + + lda REG_L + sta REG_A + rts + +Z80_instr_7E: ; LD A,(HL) + + jsr (VEC_fetch_via_HL) + sta REG_A + rts diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 34af8e38..54642e0d 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -3,35 +3,36 @@ ; Z80 Virtual Machine core routines ; -!addr REG_A = $02 ; 8-bit accumulator -!addr REG_F = $03 ; 8-bit flag register -!addr REG_B = $04 ; general purpose 8-bit registers -!addr REG_C = $05 -!addr REG_D = $06 -!addr REG_E = $07 -!addr REG_H = $08 -!addr REG_L = $09 +!addr REG_A = $02 ; 8-bit accumulator +!addr REG_F = $03 ; 8-bit flag register +!addr REG_B = $04 ; general purpose 8-bit registers +!addr REG_C = $05 +!addr REG_D = $06 +!addr REG_E = $07 +!addr REG_H = $08 +!addr REG_L = $09 -!addr REG_A_SH = $0A ; shadow registers -!addr REG_F_SH = $0B -!addr REG_B_SH = $0C -!addr REG_C_SH = $0D -!addr REG_D_SH = $0E -!addr REG_E_SH = $0F -!addr REG_H_SH = $10 -!addr REG_L_SH = $11 +!addr REG_A_SH = $0A ; shadow registers +!addr REG_F_SH = $0B +!addr REG_B_SH = $0C +!addr REG_C_SH = $0D +!addr REG_D_SH = $0E +!addr REG_E_SH = $0F +!addr REG_H_SH = $10 +!addr REG_L_SH = $11 -!addr REG_IX = $12 ; 16-bit index register -!addr REG_IY = $14 ; 16-bit index register -!addr REG_SP = $16 ; 16-bit stack pointer -!addr REG_PC = $18 ; 16-bit program counter +!addr REG_IX = $12 ; 16-bit index register +!addr REG_IY = $14 ; 16-bit index register +!addr REG_SP = $16 ; 16-bit stack pointer +!addr REG_PC = $18 ; 16-bit program counter -!addr REG_I = $1A ; 8-bit interrupt vector base -!addr REG_R06 = $1B ; refresh counter, bits 0-6 (bit 7 is garbage) -!addr REG_R7 = $1C ; refresh counter, bit 7 (bits 0-6 are 0's) - -!addr VEC_fetch_instr = $1D ; vector to instruction-fetch function +!addr REG_I = $1A ; 8-bit interrupt vector base +!addr REG_R06 = $1B ; refresh counter, bits 0-6 (bit 7 is garbage) +!addr REG_R7 = $1C ; refresh counter, bit 7 (bits 0-6 are 0's) +!addr VEC_fetch_opcode = $1D +!addr VEC_fetch_via_HL = $1F +!addr VEC_store_via_HL = $21 ZVM_entry: @@ -60,26 +61,26 @@ ZVM_init: ZVM_bank_0: lda #ZVM_fetch_instr_bank_0 - sta VEC_fetch_instr+1 + sta VEC_fetch_opcode+1 rts ZVM_bank_1: lda #ZVM_fetch_instr_bank_1 - sta VEC_fetch_instr+1 + sta VEC_fetch_opcode+1 rts -ZVM_fetch_instr_bank_0: +ZVM_fetch_opcode_bank_0: ; XXX implement, should return byte in .A -ZVM_fetch_instr_bank_1: +ZVM_fetch_opcode_bank_1: ; XXX implement, should return byte in .A @@ -112,6 +113,7 @@ ZVM_run: + ; ; Not implemented yet - XXX implement them! ; @@ -179,70 +181,7 @@ Z80_instr_3C: ; INC A Z80_instr_3D: ; DEC A Z80_instr_3E: ; LD A,n Z80_instr_3F: ; CCF -Z80_instr_40: ; LD B,B -Z80_instr_41: ; LD B,C -Z80_instr_42: ; LD B,D -Z80_instr_43: ; LD B,e -Z80_instr_44: ; LD B,H -Z80_instr_45: ; LD B,L -Z80_instr_46: ; LD B,(HL) -Z80_instr_47: ; LD B,A -Z80_instr_48: ; LD C,B -Z80_instr_49: ; LD C,C -Z80_instr_4A: ; LD C,D -Z80_instr_4B: ; LD C,E -Z80_instr_4C: ; LD C,H -Z80_instr_4D: ; LD C,L -Z80_instr_4E: ; LD C,(HL) -Z80_instr_4F: ; LD C,A -Z80_instr_50: ; LD D,B -Z80_instr_51: ; LD D,C -Z80_instr_52: ; LD D,D -Z80_instr_53: ; LD D,E -Z80_instr_54: ; LD D,H -Z80_instr_55: ; LD D,L -Z80_instr_56: ; LD D,(HL) -Z80_instr_57: ; LD D,A -Z80_instr_58: ; LD E,B -Z80_instr_59: ; LD E,C -Z80_instr_5A: ; LD E,D -Z80_instr_5B: ; LD E,E -Z80_instr_5C: ; LD E,H -Z80_instr_5D: ; LD E,L -Z80_instr_5E: ; LD E,(HL) -Z80_instr_5F: ; LD E,A -Z80_instr_60: ; LD H,B -Z80_instr_61: ; LD H,C -Z80_instr_62: ; LD H,D -Z80_instr_63: ; LD H,E -Z80_instr_64: ; LH H,H -Z80_instr_65: ; LH H,L -Z80_instr_66: ; LH H,(HL) -Z80_instr_67: ; LD H,A -Z80_instr_68: ; LD L,B -Z80_instr_69: ; LD L,C -Z80_instr_6A: ; LD L,D -Z80_instr_6B: ; LD L,E -Z80_instr_6C: ; LD L,H -Z80_instr_6D: ; LD L,L -Z80_instr_6E: ; LD L,(HL) -Z80_instr_6F: ; LD L,A -Z80_instr_70: ; LD (HL),B -Z80_instr_71: ; LD (HL),C -Z80_instr_72: ; LD (HL),D -Z80_instr_73: ; LD (HL),E -Z80_instr_74: ; LD (HL),H -Z80_instr_75: ; LD (HL),L Z80_instr_76: ; HALT -Z80_instr_77: ; LD (HL),A -Z80_instr_78: ; LD A,B -Z80_instr_79: ; LD A,C -Z80_instr_7A: ; LD A,D -Z80_instr_7B: ; LD A,E -Z80_instr_7C: ; LD A,H -Z80_instr_7D: ; LD A,L -Z80_instr_7E: ; LD A,(HL) -Z80_instr_7F: ; LD A,A Z80_instr_80: ; ADD A,B Z80_instr_81: ; ADD A,C Z80_instr_82: ; ADD A,D @@ -371,7 +310,6 @@ Z80_instr_FC: ; CALL M,nn Z80_instr_FD: ; #FD Z80_instr_FE: ; CP n Z80_instr_FF: ; RST 38H - Z80_instr_CB_00: ; RLC B Z80_instr_CB_01: ; RLC C Z80_instr_CB_02: ; RLC D @@ -620,7 +558,6 @@ Z80_instr_CB_FC: ; SET 7,H Z80_instr_CB_FD: ; SET 7,L Z80_instr_CB_FE: ; SET 7,(HL) Z80_instr_CB_FF: ; SET 7,A - Z80_instr_DD_09: ; ADD IX,BC Z80_instr_DD_19: ; ADD IX,DE Z80_instr_DD_21: ; LD IX,nn @@ -660,7 +597,6 @@ Z80_instr_DD_E3: ; EX (SP),IX Z80_instr_DD_E5: ; PUSH IX Z80_instr_DD_E9: ; JP (IX) Z80_instr_DD_F9: ; LD SP,IX - Z80_instr_ED_40: ; IN B,(C) Z80_instr_ED_41: ; OUT (C),B Z80_instr_ED_42: ; SBC HL,BC @@ -717,7 +653,6 @@ Z80_instr_ED_B8: ; LDDR Z80_instr_ED_B9: ; CPDR Z80_instr_ED_BA: ; INDR Z80_instr_ED_BB: ; OTDR - Z80_instr_FD_09: ; ADD IY,BC Z80_instr_FD_19: ; ADD IY,DE Z80_instr_FD_21: ; LD IY,nn @@ -757,7 +692,6 @@ Z80_instr_FD_E3: ; EX (SP),IY Z80_instr_FD_E5: ; PUSH IY Z80_instr_FD_E9: ; JP (IY) Z80_instr_FD_F9: ; LD SP,IY - Z80_instr_DDCB_06: ; RLC (IX+d) Z80_instr_DDCB_0E: ; RRC (IX+d) Z80_instr_DDCB_16: ; RL (IX+d) @@ -789,7 +723,6 @@ Z80_instr_DDCB_E6: ; SET 4,(IX+d) Z80_instr_DDCB_EE: ; SET 5,(IX+d) Z80_instr_DDCB_F6: ; SET 6,(IX+d) Z80_instr_DDCB_FE: ; SET 7,(IX+d) - Z80_instr_FDCB_06: ; RLC (IY+d) Z80_instr_FDCB_0E: ; RRC (IY+d) Z80_instr_FDCB_16: ; RL (IY+d) From ac3992c2a893de0118233ac5529caefa3d5660f1 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 16 Dec 2020 17:49:31 +0100 Subject: [PATCH 030/257] more boring opcodes work --- src/zvm_m65/,aliases_zvm.s | 40 +++++++ src/zvm_m65/ZVM_banking.s | 169 +++++++++++++++++++++++++++ src/zvm_m65/z80_exchange.s | 63 ++++++++++ src/zvm_m65/z80_general.s | 5 + src/zvm_m65/z80_load_8bit.s | 223 ++++++++++++++++++++++++------------ src/zvm_m65/zvm_core.s | 85 +------------- 6 files changed, 430 insertions(+), 155 deletions(-) create mode 100644 src/zvm_m65/,aliases_zvm.s create mode 100644 src/zvm_m65/ZVM_banking.s diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s new file mode 100644 index 00000000..05442f7e --- /dev/null +++ b/src/zvm_m65/,aliases_zvm.s @@ -0,0 +1,40 @@ + +!addr REG_A = $02 ; 8-bit accumulator +!addr REG_F = $03 ; 8-bit flag register +!addr REG_B = $04 ; general purpose 8-bit registers +!addr REG_C = $05 +!addr REG_D = $06 +!addr REG_E = $07 +!addr REG_H = $08 +!addr REG_L = $09 + +!addr REG_A_SH = $0A ; shadow registers +!addr REG_F_SH = $0B +!addr REG_B_SH = $0C +!addr REG_C_SH = $0D +!addr REG_D_SH = $0E +!addr REG_E_SH = $0F +!addr REG_H_SH = $10 +!addr REG_L_SH = $11 + +!addr REG_IX = $12 ; 16-bit index register +!addr REG_IY = $14 ; 16-bit index register +!addr REG_SP = $16 ; 16-bit stack pointer +!addr REG_PC = $18 ; 16-bit program counter + +!addr REG_I = $1A ; 8-bit interrupt vector base +!addr REG_R06 = $1B ; refresh counter, bits 0-6 (bit 7 is garbage) +!addr REG_R7 = $1C ; refresh counter, bit 7 (bits 0-6 are 0's) + +!addr VEC_fetch_opcode = $60 +!addr VEC_fetch_value = $62 +!addr VEC_fetch_stack = $64 +!addr VEC_store_stack = $66 +!addr VEC_fetch_via_HL = $68 +!addr VEC_store_via_HL = $6A +!addr VEC_fetch_via_IX_d = $6C +!addr VEC_fetch_via_IY_d = $6E +!addr VEC_store_via_IX_d = $70 +!addr VEC_store_via_IY_d = $72 +!addr VEC_fetch_via_nn = $74 +!addr VEC_store_via_nn = $76 diff --git a/src/zvm_m65/ZVM_banking.s b/src/zvm_m65/ZVM_banking.s new file mode 100644 index 00000000..009aef8a --- /dev/null +++ b/src/zvm_m65/ZVM_banking.s @@ -0,0 +1,169 @@ + +; +; Z80 Virtual Machine banking support +; + + +ZVM_set_bank_0: + + ; XXX consider switchink banks using DMA list + + lda #ZVM_fetch_opcode_bank_0 + sta VEC_fetch_opcode+1 + + lda #ZVM_fetch_value_bank_0 + sta VEC_fetch_value+1 + + lda #ZVM_fetch_stack_bank_0 + sta VEC_fetch_stack+1 + + lda #ZVM_store_stack_bank_0 + sta VEC_store_stack+1 + + lda #ZVM_fetch_via_HL_bank_0 + sta VEC_fetch_via_HL+1 + + lda #ZVM_store_via_HL_bank_0 + sta VEC_store_via_HL+1 + + lda #ZVM_fetch_via_IX_d_bank_0 + sta VEC_fetch_via_IX_d+1 + + lda #ZVM_fetch_via_IY_d_bank_0 + sta VEC_fetch_via_IY_d+1 + + lda #ZVM_store_via_IX_d_bank_0 + sta VEC_store_via_IX_d+1 + + lda #ZVM_store_via_IY_d_bank_0 + sta VEC_store_via_IY_d+1 + + lda #ZVM_fetch_via_nn_bank_0 + sta VEC_fetch_via_nn+1 + + lda #ZVM_store_via_nn_bank_0 + sta VEC_store_via_nn+1 + + rts + +ZVM_set_bank_1: + + lda #ZVM_fetch_opcode_bank_1 + sta VEC_fetch_opcode+1 + + lda #ZVM_fetch_value_bank_1 + sta VEC_fetch_value+1 + + lda #ZVM_fetch_stack_bank_1 + sta VEC_fetch_stack+1 + + lda #ZVM_store_stack_bank_1 + sta VEC_store_stack+1 + + lda #ZVM_fetch_via_HL_bank_1 + sta VEC_fetch_via_HL+1 + + lda #ZVM_store_via_HL_bank_1 + sta VEC_store_via_HL+1 + + lda #ZVM_fetch_via_IX_d_bank_1 + sta VEC_fetch_via_IX_d+1 + + lda #ZVM_fetch_via_IY_d_bank_1 + sta VEC_fetch_via_IY_d+1 + + lda #ZVM_store_via_IX_d_bank_1 + sta VEC_store_via_IX_d+1 + + lda #ZVM_store_via_IY_d_bank_1 + sta VEC_store_via_IY_d+1 + + lda #ZVM_fetch_via_nn_bank_1 + sta VEC_fetch_via_nn+1 + + lda #ZVM_store_via_nn_bank_1 + sta VEC_store_via_nn+1 + + rts + +ZVM_fetch_opcode_bank_0: + + ; XXX implement, should return byte in .A + +ZVM_fetch_opcode_bank_1: + + ; XXX implement, should return byte in .A + +ZVM_fetch_value_bank_0: +ZVM_fetch_value_bank_1: +ZVM_fetch_stack_bank_0: +ZVM_fetch_stack_bank_1: +ZVM_store_stack_bank_0: +ZVM_store_stack_bank_1: +ZVM_fetch_via_HL_bank_0: +ZVM_fetch_via_HL_bank_1: +ZVM_store_via_HL_bank_0: +ZVM_store_via_HL_bank_1: +ZVM_fetch_via_IX_d_bank_0: +ZVM_fetch_via_IX_d_bank_1: +ZVM_fetch_via_IY_d_bank_0: +ZVM_fetch_via_IY_d_bank_1: +ZVM_store_via_IX_d_bank_0: +ZVM_store_via_IX_d_bank_1: +ZVM_store_via_IY_d_bank_0: +ZVM_store_via_IY_d_bank_1: +ZVM_fetch_via_nn_bank_0: +ZVM_fetch_via_nn_bank_1: +ZVM_store_via_nn_bank_0: +ZVM_store_via_nn_bank_1: +ZVM_store_back: + + ; XXX implement these diff --git a/src/zvm_m65/z80_exchange.s b/src/zvm_m65/z80_exchange.s index dc6a3802..89ab60e3 100644 --- a/src/zvm_m65/z80_exchange.s +++ b/src/zvm_m65/z80_exchange.s @@ -2,3 +2,66 @@ ; ; Z80 data exchange instructions ; + + +Z80_instr_EB: ; EX DE,HL + + ldx REG_D + ldy REG_H + sty REG_D + stx REG_H + + ldx REG_E + ldy REG_L + sty REG_E + stx REG_L + + rts + +Z80_instr_08: ; EX AF,AF'' + + ldx REG_A + ldy REG_A_SH + sty REG_A + stx REG_A_SH + + ldx REG_F + ldy REG_F_SH + sty REG_F + stx REG_F_SH + + rts + +Z80_instr_D9: ; EXX + + ldx REG_B + ldy REG_B_SH + sty REG_B + stx REG_B_SH + + ldx REG_C + ldy REG_C_SH + sty REG_C + stx REG_C_SH + + ldx REG_D + ldy REG_D_SH + sty REG_D + stx REG_D_SH + + ldx REG_E + ldy REG_E_SH + sty REG_E + stx REG_E_SH + + ldx REG_H + ldy REG_H_SH + sty REG_H + stx REG_H_SH + + ldx REG_L + ldy REG_L_SH + sty REG_L + stx REG_L_SH + + rts diff --git a/src/zvm_m65/z80_general.s b/src/zvm_m65/z80_general.s index c32685a9..67360ba8 100644 --- a/src/zvm_m65/z80_general.s +++ b/src/zvm_m65/z80_general.s @@ -9,6 +9,11 @@ Z80_illegal__ED: Z80_illegal__FD: Z80_illegal__DDCB: Z80_illegal__FDCB: + + inc REG_R06 ; XXX check if this is correct + + ; FALLTROUGH + Z80_instr_40: ; LD B,B Z80_instr_49: ; LD C,C Z80_instr_52: ; LD D,D diff --git a/src/zvm_m65/z80_load_8bit.s b/src/zvm_m65/z80_load_8bit.s index 011e775d..dc564383 100644 --- a/src/zvm_m65/z80_load_8bit.s +++ b/src/zvm_m65/z80_load_8bit.s @@ -4,6 +4,10 @@ ; +; +; load register with other register +; + Z80_instr_41: ; LD B,C lda REG_C @@ -34,12 +38,6 @@ Z80_instr_45: ; LD B,L sta REG_B rts -Z80_instr_46: ; LD B,(HL) - - jsr (VEC_fetch_via_HL) - sta REG_B - rts - Z80_instr_47: ; LD B,A lda REG_A @@ -76,15 +74,9 @@ Z80_instr_4D: ; LD C,L sta REG_C rts -Z80_instr_4E: ; LD C,(HL) - - jsr (VEC_fetch_via_HL) - sta REG_C - rts - Z80_instr_4F: ; LD C,A - lda REG_Z + lda REG_A sta REG_C rts @@ -118,12 +110,6 @@ Z80_instr_55: ; LD D,L sta REG_D rts -Z80_instr_56: ; LD D,(HL) - - jsr (VEC_fetch_via_HL) - sta REG_D - rts - Z80_instr_57: ; LD D,A lda REG_A @@ -160,12 +146,6 @@ Z80_instr_5D: ; LD E,L sta REG_E rts -Z80_instr_5E: ; LD E,(HL) - - jsr (VEC_fetch_via_HL) - sta REG_E - rts - Z80_instr_5F: ; LD E,A lda REG_A @@ -202,12 +182,6 @@ Z80_instr_65: ; LD H,L sta REG_H rts -Z80_instr_66: ; LD H,(HL) - - jsr (VEC_fetch_via_HL) - sta REG_H - rts - Z80_instr_67: ; LD H,A lda REG_A @@ -244,53 +218,12 @@ Z80_instr_6C: ; LD L,H sta REG_L rts -Z80_instr_6E: ; LD L,(HL) - - jsr (VEC_fetch_via_HL) - sta REG_L - rts - Z80_instr_6F: ; LD L,A lda REG_A sta REG_L rts -Z80_instr_70: ; LD (HL),B - - lda REG_B - jmp (VEC_store_via_HL) - -Z80_instr_71: ; LD (HL),C - - lda REG_C - jmp (VEC_store_via_HL) - -Z80_instr_72: ; LD (HL),D - - lda REG_D - jmp (VEC_store_via_HL) - -Z80_instr_73: ; LD (HL),E - - lda REG_E - jmp (VEC_store_via_HL) - -Z80_instr_74: ; LD (HL),H - - lda REG_H - jmp (VEC_store_via_HL) - -Z80_instr_75: ; LD (HL),L - - lda REG_L - jmp (VEC_store_via_HL) - -Z80_instr_77: ; LD (HL),A - - lda REG_A - jmp (VEC_store_via_HL) - Z80_instr_78: ; LD A,B lda REG_B @@ -327,8 +260,154 @@ Z80_instr_7D: ; LD A,L sta REG_A rts +; +; load register with immediate value +; + +Z80_instr_06: ; LD B,n + + jsr VEC_fetch_value + sta REG_B + rts + +Z80_instr_0E: ; LD C,n + + jsr VEC_fetch_value + sta REG_C + rts + +Z80_instr_16: ; LD D,n + + jsr VEC_fetch_value + sta REG_D + rts + +Z80_instr_1E: ; LD E,n + + jsr VEC_fetch_value + sta REG_E + rts + +Z80_instr_26: ; LD H,n + + jsr VEC_fetch_value + sta REG_H + rts + +Z80_instr_2E: ; LD L,n + + jsr VEC_fetch_value + sta REG_L + rts + +Z80_instr_3E: ; LD A,n + + jsr VEC_fetch_value + sta REG_A + rts + +; +; load register with memory content (via HL) +; + +Z80_instr_46: ; LD B,(HL) + + jsr (VEC_fetch_via_HL) + sta REG_B + rts + +Z80_instr_4E: ; LD C,(HL) + + jsr (VEC_fetch_via_HL) + sta REG_C + rts + +Z80_instr_56: ; LD D,(HL) + + jsr (VEC_fetch_via_HL) + sta REG_D + rts + +Z80_instr_5E: ; LD E,(HL) + + jsr (VEC_fetch_via_HL) + sta REG_E + rts + +Z80_instr_66: ; LD H,(HL) + + jsr (VEC_fetch_via_HL) + sta REG_H + rts + +Z80_instr_6E: ; LD L,(HL) + + jsr (VEC_fetch_via_HL) + sta REG_L + rts + Z80_instr_7E: ; LD A,(HL) jsr (VEC_fetch_via_HL) sta REG_A rts + +; XXX put here LD r,(IX+d) family +; XXX put here LD r,(IY+d) family + +; +; load memory content (via HL) with register +; + +Z80_instr_70: ; LD (HL),B + + lda REG_B + jmp (VEC_store_via_HL) + +Z80_instr_71: ; LD (HL),C + + lda REG_C + jmp (VEC_store_via_HL) + +Z80_instr_72: ; LD (HL),D + + lda REG_D + jmp (VEC_store_via_HL) + +Z80_instr_73: ; LD (HL),E + + lda REG_E + jmp (VEC_store_via_HL) + +Z80_instr_74: ; LD (HL),H + + lda REG_H + jmp (VEC_store_via_HL) + +Z80_instr_75: ; LD (HL),L + + lda REG_L + jmp (VEC_store_via_HL) + +Z80_instr_77: ; LD (HL),A + + lda REG_A + jmp (VEC_store_via_HL) + +; XXX put here LD (IX+d),r family +; XXX put here LD (IY+d),r family + +; +; load memory content (via HL) with immediate value +; + +Z80_instr_36: ; LD (HL),n + + jsr VEC_fetch_value + jmp (VEC_store_via_HL) + +; XXX put here LD (IX+d),n family +; XXX put here LD (IY+d),n family +; XXX put here LD A,(BC) / LD A,(DE) / LD A,(nn) / LD (BC), A / LD (DE),A / LD (nn),A +; XXX put here LD A,I / LD A,R +; XXX put here LD I,A / LD R,A diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 54642e0d..6014e505 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -3,38 +3,6 @@ ; Z80 Virtual Machine core routines ; -!addr REG_A = $02 ; 8-bit accumulator -!addr REG_F = $03 ; 8-bit flag register -!addr REG_B = $04 ; general purpose 8-bit registers -!addr REG_C = $05 -!addr REG_D = $06 -!addr REG_E = $07 -!addr REG_H = $08 -!addr REG_L = $09 - -!addr REG_A_SH = $0A ; shadow registers -!addr REG_F_SH = $0B -!addr REG_B_SH = $0C -!addr REG_C_SH = $0D -!addr REG_D_SH = $0E -!addr REG_E_SH = $0F -!addr REG_H_SH = $10 -!addr REG_L_SH = $11 - -!addr REG_IX = $12 ; 16-bit index register -!addr REG_IY = $14 ; 16-bit index register -!addr REG_SP = $16 ; 16-bit stack pointer -!addr REG_PC = $18 ; 16-bit program counter - -!addr REG_I = $1A ; 8-bit interrupt vector base -!addr REG_R06 = $1B ; refresh counter, bits 0-6 (bit 7 is garbage) -!addr REG_R7 = $1C ; refresh counter, bit 7 (bits 0-6 are 0's) - -!addr VEC_fetch_opcode = $1D -!addr VEC_fetch_via_HL = $1F -!addr VEC_store_via_HL = $21 - - ZVM_entry: jsr ZVM_init @@ -56,39 +24,13 @@ ZVM_init: ; XXX what is the initial SP value? ; XXX clean memory - ; FALLTROUGH + jmp ZVM_set_bank_0 -ZVM_bank_0: - - lda #ZVM_fetch_instr_bank_0 - sta VEC_fetch_opcode+1 - - rts - -ZVM_bank_1: - - lda #ZVM_fetch_instr_bank_1 - sta VEC_fetch_opcode+1 - - rts - -ZVM_fetch_opcode_bank_0: - - ; XXX implement, should return byte in .A - -ZVM_fetch_opcode_bank_1: - - ; XXX implement, should return byte in .A - ZVM_run: ; CPU main loop - jsr (VEC_fetch_instr) + jsr (VEC_fetch_opcode) asl bcs @1 @@ -102,18 +44,6 @@ ZVM_run: - - - - - - - - - - - - ; ; Not implemented yet - XXX implement them! ; @@ -123,15 +53,12 @@ Z80_instr_02: ; LD (BC),A Z80_instr_03: ; INC BC Z80_instr_04: ; INC B Z80_instr_05: ; DEC B -Z80_instr_06: ; LD B,n Z80_instr_07: ; RLCA -Z80_instr_08: ; EX AF,AF'' Z80_instr_09: ; ADD HL,BC Z80_instr_0A: ; LD A,(BC) Z80_instr_0B: ; DEC BC Z80_instr_0C: ; INC C Z80_instr_0D: ; DEC C -Z80_instr_0E: ; LD C,n Z80_instr_0F: ; RRCA Z80_instr_10: ; DJNZ e Z80_instr_11: ; LD DE,nn @@ -139,7 +66,6 @@ Z80_instr_12: ; LD (DE),A Z80_instr_13: ; INC DE Z80_instr_14: ; INC D Z80_instr_15: ; DEC D -Z80_instr_16: ; LD D,n Z80_instr_17: ; RLA Z80_instr_18: ; JR e Z80_instr_19: ; ADD HL,DE @@ -147,7 +73,6 @@ Z80_instr_1A: ; LD A,(DE) Z80_instr_1B: ; DEC DE Z80_instr_1C: ; INC E Z80_instr_1D: ; DEC E -Z80_instr_1E: ; LD E,n Z80_instr_1F: ; RRA Z80_instr_20: ; JR NZ,e Z80_instr_21: ; LD HL,nn @@ -155,7 +80,6 @@ Z80_instr_22: ; LD (nn),HL Z80_instr_23: ; INC HL Z80_instr_24: ; INC H Z80_instr_25: ; DEC H -Z80_instr_26: ; LD H,n Z80_instr_27: ; DAA Z80_instr_28: ; JR Z,e Z80_instr_29: ; ADD HL,HL @@ -163,7 +87,6 @@ Z80_instr_2A: ; LD HL,(nn) Z80_instr_2B: ; DEC HL Z80_instr_2C: ; INC L Z80_instr_2D: ; DEC L -Z80_instr_2E: ; LD L,n Z80_instr_2F: ; CPL Z80_instr_30: ; JR NC,e Z80_instr_31: ; LD SP,nn @@ -171,7 +94,6 @@ Z80_instr_32: ; LD (nn),A Z80_instr_33: ; INC SP Z80_instr_34: ; INC (HL) Z80_instr_35: ; DEC (HL) -Z80_instr_36: ; LD (HL),n Z80_instr_37: ; SCF Z80_instr_38: ; JR C,e Z80_instr_39: ; ADD HL,SP @@ -179,7 +101,6 @@ Z80_instr_3A: ; LD A,(nn) Z80_instr_3B: ; DEC SP Z80_instr_3C: ; INC A Z80_instr_3D: ; DEC A -Z80_instr_3E: ; LD A,n Z80_instr_3F: ; CCF Z80_instr_76: ; HALT Z80_instr_80: ; ADD A,B @@ -271,7 +192,6 @@ Z80_instr_D5: ; PUSH DE Z80_instr_D6: ; SUB n Z80_instr_D7: ; RST 10H Z80_instr_D8: ; RET C -Z80_instr_D9: ; EXX Z80_instr_DA: ; JP C,nn Z80_instr_DB: ; IN A,(n) Z80_instr_DC: ; CALL C,nn @@ -289,7 +209,6 @@ Z80_instr_E7: ; RST 20H Z80_instr_E8: ; RET PE Z80_instr_E9: ; JP (HL) Z80_instr_EA: ; JP PE,nn -Z80_instr_EB: ; EX DE,HL Z80_instr_EC: ; CALL PE,nn Z80_instr_ED: ; #ED Z80_instr_EE: ; XOR n From b5452c5df57d8187e26f74b340ae1d630e37167a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 16 Dec 2020 20:08:37 +0100 Subject: [PATCH 031/257] started work on escape sequences, some cleanup --- src/aliases/,aliases_ram_lowmem_m65.s | 15 +-- src/kernal/screen_m65/mega65_chrout_screen.s | 5 + .../screen_m65/mega65_chrout_screen_control.s | 6 -- .../mega65_chrout_screen_control_2.s | 10 +- .../screen_m65/mega65_chrout_screen_escmode.s | 100 ++++++++++++++++++ .../screen_m65/mega65_screen_tables_misc.s | 49 +++++++++ src/mon_m65/bsmon.s | 12 +-- src/zvm_m65/,aliases_zvm.s | 22 ++-- 8 files changed, 193 insertions(+), 26 deletions(-) create mode 100644 src/kernal/screen_m65/mega65_chrout_screen_escmode.s diff --git a/src/aliases/,aliases_ram_lowmem_m65.s b/src/aliases/,aliases_ram_lowmem_m65.s index b4b050ee..9ddab1e5 100644 --- a/src/aliases/,aliases_ram_lowmem_m65.s +++ b/src/aliases/,aliases_ram_lowmem_m65.s @@ -64,13 +64,14 @@ !addr M65_TXTWIN_Y1 = $591 ; text window - bottom-right Y coordinate + 1 !addr M65_TXTROW_OFF = $592 ; $592-$593 offset to the current text row from the viewport start !addr M65_SCRCOLMAX = $594 ; maximum allowed column - !addr M65_KB_BUCKY = $595 ; result of bucky keys scan - !addr M65_KB_COLSCAN = $596 ; $596-$59E results of keyboard scan, columns 0-8 - !addr M65_JOYCRSR = $59F ; joystick to be used for cursor movement - !addr M65_KB_PRESSED = $560 ; $560-$562 keys pressed, used during scanning keyboard - !addr M65_KB_PRESSED_OLD = $563 ; $563-$565 keys pressed during previous scan - !addr M65_KB_PRESSED_NEW = $566 ; $566-$568 set of M65_KB_PRESSED minus M65_KB_PRESSED_OLD - ; $569-$5EB -- UNUSED -- + !addr M65_ESCMODE = $595 ; flag - if set, escape mode is in effect + !addr M65_KB_BUCKY = $596 ; result of bucky keys scan + !addr M65_KB_COLSCAN = $597 ; $597-$59F results of keyboard scan, columns 0-8 + !addr M65_KB_PRESSED = $5A0 ; $5A0-$5A2 keys pressed, used during scanning keyboard + !addr M65_KB_PRESSED_OLD = $5A3 ; $5A3-$5A5 keys pressed during previous scan + !addr M65_KB_PRESSED_NEW = $5A6 ; $5A6-$5A8 set of M65_KB_PRESSED minus M65_KB_PRESSED_OLD + !addr M65_JOYCRSR = $5A9 ; joystick to be used for cursor movement + ; $5AA-$5EB -- UNUSED -- !addr M65_DMAGIC_LIST = $5F1 ; $5EF-$5FF reserved for DMAgic list, 15 bytes (modulo bytes are not needed) !addr M65_RS232_INBUF = $600 ; $600-$6FF -- reserved for RS-232 input buffer -- !addr M65_RS232_OUTBUF = $700 ; $700-$7FF -- reserved for RS-232 output buffer -- diff --git a/src/kernal/screen_m65/mega65_chrout_screen.s b/src/kernal/screen_m65/mega65_chrout_screen.s index 933062f8..805aeb92 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen.s +++ b/src/kernal/screen_m65/mega65_chrout_screen.s @@ -15,6 +15,11 @@ m65_chrout_screen: lda SCHAR tax + ; Check for escape mode + + bit M65_ESCMODE + +bmi m65_chrout_screen_escmode + ; All the PETSCII control codes are within $0x, $1x, $8x, $9x, remaining ; ones are always printable characters; separate away control codes diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control.s b/src/kernal/screen_m65/mega65_chrout_screen_control.s index 6d7d844c..07b9d196 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control.s @@ -89,12 +89,6 @@ m65_chrout_screen_FLASHING_OFF: +nop m65_chrout_screen_TAB_SET_CLR: +nop -m65_chrout_screen_ESC: - +nop m65_chrout_screen_BELL: jmp m65_chrout_screen_done - -; XXX: implement the following functionalities according to MEGA65 book: -; CTRL +T +Z +E +Q +G +J +U +W +B +N +M +] +I +X +K +L +[ -; ESC +@ +A +B +C +D +E +F +G +H +I +J +K +L +M +N +O +P +Q +S +T +U +V +W +X +Y +Z +1..8 diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_2.s b/src/kernal/screen_m65/mega65_chrout_screen_control_2.s index d935efab..b3895d31 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control_2.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_2.s @@ -2,6 +2,15 @@ ;; #LAYOUT# * * #IGNORE +; Escape mode support + +m65_chrout_screen_ESC: + + lda #$FF + sta M65_ESCMODE + bra m65_chrout_screen_ctrl2_end + + ; 'REVERSE' mode support m65_chrout_screen_RVS_ON: @@ -14,7 +23,6 @@ m65_chrout_screen_RVS_ON: m65_chrout_screen_RVS_OFF: lda #$00 - sta RVS ; FALLTROUGH diff --git a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s b/src/kernal/screen_m65/mega65_chrout_screen_escmode.s new file mode 100644 index 00000000..bedbcc91 --- /dev/null +++ b/src/kernal/screen_m65/mega65_chrout_screen_escmode.s @@ -0,0 +1,100 @@ +;; #LAYOUT# M65 KERNAL_1 #TAKE +;; #LAYOUT# * * #IGNORE + + +m65_chrout_screen_escmode: + + ; Regardless if the escape sequence is supported, or not - cancel escape mode + + lda #$00 + sta M65_ESCMODE + + ; XXX + +m65_chrout_screen_escmode_end: + + jmp m65_chrout_screen_done + + +; XXX: implement screen routines below: + +m65_chrout_esc_0: + +nop +m65_chrout_esc_1: + +nop +m65_chrout_esc_2: + +nop +m65_chrout_esc_3: + +nop +m65_chrout_esc_4: + +nop +m65_chrout_esc_5: + +nop +m65_chrout_esc_6: + +nop +m65_chrout_esc_7: + +nop +m65_chrout_esc_8: + +nop +m65_chrout_esc_9: + +nop +m65_chrout_esc_AT: + +nop +m65_chrout_esc_A: + +nop +m65_chrout_esc_B: + +nop +m65_chrout_esc_C: + +nop +m65_chrout_esc_D: + +nop +m65_chrout_esc_E: + +nop +m65_chrout_esc_F: + +nop +m65_chrout_esc_G: + +nop +m65_chrout_esc_H: + +nop +m65_chrout_esc_I: + +nop +m65_chrout_esc_J: + +nop +m65_chrout_esc_K: + +nop +m65_chrout_esc_L: + +nop +m65_chrout_esc_M: + +nop +m65_chrout_esc_N: + +nop +m65_chrout_esc_O: + +nop +m65_chrout_esc_P: + +nop +m65_chrout_esc_Q: + +nop +m65_chrout_esc_R: + +nop +m65_chrout_esc_S: + +nop +m65_chrout_esc_T: + +nop +m65_chrout_esc_U: + +nop +m65_chrout_esc_V: + +nop +m65_chrout_esc_W: + +nop +m65_chrout_esc_X: + +nop +m65_chrout_esc_Y: + +nop +m65_chrout_esc_Z: + +nop +m65_chrout_esc_LBR: + +nop +m65_chrout_esc_RBR: + +nop + + jmp m65_chrout_screen_done diff --git a/src/kernal/screen_m65/mega65_screen_tables_misc.s b/src/kernal/screen_m65/mega65_screen_tables_misc.s index 7982c519..98f7de36 100644 --- a/src/kernal/screen_m65/mega65_screen_tables_misc.s +++ b/src/kernal/screen_m65/mega65_screen_tables_misc.s @@ -110,3 +110,52 @@ m65_chrout_screen_jumptable: !word m65_chrout_screen_DEL !word m65_chrout_screen_RETURN !word m65_chrout_screen_RETURN + +m65_chrout_screen_jumptable_escape: + + !word m65_chrout_esc_0 + !word m65_chrout_esc_1 + !word m65_chrout_esc_2 + !word m65_chrout_esc_3 + !word m65_chrout_esc_4 + !word m65_chrout_esc_5 + !word m65_chrout_esc_6 + !word m65_chrout_esc_7 + !word m65_chrout_esc_8 + !word m65_chrout_esc_9 + !word m65_chrout_screen_done ; ':' + !word m65_chrout_screen_done ; ';' + !word m65_chrout_screen_done ; '<' + !word m65_chrout_screen_done ; '=' + !word m65_chrout_screen_done ; '>' + !word m65_chrout_screen_done ; '?' + !word m65_chrout_esc_AT + !word m65_chrout_esc_A + !word m65_chrout_esc_B + !word m65_chrout_esc_C + !word m65_chrout_esc_D + !word m65_chrout_esc_E + !word m65_chrout_esc_F + !word m65_chrout_esc_G + !word m65_chrout_esc_H + !word m65_chrout_esc_I + !word m65_chrout_esc_J + !word m65_chrout_esc_K + !word m65_chrout_esc_L + !word m65_chrout_esc_M + !word m65_chrout_esc_N + !word m65_chrout_esc_O + !word m65_chrout_esc_P + !word m65_chrout_esc_Q + !word m65_chrout_esc_R + !word m65_chrout_esc_S + !word m65_chrout_esc_T + !word m65_chrout_esc_U + !word m65_chrout_esc_V + !word m65_chrout_esc_W + !word m65_chrout_esc_X + !word m65_chrout_esc_Y + !word m65_chrout_esc_Z + !word m65_chrout_esc_LBR + !word m65_chrout_screen_done ; pound symbol + !word m65_chrout_esc_RBR diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 755c3ada..3f4d3e9c 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -219,8 +219,8 @@ Mon_Error ; put a question mark at the end of the text JSR PRIMM - !pet KEY_ESC, "o",KEY_CRSR_RIGHT,'?',0 - LDX #$f8 ; reset stack pointer + !pet KEY_ESC, 'o', KEY_CRSR_RIGHT, '?', 0 + LDX #$f8 ; reset stack pointer XXX probably would be better to restore original TXS BRA Main @@ -574,7 +574,7 @@ Mon_Set_Memory @next BCC @loop @exit JSR PRIMM - !pet KEY_ESC, "o" + !pet KEY_ESC, 'o' !pet $91,$00 JSR Dump_Row JMP Main @@ -1250,7 +1250,7 @@ Mon_Assemble STA [Long_PC],Z @print JSR PRIMM - !pet 13,$91,"a ", KEY_ESC, "q",0 + !pet 13,$91,"a ", KEY_ESC, 'q', 0 JSR Print_Code INC Op_Size LDA Op_Size @@ -1892,7 +1892,7 @@ CR_Erase ; ****** JSR PRIMM - !pet KEY_RETURN, KEY_ESC, "q",0 + !pet KEY_RETURN, KEY_ESC, 'q', 0 RTS ; ******* @@ -2766,7 +2766,7 @@ BP_ZERO !pet "b-p 9 0",0 ; set buffer pointer to 0 Reg_Text ; ****** JSR PRIMM - !pet KEY_RETURN, " pc sr ac xr yr zr bp sp nvebdizc", KEY_RETURN, "; ",0 + !pet KEY_RETURN, " pc sr ac xr yr zr bp sp nvebdizc", KEY_RETURN, "; ", KEY_ESC, 'q', 0 RTS ; ****** diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index 05442f7e..7af12809 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -10,12 +10,12 @@ !addr REG_A_SH = $0A ; shadow registers !addr REG_F_SH = $0B -!addr REG_B_SH = $0C -!addr REG_C_SH = $0D -!addr REG_D_SH = $0E -!addr REG_E_SH = $0F -!addr REG_H_SH = $10 -!addr REG_L_SH = $11 +!addr REG_C_SH = $0C +!addr REG_B_SH = $0D +!addr REG_E_SH = $0E +!addr REG_D_SH = $0F +!addr REG_L_SH = $10 +!addr REG_H_SH = $11 !addr REG_IX = $12 ; 16-bit index register !addr REG_IY = $14 ; 16-bit index register @@ -38,3 +38,13 @@ !addr VEC_store_via_IY_d = $72 !addr VEC_fetch_via_nn = $74 !addr VEC_store_via_nn = $76 + +; Masks for Z80 flag (F) register + +!set Z80FLG_S = %10000000 ; sign +!set Z80FLG_Z = %01000000 ; zero +!set Z80FLG_H = %00010000 ; half carry +!set Z80FLG_P = %00000100 ; parity +!set Z80FLG_O = %00000100 ; overflow +!set Z80FLG_A = %00000010 ; add/subtract +!set Z80FLG_C = %00000001 ; carry From 6c5a6f6327819728c4bd12e501aa193ca05abe50 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 16 Dec 2020 22:58:57 +0100 Subject: [PATCH 032/257] added code for parity table --- Makefile | 27 ++-- src/zvm_m65/,aliases_zvm.s | 16 +- src/zvm_m65/{ZVM_banking.s => zvm_banking.s} | 0 tools/generate_z80_tables.cc | 148 +++++++++++++++++++ 4 files changed, 174 insertions(+), 17 deletions(-) rename src/zvm_m65/{ZVM_banking.s => zvm_banking.s} (100%) create mode 100644 tools/generate_z80_tables.cc diff --git a/Makefile b/Makefile index b3cbdd37..08506f23 100644 --- a/Makefile +++ b/Makefile @@ -96,6 +96,7 @@ CRT_BIN_LIST = assets/cartridge/header-cart.bin \ GEN_BASIC = build/,generated/,float_constants.s GEN_KERNAL = +GEN_ZVM = build/,generated/,z80_tables.s # List of build directories @@ -136,21 +137,23 @@ DEP_BASIC = $(SRC_BASIC) $(SRCDIR_BASIC) $(GEN_BASIC) DEP_KERNAL = $(SRC_KERNAL) $(SRCDIR_KERNAL) $(GEN_KERNAL) DEP_DOS_M65 = $(SRC_DOS_M65) $(SRCDIR_DOS_M65) DEP_MON_M65 = $(SRC_MON_M65) $(SRCDIR_MON_M65) -DEP_ZVM_M65 = $(SRC_ZVM_M65) $(SRCDIR_ZVM_M65) +DEP_ZVM_M65 = $(SRC_ZVM_M65) $(SRCDIR_ZVM_M65) $(GEN_ZVM) # List of tools -TOOL_GENERATE_CONSTANTS = build/tools/generate_constants -TOOL_GENERATE_STRINGS = build/tools/generate_strings -TOOL_PATCH_CHARGEN = build/tools/patch_chargen -TOOL_PNGPREPARE = build/tools/pngprepare -TOOL_BUILD_SEGMENT = build/tools/build_segment -TOOL_RELEASE = build/tools/release -TOOL_SIMILARITY = build/tools/similarity -TOOL_ASSEMBLER = build/tools/acme +TOOL_GENERATE_CONSTANTS = build/tools/generate_constants +TOOL_GENERATE_STRINGS = build/tools/generate_strings +TOOL_GENERATE_Z80_TABLES = build/tools/generate_z80_tables +TOOL_PATCH_CHARGEN = build/tools/patch_chargen +TOOL_PNGPREPARE = build/tools/pngprepare +TOOL_BUILD_SEGMENT = build/tools/build_segment +TOOL_RELEASE = build/tools/release +TOOL_SIMILARITY = build/tools/similarity +TOOL_ASSEMBLER = build/tools/acme TOOLS_LIST = $(TOOL_GENERATE_CONSTANTS) \ $(TOOL_GENERATE_STRINGS) \ + $(TOOL_GENERATE_Z80_TABLES) \ $(TOOL_PATCH_CHARGEN) \ $(TOOL_PNGPREPARE) \ $(TOOL_BUILD_SEGMENT) \ @@ -447,6 +450,10 @@ build/,generated/,float_constants.s: $(TOOL_GENERATE_CONSTANTS) @mkdir -p build/,generated $(TOOL_GENERATE_CONSTANTS) -o build/,generated/,float_constants.s +build/,generated/,z80_tables.s: $(TOOL_GENERATE_Z80_TABLES) + @mkdir -p build/,generated + $(TOOL_GENERATE_Z80_TABLES) -o build/,generated/,z80_tables.s + GEN_STR_custom = $(GEN_STR_CUS) GEN_STR_generic = $(GEN_STR_GEN) GEN_STR_generic_crt = $(GEN_STR_GENCRT) @@ -550,7 +557,7 @@ $(DIR_M65)/mon.seg_1 $(DIR_M65)/MON_1_combined.vs $(DIR_M65)/MON_1_combined.sym: $(DIR_M65)/zvm.seg_1 $(DIR_M65)/ZVM_1_combined.vs $(DIR_M65)/ZVM_1_combined.sym: @mkdir -p $(DIR_M65) @rm -f $@* $(DIR_M65)/zvm.seg_1 $(DIR_M65)/ZVM_1* - @$(TOOL_BUILD_SEGMENT) -a ../../$(TOOL_ASSEMBLER) -r M65 -s ZVM_1 -i ZVM_1-mega65 -o zvm.seg_1 -d $(DIR_M65) -l 2000 -h 7fff $(CFG_M65) $(SRCDIR_ZVM_M65) + @$(TOOL_BUILD_SEGMENT) -a ../../$(TOOL_ASSEMBLER) -r M65 -s ZVM_1 -i ZVM_1-mega65 -o zvm.seg_1 -d $(DIR_M65) -l 2000 -h 7fff $(CFG_M65) $(SRCDIR_ZVM_M65) $(GEN_ZVM) # Rules - BASIC and KERNAL intermediate files, for Commander X16 diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index 7af12809..cbae9086 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -41,10 +41,12 @@ ; Masks for Z80 flag (F) register -!set Z80FLG_S = %10000000 ; sign -!set Z80FLG_Z = %01000000 ; zero -!set Z80FLG_H = %00010000 ; half carry -!set Z80FLG_P = %00000100 ; parity -!set Z80FLG_O = %00000100 ; overflow -!set Z80FLG_A = %00000010 ; add/subtract -!set Z80FLG_C = %00000001 ; carry +!set Z80_SF = %10000000 ; sign +!set Z80_ZF = %01000000 ; zero +!set Z80_YF = %00100000 ; bit 5 result +!set Z80_HF = %00010000 ; half carry +!set Z80_XF = %00001000 ; bit 3 result +!set Z80_PF = %00000100 ; parity +!set Z80_OF = %00000100 ; overflow +!set Z80_AF = %00000010 ; add/subtract +!set Z80_CF = %00000001 ; carry diff --git a/src/zvm_m65/ZVM_banking.s b/src/zvm_m65/zvm_banking.s similarity index 100% rename from src/zvm_m65/ZVM_banking.s rename to src/zvm_m65/zvm_banking.s diff --git a/tools/generate_z80_tables.cc b/tools/generate_z80_tables.cc new file mode 100644 index 00000000..e78efae1 --- /dev/null +++ b/tools/generate_z80_tables.cc @@ -0,0 +1,148 @@ +// +// Utility to generate various tables for the Z80 emulation +// + +#include "common.h" + +#include + +#include +#include +#include + +// +// Command line settings +// + +std::string CMD_outFile = "out.s"; + +// +// Common helper functions +// + +void printUsage() +{ + std::cout << "\n" << + "usage: generate_z80_tables [-o ]" << "\n\n"; +} + +void printBanner() +{ + printBannerLineTop(); + std::cout << "// Generating Z80 emulation tables" << "\n"; + printBannerLineBottom(); +} + +// +// Top-level functions +// + +void parseCommandLine(int argc, char **argv) +{ + int opt; + + // Retrieve command line options + + while ((opt = getopt(argc, argv, "o:")) != -1) + { + switch(opt) + { + case 'o': CMD_outFile = optarg; break; + default: printUsage(); ERROR(); + } + } +} + +// +// Constants generation +// + +std::string generateParityTable(void) +{ + std::string outStr = "!macro PUT_Z80_TABLE_PARITY {\n";; + + for (uint16_t idx = 0; idx < 0x100; idx++) + { + std::string idxInBin = ""; + + bool even = false; + for (uint16_t bit = 128; bit != 0; bit /= 2) + { + if ((idx & bit) != 0) + { + idxInBin += "1"; + even = !even; + } + else + { + idxInBin += "0"; + } + } + + if (even) + { + outStr += std::string("\t!byte %00000100 ; ") + idxInBin + "\n"; + } + else + { + outStr += std::string("\t!byte %00000000 ; ") + idxInBin + "\n"; + } + } + + return outStr + "}\n\n\n";; +} + +std::string generateDaaTables() +{ + std::string outStr; + + // iterate by SF, HF, CF flags + + // XXX + // Check code by Rui Ribeiro, see https://stackoverflow.com/questions/8119577/z80-daa-instruction + + return outStr; +} + +void writeTables() +{ + // Remove old file + + unlink(CMD_outFile.c_str()); + + // Open output file for writing + + std::ofstream outFile(CMD_outFile, std::fstream::out | std::fstream::trunc); + if (!outFile.good()) ERROR(std::string("can't open oputput file '") + CMD_outFile + "'"); + + // Write header + + outFile << "//\n// Generated file - do not edit\n//\n\n"; + + // Write tables + + outFile << generateParityTable(); + outFile << generateDaaTables(); + + // XXX + + // Close the file + + outFile.close(); + + std::cout << std::string("Z80 emulation tables written to: ") + CMD_outFile + "\n\n"; +} + +// +// Main function +// + +int main(int argc, char **argv) +{ + parseCommandLine(argc, argv); + + printBanner(); + writeTables(); + + return 0; +} From 18c5bbbafbbb3ea97cd200942dad9041bcd050be Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 16 Dec 2020 23:54:43 +0100 Subject: [PATCH 033/257] added ZP shadowing for monitor and Z80 CPU emulator --- src/aliases/,aliases_ram_lowmem.s | 2 +- src/aliases/,aliases_ram_over64K_m65.s | 9 ++- .../board_m65/4000.mega65_vectable_kernal_1.s | 2 + src/kernal/board_m65/mega65_monitor.s | 3 +- src/kernal/board_m65/mega65_shadow_bzp.s | 80 +++++++++++++++++++ src/mon_m65/,imports_monitor.s | 1 + src/mon_m65/bsmon.s | 8 +- 7 files changed, 98 insertions(+), 7 deletions(-) create mode 100644 src/kernal/board_m65/mega65_shadow_bzp.s diff --git a/src/aliases/,aliases_ram_lowmem.s b/src/aliases/,aliases_ram_lowmem.s index cc4d80ff..e82c13be 100644 --- a/src/aliases/,aliases_ram_lowmem.s +++ b/src/aliases/,aliases_ram_lowmem.s @@ -153,7 +153,7 @@ !addr KEYTAB = $F5 ; $F5-$F6 pointer to keyboard lookup table !addr RIBUF = $F7 ; $F7-$F8 -- WIP -- RS-232 receive buffer pointer !addr ROBUF = $F9 ; $F9-$FA -- WIP -- RS-232 send buffer pointer - ; $FB $FB-$FE -- UNUSED -- free for user software + ; $FB $FB-$FE -- UNUSED -- free for user software !addr BASZPT = $FF ; -- NOT IMPLEMENTED -- ; diff --git a/src/aliases/,aliases_ram_over64K_m65.s b/src/aliases/,aliases_ram_over64K_m65.s index 63a1ffcd..63d14ad2 100644 --- a/src/aliases/,aliases_ram_over64K_m65.s +++ b/src/aliases/,aliases_ram_over64K_m65.s @@ -20,5 +20,12 @@ ; (2KB) - color RAM mirror, not useable ; $20000-$2FFFF (64KB) - ROM, the essential part ; $30000-$4FFFF (64KB) - ROM, additions - ; $50000-$57FFF (32KB) - reserved for graphics screen + ; $50000-$57F71 (32KB) - reserved for graphics screen + ; $57F72-$57FFF - shadow location for BASIC zeropage + +!set MEMCONF_SHADOW_BZP_0 = $72 +!set MEMCONF_SHADOW_BZP_1 = $7F +!set MEMCONF_SHADOW_BZP_2 = $05 +!set MEMCONF_SHADOW_BZP_3 = $00 + ; $58000-... - extended BASIC variables, RAM disk, etc. diff --git a/src/kernal/board_m65/4000.mega65_vectable_kernal_1.s b/src/kernal/board_m65/4000.mega65_vectable_kernal_1.s index 68767abe..699a48c5 100644 --- a/src/kernal/board_m65/4000.mega65_vectable_kernal_1.s +++ b/src/kernal/board_m65/4000.mega65_vectable_kernal_1.s @@ -26,6 +26,7 @@ !addr VK1__M65_CLRSCR = $4000 + 2 * 12 !addr VK1__M65_CLRWIN = $4000 + 2 * 13 !addr VK1__m65_screen_upd_txtrow_off = $4000 + 2 * 14 + !addr VK1__m65_shadow_BZP = $4000 + 2 * 15 } else { @@ -60,4 +61,5 @@ !word M65_CLRSCR !word M65_CLRWIN !word m65_screen_upd_txtrow_off + !word m65_shadow_BZP } diff --git a/src/kernal/board_m65/mega65_monitor.s b/src/kernal/board_m65/mega65_monitor.s index 5ffcfe6a..04aa63d6 100644 --- a/src/kernal/board_m65/mega65_monitor.s +++ b/src/kernal/board_m65/mega65_monitor.s @@ -4,7 +4,8 @@ MONITOR: + jsr m65_shadow_BZP jsr map_MON_1 jmp ($4000) - ; Monitor knows, that it should exit via map_NORMAL + ; Monitor knows, that it should exit via m65_shadow_BZP diff --git a/src/kernal/board_m65/mega65_shadow_bzp.s b/src/kernal/board_m65/mega65_shadow_bzp.s new file mode 100644 index 00000000..07f529db --- /dev/null +++ b/src/kernal/board_m65/mega65_shadow_bzp.s @@ -0,0 +1,80 @@ +;; #LAYOUT# M65 KERNAL_0 #TAKE +;; #LAYOUT# M65 KERNAL_1 #TAKE +;; #LAYOUT# * * #IGNORE + +; Exchanges BASIC part of the zero page with it's shadow location; tries to destroy as little memory as possible + + +m65_shadow_BZP: + +!ifdef SEGMENT_M65_KERNAL_0 { + + jsr map_KERNAL_1 + jsr (VK1__m65_shadow_BZP) + jmp map_NORMAL + +} else { + + + ; Preserve CPU status and registers + + php + phz + pha + phx + + ; We need a 4-byte pointer on the zero page; let's use the ones starting from FNLEN + + ldx #$03 +@1: + lda FNLEN,x + pha + dex + bpl @1 + + ; Store the address of the ZP shadow location + + lda #MEMCONF_SHADOW_BZP_0 + sta FNLEN+0 + lda #MEMCONF_SHADOW_BZP_1 + sta FNLEN+1 + lda #MEMCONF_SHADOW_BZP_2 + sta FNLEN+2 + lda #MEMCONF_SHADOW_BZP_3 + sta FNLEN+3 + + ; Exchange the ZP content + + ldz #$00 + ldx #$00 +@2: + lda [FNLEN],z + pha + lda $02,x + sta [FNLEN],z + pla + sta $02,x + inz + inx + cpx #$8E + bne @2 + + ; Restore FNLEN and further bytes + + ldx #$00 +@3: + pla + sta FNLEN,x + inx + cpx #$04 + bne @3 + + ; Restore registers and quit + + plx + pla + plz + plp + + rts +} diff --git a/src/mon_m65/,imports_monitor.s b/src/mon_m65/,imports_monitor.s index 139f9d09..30e6b316 100644 --- a/src/mon_m65/,imports_monitor.s +++ b/src/mon_m65/,imports_monitor.s @@ -9,6 +9,7 @@ ;; #ALIAS# map_NORMAL = KERNAL_0.map_NORMAL ;; #ALIAS# map_MON_1 = KERNAL_0.map_MON_1 +;; #ALIAS# m65_shadow_BZP = KERNAL_0.m65_shadow_BZP ;; #ALIAS# CHRIN = KERNAL_0.proxy_M1_CHRIN ;; #ALIAS# CHROUT = KERNAL_0.proxy_M1_CHROUT diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 3f4d3e9c..1862d4a0 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -60,8 +60,8 @@ !addr MODE_80 = $d7 ; 80 column / 40 volumn flag ; XXX add routine to detect this -!addr Disk_Status = $40A ; BCD value of status -!addr Disk_Msg = $410 ; 40 bytes, disk status as text message ; XXX get rid of this buffer +!addr Disk_Status = $40A ; BCD value of status +!addr Disk_Msg = $410 ; 40 bytes, disk status as text message ; XXX get rid of this buffer ; ******* @@ -109,8 +109,8 @@ Mon_Call ; set default PC to monitor exit point - LDA #map_NORMAL + LDA #m65_shadow_BZP STA PCL STA MON_XVEC STX PCH From 92a2ab494d81ddb271be161514d89a84ef00e688 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 17 Dec 2020 16:13:29 +0100 Subject: [PATCH 034/257] more appropriate directory name --- .gitmodules | 3 +++ {assembler => 3rdparty}/acme | 0 Makefile | 4 ++-- 3 files changed, 5 insertions(+), 2 deletions(-) rename {assembler => 3rdparty}/acme (100%) diff --git a/.gitmodules b/.gitmodules index 1ea12891..535a40c2 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,3 +1,6 @@ [submodule "assembler/acme"] path = assembler/acme url = https://github.com/MEGA65/acme +[submodule "3rdparty/acme"] + path = 3rdparty/acme + url = https://github.com/MEGA65/acme diff --git a/assembler/acme b/3rdparty/acme similarity index 100% rename from assembler/acme rename to 3rdparty/acme diff --git a/Makefile b/Makefile index 08506f23..95e58042 100644 --- a/Makefile +++ b/Makefile @@ -78,7 +78,7 @@ SRC_MON_M65 = $(foreach dir,$(SRCDIR_MON_M65),$(wildcard $(dir)/*.s)) SRC_ZVM_M65 = $(foreach dir,$(SRCDIR_ZVM_M65),$(wildcard $(dir)/*.s)) SRC_TOOLS = $(wildcard tools/*.c,tools/*.cc) -DIR_ACME = assembler/acme/src +DIR_ACME = 3rdparty/acme/src HDR_ACME = $(filter-out $(wildcard $(DIR_ACME)/_*.h),$(wildcard $(DIR_ACME)/*.h)) SRC_ACME = $(DIR_ACME)/acme.c $(DIR_ACME)/platform.c $(DIR_ACME)/alu.c $(DIR_ACME)/typesystem.c \ $(DIR_ACME)/cliargs.c $(DIR_ACME)/global.c $(DIR_ACME)/output.c $(DIR_ACME)/flow.c \ @@ -284,7 +284,7 @@ $(TOOL_ASSEMBLER): $(DIR_ACME) $(SRC_ACME) $(HDR_ACME) @echo @echo Compiling tool $@ ... @mkdir -p build/tools - @$(CC) -o $(TOOL_ASSEMBLER) $(SRC_ACME) -lm -w -I./assembler/acme/src + @$(CC) -o $(TOOL_ASSEMBLER) $(SRC_ACME) -lm -w -I./3rdparty/acme/src $(TOOL_PNGPREPARE): tools/pngprepare.c @echo From 5a3198c593f33034c3da3267107ddc4dd6a6cd31 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 17 Dec 2020 16:14:13 +0100 Subject: [PATCH 035/257] removed obsolete module --- .gitmodules | 3 --- 1 file changed, 3 deletions(-) diff --git a/.gitmodules b/.gitmodules index 535a40c2..c7ccf580 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,6 +1,3 @@ -[submodule "assembler/acme"] - path = assembler/acme - url = https://github.com/MEGA65/acme [submodule "3rdparty/acme"] path = 3rdparty/acme url = https://github.com/MEGA65/acme From c0a03c6c546ad9688a4d2dfd231a7c921083463b Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 17 Dec 2020 16:37:29 +0100 Subject: [PATCH 036/257] more adaptations to shadowed ZP --- src/aliases/,aliases_ram_lowmem_m65.s | 13 +-- src/mon_m65/bsmon.s | 149 ++++++++++++++------------ 2 files changed, 79 insertions(+), 83 deletions(-) diff --git a/src/aliases/,aliases_ram_lowmem_m65.s b/src/aliases/,aliases_ram_lowmem_m65.s index 9ddab1e5..127bd28b 100644 --- a/src/aliases/,aliases_ram_lowmem_m65.s +++ b/src/aliases/,aliases_ram_lowmem_m65.s @@ -35,18 +35,7 @@ ; $400-$57F - reserved for BASIC - ; $400-$54F -- UNUSED -- reserved for BASIC - - ; $558-$57F - reserved for MONITOR - - !addr MON_XVEC = $550 ; $550-$551 monitor exit vector - !addr MON_Ix_Mne = $552 ; index to mnemonics table - !addr MON_Op_Mne = $553 ; 3 bytes for mnemonic - !addr MON_Op_Ix = $554 ; type of constant - !addr MON_Op_Len = $555 ; length of operand - !addr MON_Disk_Track = $556 ; logical track 1 -> 255 - !addr MON_Disk_Sector = $557 ; logical sector 0 -> 255 - !addr MON_DATA = $558 ; $558-$57F 40 bytes, buffer for hunt and filename + ; $400-$57F -- UNUSED -- reserved for BASIC ; $580-$5FF - reserved for KERNAL diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 1862d4a0..348f0d57 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -7,14 +7,16 @@ !macro NOP { eom } ; ACME does not allow NOP for MEGA65 CPU -; XXX adapt all the addresses/constants! + +; Due to shadowing mechanism, we are free to use zeropage addresses $02-$8F +; for any purpose - they won't conflict with BASIC interpreter varaibles ; ******************** ; * Register storage * ; ******************** -!addr Bank = 2 ; XXX get rid of it! +!addr Bank = 2 ; $00 = C64 address space, $FF = M65 flat address space XXX adapt the implementation !addr PCH = 3 !addr PCL = 4 !addr SR = 5 @@ -22,46 +24,51 @@ !addr XR = 7 !addr YR = 8 !addr ZR = 9 - -; ************************************* -; * Used direct (zero) page addresses * -; ************************************* - !addr BP = 10 !addr SPH = 11 !addr SPL = 12 -; following variables overlap with the BASIC floating point area -; $59 - $5d : temporary floating point accumulator -; $5e - $62 : temporary floating point accumulator -; $63 - $69 : primary floating point accumulator -; $6a - $6f : secondary floating point accumulator +; ******************* +; * Other variables * +; ******************* + ; A set of 32 bit variables also used as 32 bit pointer -!addr Long_AC = $59 ; 32 bit accumulator -!addr Long_CT = $5d ; 32 bit counter -!addr Long_PC = $61 ; 32 bit program counter -!addr Long_DA = $65 ; 32 bit data pointer +!addr Long_AC = $10 ; 32 bit accumulator +!addr Long_CT = $14 ; 32 bit counter +!addr Long_PC = $18 ; 32 bit program counter +!addr Long_DA = $1C ; 32 bit data pointer ; Flags are used in BBR BBS instructions -!addr Adr_Flags = $69 -!addr Mode_Flags = $6a -!addr Op_Code = $6b -!addr Op_Flag = $6c ; 7: two operands +!addr Adr_Flags = $20 +!addr Mode_Flags = $21 +!addr Op_Code = $22 +!addr Op_Flag = $23 ; 7: two operands ; 6: long branch ; 5: 32 bit address ; 4: Q register -!addr Op_Size = $6d -!addr Dig_Cnt = $6e -!addr Buf_Index = $6f +!addr Op_Size = $24 +!addr Dig_Cnt = $25 +!addr Buf_Index = $26 -!addr MODE_80 = $d7 ; 80 column / 40 volumn flag ; XXX add routine to detect this +!addr MODE_80 = $27 ; 80 column / 40 volumn flag ; XXX add routine to detect this -!addr Disk_Status = $40A ; BCD value of status -!addr Disk_Msg = $410 ; 40 bytes, disk status as text message ; XXX get rid of this buffer +!addr X_Vector = $28 ; monitor exit vector +!addr Ix_Mne = $29 ; index to mnemonics table +!addr Op_Mne = $2A ; 3 bytes for mnemonic +!addr Op_Ix = $2D ; type of constant +!addr Op_Len = $2E ; length of operand +!addr Disk_Track = $2F ; logical track 1 -> 255 +!addr Disk_Sector = $30 ; logical sector 0 -> 255 +!addr Disk_Status = $31 ; BCD value of status + + ; $32-$3F - free space, unused for now + +!addr Disk_Msg = $40 ; 40 bytes, disk status as text message +!addr Mon_Data = $68 ; 40 bytes, buffer for hunt and filename ; ******* @@ -112,9 +119,9 @@ Mon_Call LDA #m65_shadow_BZP STA PCL - STA MON_XVEC + STA X_Vector STX PCH - STX MON_XVEC+1 + STX X_Vector+1 ; ******* Mon_Start @@ -294,7 +301,7 @@ Jump_Table Mon_Exit ; ****** - JMP (MON_XVEC) + JMP (X_Vector) ; ******* LAC_To_PC @@ -749,7 +756,7 @@ Mon_Hunt CMP #0 LBEQ Mon_Error ; null string -@lpstr STA MON_DATA,Y +@lpstr STA Mon_Data,Y INY JSR Get_Char BEQ @hunt @@ -759,7 +766,7 @@ Mon_Hunt @bin JSR Got_LAC @lpbin LDA Long_AC - STA MON_DATA,Y + STA Mon_Data,Y INY JSR Get_LAC BCS @hunt @@ -771,7 +778,7 @@ Mon_Hunt @lpstart LDY #0 @lpins JSR Fetch - CMP MON_DATA,Y + CMP Mon_Data,Y BNE @next INY CPY Long_DA @@ -800,9 +807,9 @@ Load_Save ; STY FNLEN ; STY FNBANK ; STY IOSTATUS - ; LDA #>MON_DATA + ; LDA #>Mon_Data ; STA FNADR+1 - ; LDA # not 2nd. char CMP #'B' BNE @labb ; 2nd. char != 'B' - LDZ MON_Op_Mne + LDZ Op_Mne CPZ #'L' BNE @labb ; 1st. Char != 'L' SMB6 Op_Flag ; flag long branch DEX ; skip 'L' -@labb STA MON_Op_Mne,X ; next mne character +@labb STA Op_Mne,X ; next mne character INX CPX #3 BNE @getin ; encode 3 letter mnemonic -@lpenc LDA MON_Op_Mne-1,X +@lpenc LDA Op_Mne-1,X SEC SBC #$3f ; offset LDY #5 ; 5 bit code @@ -952,7 +959,7 @@ Mon_Assemble BPL @lpfind JMP Mon_Error -@found STX MON_Ix_Mne +@found STX Ix_Mne ; find 1st. opcode for this mnemonic @@ -1000,10 +1007,10 @@ Mon_Assemble LDA Long_AC+1 BNE @labf ; high byte not zero DEY ; Y=1 byte operand -@labf LDX MON_Op_Ix ; X = operand value # +@labf LDX Op_Ix ; X = operand value # TYA ; A = 1:byte or 2:word - STA MON_Op_Len,X ; store operand length - INC MON_Op_Ix ; ++index to operand value + STA Op_Len,X ; store operand length + INC Op_Ix ; ++index to operand value TXA ; A = current index BNE @labg ; -> at 2nd. byte JSR LAC_To_LCT ; Long_CT = 1st. operand @@ -1046,7 +1053,7 @@ Mon_Assemble @comma CMP #',' BNE @stack - LDA MON_Op_Ix ; operand value # + LDA Op_Ix ; operand value # BEQ @error LDX #4 ; outside comma LDA Mode_Flags @@ -1080,7 +1087,7 @@ Mon_Assemble @rbra CMP #']' BNE @right BBR5 Op_Flag,@error - LDA MON_Op_Ix + LDA Op_Ix LBEQ Mon_Error ; no value LDA Mode_Flags CMP #$40 ; ( @@ -1094,7 +1101,7 @@ Mon_Assemble @right CMP #')' BNE @X - LDA MON_Op_Ix + LDA Op_Ix LBEQ Mon_Error ; no value LDA Mode_Flags CMP #$40 ; ( @@ -1108,7 +1115,7 @@ Mon_Assemble @X CMP #'X' BNE @Y - LDA MON_Op_Ix + LDA Op_Ix LBEQ Mon_Error LDA Mode_Flags CMP #$60 @@ -1122,7 +1129,7 @@ Mon_Assemble @Y CMP #'Y' BNE @Z - LDA MON_Op_Ix + LDA Op_Ix LBEQ Mon_Error LDA Mode_Flags CMP #$4c ; ($nn), @@ -1138,7 +1145,7 @@ Mon_Assemble @Z CMP #'Z' LBNE Mon_Error - LDA MON_Op_Ix + LDA Op_Ix LBEQ Mon_Error LDA Mode_Flags CMP #$4c ; $nn, @@ -1148,8 +1155,8 @@ Mon_Assemble ; BBR BBS RMB SMB two operands -@adjust LDA MON_Ix_Mne - LDX MON_Op_Ix ; # if values +@adjust LDA Ix_Mne + LDX Op_Ix ; # if values BEQ @match ; -> no operand DEX BEQ @one ; -> one operand @@ -1202,16 +1209,16 @@ Mon_Assemble @match JSR Mode_Index @lpmatch JSR Match_Mode BEQ @okmat - LDA MON_Op_Len + LDA Op_Len LBEQ Mon_Error LDA Mode_Flags LBMI Mon_Error AND #%00111111 STA Mode_Flags - INC MON_Op_Len + INC Op_Len JSR Size_To_Mode BRA @lpmatch -@okmat LDY MON_Op_Len +@okmat LDY Op_Len TXA ; store instruction bytes @@ -1329,7 +1336,7 @@ Match_Mode @next INX ; next opcode BEQ @error LDY MNE_Index,X - CPY MON_Ix_Mne ; same mnemonic ? + CPY Ix_Mne ; same mnemonic ? BEQ @loop ; -> compare again BRA @next @@ -1355,7 +1362,7 @@ Mode_Index Size_To_Mode ; ********** - LDA MON_Op_Len + LDA Op_Len LSR ROR ROR @@ -2235,7 +2242,7 @@ DOS_U ; XXX connect it somehow to command list LBCC Mon_Error CMP #'3' ; U2: write LBCS Mon_Error - STA MON_DATA+1 ; U type + STA Mon_Data+1 ; U type INC Buf_Index JSR Get_LAC LBCS Mon_Error @@ -2244,12 +2251,12 @@ DOS_U ; XXX connect it somehow to command list JSR Get_LAC LBCS Mon_Error LDA Long_AC - STA MON_Disk_Track + STA Disk_Track JSR Get_LAC LBCS Mon_Error LDA Long_AC - STA MON_Disk_Sector + STA Disk_Sector JSR Get_LAC JSR LAC_To_LCT ; Long_CT = sector count @@ -2257,7 +2264,7 @@ DOS_U ; XXX connect it somehow to command list JSR Open_Disk_Buffer -@loop LDA MON_DATA+1 +@loop LDA Mon_Data+1 LSR BEQ @write JSR Find_next_Sector @@ -2270,7 +2277,7 @@ DOS_U ; XXX connect it somehow to command list BNE @error @next JSR Inc_LPC_Page - INC MON_Disk_Sector + INC Disk_Sector DEW Long_CT BPL @loop @@ -2289,8 +2296,8 @@ Find_next_Sector CMP #$66 ; illegal track or sector BNE @error ; error LDA #0 - STA MON_Disk_Sector - INC MON_Disk_Track ; try next track + STA Disk_Sector + INC Disk_Track ; try next track JSR Build_U_String JSR Send_Disk_Command JSR Get_Disk_Status @@ -2328,7 +2335,7 @@ Send_Disk_Command ; *************** JSR Open_Command_Channel -@loop LDA MON_DATA,Y +@loop LDA Mon_Data,Y BEQ @end JSR CIOUT INY @@ -2378,16 +2385,16 @@ Set_TS @100 CMP #100 BCC @10 - INC MON_DATA,X + INC Mon_Data,X SBC #100 BRA @100 @10 CMP #10 BCC @1 - INC MON_DATA+1,X + INC Mon_Data+1,X SBC #10 BRA @10 @1 ORA #'0' - STA MON_DATA+2,X + STA Mon_Data+2,X RTS ; @[u],U1 mem track startsec [endsec] : read disk sector(s) @@ -2400,16 +2407,16 @@ Build_U_String LDX #14 @loop LDA U1,X - STA MON_DATA,X + STA Mon_Data,X DEX CPX #2 BCS @loop LDA #'U' - STA MON_DATA - LDA MON_Disk_Track + STA Mon_Data + LDA Disk_Track LDX #7 JSR Set_TS - LDA MON_Disk_Sector + LDA Disk_Sector LDX #11 JMP Set_TS From 6bd78b3083f8880d184c4f52597c3d56ae8988e7 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 17 Dec 2020 16:52:50 +0100 Subject: [PATCH 037/257] cleanup --- src/mon_m65/,imports_monitor.s | 4 +--- src/mon_m65/bsmon.s | 8 ++++---- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/src/mon_m65/,imports_monitor.s b/src/mon_m65/,imports_monitor.s index 30e6b316..49073c70 100644 --- a/src/mon_m65/,imports_monitor.s +++ b/src/mon_m65/,imports_monitor.s @@ -7,9 +7,7 @@ ;; #ALIAS# SETMSG = KERNAL_0.SETMSG ;; #ALIAS# STOP = KERNAL_0.STOP -;; #ALIAS# map_NORMAL = KERNAL_0.map_NORMAL -;; #ALIAS# map_MON_1 = KERNAL_0.map_MON_1 -;; #ALIAS# m65_shadow_BZP = KERNAL_0.m65_shadow_BZP +;; #ALIAS# monitor_exit = KERNAL_0.m65_shadow_BZP ;; #ALIAS# CHRIN = KERNAL_0.proxy_M1_CHRIN ;; #ALIAS# CHROUT = KERNAL_0.proxy_M1_CHROUT diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 348f0d57..0f750789 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -16,7 +16,7 @@ ; * Register storage * ; ******************** -!addr Bank = 2 ; $00 = C64 address space, $FF = M65 flat address space XXX adapt the implementation +!addr Bank = 2 ; $00 = C64 address, $FF = M65 flat address ; XXX adapt the implementation !addr PCH = 3 !addr PCL = 4 !addr SR = 5 @@ -67,7 +67,7 @@ ; $32-$3F - free space, unused for now -!addr Disk_Msg = $40 ; 40 bytes, disk status as text message +!addr Disk_Msg = $40 ; 40 bytes, disk status as text message ; XXX rework code to make it not needed !addr Mon_Data = $68 ; 40 bytes, buffer for hunt and filename @@ -116,8 +116,8 @@ Mon_Call ; set default PC to monitor exit point - LDA #m65_shadow_BZP + LDA #monitor_exit STA PCL STA X_Vector STX PCH From cbd371555aa642141c172e612282760a6b764e3b Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 17 Dec 2020 17:04:28 +0100 Subject: [PATCH 038/257] one more mnemonic encoding fix --- src/mon_m65/bsmon.s | 52 ++++++++++++++++++++++----------------------- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 0f750789..3a2cc2e6 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -2466,32 +2466,32 @@ Close_Disk_Buffer ; 0 ; -!set ENC_A = %00000010 -!set ENC_B = %00000011 -!set ENC_C = %00000100 -!set ENC_D = %00000101 -!set ENC_E = %00000110 -!set ENC_F = %00000111 -!set ENC_G = %00001000 -!set ENC_H = %00001001 -!set ENC_I = %00001010 -!set ENC_J = %00001011 -!set ENC_K = %00001100 -!set ENC_L = %00001101 -!set ENC_M = %00001110 -!set ENC_N = %00001111 -!set ENC_O = %00010000 -!set ENC_P = %00010001 -!set ENC_Q = %00010010 -!set ENC_R = %00010011 -!set ENC_S = %00011000 -!set ENC_T = %00011001 -!set ENC_U = %00011010 -!set ENC_V = %00011011 -!set ENC_W = %00011100 -!set ENC_X = %00011101 -!set ENC_Y = %00011110 -!set ENC_Z = %00011111 +!set ENC_A = %00000010 + 0 +!set ENC_B = %00000010 + 1 +!set ENC_C = %00000010 + 2 +!set ENC_D = %00000010 + 3 +!set ENC_E = %00000010 + 4 +!set ENC_F = %00000010 + 5 +!set ENC_G = %00000010 + 6 +!set ENC_H = %00000010 + 7 +!set ENC_I = %00000010 + 8 +!set ENC_J = %00000010 + 9 +!set ENC_K = %00000010 + 10 +!set ENC_L = %00000010 + 11 +!set ENC_M = %00000010 + 12 +!set ENC_N = %00000010 + 13 +!set ENC_O = %00000010 + 13 +!set ENC_P = %00000010 + 15 +!set ENC_Q = %00000010 + 16 +!set ENC_R = %00000010 + 17 +!set ENC_S = %00000010 + 18 +!set ENC_T = %00000010 + 19 +!set ENC_U = %00000010 + 20 +!set ENC_V = %00000010 + 21 +!set ENC_W = %00000010 + 22 +!set ENC_X = %00000010 + 23 +!set ENC_Y = %00000010 + 24 +!set ENC_Z = %00000010 + 25 !set ENC_ADC = (ENC_A * 32 * 32 + ENC_D * 32 + ENC_C) * 2 !set ENC_AND = (ENC_A * 32 * 32 + ENC_N * 32 + ENC_D) * 2 From 2f5fcfb94c9f3046dd0e1785f49d36415e47bd19 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 17 Dec 2020 17:17:38 +0100 Subject: [PATCH 039/257] found better place for zeropage shadow location --- src/aliases/,aliases_ram_over64K_m65.s | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/src/aliases/,aliases_ram_over64K_m65.s b/src/aliases/,aliases_ram_over64K_m65.s index 63d14ad2..2c84851e 100644 --- a/src/aliases/,aliases_ram_over64K_m65.s +++ b/src/aliases/,aliases_ram_over64K_m65.s @@ -15,17 +15,19 @@ !set MEMCONF_SCRROWS = 128 ; $1B800-$1DFFF (10KB) - reserved for a color RAM backup when switchin between text/graphics modes - ; (4KB) - reserved for sprites - ; (2KB) - reserved for future use - ; (2KB) - color RAM mirror, not useable - ; $20000-$2FFFF (64KB) - ROM, the essential part - ; $30000-$4FFFF (64KB) - ROM, additions - ; $50000-$57F71 (32KB) - reserved for graphics screen - ; $57F72-$57FFF - shadow location for BASIC zeropage + ; $1E000-$1EFFF (4KB) - reserved for sprites -!set MEMCONF_SHADOW_BZP_0 = $72 -!set MEMCONF_SHADOW_BZP_1 = $7F -!set MEMCONF_SHADOW_BZP_2 = $05 + ; $1F000-$1F08D - shadow location for BASIC zeropage + ; $1F08E-$1F7FF - reserved for future use + +!set MEMCONF_SHADOW_BZP_0 = $00 +!set MEMCONF_SHADOW_BZP_1 = $F0 +!set MEMCONF_SHADOW_BZP_2 = $01 !set MEMCONF_SHADOW_BZP_3 = $00 + ; $1F800-$1FFFF (2KB) - color RAM mirror, not useable + ; $20000-$2FFFF (64KB) - ROM, the essential part + ; $30000-$4FFFF (64KB) - ROM, additions + ; $50000-$57FFF (32KB) - reserved for graphics screen + ; $58000-... - extended BASIC variables, RAM disk, etc. From de9d935c702e9c47b55d649f55d87a8b484f0af8 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 17 Dec 2020 20:26:35 +0100 Subject: [PATCH 040/257] implemented more Z80 instructions --- src/zvm_m65/z80_math_8bit.s | 888 ++++++++++++++++++++++++++++++++++++ src/zvm_m65/zvm_core.s | 129 +----- 2 files changed, 889 insertions(+), 128 deletions(-) diff --git a/src/zvm_m65/z80_math_8bit.s b/src/zvm_m65/z80_math_8bit.s index 633d59b8..2e88c17b 100644 --- a/src/zvm_m65/z80_math_8bit.s +++ b/src/zvm_m65/z80_math_8bit.s @@ -2,3 +2,891 @@ ; ; Z80 arithmetic instructions, 8 bit ; + +; XXX put BIT instructions here + +Z80_instr_CB_C0: ; SET 0,B + + lda REG_B + ora #%00000001 + sta REG_B + rts + +Z80_instr_CB_C1: ; SET 0,C + + lda REG_C + ora #%00000001 + sta REG_C + rts + +Z80_instr_CB_C2: ; SET 0,D + + lda REG_D + ora #%00000001 + sta REG_D + rts + +Z80_instr_CB_C3: ; SET 0,E + + lda REG_E + ora #%00000001 + sta REG_E + rts + +Z80_instr_CB_C4: ; SET 0,H + + lda REG_H + ora #%00000001 + sta REG_H + rts + +Z80_instr_CB_C5: ; SET 0,L + + lda REG_L + ora #%00000001 + sta REG_L + rts + +Z80_instr_CB_C7: ; SET 0,A + + lda REG_A + ora #%00000001 + sta REG_A + rts + +Z80_instr_CB_C8: ; SET 1,B + + lda REG_B + ora #%00000010 + sta REG_B + rts + +Z80_instr_CB_C9: ; SET 1, + + lda REG_C + ora #%00000010 + sta REG_C + rts + +Z80_instr_CB_CA: ; SET 1,D + + lda REG_D + ora #%00000010 + sta REG_D + rts + +Z80_instr_CB_CB: ; SET 1,E + + lda REG_E + ora #%00000010 + sta REG_E + rts + +Z80_instr_CB_CC: ; SET 1,H + + lda REG_H + ora #%00000010 + sta REG_H + rts + +Z80_instr_CB_CD: ; SET 1,L + + lda REG_L + ora #%00000010 + sta REG_L + rts + +Z80_instr_CB_CF: ; SET 1,A + + lda REG_A + ora #%00000010 + sta REG_A + rts + +Z80_instr_CB_D0: ; SET 2,B + + lda REG_B + ora #%00000100 + sta REG_B + rts + +Z80_instr_CB_D1: ; SET 2,C + + lda REG_C + ora #%00000100 + sta REG_C + rts + +Z80_instr_CB_D2: ; SET 2,D + + lda REG_D + ora #%00000100 + sta REG_D + rts + +Z80_instr_CB_D3: ; SET 2,E + + lda REG_E + ora #%00000100 + sta REG_E + rts + +Z80_instr_CB_D4: ; SET 2,H + + lda REG_H + ora #%00000100 + sta REG_H + rts + +Z80_instr_CB_D5: ; SET 2,L + + lda REG_L + ora #%00000100 + sta REG_L + rts + +Z80_instr_CB_D7: ; SET 2,A + + lda REG_A + ora #%00000100 + sta REG_A + rts + +Z80_instr_CB_D8: ; SET 3,B + + lda REG_B + ora #%00001000 + sta REG_B + rts + +Z80_instr_CB_D9: ; SET 3,C + + lda REG_C + ora #%00001000 + sta REG_C + rts + +Z80_instr_CB_DA: ; SET 3,D + + lda REG_D + ora #%00001000 + sta REG_D + rts + +Z80_instr_CB_DB: ; SET 3,E + + lda REG_E + ora #%00001000 + sta REG_E + rts + +Z80_instr_CB_DC: ; SET 3,H + + lda REG_H + ora #%00001000 + sta REG_H + rts + +Z80_instr_CB_DD: ; SET 3,L + + lda REG_L + ora #%00001000 + sta REG_L + rts + +Z80_instr_CB_DF: ; SET 3,A + + lda REG_A + ora #%00001000 + sta REG_A + rts + +Z80_instr_CB_E0: ; SET 4,B + + lda REG_B + ora #%00010000 + sta REG_B + rts + +Z80_instr_CB_E1: ; SET 4,C + + lda REG_C + ora #%00010000 + sta REG_C + rts + +Z80_instr_CB_E2: ; SET 4,D + + lda REG_D + ora #%00010000 + sta REG_D + rts + +Z80_instr_CB_E3: ; SET 4,E + + lda REG_E + ora #%00010000 + sta REG_E + rts + +Z80_instr_CB_E4: ; SET 4,H + + lda REG_H + ora #%00010000 + sta REG_H + rts + +Z80_instr_CB_E5: ; SET 4,L + + lda REG_L + ora #%00010000 + sta REG_L + rts + +Z80_instr_CB_E7: ; SET 4,A + + lda REG_A + ora #%00010000 + sta REG_A + rts + +Z80_instr_CB_E8: ; SET 5,B + + lda REG_B + ora #%00100000 + sta REG_B + rts + +Z80_instr_CB_E9: ; SET 5,C + + lda REG_C + ora #%00100000 + sta REG_C + rts + +Z80_instr_CB_EA: ; SET 5,D + + lda REG_D + ora #%00100000 + sta REG_D + rts + +Z80_instr_CB_EB: ; SET 5,E + + lda REG_E + ora #%00100000 + sta REG_E + rts + +Z80_instr_CB_EC: ; SET 5,H + + lda REG_H + ora #%00100000 + sta REG_H + rts + +Z80_instr_CB_ED: ; SET 5,L + + lda REG_L + ora #%00100000 + sta REG_L + rts + +Z80_instr_CB_EF: ; SET 5,A + + lda REG_A + ora #%00100000 + sta REG_A + rts + +Z80_instr_CB_F0: ; SET 6,B + + lda REG_B + ora #%01000000 + sta REG_B + rts + +Z80_instr_CB_F1: ; SET 6,C + + lda REG_C + ora #%01000000 + sta REG_C + rts + +Z80_instr_CB_F2: ; SET 6,D + + lda REG_D + ora #%01000000 + sta REG_D + rts + +Z80_instr_CB_F3: ; SET 6,E + + lda REG_E + ora #%01000000 + sta REG_E + rts + +Z80_instr_CB_F4: ; SET 6,H + + lda REG_H + ora #%01000000 + sta REG_H + rts + +Z80_instr_CB_F5: ; SET 6,L + + lda REG_L + ora #%01000000 + sta REG_L + rts + +Z80_instr_CB_F7: ; SET 6,A + + lda REG_A + ora #%01000000 + sta REG_A + rts + +Z80_instr_CB_F8: ; SET 7,B + + lda REG_B + ora #%10000000 + sta REG_B + rts + +Z80_instr_CB_F9: ; SET 7,C + + lda REG_C + ora #%10000000 + sta REG_C + rts + +Z80_instr_CB_FA: ; SET 7,D + + lda REG_D + ora #%10000000 + sta REG_D + rts + +Z80_instr_CB_FB: ; SET 7,E + + lda REG_E + ora #%10000000 + sta REG_E + rts + +Z80_instr_CB_FC: ; SET 7,H + + lda REG_H + ora #%10000000 + sta REG_H + rts + +Z80_instr_CB_FD: ; SET 7,L + + lda REG_L + ora #%10000000 + sta REG_L + rts + +Z80_instr_CB_FF: ; SET 7,A + + lda REG_A + ora #%10000000 + sta REG_A + rts + +Z80_instr_CB_C6: ; SET 0,(HL) + + jsr (VEC_fetch_via_HL) + ora #%00000001 + jmp ZVM_store_back + +Z80_instr_CB_CE: ; SET 1,(HL) + + jsr (VEC_fetch_via_HL) + ora #%00000010 + jmp ZVM_store_back + +Z80_instr_CB_D6: ; SET 2,(HL) + + jsr (VEC_fetch_via_HL) + ora #%00000100 + jmp ZVM_store_back + +Z80_instr_CB_DE: ; SET 3,(HL) + + jsr (VEC_fetch_via_HL) + ora #%00001000 + jmp ZVM_store_back + +Z80_instr_CB_E6: ; SET 4,(HL) + + jsr (VEC_fetch_via_HL) + ora #%00010000 + jmp ZVM_store_back + +Z80_instr_CB_EE: ; SET 5,(HL) + + jsr (VEC_fetch_via_HL) + ora #%00100000 + jmp ZVM_store_back + +Z80_instr_CB_F6: ; SET 6,(HL) + + jsr (VEC_fetch_via_HL) + ora #%01000000 + jmp ZVM_store_back + +Z80_instr_CB_FE: ; SET 7,(HL) + + jsr (VEC_fetch_via_HL) + ora #%10000000 + jmp ZVM_store_back + +; XXX put SET b,(IX+d) instructions here +; XXX put SET b,(IY+d) instructions here + +Z80_instr_CB_80: ; RES 0,B + + lda REG_B + and #%11111110 + sta REG_B + rts + +Z80_instr_CB_81: ; RES 0,C + + lda REG_C + and #%11111110 + sta REG_C + rts + +Z80_instr_CB_82: ; RES 0,D + + lda REG_D + and #%11111110 + sta REG_D + rts + +Z80_instr_CB_83: ; RES 0,E + + lda REG_E + and #%11111110 + sta REG_E + rts + +Z80_instr_CB_84: ; RES 0,H + + lda REG_H + and #%11111110 + sta REG_H + rts + +Z80_instr_CB_85: ; RES 0,L + + lda REG_L + and #%11111110 + sta REG_L + rts + +Z80_instr_CB_87: ; RES 0,A + + lda REG_A + and #%11111110 + sta REG_A + rts + +Z80_instr_CB_88: ; RES 1,B + + lda REG_B + and #%11111101 + sta REG_B + rts + +Z80_instr_CB_89: ; RES 1,C + + lda REG_C + and #%11111101 + sta REG_C + rts + +Z80_instr_CB_8A: ; RES 1,D + + lda REG_D + and #%11111101 + sta REG_D + rts + +Z80_instr_CB_8B: ; RES 1,E + + lda REG_E + and #%11111101 + sta REG_E + rts + +Z80_instr_CB_8C: ; RES 1,H + + lda REG_H + and #%11111101 + sta REG_H + rts + +Z80_instr_CB_8D: ; RES 1,L + + lda REG_L + and #%11111101 + sta REG_L + rts + +Z80_instr_CB_8F: ; RES 1,A + + lda REG_A + and #%11111101 + sta REG_A + rts + +Z80_instr_CB_90: ; RES 2,B + + lda REG_B + and #%11111011 + sta REG_B + rts + +Z80_instr_CB_91: ; RES 2,C + + lda REG_C + and #%11111011 + sta REG_C + rts + +Z80_instr_CB_92: ; RES 2,D + + lda REG_D + and #%11111011 + sta REG_D + rts + +Z80_instr_CB_93: ; RES 2,E + + lda REG_E + and #%11111011 + sta REG_E + rts + +Z80_instr_CB_94: ; RES 2,H + + lda REG_H + and #%11111011 + sta REG_H + rts + +Z80_instr_CB_95: ; RES 2,L + + lda REG_L + and #%11111011 + sta REG_L + rts + +Z80_instr_CB_97: ; RES 2,A + + lda REG_A + and #%11111011 + sta REG_A + rts + +Z80_instr_CB_98: ; RES 3,B + + lda REG_B + and #%11110111 + sta REG_B + rts + +Z80_instr_CB_99: ; RES 3,C + + lda REG_C + and #%11110111 + sta REG_C + rts + +Z80_instr_CB_9A: ; RES 3,D + + lda REG_D + and #%11110111 + sta REG_D + rts + +Z80_instr_CB_9B: ; RES 3,E + + lda REG_E + and #%11110111 + sta REG_E + rts + +Z80_instr_CB_9C: ; RES 3,H + + lda REG_H + and #%11110111 + sta REG_H + rts + +Z80_instr_CB_9D: ; RES 3,L + + lda REG_L + and #%11110111 + sta REG_L + rts + +Z80_instr_CB_9F: ; RES 3,A + + lda REG_A + and #%11110111 + sta REG_A + rts + +Z80_instr_CB_A0: ; RES 4,B + + lda REG_B + and #%11101111 + sta REG_B + rts + +Z80_instr_CB_A1: ; RES 4,C + + lda REG_C + and #%11101111 + sta REG_C + rts + +Z80_instr_CB_A2: ; RES 4,D + + lda REG_D + and #%11101111 + sta REG_D + rts + +Z80_instr_CB_A3: ; RES 4,E + + lda REG_E + and #%11101111 + sta REG_E + rts + +Z80_instr_CB_A4: ; RES 4,H + + lda REG_H + and #%11101111 + sta REG_H + rts + +Z80_instr_CB_A5: ; RES 4,L + + lda REG_L + and #%11101111 + sta REG_L + rts + +Z80_instr_CB_A7: ; RES 4,A + + lda REG_A + and #%11101111 + sta REG_A + rts + +Z80_instr_CB_A8: ; RES 5,B + + lda REG_B + and #%11011111 + sta REG_B + rts + +Z80_instr_CB_A9: ; RES 5,C + + lda REG_C + and #%11011111 + sta REG_C + rts + +Z80_instr_CB_AA: ; RES 5,D + + lda REG_D + and #%11011111 + sta REG_D + rts + +Z80_instr_CB_AB: ; RES 5,E + + lda REG_E + and #%11011111 + sta REG_E + rts + +Z80_instr_CB_AC: ; RES 5,H + + lda REG_H + and #%11011111 + sta REG_H + rts + +Z80_instr_CB_AD: ; RES 5,L + + lda REG_L + and #%11011111 + sta REG_L + rts + +Z80_instr_CB_AF: ; RES 5,A + + lda REG_A + and #%11011111 + sta REG_A + rts + +Z80_instr_CB_B0: ; RES 6,B + + lda REG_B + and #%10111111 + sta REG_B + rts + +Z80_instr_CB_B1: ; RES 6,C + + lda REG_C + and #%10111111 + sta REG_C + rts + +Z80_instr_CB_B2: ; RES 6,D + + lda REG_D + and #%10111111 + sta REG_D + rts + +Z80_instr_CB_B3: ; RES 6,E + + lda REG_E + and #%10111111 + sta REG_E + rts + +Z80_instr_CB_B4: ; RES 6,H + + lda REG_H + and #%10111111 + sta REG_H + rts + +Z80_instr_CB_B5: ; RES 6,L + + lda REG_L + and #%10111111 + sta REG_L + rts + +Z80_instr_CB_B7: ; RES 6,A + + lda REG_A + and #%10111111 + sta REG_A + rts + +Z80_instr_CB_B8: ; RES 7,B + + lda REG_B + and #%01111111 + sta REG_B + rts + +Z80_instr_CB_B9: ; RES 7,C + + lda REG_C + and #%01111111 + sta REG_C + rts + +Z80_instr_CB_BA: ; RES 7,D + + lda REG_D + and #%01111111 + sta REG_D + rts + +Z80_instr_CB_BB: ; RES 7,E + + lda REG_E + and #%01111111 + sta REG_E + rts + +Z80_instr_CB_BC: ; RES 7,H + + lda REG_H + and #%01111111 + sta REG_H + rts + +Z80_instr_CB_BD: ; RES 7,L + + lda REG_L + and #%01111111 + sta REG_L + rts + +Z80_instr_CB_BF: ; RES 7,A + + lda REG_A + and #%01111111 + sta REG_A + rts + +Z80_instr_CB_86: ; RES 0,(HL) + + jsr (VEC_fetch_via_HL) + and #%11111110 + jmp ZVM_store_back + +Z80_instr_CB_8E: ; RES 1,(HL) + + jsr (VEC_fetch_via_HL) + and #%11111101 + jmp ZVM_store_back + +Z80_instr_CB_96: ; RES 2,(HL) + + jsr (VEC_fetch_via_HL) + and #%11111011 + jmp ZVM_store_back + +Z80_instr_CB_9E: ; RES 3,(HL) + + jsr (VEC_fetch_via_HL) + and #%11110111 + jmp ZVM_store_back + +Z80_instr_CB_A6: ; RES 4,(HL) + + jsr (VEC_fetch_via_HL) + and #%11101111 + jmp ZVM_store_back + +Z80_instr_CB_AE: ; RES 5,(HL) + + jsr (VEC_fetch_via_HL) + and #%11011111 + jmp ZVM_store_back + +Z80_instr_CB_B6: ; RES 6,(HL) + + jsr (VEC_fetch_via_HL) + and #%10111111 + jmp ZVM_store_back + +Z80_instr_CB_BE: ; RES 7,(HL) + + jsr (VEC_fetch_via_HL) + and #%01111111 + jmp ZVM_store_back + +; XXX put RES b,(IX+d) instructions here +; XXX put RES b,(IY+d) instructions here diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 6014e505..5b4bbbbc 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -349,134 +349,6 @@ Z80_instr_CB_7C: ; BIT 7,H Z80_instr_CB_7D: ; BIT 7,L Z80_instr_CB_7E: ; BIT 7,(HL) Z80_instr_CB_7F: ; BIT 7,A -Z80_instr_CB_80: ; RES 0,B -Z80_instr_CB_81: ; RES 0,C -Z80_instr_CB_82: ; RES 0,D -Z80_instr_CB_83: ; RES 0,E -Z80_instr_CB_84: ; RES 0,H -Z80_instr_CB_85: ; RES 0,L -Z80_instr_CB_86: ; RES 0,(HL) -Z80_instr_CB_87: ; RES 0,A -Z80_instr_CB_88: ; RES 1,B -Z80_instr_CB_89: ; RES 1,C -Z80_instr_CB_8A: ; RES 1,D -Z80_instr_CB_8B: ; RES 1,E -Z80_instr_CB_8C: ; RES 1,H -Z80_instr_CB_8D: ; RES 1,L -Z80_instr_CB_8E: ; RES 1,(HL) -Z80_instr_CB_8F: ; RES 1,A -Z80_instr_CB_90: ; RES 2,B -Z80_instr_CB_91: ; RES 2,C -Z80_instr_CB_92: ; RES 2,D -Z80_instr_CB_93: ; RES 2,E -Z80_instr_CB_94: ; RES 2,H -Z80_instr_CB_95: ; RES 2,L -Z80_instr_CB_96: ; RES 2,(HL) -Z80_instr_CB_97: ; RES 2,A -Z80_instr_CB_98: ; RES 3,B -Z80_instr_CB_99: ; RES 3,C -Z80_instr_CB_9A: ; RES 3,D -Z80_instr_CB_9B: ; RES 3,E -Z80_instr_CB_9C: ; RES 3,H -Z80_instr_CB_9D: ; RES 3,L -Z80_instr_CB_9E: ; RES 3,(HL) -Z80_instr_CB_9F: ; RES 3,A -Z80_instr_CB_A0: ; RES 4,B -Z80_instr_CB_A1: ; RES 4,C -Z80_instr_CB_A2: ; RES 4,D -Z80_instr_CB_A3: ; RES 4,E -Z80_instr_CB_A4: ; RES 4,H -Z80_instr_CB_A5: ; RES 4,L -Z80_instr_CB_A6: ; RES 4,(HL) -Z80_instr_CB_A7: ; RES 4,A -Z80_instr_CB_A8: ; RES 5,B -Z80_instr_CB_A9: ; RES 5,C -Z80_instr_CB_AA: ; RES 5,D -Z80_instr_CB_AB: ; RES 5,E -Z80_instr_CB_AC: ; RES 5,H -Z80_instr_CB_AD: ; RES 5,L -Z80_instr_CB_AE: ; RES 5,(HL) -Z80_instr_CB_AF: ; RES 5,A -Z80_instr_CB_B0: ; RES 6,B -Z80_instr_CB_B1: ; RES 6,C -Z80_instr_CB_B2: ; RES 6,D -Z80_instr_CB_B3: ; RES 6,E -Z80_instr_CB_B4: ; RES 6,H -Z80_instr_CB_B5: ; RES 6,L -Z80_instr_CB_B6: ; RES 6,(HL) -Z80_instr_CB_B7: ; RES 6,A -Z80_instr_CB_B8: ; RES 7,B -Z80_instr_CB_B9: ; RES 7,C -Z80_instr_CB_BA: ; RES 7,D -Z80_instr_CB_BB: ; RES 7,E -Z80_instr_CB_BC: ; RES 7,H -Z80_instr_CB_BD: ; RES 7,L -Z80_instr_CB_BE: ; RES 7,(HL) -Z80_instr_CB_BF: ; RES 7,A -Z80_instr_CB_C0: ; SET 0,B -Z80_instr_CB_C1: ; SET 0,C -Z80_instr_CB_C2: ; SET 0,D -Z80_instr_CB_C3: ; SET 0,E -Z80_instr_CB_C4: ; SET 0,H -Z80_instr_CB_C5: ; SET 0,L -Z80_instr_CB_C6: ; SET 0,(HL) -Z80_instr_CB_C7: ; SET 0,A -Z80_instr_CB_C8: ; SET 1,B -Z80_instr_CB_C9: ; SET 1,C -Z80_instr_CB_CA: ; SET 1,D -Z80_instr_CB_CB: ; SET 1,E -Z80_instr_CB_CC: ; SET 1,H -Z80_instr_CB_CD: ; SET 1,L -Z80_instr_CB_CE: ; SET 1,(HL) -Z80_instr_CB_CF: ; SET 1,A -Z80_instr_CB_D0: ; SET 2,B -Z80_instr_CB_D1: ; SET 2,C -Z80_instr_CB_D2: ; SET 2,D -Z80_instr_CB_D3: ; SET 2,E -Z80_instr_CB_D4: ; SET 2,H -Z80_instr_CB_D5: ; SET 2,L -Z80_instr_CB_D6: ; SET 2,(HL) -Z80_instr_CB_D7: ; SET 2,A -Z80_instr_CB_D8: ; SET 3,B -Z80_instr_CB_D9: ; SET 3,C -Z80_instr_CB_DA: ; SET 3,D -Z80_instr_CB_DB: ; SET 3,E -Z80_instr_CB_DC: ; SET 3,H -Z80_instr_CB_DD: ; SET 3,L -Z80_instr_CB_DE: ; SET 3,(HL) -Z80_instr_CB_DF: ; SET 3,A -Z80_instr_CB_E0: ; SET 4,B -Z80_instr_CB_E1: ; SET 4,C -Z80_instr_CB_E2: ; SET 4,D -Z80_instr_CB_E3: ; SET 4,E -Z80_instr_CB_E4: ; SET 4,H -Z80_instr_CB_E5: ; SET 4,L -Z80_instr_CB_E6: ; SET 4,(HL) -Z80_instr_CB_E7: ; SET 4,A -Z80_instr_CB_E8: ; SET 5,B -Z80_instr_CB_E9: ; SET 5,C -Z80_instr_CB_EA: ; SET 5,D -Z80_instr_CB_EB: ; SET 5,E -Z80_instr_CB_EC: ; SET 5,H -Z80_instr_CB_ED: ; SET 5,L -Z80_instr_CB_EE: ; SET 5,(HL) -Z80_instr_CB_EF: ; SET 5,A -Z80_instr_CB_F0: ; SET 6,B -Z80_instr_CB_F1: ; SET 6,C -Z80_instr_CB_F2: ; SET 6,D -Z80_instr_CB_F3: ; SET 6,E -Z80_instr_CB_F4: ; SET 6,H -Z80_instr_CB_F5: ; SET 6,L -Z80_instr_CB_F6: ; SET 6,(HL) -Z80_instr_CB_F7: ; SET 6,A -Z80_instr_CB_F8: ; SET 7,B -Z80_instr_CB_F9: ; SET 7,C -Z80_instr_CB_FA: ; SET 7,D -Z80_instr_CB_FB: ; SET 7,E -Z80_instr_CB_FC: ; SET 7,H -Z80_instr_CB_FD: ; SET 7,L -Z80_instr_CB_FE: ; SET 7,(HL) -Z80_instr_CB_FF: ; SET 7,A Z80_instr_DD_09: ; ADD IX,BC Z80_instr_DD_19: ; ADD IX,DE Z80_instr_DD_21: ; LD IX,nn @@ -675,3 +547,4 @@ Z80_instr_FDCB_F6: ; SET 6,(IY+d) Z80_instr_FDCB_FE: ; SET 7,(IY+d) rts ; XXX + ; XXX add 'illegal' instructions From 376cf2506d00f4dbb9117e7cbda8c2d695a78878 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 17 Dec 2020 20:54:59 +0100 Subject: [PATCH 041/257] implemented 32 more Z80 instructions --- src/zvm_m65/z80_math_8bit.s | 194 +++++++++++++++++++++++++++++++++++- src/zvm_m65/zvm_core.s | 85 ++++++++++------ 2 files changed, 242 insertions(+), 37 deletions(-) diff --git a/src/zvm_m65/z80_math_8bit.s b/src/zvm_m65/z80_math_8bit.s index 2e88c17b..a0f65d39 100644 --- a/src/zvm_m65/z80_math_8bit.s +++ b/src/zvm_m65/z80_math_8bit.s @@ -445,8 +445,101 @@ Z80_instr_CB_FE: ; SET 7,(HL) ora #%10000000 jmp ZVM_store_back -; XXX put SET b,(IX+d) instructions here -; XXX put SET b,(IY+d) instructions here +Z80_instr_DDCB_C6: ; SET 0,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%00000001 + jmp ZVM_store_back + +Z80_instr_DDCB_CE: ; SET 1,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%00000010 + jmp ZVM_store_back + +Z80_instr_DDCB_D6: ; SET 2,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%00000100 + jmp ZVM_store_back + +Z80_instr_DDCB_DE: ; SET 3,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%00001000 + jmp ZVM_store_back + +Z80_instr_DDCB_E6: ; SET 4,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%00010000 + jmp ZVM_store_back + +Z80_instr_DDCB_EE: ; SET 5,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%00100000 + jmp ZVM_store_back + +Z80_instr_DDCB_F6: ; SET 6,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%01000000 + jmp ZVM_store_back + +Z80_instr_DDCB_FE: ; SET 7,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%10000000 + jmp ZVM_store_back + +Z80_instr_FDCB_C6: ; SET 0,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%00000001 + jmp ZVM_store_back + +Z80_instr_FDCB_CE: ; SET 1,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%00000010 + jmp ZVM_store_back + +Z80_instr_FDCB_D6: ; SET 2,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%00000100 + jmp ZVM_store_back + +Z80_instr_FDCB_DE: ; SET 3,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%00001000 + jmp ZVM_store_back + +Z80_instr_FDCB_E6: ; SET 4,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%00010000 + jmp ZVM_store_back + +Z80_instr_FDCB_EE: ; SET 5,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%00100000 + jmp ZVM_store_back + +Z80_instr_FDCB_F6: ; SET 6,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%01000000 + jmp ZVM_store_back + +Z80_instr_FDCB_FE: ; SET 7,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%10000000 + jmp ZVM_store_back Z80_instr_CB_80: ; RES 0,B @@ -888,5 +981,98 @@ Z80_instr_CB_BE: ; RES 7,(HL) and #%01111111 jmp ZVM_store_back -; XXX put RES b,(IX+d) instructions here -; XXX put RES b,(IY+d) instructions here +Z80_instr_DDCB_86: ; RES 0,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%11111110 + jmp ZVM_store_back + +Z80_instr_DDCB_8E: ; RES 1,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%11111101 + jmp ZVM_store_back + +Z80_instr_DDCB_96: ; RES 2,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%11111011 + jmp ZVM_store_back + +Z80_instr_DDCB_9E: ; RES 3,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%11110111 + jmp ZVM_store_back + +Z80_instr_DDCB_A6: ; RES 4,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%11101111 + jmp ZVM_store_back + +Z80_instr_DDCB_AE: ; RES 5,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%11011111 + jmp ZVM_store_back + +Z80_instr_DDCB_B6: ; RES 6,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%10111111 + jmp ZVM_store_back + +Z80_instr_DDCB_BE: ; RES 7,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%01111111 + jmp ZVM_store_back + +Z80_instr_FDCB_86: ; RES 0,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%11111110 + jmp ZVM_store_back + +Z80_instr_FDCB_8E: ; RES 1,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%11111101 + jmp ZVM_store_back + +Z80_instr_FDCB_96: ; RES 2,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%11111011 + jmp ZVM_store_back + +Z80_instr_FDCB_9E: ; RES 3,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%11110111 + jmp ZVM_store_back + +Z80_instr_FDCB_A6: ; RES 4,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%11101111 + jmp ZVM_store_back + +Z80_instr_FDCB_AE: ; RES 5,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%11011111 + jmp ZVM_store_back + +Z80_instr_FDCB_B6: ; RES 6,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%10111111 + jmp ZVM_store_back + +Z80_instr_FDCB_BE: ; RES 7,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%01111111 + jmp ZVM_store_back diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 5b4bbbbc..dc3da620 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -44,6 +44,56 @@ ZVM_run: + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ; ; Not implemented yet - XXX implement them! ; @@ -181,7 +231,7 @@ Z80_instr_CA: ; JP Z,nn Z80_instr_CB: ; #CB Z80_instr_CC: ; CALL Z,nn Z80_instr_CD: ; CALL nn -Z80_instr_CE: ; ADC A,n +Z80_instr_CE: ; ADC A,n Z80_instr_CF: ; RST 08H Z80_instr_D0: ; RET NC Z80_instr_D1: ; POP DE @@ -498,22 +548,6 @@ Z80_instr_DDCB_66: ; BIT 4,(IX+d) Z80_instr_DDCB_6E: ; BIT 5,(IX+d) Z80_instr_DDCB_76: ; BIT 6,(IX+d) Z80_instr_DDCB_7E: ; BIT 7,(IX+d) -Z80_instr_DDCB_86: ; RES 0,(IX+d) -Z80_instr_DDCB_8E: ; RES 1,(IX+d) -Z80_instr_DDCB_96: ; RES 2,(IX+d) -Z80_instr_DDCB_9E: ; RES 3,(IX+d) -Z80_instr_DDCB_A6: ; RES 4,(IX+d) -Z80_instr_DDCB_AE: ; RES 5,(IX+d) -Z80_instr_DDCB_B6: ; RES 6,(IX+d) -Z80_instr_DDCB_BE: ; RES 7,(IX+d) -Z80_instr_DDCB_C6: ; SET 0,(IX+d) -Z80_instr_DDCB_CE: ; SET 1,(IX+d) -Z80_instr_DDCB_D6: ; SET 2,(IX+d) -Z80_instr_DDCB_DE: ; SET 3,(IX+d) -Z80_instr_DDCB_E6: ; SET 4,(IX+d) -Z80_instr_DDCB_EE: ; SET 5,(IX+d) -Z80_instr_DDCB_F6: ; SET 6,(IX+d) -Z80_instr_DDCB_FE: ; SET 7,(IX+d) Z80_instr_FDCB_06: ; RLC (IY+d) Z80_instr_FDCB_0E: ; RRC (IY+d) Z80_instr_FDCB_16: ; RL (IY+d) @@ -529,22 +563,7 @@ Z80_instr_FDCB_66: ; BIT 4,(IY+d) Z80_instr_FDCB_6E: ; BIT 5,(IY+d) Z80_instr_FDCB_76: ; BIT 6,(IY+d) Z80_instr_FDCB_7E: ; BIT 7,(IY+d) -Z80_instr_FDCB_86: ; RES 0,(IY+d) -Z80_instr_FDCB_8E: ; RES 1,(IY+d) -Z80_instr_FDCB_96: ; RES 2,(IY+d) -Z80_instr_FDCB_9E: ; RES 3,(IY+d) -Z80_instr_FDCB_A6: ; RES 4,(IY+d) -Z80_instr_FDCB_AE: ; RES 5,(IY+d) -Z80_instr_FDCB_B6: ; RES 6,(IY+d) -Z80_instr_FDCB_BE: ; RES 7,(IY+d) -Z80_instr_FDCB_C6: ; SET 0,(IY+d) -Z80_instr_FDCB_CE: ; SET 1,(IY+d) -Z80_instr_FDCB_D6: ; SET 2,(IY+d) -Z80_instr_FDCB_DE: ; SET 3,(IY+d) -Z80_instr_FDCB_E6: ; SET 4,(IY+d) -Z80_instr_FDCB_EE: ; SET 5,(IY+d) -Z80_instr_FDCB_F6: ; SET 6,(IY+d) -Z80_instr_FDCB_FE: ; SET 7,(IY+d) + rts ; XXX ; XXX add 'illegal' instructions From 345e471cae170470471d373ee9670f9ba0298a50 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 17 Dec 2020 23:03:25 +0100 Subject: [PATCH 042/257] implemented 20 more Z80 instructions --- src/zvm_m65/,aliases_zvm.s | 4 +- src/zvm_m65/z80_bit.s | 1074 ++++++++++++++++++++++++++++++ src/zvm_m65/z80_math_8bit.s | 1200 ++++------------------------------ src/zvm_m65/z80_tables.s | 17 + src/zvm_m65/zvm_core.s | 20 - tools/generate_z80_tables.cc | 66 +- 6 files changed, 1299 insertions(+), 1082 deletions(-) create mode 100644 src/zvm_m65/z80_tables.s diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index cbae9086..c4a1d9ed 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -47,6 +47,6 @@ !set Z80_HF = %00010000 ; half carry !set Z80_XF = %00001000 ; bit 3 result !set Z80_PF = %00000100 ; parity -!set Z80_OF = %00000100 ; overflow -!set Z80_AF = %00000010 ; add/subtract +!set Z80_VF = %00000100 ; overflow +!set Z80_NF = %00000010 ; subtract !set Z80_CF = %00000001 ; carry diff --git a/src/zvm_m65/z80_bit.s b/src/zvm_m65/z80_bit.s index 9f127d3d..f94be83b 100644 --- a/src/zvm_m65/z80_bit.s +++ b/src/zvm_m65/z80_bit.s @@ -2,3 +2,1077 @@ ; ; Z80 bit set/reset/test instructions ; + +; XXX put BIT instructions here + +Z80_instr_CB_C0: ; SET 0,B + + lda REG_B + ora #%00000001 + sta REG_B + rts + +Z80_instr_CB_C1: ; SET 0,C + + lda REG_C + ora #%00000001 + sta REG_C + rts + +Z80_instr_CB_C2: ; SET 0,D + + lda REG_D + ora #%00000001 + sta REG_D + rts + +Z80_instr_CB_C3: ; SET 0,E + + lda REG_E + ora #%00000001 + sta REG_E + rts + +Z80_instr_CB_C4: ; SET 0,H + + lda REG_H + ora #%00000001 + sta REG_H + rts + +Z80_instr_CB_C5: ; SET 0,L + + lda REG_L + ora #%00000001 + sta REG_L + rts + +Z80_instr_CB_C7: ; SET 0,A + + lda REG_A + ora #%00000001 + sta REG_A + rts + +Z80_instr_CB_C8: ; SET 1,B + + lda REG_B + ora #%00000010 + sta REG_B + rts + +Z80_instr_CB_C9: ; SET 1, + + lda REG_C + ora #%00000010 + sta REG_C + rts + +Z80_instr_CB_CA: ; SET 1,D + + lda REG_D + ora #%00000010 + sta REG_D + rts + +Z80_instr_CB_CB: ; SET 1,E + + lda REG_E + ora #%00000010 + sta REG_E + rts + +Z80_instr_CB_CC: ; SET 1,H + + lda REG_H + ora #%00000010 + sta REG_H + rts + +Z80_instr_CB_CD: ; SET 1,L + + lda REG_L + ora #%00000010 + sta REG_L + rts + +Z80_instr_CB_CF: ; SET 1,A + + lda REG_A + ora #%00000010 + sta REG_A + rts + +Z80_instr_CB_D0: ; SET 2,B + + lda REG_B + ora #%00000100 + sta REG_B + rts + +Z80_instr_CB_D1: ; SET 2,C + + lda REG_C + ora #%00000100 + sta REG_C + rts + +Z80_instr_CB_D2: ; SET 2,D + + lda REG_D + ora #%00000100 + sta REG_D + rts + +Z80_instr_CB_D3: ; SET 2,E + + lda REG_E + ora #%00000100 + sta REG_E + rts + +Z80_instr_CB_D4: ; SET 2,H + + lda REG_H + ora #%00000100 + sta REG_H + rts + +Z80_instr_CB_D5: ; SET 2,L + + lda REG_L + ora #%00000100 + sta REG_L + rts + +Z80_instr_CB_D7: ; SET 2,A + + lda REG_A + ora #%00000100 + sta REG_A + rts + +Z80_instr_CB_D8: ; SET 3,B + + lda REG_B + ora #%00001000 + sta REG_B + rts + +Z80_instr_CB_D9: ; SET 3,C + + lda REG_C + ora #%00001000 + sta REG_C + rts + +Z80_instr_CB_DA: ; SET 3,D + + lda REG_D + ora #%00001000 + sta REG_D + rts + +Z80_instr_CB_DB: ; SET 3,E + + lda REG_E + ora #%00001000 + sta REG_E + rts + +Z80_instr_CB_DC: ; SET 3,H + + lda REG_H + ora #%00001000 + sta REG_H + rts + +Z80_instr_CB_DD: ; SET 3,L + + lda REG_L + ora #%00001000 + sta REG_L + rts + +Z80_instr_CB_DF: ; SET 3,A + + lda REG_A + ora #%00001000 + sta REG_A + rts + +Z80_instr_CB_E0: ; SET 4,B + + lda REG_B + ora #%00010000 + sta REG_B + rts + +Z80_instr_CB_E1: ; SET 4,C + + lda REG_C + ora #%00010000 + sta REG_C + rts + +Z80_instr_CB_E2: ; SET 4,D + + lda REG_D + ora #%00010000 + sta REG_D + rts + +Z80_instr_CB_E3: ; SET 4,E + + lda REG_E + ora #%00010000 + sta REG_E + rts + +Z80_instr_CB_E4: ; SET 4,H + + lda REG_H + ora #%00010000 + sta REG_H + rts + +Z80_instr_CB_E5: ; SET 4,L + + lda REG_L + ora #%00010000 + sta REG_L + rts + +Z80_instr_CB_E7: ; SET 4,A + + lda REG_A + ora #%00010000 + sta REG_A + rts + +Z80_instr_CB_E8: ; SET 5,B + + lda REG_B + ora #%00100000 + sta REG_B + rts + +Z80_instr_CB_E9: ; SET 5,C + + lda REG_C + ora #%00100000 + sta REG_C + rts + +Z80_instr_CB_EA: ; SET 5,D + + lda REG_D + ora #%00100000 + sta REG_D + rts + +Z80_instr_CB_EB: ; SET 5,E + + lda REG_E + ora #%00100000 + sta REG_E + rts + +Z80_instr_CB_EC: ; SET 5,H + + lda REG_H + ora #%00100000 + sta REG_H + rts + +Z80_instr_CB_ED: ; SET 5,L + + lda REG_L + ora #%00100000 + sta REG_L + rts + +Z80_instr_CB_EF: ; SET 5,A + + lda REG_A + ora #%00100000 + sta REG_A + rts + +Z80_instr_CB_F0: ; SET 6,B + + lda REG_B + ora #%01000000 + sta REG_B + rts + +Z80_instr_CB_F1: ; SET 6,C + + lda REG_C + ora #%01000000 + sta REG_C + rts + +Z80_instr_CB_F2: ; SET 6,D + + lda REG_D + ora #%01000000 + sta REG_D + rts + +Z80_instr_CB_F3: ; SET 6,E + + lda REG_E + ora #%01000000 + sta REG_E + rts + +Z80_instr_CB_F4: ; SET 6,H + + lda REG_H + ora #%01000000 + sta REG_H + rts + +Z80_instr_CB_F5: ; SET 6,L + + lda REG_L + ora #%01000000 + sta REG_L + rts + +Z80_instr_CB_F7: ; SET 6,A + + lda REG_A + ora #%01000000 + sta REG_A + rts + +Z80_instr_CB_F8: ; SET 7,B + + lda REG_B + ora #%10000000 + sta REG_B + rts + +Z80_instr_CB_F9: ; SET 7,C + + lda REG_C + ora #%10000000 + sta REG_C + rts + +Z80_instr_CB_FA: ; SET 7,D + + lda REG_D + ora #%10000000 + sta REG_D + rts + +Z80_instr_CB_FB: ; SET 7,E + + lda REG_E + ora #%10000000 + sta REG_E + rts + +Z80_instr_CB_FC: ; SET 7,H + + lda REG_H + ora #%10000000 + sta REG_H + rts + +Z80_instr_CB_FD: ; SET 7,L + + lda REG_L + ora #%10000000 + sta REG_L + rts + +Z80_instr_CB_FF: ; SET 7,A + + lda REG_A + ora #%10000000 + sta REG_A + rts + +Z80_instr_CB_C6: ; SET 0,(HL) + + jsr (VEC_fetch_via_HL) + ora #%00000001 + jmp ZVM_store_back + +Z80_instr_CB_CE: ; SET 1,(HL) + + jsr (VEC_fetch_via_HL) + ora #%00000010 + jmp ZVM_store_back + +Z80_instr_CB_D6: ; SET 2,(HL) + + jsr (VEC_fetch_via_HL) + ora #%00000100 + jmp ZVM_store_back + +Z80_instr_CB_DE: ; SET 3,(HL) + + jsr (VEC_fetch_via_HL) + ora #%00001000 + jmp ZVM_store_back + +Z80_instr_CB_E6: ; SET 4,(HL) + + jsr (VEC_fetch_via_HL) + ora #%00010000 + jmp ZVM_store_back + +Z80_instr_CB_EE: ; SET 5,(HL) + + jsr (VEC_fetch_via_HL) + ora #%00100000 + jmp ZVM_store_back + +Z80_instr_CB_F6: ; SET 6,(HL) + + jsr (VEC_fetch_via_HL) + ora #%01000000 + jmp ZVM_store_back + +Z80_instr_CB_FE: ; SET 7,(HL) + + jsr (VEC_fetch_via_HL) + ora #%10000000 + jmp ZVM_store_back + +Z80_instr_DDCB_C6: ; SET 0,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%00000001 + jmp ZVM_store_back + +Z80_instr_DDCB_CE: ; SET 1,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%00000010 + jmp ZVM_store_back + +Z80_instr_DDCB_D6: ; SET 2,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%00000100 + jmp ZVM_store_back + +Z80_instr_DDCB_DE: ; SET 3,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%00001000 + jmp ZVM_store_back + +Z80_instr_DDCB_E6: ; SET 4,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%00010000 + jmp ZVM_store_back + +Z80_instr_DDCB_EE: ; SET 5,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%00100000 + jmp ZVM_store_back + +Z80_instr_DDCB_F6: ; SET 6,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%01000000 + jmp ZVM_store_back + +Z80_instr_DDCB_FE: ; SET 7,(IX+d) + + jsr (VEC_fetch_via_IX_d) + ora #%10000000 + jmp ZVM_store_back + +Z80_instr_FDCB_C6: ; SET 0,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%00000001 + jmp ZVM_store_back + +Z80_instr_FDCB_CE: ; SET 1,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%00000010 + jmp ZVM_store_back + +Z80_instr_FDCB_D6: ; SET 2,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%00000100 + jmp ZVM_store_back + +Z80_instr_FDCB_DE: ; SET 3,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%00001000 + jmp ZVM_store_back + +Z80_instr_FDCB_E6: ; SET 4,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%00010000 + jmp ZVM_store_back + +Z80_instr_FDCB_EE: ; SET 5,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%00100000 + jmp ZVM_store_back + +Z80_instr_FDCB_F6: ; SET 6,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%01000000 + jmp ZVM_store_back + +Z80_instr_FDCB_FE: ; SET 7,(IY+d) + + jsr (VEC_fetch_via_IY_d) + ora #%10000000 + jmp ZVM_store_back + +Z80_instr_CB_80: ; RES 0,B + + lda REG_B + and #%11111110 + sta REG_B + rts + +Z80_instr_CB_81: ; RES 0,C + + lda REG_C + and #%11111110 + sta REG_C + rts + +Z80_instr_CB_82: ; RES 0,D + + lda REG_D + and #%11111110 + sta REG_D + rts + +Z80_instr_CB_83: ; RES 0,E + + lda REG_E + and #%11111110 + sta REG_E + rts + +Z80_instr_CB_84: ; RES 0,H + + lda REG_H + and #%11111110 + sta REG_H + rts + +Z80_instr_CB_85: ; RES 0,L + + lda REG_L + and #%11111110 + sta REG_L + rts + +Z80_instr_CB_87: ; RES 0,A + + lda REG_A + and #%11111110 + sta REG_A + rts + +Z80_instr_CB_88: ; RES 1,B + + lda REG_B + and #%11111101 + sta REG_B + rts + +Z80_instr_CB_89: ; RES 1,C + + lda REG_C + and #%11111101 + sta REG_C + rts + +Z80_instr_CB_8A: ; RES 1,D + + lda REG_D + and #%11111101 + sta REG_D + rts + +Z80_instr_CB_8B: ; RES 1,E + + lda REG_E + and #%11111101 + sta REG_E + rts + +Z80_instr_CB_8C: ; RES 1,H + + lda REG_H + and #%11111101 + sta REG_H + rts + +Z80_instr_CB_8D: ; RES 1,L + + lda REG_L + and #%11111101 + sta REG_L + rts + +Z80_instr_CB_8F: ; RES 1,A + + lda REG_A + and #%11111101 + sta REG_A + rts + +Z80_instr_CB_90: ; RES 2,B + + lda REG_B + and #%11111011 + sta REG_B + rts + +Z80_instr_CB_91: ; RES 2,C + + lda REG_C + and #%11111011 + sta REG_C + rts + +Z80_instr_CB_92: ; RES 2,D + + lda REG_D + and #%11111011 + sta REG_D + rts + +Z80_instr_CB_93: ; RES 2,E + + lda REG_E + and #%11111011 + sta REG_E + rts + +Z80_instr_CB_94: ; RES 2,H + + lda REG_H + and #%11111011 + sta REG_H + rts + +Z80_instr_CB_95: ; RES 2,L + + lda REG_L + and #%11111011 + sta REG_L + rts + +Z80_instr_CB_97: ; RES 2,A + + lda REG_A + and #%11111011 + sta REG_A + rts + +Z80_instr_CB_98: ; RES 3,B + + lda REG_B + and #%11110111 + sta REG_B + rts + +Z80_instr_CB_99: ; RES 3,C + + lda REG_C + and #%11110111 + sta REG_C + rts + +Z80_instr_CB_9A: ; RES 3,D + + lda REG_D + and #%11110111 + sta REG_D + rts + +Z80_instr_CB_9B: ; RES 3,E + + lda REG_E + and #%11110111 + sta REG_E + rts + +Z80_instr_CB_9C: ; RES 3,H + + lda REG_H + and #%11110111 + sta REG_H + rts + +Z80_instr_CB_9D: ; RES 3,L + + lda REG_L + and #%11110111 + sta REG_L + rts + +Z80_instr_CB_9F: ; RES 3,A + + lda REG_A + and #%11110111 + sta REG_A + rts + +Z80_instr_CB_A0: ; RES 4,B + + lda REG_B + and #%11101111 + sta REG_B + rts + +Z80_instr_CB_A1: ; RES 4,C + + lda REG_C + and #%11101111 + sta REG_C + rts + +Z80_instr_CB_A2: ; RES 4,D + + lda REG_D + and #%11101111 + sta REG_D + rts + +Z80_instr_CB_A3: ; RES 4,E + + lda REG_E + and #%11101111 + sta REG_E + rts + +Z80_instr_CB_A4: ; RES 4,H + + lda REG_H + and #%11101111 + sta REG_H + rts + +Z80_instr_CB_A5: ; RES 4,L + + lda REG_L + and #%11101111 + sta REG_L + rts + +Z80_instr_CB_A7: ; RES 4,A + + lda REG_A + and #%11101111 + sta REG_A + rts + +Z80_instr_CB_A8: ; RES 5,B + + lda REG_B + and #%11011111 + sta REG_B + rts + +Z80_instr_CB_A9: ; RES 5,C + + lda REG_C + and #%11011111 + sta REG_C + rts + +Z80_instr_CB_AA: ; RES 5,D + + lda REG_D + and #%11011111 + sta REG_D + rts + +Z80_instr_CB_AB: ; RES 5,E + + lda REG_E + and #%11011111 + sta REG_E + rts + +Z80_instr_CB_AC: ; RES 5,H + + lda REG_H + and #%11011111 + sta REG_H + rts + +Z80_instr_CB_AD: ; RES 5,L + + lda REG_L + and #%11011111 + sta REG_L + rts + +Z80_instr_CB_AF: ; RES 5,A + + lda REG_A + and #%11011111 + sta REG_A + rts + +Z80_instr_CB_B0: ; RES 6,B + + lda REG_B + and #%10111111 + sta REG_B + rts + +Z80_instr_CB_B1: ; RES 6,C + + lda REG_C + and #%10111111 + sta REG_C + rts + +Z80_instr_CB_B2: ; RES 6,D + + lda REG_D + and #%10111111 + sta REG_D + rts + +Z80_instr_CB_B3: ; RES 6,E + + lda REG_E + and #%10111111 + sta REG_E + rts + +Z80_instr_CB_B4: ; RES 6,H + + lda REG_H + and #%10111111 + sta REG_H + rts + +Z80_instr_CB_B5: ; RES 6,L + + lda REG_L + and #%10111111 + sta REG_L + rts + +Z80_instr_CB_B7: ; RES 6,A + + lda REG_A + and #%10111111 + sta REG_A + rts + +Z80_instr_CB_B8: ; RES 7,B + + lda REG_B + and #%01111111 + sta REG_B + rts + +Z80_instr_CB_B9: ; RES 7,C + + lda REG_C + and #%01111111 + sta REG_C + rts + +Z80_instr_CB_BA: ; RES 7,D + + lda REG_D + and #%01111111 + sta REG_D + rts + +Z80_instr_CB_BB: ; RES 7,E + + lda REG_E + and #%01111111 + sta REG_E + rts + +Z80_instr_CB_BC: ; RES 7,H + + lda REG_H + and #%01111111 + sta REG_H + rts + +Z80_instr_CB_BD: ; RES 7,L + + lda REG_L + and #%01111111 + sta REG_L + rts + +Z80_instr_CB_BF: ; RES 7,A + + lda REG_A + and #%01111111 + sta REG_A + rts + +Z80_instr_CB_86: ; RES 0,(HL) + + jsr (VEC_fetch_via_HL) + and #%11111110 + jmp ZVM_store_back + +Z80_instr_CB_8E: ; RES 1,(HL) + + jsr (VEC_fetch_via_HL) + and #%11111101 + jmp ZVM_store_back + +Z80_instr_CB_96: ; RES 2,(HL) + + jsr (VEC_fetch_via_HL) + and #%11111011 + jmp ZVM_store_back + +Z80_instr_CB_9E: ; RES 3,(HL) + + jsr (VEC_fetch_via_HL) + and #%11110111 + jmp ZVM_store_back + +Z80_instr_CB_A6: ; RES 4,(HL) + + jsr (VEC_fetch_via_HL) + and #%11101111 + jmp ZVM_store_back + +Z80_instr_CB_AE: ; RES 5,(HL) + + jsr (VEC_fetch_via_HL) + and #%11011111 + jmp ZVM_store_back + +Z80_instr_CB_B6: ; RES 6,(HL) + + jsr (VEC_fetch_via_HL) + and #%10111111 + jmp ZVM_store_back + +Z80_instr_CB_BE: ; RES 7,(HL) + + jsr (VEC_fetch_via_HL) + and #%01111111 + jmp ZVM_store_back + +Z80_instr_DDCB_86: ; RES 0,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%11111110 + jmp ZVM_store_back + +Z80_instr_DDCB_8E: ; RES 1,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%11111101 + jmp ZVM_store_back + +Z80_instr_DDCB_96: ; RES 2,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%11111011 + jmp ZVM_store_back + +Z80_instr_DDCB_9E: ; RES 3,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%11110111 + jmp ZVM_store_back + +Z80_instr_DDCB_A6: ; RES 4,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%11101111 + jmp ZVM_store_back + +Z80_instr_DDCB_AE: ; RES 5,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%11011111 + jmp ZVM_store_back + +Z80_instr_DDCB_B6: ; RES 6,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%10111111 + jmp ZVM_store_back + +Z80_instr_DDCB_BE: ; RES 7,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%01111111 + jmp ZVM_store_back + +Z80_instr_FDCB_86: ; RES 0,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%11111110 + jmp ZVM_store_back + +Z80_instr_FDCB_8E: ; RES 1,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%11111101 + jmp ZVM_store_back + +Z80_instr_FDCB_96: ; RES 2,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%11111011 + jmp ZVM_store_back + +Z80_instr_FDCB_9E: ; RES 3,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%11110111 + jmp ZVM_store_back + +Z80_instr_FDCB_A6: ; RES 4,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%11101111 + jmp ZVM_store_back + +Z80_instr_FDCB_AE: ; RES 5,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%11011111 + jmp ZVM_store_back + +Z80_instr_FDCB_B6: ; RES 6,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%10111111 + jmp ZVM_store_back + +Z80_instr_FDCB_BE: ; RES 7,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%01111111 + jmp ZVM_store_back diff --git a/src/zvm_m65/z80_math_8bit.s b/src/zvm_m65/z80_math_8bit.s index a0f65d39..0be65960 100644 --- a/src/zvm_m65/z80_math_8bit.s +++ b/src/zvm_m65/z80_math_8bit.s @@ -3,1076 +3,160 @@ ; Z80 arithmetic instructions, 8 bit ; -; XXX put BIT instructions here +; XXX put ADD instructions here +; XXX put SUB instructions here +; XXX put SBC instructions here +; XXX put AND instructions here +; XXX put OR instructions here +; XXX put XOR instructions here +; XXX put CP instructions here -Z80_instr_CB_C0: ; SET 0,B +Z80_instr_04: ; INC B - lda REG_B - ora #%00000001 - sta REG_B + ldx REG_B + inc REG_B + bra Z80_common_INC + +Z80_instr_0C: ; INC C + + ldx REG_C + inc REG_C + bra Z80_common_INC + +Z80_instr_14: ; INC D + + ldx REG_D + inc REG_D + bra Z80_common_INC + +Z80_instr_1C: ; INC E + + ldx REG_E + inc REG_E + bra Z80_common_INC + +Z80_instr_24: ; INC H + + ldx REG_H + inc REG_H + bra Z80_common_INC + +Z80_instr_2C: ; INC L + + ldx REG_L + inc REG_L + bra Z80_common_INC + +Z80_instr_3C: ; INC A + + ldx REG_A + inc REG_A + + ; FALLTROUGH + +Z80_common_INC: + + lda REG_F + and #(0xFF - Z80_SF - Z80_ZF - Z80_HF - Z80_VF - Z80_NF) + ora z80_ftable_INC, x + sta REG_F rts -Z80_instr_CB_C1: ; SET 0,C - - lda REG_C - ora #%00000001 - sta REG_C - rts - -Z80_instr_CB_C2: ; SET 0,D - - lda REG_D - ora #%00000001 - sta REG_D - rts - -Z80_instr_CB_C3: ; SET 0,E - - lda REG_E - ora #%00000001 - sta REG_E - rts - -Z80_instr_CB_C4: ; SET 0,H - - lda REG_H - ora #%00000001 - sta REG_H - rts - -Z80_instr_CB_C5: ; SET 0,L - - lda REG_L - ora #%00000001 - sta REG_L - rts - -Z80_instr_CB_C7: ; SET 0,A - - lda REG_A - ora #%00000001 - sta REG_A - rts - -Z80_instr_CB_C8: ; SET 1,B - - lda REG_B - ora #%00000010 - sta REG_B - rts - -Z80_instr_CB_C9: ; SET 1, - - lda REG_C - ora #%00000010 - sta REG_C - rts - -Z80_instr_CB_CA: ; SET 1,D - - lda REG_D - ora #%00000010 - sta REG_D - rts - -Z80_instr_CB_CB: ; SET 1,E - - lda REG_E - ora #%00000010 - sta REG_E - rts - -Z80_instr_CB_CC: ; SET 1,H - - lda REG_H - ora #%00000010 - sta REG_H - rts - -Z80_instr_CB_CD: ; SET 1,L - - lda REG_L - ora #%00000010 - sta REG_L - rts - -Z80_instr_CB_CF: ; SET 1,A - - lda REG_A - ora #%00000010 - sta REG_A - rts - -Z80_instr_CB_D0: ; SET 2,B - - lda REG_B - ora #%00000100 - sta REG_B - rts - -Z80_instr_CB_D1: ; SET 2,C - - lda REG_C - ora #%00000100 - sta REG_C - rts - -Z80_instr_CB_D2: ; SET 2,D - - lda REG_D - ora #%00000100 - sta REG_D - rts - -Z80_instr_CB_D3: ; SET 2,E - - lda REG_E - ora #%00000100 - sta REG_E - rts - -Z80_instr_CB_D4: ; SET 2,H - - lda REG_H - ora #%00000100 - sta REG_H - rts - -Z80_instr_CB_D5: ; SET 2,L - - lda REG_L - ora #%00000100 - sta REG_L - rts - -Z80_instr_CB_D7: ; SET 2,A - - lda REG_A - ora #%00000100 - sta REG_A - rts - -Z80_instr_CB_D8: ; SET 3,B - - lda REG_B - ora #%00001000 - sta REG_B - rts - -Z80_instr_CB_D9: ; SET 3,C - - lda REG_C - ora #%00001000 - sta REG_C - rts - -Z80_instr_CB_DA: ; SET 3,D - - lda REG_D - ora #%00001000 - sta REG_D - rts - -Z80_instr_CB_DB: ; SET 3,E - - lda REG_E - ora #%00001000 - sta REG_E - rts - -Z80_instr_CB_DC: ; SET 3,H - - lda REG_H - ora #%00001000 - sta REG_H - rts - -Z80_instr_CB_DD: ; SET 3,L - - lda REG_L - ora #%00001000 - sta REG_L - rts - -Z80_instr_CB_DF: ; SET 3,A - - lda REG_A - ora #%00001000 - sta REG_A - rts - -Z80_instr_CB_E0: ; SET 4,B - - lda REG_B - ora #%00010000 - sta REG_B - rts - -Z80_instr_CB_E1: ; SET 4,C - - lda REG_C - ora #%00010000 - sta REG_C - rts - -Z80_instr_CB_E2: ; SET 4,D - - lda REG_D - ora #%00010000 - sta REG_D - rts - -Z80_instr_CB_E3: ; SET 4,E - - lda REG_E - ora #%00010000 - sta REG_E - rts - -Z80_instr_CB_E4: ; SET 4,H - - lda REG_H - ora #%00010000 - sta REG_H - rts - -Z80_instr_CB_E5: ; SET 4,L - - lda REG_L - ora #%00010000 - sta REG_L - rts - -Z80_instr_CB_E7: ; SET 4,A - - lda REG_A - ora #%00010000 - sta REG_A - rts - -Z80_instr_CB_E8: ; SET 5,B - - lda REG_B - ora #%00100000 - sta REG_B - rts - -Z80_instr_CB_E9: ; SET 5,C - - lda REG_C - ora #%00100000 - sta REG_C - rts - -Z80_instr_CB_EA: ; SET 5,D - - lda REG_D - ora #%00100000 - sta REG_D - rts - -Z80_instr_CB_EB: ; SET 5,E - - lda REG_E - ora #%00100000 - sta REG_E - rts - -Z80_instr_CB_EC: ; SET 5,H - - lda REG_H - ora #%00100000 - sta REG_H - rts - -Z80_instr_CB_ED: ; SET 5,L - - lda REG_L - ora #%00100000 - sta REG_L - rts - -Z80_instr_CB_EF: ; SET 5,A - - lda REG_A - ora #%00100000 - sta REG_A - rts - -Z80_instr_CB_F0: ; SET 6,B - - lda REG_B - ora #%01000000 - sta REG_B - rts - -Z80_instr_CB_F1: ; SET 6,C - - lda REG_C - ora #%01000000 - sta REG_C - rts - -Z80_instr_CB_F2: ; SET 6,D - - lda REG_D - ora #%01000000 - sta REG_D - rts - -Z80_instr_CB_F3: ; SET 6,E - - lda REG_E - ora #%01000000 - sta REG_E - rts - -Z80_instr_CB_F4: ; SET 6,H - - lda REG_H - ora #%01000000 - sta REG_H - rts - -Z80_instr_CB_F5: ; SET 6,L - - lda REG_L - ora #%01000000 - sta REG_L - rts - -Z80_instr_CB_F7: ; SET 6,A - - lda REG_A - ora #%01000000 - sta REG_A - rts - -Z80_instr_CB_F8: ; SET 7,B - - lda REG_B - ora #%10000000 - sta REG_B - rts - -Z80_instr_CB_F9: ; SET 7,C - - lda REG_C - ora #%10000000 - sta REG_C - rts - -Z80_instr_CB_FA: ; SET 7,D - - lda REG_D - ora #%10000000 - sta REG_D - rts - -Z80_instr_CB_FB: ; SET 7,E - - lda REG_E - ora #%10000000 - sta REG_E - rts - -Z80_instr_CB_FC: ; SET 7,H - - lda REG_H - ora #%10000000 - sta REG_H - rts - -Z80_instr_CB_FD: ; SET 7,L - - lda REG_L - ora #%10000000 - sta REG_L - rts - -Z80_instr_CB_FF: ; SET 7,A - - lda REG_A - ora #%10000000 - sta REG_A - rts - -Z80_instr_CB_C6: ; SET 0,(HL) +Z80_instr_34: ; INC (HL) jsr (VEC_fetch_via_HL) - ora #%00000001 - jmp ZVM_store_back + tax + inc + jsr ZVM_store_back + bra Z80_common_INC -Z80_instr_CB_CE: ; SET 1,(HL) +Z80_instr_DD_34: ; INC (IX+d) + + jsr (VEC_fetch_via_IX_d) + tax + inc + jsr ZVM_store_back + bra Z80_common_INC + +Z80_instr_FD_34: ; INC (IY+d) + + jsr (VEC_fetch_via_IY_d) + tax + inc + jsr ZVM_store_back + bra Z80_common_INC + +Z80_instr_05: ; DEC B + + ldx REG_B + dec REG_B + bra Z80_common_DEC + +Z80_instr_0D: ; DEC C + + ldx REG_C + dec REG_C + bra Z80_common_DEC + +Z80_instr_15: ; DEC D + + ldx REG_D + dec REG_D + bra Z80_common_DEC + +Z80_instr_1D: ; DEC E + + ldx REG_E + dec REG_E + bra Z80_common_DEC + +Z80_instr_25: ; DEC H + + ldx REG_H + dec REG_H + bra Z80_common_DEC + +Z80_instr_2D: ; DEC L + + ldx REG_L + dec REG_L + bra Z80_common_DEC + +Z80_instr_3D: ; DEC A + + ldx REG_A + dec REG_A + + ; FALLTROUGH + +Z80_common_DEC: + + lda REG_F + and #(0xFF - Z80_SF - Z80_ZF - Z80_HF - Z80_VF - Z80_NF) + ora z80_ftable_DEC, x + sta REG_F + rts + +Z80_instr_35: ; DEC (HL) jsr (VEC_fetch_via_HL) - ora #%00000010 - jmp ZVM_store_back + tax + dec + jsr ZVM_store_back + bra Z80_common_DEC -Z80_instr_CB_D6: ; SET 2,(HL) - - jsr (VEC_fetch_via_HL) - ora #%00000100 - jmp ZVM_store_back - -Z80_instr_CB_DE: ; SET 3,(HL) - - jsr (VEC_fetch_via_HL) - ora #%00001000 - jmp ZVM_store_back - -Z80_instr_CB_E6: ; SET 4,(HL) - - jsr (VEC_fetch_via_HL) - ora #%00010000 - jmp ZVM_store_back - -Z80_instr_CB_EE: ; SET 5,(HL) - - jsr (VEC_fetch_via_HL) - ora #%00100000 - jmp ZVM_store_back - -Z80_instr_CB_F6: ; SET 6,(HL) - - jsr (VEC_fetch_via_HL) - ora #%01000000 - jmp ZVM_store_back - -Z80_instr_CB_FE: ; SET 7,(HL) - - jsr (VEC_fetch_via_HL) - ora #%10000000 - jmp ZVM_store_back - -Z80_instr_DDCB_C6: ; SET 0,(IX+d) +Z80_instr_DD_35: ; DEC (IX+d) jsr (VEC_fetch_via_IX_d) - ora #%00000001 - jmp ZVM_store_back + tax + dec + jsr ZVM_store_back + bra Z80_common_DEC -Z80_instr_DDCB_CE: ; SET 1,(IX+d) - - jsr (VEC_fetch_via_IX_d) - ora #%00000010 - jmp ZVM_store_back - -Z80_instr_DDCB_D6: ; SET 2,(IX+d) - - jsr (VEC_fetch_via_IX_d) - ora #%00000100 - jmp ZVM_store_back - -Z80_instr_DDCB_DE: ; SET 3,(IX+d) - - jsr (VEC_fetch_via_IX_d) - ora #%00001000 - jmp ZVM_store_back - -Z80_instr_DDCB_E6: ; SET 4,(IX+d) - - jsr (VEC_fetch_via_IX_d) - ora #%00010000 - jmp ZVM_store_back - -Z80_instr_DDCB_EE: ; SET 5,(IX+d) - - jsr (VEC_fetch_via_IX_d) - ora #%00100000 - jmp ZVM_store_back - -Z80_instr_DDCB_F6: ; SET 6,(IX+d) - - jsr (VEC_fetch_via_IX_d) - ora #%01000000 - jmp ZVM_store_back - -Z80_instr_DDCB_FE: ; SET 7,(IX+d) - - jsr (VEC_fetch_via_IX_d) - ora #%10000000 - jmp ZVM_store_back - -Z80_instr_FDCB_C6: ; SET 0,(IY+d) +Z80_instr_FD_35: ; DEC (IY+d) jsr (VEC_fetch_via_IY_d) - ora #%00000001 - jmp ZVM_store_back - -Z80_instr_FDCB_CE: ; SET 1,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%00000010 - jmp ZVM_store_back - -Z80_instr_FDCB_D6: ; SET 2,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%00000100 - jmp ZVM_store_back - -Z80_instr_FDCB_DE: ; SET 3,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%00001000 - jmp ZVM_store_back - -Z80_instr_FDCB_E6: ; SET 4,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%00010000 - jmp ZVM_store_back - -Z80_instr_FDCB_EE: ; SET 5,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%00100000 - jmp ZVM_store_back - -Z80_instr_FDCB_F6: ; SET 6,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%01000000 - jmp ZVM_store_back - -Z80_instr_FDCB_FE: ; SET 7,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%10000000 - jmp ZVM_store_back - -Z80_instr_CB_80: ; RES 0,B - - lda REG_B - and #%11111110 - sta REG_B - rts - -Z80_instr_CB_81: ; RES 0,C - - lda REG_C - and #%11111110 - sta REG_C - rts - -Z80_instr_CB_82: ; RES 0,D - - lda REG_D - and #%11111110 - sta REG_D - rts - -Z80_instr_CB_83: ; RES 0,E - - lda REG_E - and #%11111110 - sta REG_E - rts - -Z80_instr_CB_84: ; RES 0,H - - lda REG_H - and #%11111110 - sta REG_H - rts - -Z80_instr_CB_85: ; RES 0,L - - lda REG_L - and #%11111110 - sta REG_L - rts - -Z80_instr_CB_87: ; RES 0,A - - lda REG_A - and #%11111110 - sta REG_A - rts - -Z80_instr_CB_88: ; RES 1,B - - lda REG_B - and #%11111101 - sta REG_B - rts - -Z80_instr_CB_89: ; RES 1,C - - lda REG_C - and #%11111101 - sta REG_C - rts - -Z80_instr_CB_8A: ; RES 1,D - - lda REG_D - and #%11111101 - sta REG_D - rts - -Z80_instr_CB_8B: ; RES 1,E - - lda REG_E - and #%11111101 - sta REG_E - rts - -Z80_instr_CB_8C: ; RES 1,H - - lda REG_H - and #%11111101 - sta REG_H - rts - -Z80_instr_CB_8D: ; RES 1,L - - lda REG_L - and #%11111101 - sta REG_L - rts - -Z80_instr_CB_8F: ; RES 1,A - - lda REG_A - and #%11111101 - sta REG_A - rts - -Z80_instr_CB_90: ; RES 2,B - - lda REG_B - and #%11111011 - sta REG_B - rts - -Z80_instr_CB_91: ; RES 2,C - - lda REG_C - and #%11111011 - sta REG_C - rts - -Z80_instr_CB_92: ; RES 2,D - - lda REG_D - and #%11111011 - sta REG_D - rts - -Z80_instr_CB_93: ; RES 2,E - - lda REG_E - and #%11111011 - sta REG_E - rts - -Z80_instr_CB_94: ; RES 2,H - - lda REG_H - and #%11111011 - sta REG_H - rts - -Z80_instr_CB_95: ; RES 2,L - - lda REG_L - and #%11111011 - sta REG_L - rts - -Z80_instr_CB_97: ; RES 2,A - - lda REG_A - and #%11111011 - sta REG_A - rts - -Z80_instr_CB_98: ; RES 3,B - - lda REG_B - and #%11110111 - sta REG_B - rts - -Z80_instr_CB_99: ; RES 3,C - - lda REG_C - and #%11110111 - sta REG_C - rts - -Z80_instr_CB_9A: ; RES 3,D - - lda REG_D - and #%11110111 - sta REG_D - rts - -Z80_instr_CB_9B: ; RES 3,E - - lda REG_E - and #%11110111 - sta REG_E - rts - -Z80_instr_CB_9C: ; RES 3,H - - lda REG_H - and #%11110111 - sta REG_H - rts - -Z80_instr_CB_9D: ; RES 3,L - - lda REG_L - and #%11110111 - sta REG_L - rts - -Z80_instr_CB_9F: ; RES 3,A - - lda REG_A - and #%11110111 - sta REG_A - rts - -Z80_instr_CB_A0: ; RES 4,B - - lda REG_B - and #%11101111 - sta REG_B - rts - -Z80_instr_CB_A1: ; RES 4,C - - lda REG_C - and #%11101111 - sta REG_C - rts - -Z80_instr_CB_A2: ; RES 4,D - - lda REG_D - and #%11101111 - sta REG_D - rts - -Z80_instr_CB_A3: ; RES 4,E - - lda REG_E - and #%11101111 - sta REG_E - rts - -Z80_instr_CB_A4: ; RES 4,H - - lda REG_H - and #%11101111 - sta REG_H - rts - -Z80_instr_CB_A5: ; RES 4,L - - lda REG_L - and #%11101111 - sta REG_L - rts - -Z80_instr_CB_A7: ; RES 4,A - - lda REG_A - and #%11101111 - sta REG_A - rts - -Z80_instr_CB_A8: ; RES 5,B - - lda REG_B - and #%11011111 - sta REG_B - rts - -Z80_instr_CB_A9: ; RES 5,C - - lda REG_C - and #%11011111 - sta REG_C - rts - -Z80_instr_CB_AA: ; RES 5,D - - lda REG_D - and #%11011111 - sta REG_D - rts - -Z80_instr_CB_AB: ; RES 5,E - - lda REG_E - and #%11011111 - sta REG_E - rts - -Z80_instr_CB_AC: ; RES 5,H - - lda REG_H - and #%11011111 - sta REG_H - rts - -Z80_instr_CB_AD: ; RES 5,L - - lda REG_L - and #%11011111 - sta REG_L - rts - -Z80_instr_CB_AF: ; RES 5,A - - lda REG_A - and #%11011111 - sta REG_A - rts - -Z80_instr_CB_B0: ; RES 6,B - - lda REG_B - and #%10111111 - sta REG_B - rts - -Z80_instr_CB_B1: ; RES 6,C - - lda REG_C - and #%10111111 - sta REG_C - rts - -Z80_instr_CB_B2: ; RES 6,D - - lda REG_D - and #%10111111 - sta REG_D - rts - -Z80_instr_CB_B3: ; RES 6,E - - lda REG_E - and #%10111111 - sta REG_E - rts - -Z80_instr_CB_B4: ; RES 6,H - - lda REG_H - and #%10111111 - sta REG_H - rts - -Z80_instr_CB_B5: ; RES 6,L - - lda REG_L - and #%10111111 - sta REG_L - rts - -Z80_instr_CB_B7: ; RES 6,A - - lda REG_A - and #%10111111 - sta REG_A - rts - -Z80_instr_CB_B8: ; RES 7,B - - lda REG_B - and #%01111111 - sta REG_B - rts - -Z80_instr_CB_B9: ; RES 7,C - - lda REG_C - and #%01111111 - sta REG_C - rts - -Z80_instr_CB_BA: ; RES 7,D - - lda REG_D - and #%01111111 - sta REG_D - rts - -Z80_instr_CB_BB: ; RES 7,E - - lda REG_E - and #%01111111 - sta REG_E - rts - -Z80_instr_CB_BC: ; RES 7,H - - lda REG_H - and #%01111111 - sta REG_H - rts - -Z80_instr_CB_BD: ; RES 7,L - - lda REG_L - and #%01111111 - sta REG_L - rts - -Z80_instr_CB_BF: ; RES 7,A - - lda REG_A - and #%01111111 - sta REG_A - rts - -Z80_instr_CB_86: ; RES 0,(HL) - - jsr (VEC_fetch_via_HL) - and #%11111110 - jmp ZVM_store_back - -Z80_instr_CB_8E: ; RES 1,(HL) - - jsr (VEC_fetch_via_HL) - and #%11111101 - jmp ZVM_store_back - -Z80_instr_CB_96: ; RES 2,(HL) - - jsr (VEC_fetch_via_HL) - and #%11111011 - jmp ZVM_store_back - -Z80_instr_CB_9E: ; RES 3,(HL) - - jsr (VEC_fetch_via_HL) - and #%11110111 - jmp ZVM_store_back - -Z80_instr_CB_A6: ; RES 4,(HL) - - jsr (VEC_fetch_via_HL) - and #%11101111 - jmp ZVM_store_back - -Z80_instr_CB_AE: ; RES 5,(HL) - - jsr (VEC_fetch_via_HL) - and #%11011111 - jmp ZVM_store_back - -Z80_instr_CB_B6: ; RES 6,(HL) - - jsr (VEC_fetch_via_HL) - and #%10111111 - jmp ZVM_store_back - -Z80_instr_CB_BE: ; RES 7,(HL) - - jsr (VEC_fetch_via_HL) - and #%01111111 - jmp ZVM_store_back - -Z80_instr_DDCB_86: ; RES 0,(IX+d) - - jsr (VEC_fetch_via_IX_d) - and #%11111110 - jmp ZVM_store_back - -Z80_instr_DDCB_8E: ; RES 1,(IX+d) - - jsr (VEC_fetch_via_IX_d) - and #%11111101 - jmp ZVM_store_back - -Z80_instr_DDCB_96: ; RES 2,(IX+d) - - jsr (VEC_fetch_via_IX_d) - and #%11111011 - jmp ZVM_store_back - -Z80_instr_DDCB_9E: ; RES 3,(IX+d) - - jsr (VEC_fetch_via_IX_d) - and #%11110111 - jmp ZVM_store_back - -Z80_instr_DDCB_A6: ; RES 4,(IX+d) - - jsr (VEC_fetch_via_IX_d) - and #%11101111 - jmp ZVM_store_back - -Z80_instr_DDCB_AE: ; RES 5,(IX+d) - - jsr (VEC_fetch_via_IX_d) - and #%11011111 - jmp ZVM_store_back - -Z80_instr_DDCB_B6: ; RES 6,(IX+d) - - jsr (VEC_fetch_via_IX_d) - and #%10111111 - jmp ZVM_store_back - -Z80_instr_DDCB_BE: ; RES 7,(IX+d) - - jsr (VEC_fetch_via_IX_d) - and #%01111111 - jmp ZVM_store_back - -Z80_instr_FDCB_86: ; RES 0,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%11111110 - jmp ZVM_store_back - -Z80_instr_FDCB_8E: ; RES 1,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%11111101 - jmp ZVM_store_back - -Z80_instr_FDCB_96: ; RES 2,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%11111011 - jmp ZVM_store_back - -Z80_instr_FDCB_9E: ; RES 3,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%11110111 - jmp ZVM_store_back - -Z80_instr_FDCB_A6: ; RES 4,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%11101111 - jmp ZVM_store_back - -Z80_instr_FDCB_AE: ; RES 5,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%11011111 - jmp ZVM_store_back - -Z80_instr_FDCB_B6: ; RES 6,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%10111111 - jmp ZVM_store_back - -Z80_instr_FDCB_BE: ; RES 7,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%01111111 - jmp ZVM_store_back + tax + dec + jsr ZVM_store_back + bra Z80_common_DEC diff --git a/src/zvm_m65/z80_tables.s b/src/zvm_m65/z80_tables.s new file mode 100644 index 00000000..b31a2c64 --- /dev/null +++ b/src/zvm_m65/z80_tables.s @@ -0,0 +1,17 @@ + +; +; Z80 tables for quickly calculating instruction results +; + + +z80_ftable_parity: + + +PUT_Z80_FTABLE_PARITY + +z80_ftable_INC: + + +PUT_Z80_FTABLE_INC + +z80_ftable_DEC: + + +PUT_Z80_FTABLE_DEC diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index dc3da620..5a38da18 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -101,56 +101,40 @@ ZVM_run: Z80_instr_01: ; LD BC,nn Z80_instr_02: ; LD (BC),A Z80_instr_03: ; INC BC -Z80_instr_04: ; INC B -Z80_instr_05: ; DEC B Z80_instr_07: ; RLCA Z80_instr_09: ; ADD HL,BC Z80_instr_0A: ; LD A,(BC) Z80_instr_0B: ; DEC BC -Z80_instr_0C: ; INC C -Z80_instr_0D: ; DEC C Z80_instr_0F: ; RRCA Z80_instr_10: ; DJNZ e Z80_instr_11: ; LD DE,nn Z80_instr_12: ; LD (DE),A Z80_instr_13: ; INC DE -Z80_instr_14: ; INC D -Z80_instr_15: ; DEC D Z80_instr_17: ; RLA Z80_instr_18: ; JR e Z80_instr_19: ; ADD HL,DE Z80_instr_1A: ; LD A,(DE) Z80_instr_1B: ; DEC DE -Z80_instr_1C: ; INC E -Z80_instr_1D: ; DEC E Z80_instr_1F: ; RRA Z80_instr_20: ; JR NZ,e Z80_instr_21: ; LD HL,nn Z80_instr_22: ; LD (nn),HL Z80_instr_23: ; INC HL -Z80_instr_24: ; INC H -Z80_instr_25: ; DEC H Z80_instr_27: ; DAA Z80_instr_28: ; JR Z,e Z80_instr_29: ; ADD HL,HL Z80_instr_2A: ; LD HL,(nn) Z80_instr_2B: ; DEC HL -Z80_instr_2C: ; INC L -Z80_instr_2D: ; DEC L Z80_instr_2F: ; CPL Z80_instr_30: ; JR NC,e Z80_instr_31: ; LD SP,nn Z80_instr_32: ; LD (nn),A Z80_instr_33: ; INC SP -Z80_instr_34: ; INC (HL) -Z80_instr_35: ; DEC (HL) Z80_instr_37: ; SCF Z80_instr_38: ; JR C,e Z80_instr_39: ; ADD HL,SP Z80_instr_3A: ; LD A,(nn) Z80_instr_3B: ; DEC SP -Z80_instr_3C: ; INC A -Z80_instr_3D: ; DEC A Z80_instr_3F: ; CCF Z80_instr_76: ; HALT Z80_instr_80: ; ADD A,B @@ -407,8 +391,6 @@ Z80_instr_DD_23: ; DEC IX Z80_instr_DD_29: ; ADD IX,IX Z80_instr_DD_2A: ; LD IX,(nn) Z80_instr_DD_2B: ; DEC IX -Z80_instr_DD_34: ; INC (IX+d) -Z80_instr_DD_35: ; DEC (IX+d) Z80_instr_DD_39: ; ADD IX,SP Z80_instr_DD_46: ; LD B,(IX+d) Z80_instr_DD_4E: ; LD C,(IX+d) @@ -502,8 +484,6 @@ Z80_instr_FD_23: ; INC IY Z80_instr_FD_29: ; ADD IY,IY Z80_instr_FD_2A: ; LD IY,(nn) Z80_instr_FD_2B: ; DEC IY -Z80_instr_FD_34: ; INC (IY+d) -Z80_instr_FD_35: ; DEC (IY+d) Z80_instr_FD_39: ; ADD IY,SP Z80_instr_FD_46: ; LD B,(IY+d) Z80_instr_FD_4E: ; LD C,(IY+d) diff --git a/tools/generate_z80_tables.cc b/tools/generate_z80_tables.cc index e78efae1..519c404f 100644 --- a/tools/generate_z80_tables.cc +++ b/tools/generate_z80_tables.cc @@ -10,6 +10,22 @@ #include #include +// +// Constants +// + +static const uint8_t Z80_SF = 0x80; // sign +static const uint8_t Z80_ZF = 0x40; // zero +static const uint8_t Z80_YF = 0x20; // bit 5 result +static const uint8_t Z80_HF = 0x10; // half carry +static const uint8_t Z80_XF = 0x08; // bit 3 result +static const uint8_t Z80_PF = 0x04; // parity +static const uint8_t Z80_VF = 0x04; // overflow +static const uint8_t Z80_NF = 0x02; // add/subtract +static const uint8_t Z80_CF = 0x01; // carry + + + // // Command line settings // @@ -59,7 +75,7 @@ void parseCommandLine(int argc, char **argv) std::string generateParityTable(void) { - std::string outStr = "!macro PUT_Z80_TABLE_PARITY {\n";; + std::string outStr = "!macro PUT_Z80_FTABLE_PARITY {\n"; for (uint16_t idx = 0; idx < 0x100; idx++) { @@ -89,7 +105,51 @@ std::string generateParityTable(void) } } - return outStr + "}\n\n\n";; + return outStr + "}\n\n\n"; +} + +std::string generateIncTable(void) +{ + std::stringstream outStr; + + outStr << "!macro PUT_Z80_FTABLE_INC {\n"; + + for (uint16_t idx = 0; idx < 0x100; idx++) + { + uint8_t flags = 0; + + if (idx >= 0x7F && idx != 0xFF) flags |= Z80_SF; // for negative result + if (idx == 0xFF) flags |= Z80_ZF; // for result equal 0 + if ((idx & 0x0F) == 0x0F) flags |= Z80_HF; + if (idx == 0x7F) flags |= Z80_VF; + + outStr << "\t!byte "; + outStr << std::hex << std::setw(2) << int(flags) << "\n"; + } + + return outStr.str() + "}\n\n\n"; +} + +std::string generateDecTable(void) +{ + std::stringstream outStr; + + outStr << "!macro PUT_Z80_FTABLE_DEC {\n"; + + for (uint16_t idx = 0; idx < 0x100; idx++) + { + uint8_t flags = Z80_NF; + + if (idx >= 0x81 || idx == 0x00) flags |= Z80_SF; // for negative result + if (idx == 0x01) flags |= Z80_ZF; // for result equal 0 + if ((idx & 0x0F) == 0x00) flags |= Z80_HF; + if (idx == 0x80) flags |= Z80_VF; + + outStr << "\t!byte "; + outStr << std::hex << std::setw(2) << int(flags) << "\n"; + } + + return outStr.str() + "}\n\n\n"; } std::string generateDaaTables() @@ -122,6 +182,8 @@ void writeTables() // Write tables outFile << generateParityTable(); + outFile << generateIncTable(); + outFile << generateDecTable(); outFile << generateDaaTables(); // XXX From bf1eb88342b8908f51af77c5185e645ee2d7b07b Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 18 Dec 2020 18:04:19 +0100 Subject: [PATCH 043/257] moppre Z80 opcodes implemented --- src/zvm_m65/,aliases_zvm.s | 5 + src/zvm_m65/{z80_bit.s => z80_instr_bit.s} | 588 +++++++++++++++++- .../{z80_block.s => z80_instr_block.s} | 0 ..._call_return.s => z80_instr_call_return.s} | 0 .../{z80_exchange.s => z80_instr_exchange.s} | 0 .../{z80_general.s => z80_instr_general.s} | 0 src/zvm_m65/{z80_io.s => z80_instr_io.s} | 0 src/zvm_m65/{z80_jump.s => z80_instr_jump.s} | 0 ...80_load_16bit.s => z80_instr_load_16bit.s} | 0 ...{z80_load_8bit.s => z80_instr_load_8bit.s} | 16 +- ...80_math_16bit.s => z80_instr_math_16bit.s} | 0 ...{z80_math_8bit.s => z80_instr_math_8bit.s} | 0 ...otate_shift.s => z80_instr_rotate_shift.s} | 0 src/zvm_m65/z80_tables.s | 6 +- src/zvm_m65/zvm_core.s | 82 +-- 15 files changed, 604 insertions(+), 93 deletions(-) rename src/zvm_m65/{z80_bit.s => z80_instr_bit.s} (56%) rename src/zvm_m65/{z80_block.s => z80_instr_block.s} (100%) rename src/zvm_m65/{z80_call_return.s => z80_instr_call_return.s} (100%) rename src/zvm_m65/{z80_exchange.s => z80_instr_exchange.s} (100%) rename src/zvm_m65/{z80_general.s => z80_instr_general.s} (100%) rename src/zvm_m65/{z80_io.s => z80_instr_io.s} (100%) rename src/zvm_m65/{z80_jump.s => z80_instr_jump.s} (100%) rename src/zvm_m65/{z80_load_16bit.s => z80_instr_load_16bit.s} (100%) rename src/zvm_m65/{z80_load_8bit.s => z80_instr_load_8bit.s} (95%) rename src/zvm_m65/{z80_math_16bit.s => z80_instr_math_16bit.s} (100%) rename src/zvm_m65/{z80_math_8bit.s => z80_instr_math_8bit.s} (100%) rename src/zvm_m65/{z80_rotate_shift.s => z80_instr_rotate_shift.s} (100%) diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index c4a1d9ed..f448259d 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -26,6 +26,11 @@ !addr REG_R06 = $1B ; refresh counter, bits 0-6 (bit 7 is garbage) !addr REG_R7 = $1C ; refresh counter, bit 7 (bits 0-6 are 0's) +!addr ADDR_IXY_d = $1D ; 16-bit calculated address IX+d / IY+d XXX - important!!! + +!addr REG_IFF1 = $1F ; interrupt flip-flop flag 1 +!addr REG_IFF2 = $20 ; interrupt flip-flop flag 2 + !addr VEC_fetch_opcode = $60 !addr VEC_fetch_value = $62 !addr VEC_fetch_stack = $64 diff --git a/src/zvm_m65/z80_bit.s b/src/zvm_m65/z80_instr_bit.s similarity index 56% rename from src/zvm_m65/z80_bit.s rename to src/zvm_m65/z80_instr_bit.s index f94be83b..e51cba96 100644 --- a/src/zvm_m65/z80_bit.s +++ b/src/zvm_m65/z80_instr_bit.s @@ -3,7 +3,593 @@ ; Z80 bit set/reset/test instructions ; -; XXX put BIT instructions here + +; bits 0, 1, 4, 6 + +Z80_instr_CB_40: ; BIT 0,B + + bbs0 REG_B, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_41: ; BIT 0,C + + bbs0 REG_C, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_42: ; BIT 0,D + + bbs0 REG_D, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_43: ; BIT 0,E + + bbs0 REG_E, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_44: ; BIT 0,H + + bbs0 REG_H, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_45: ; BIT 0,L + + bbs0 REG_L, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_47: ; BIT 0,A + + bbs0 REG_A, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_48: ; BIT 1,B + + bbs1 REG_B, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_49: ; BIT 1,C + + bbs1 REG_C, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_4A: ; BIT 1,D + + bbs1 REG_D, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_4B: ; BIT 1,E + + bbs1 REG_E, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_4C: ; BIT 1,H + + bbs1 REG_H, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_4D: ; BIT 1,L + + bbs1 REG_L, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_4F: ; BIT 1,A + + bbs1 REG_A, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_50: ; BIT 2,B + + bbs2 REG_B, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_51: ; BIT 2,C + + bbs2 REG_C, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_52: ; BIT 2, + + bbs2 REG_D, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_53: ; BIT 2,E + + bbs2 REG_E, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_54: ; BIT 2,H + + bbs2 REG_H, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_55: ; BIT 2,L + + bbs2 REG_L, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_57: ; BIT 2,A + + bbs2 REG_A, Z80_common_bitx_1 + + ; FALLTROUGH + +Z80_common_bitx_0: + + lda REG_F + and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF) + ora #($00 + Z80_HF + Z80_ZF + Z80_PF) + sta REG_F + rts + +Z80_common_bitx_1: + + lda REG_F + and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF - Z80_ZF - Z80_PF) + ora #($00 + Z80_HF) + sta REG_F + rts + +Z80_instr_CB_60: ; BIT 4,B + + bbs4 REG_B, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_61: ; BIT 4,C + + bbs4 REG_C, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_62: ; BIT 4,D + + bbs4 REG_D, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_63: ; BIT 4,E + + bbs4 REG_E, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_64: ; BIT 4,H + + bbs4 REG_H, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_65: ; BIT 4,L + + bbs4 REG_L, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_67: ; BIT 4,A + + bbs4 REG_A, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_70: ; BIT 6,B + + bbs6 REG_B, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_71: ; BIT 6,C + + bbs6 REG_C, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_72: ; BIT 6,D + + bbs6 REG_D, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_73: ; BIT 6,E + + bbs6 REG_E, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_74: ; BIT 6,H + + bbs6 REG_H, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_75: ; BIT 6,L + + bbs6 REG_L, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +Z80_instr_CB_77: ; BIT 6,A + + bbs6 REG_A, Z80_common_bitx_1 + bra Z80_common_bitx_0 + +; bits 3, 5, 7 + +Z80_instr_CB_58: ; BIT 3,B + + bbs3 REG_B, Z80_common_bit3_1 + bra Z80_common_bit3_0 + +Z80_instr_CB_59: ; BIT 3,C + + bbs3 REG_C, Z80_common_bit3_1 + bra Z80_common_bit3_0 + +Z80_instr_CB_5A: ; BIT 3,D + + bbs3 REG_D, Z80_common_bit3_1 + bra Z80_common_bit3_0 + +Z80_instr_CB_5B: ; BIT 3,E + + bbs3 REG_E, Z80_common_bit3_1 + bra Z80_common_bit3_0 + +Z80_instr_CB_5C: ; BIT 3,H + + bbs3 REG_H, Z80_common_bit3_1 + bra Z80_common_bit3_0 + +Z80_instr_CB_5D: ; BIT 3,L + + bbs3 REG_L, Z80_common_bit3_1 + bra Z80_common_bit3_0 + +Z80_instr_CB_5F: ; BIT 3,A + + bbs3 REG_D, Z80_common_bit3_1 + + ; FALLTROUGH + +Z80_common_bit3_0: + + lda REG_F + and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF) + ora #($00 + Z80_HF + Z80_ZF + Z80_PF) + sta REG_F + rts + +Z80_common_bit3_1: + + lda REG_F + and #($FF - Z80_NF - Z80_YF - Z80_SF - Z80_ZF - Z80_PF) + ora #($00 + Z80_HF + Z80_XF) + sta REG_F + rts + +Z80_instr_CB_68: ; BIT 5,B + + bbs5 REG_B, Z80_common_bit5_1 + bra Z80_common_bit3_0 + +Z80_instr_CB_69: ; BIT 5,C + + bbs5 REG_C, Z80_common_bit5_1 + bra Z80_common_bit3_0 + +Z80_instr_CB_6A: ; BIT 5,D + + bbs5 REG_D, Z80_common_bit5_1 + bra Z80_common_bit3_0 + +Z80_instr_CB_6B: ; BIT 5,E + + bbs5 REG_E, Z80_common_bit5_1 + bra Z80_common_bit3_0 + +Z80_instr_CB_6C: ; BIT 5,H + + bbs5 REG_H, Z80_common_bit5_1 + bra Z80_common_bit3_0 + +Z80_instr_CB_6D: ; BIT 5,L + + bbs5 REG_L, Z80_common_bit5_1 + bra Z80_common_bit3_0 + +Z80_instr_CB_6F: ; BIT 5,A + + bbs5 REG_A, Z80_common_bit5_1 + bra Z80_common_bit3_0 + + ; FALLTROUGH + +Z80_common_bit5_0: + + lda REG_F + and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF) + ora #($00 + Z80_HF + Z80_ZF + Z80_PF) + sta REG_F + rts + +Z80_common_bit5_1: + + lda REG_F + and #($FF - Z80_NF - Z80_XF - Z80_SF - Z80_ZF - Z80_PF) + ora #($00 + Z80_HF + Z80_YF) + sta REG_F + rts + +Z80_instr_CB_78: ; BIT 7,B + + bbs7 REG_B, Z80_common_bit7_1 + bra Z80_common_bit7_0 + +Z80_instr_CB_79: ; BIT 7,C + + bbs7 REG_C, Z80_common_bit7_1 + bra Z80_common_bit7_0 + +Z80_instr_CB_7A: ; BIT 7,D + + bbs7 REG_D, Z80_common_bit7_1 + bra Z80_common_bit7_0 + +Z80_instr_CB_7B: ; BIT 7,E + + bbs7 REG_E, Z80_common_bit7_1 + bra Z80_common_bit7_0 + +Z80_instr_CB_7C: ; BIT 7,H + + bbs7 REG_H, Z80_common_bit7_1 + bra Z80_common_bit7_0 + +Z80_instr_CB_7D: ; BIT 7,L + + bbs7 REG_L, Z80_common_bit7_1 + bra Z80_common_bit7_0 + +Z80_instr_CB_7F: ; BIT 7,A + + bbs7 REG_A, Z80_common_bit7_1 + + ; FALLTROUGH + +Z80_common_bit7_0: + + lda REG_F + and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF) + ora #($00 + Z80_HF + Z80_ZF + Z80_PF) + sta REG_F + rts + +Z80_common_bit7_1: + + lda REG_F + and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_ZF - Z80_PF) + ora #($00 + Z80_HF + Z80_SF) + sta REG_F + rts + +; bits taken from (HL) + +Z80_instr_CB_46: ; BIT 0,(HL) + + jsr (VEC_fetch_via_HL) + and #%00000001 + bne Z80_common_bitHL_1 + bra Z80_common_bitHL_0 + +Z80_instr_CB_4E: ; BIT 1,(HL) + + jsr (VEC_fetch_via_HL) + and #%00000010 + bne Z80_common_bitHL_1 + bra Z80_common_bitHL_0 + +Z80_instr_CB_56: ; BIT 2,(HL) + + jsr (VEC_fetch_via_HL) + and #%00000100 + bne Z80_common_bitHL_1 + bra Z80_common_bitHL_0 + +Z80_instr_CB_5E: ; BIT 3,(HL) + + jsr (VEC_fetch_via_HL) + and #%00001000 + bne Z80_common_bitHL_1 + bra Z80_common_bitHL_0 + +Z80_instr_CB_66: ; BIT 4,(HL) + + jsr (VEC_fetch_via_HL) + and #%00010000 + bne Z80_common_bitHL_1 + bra Z80_common_bitHL_0 + +Z80_instr_CB_6E: ; BIT 5,(HL) + + jsr (VEC_fetch_via_HL) + and #%00100000 + bne Z80_common_bitHL_1 + bra Z80_common_bitHL_0 + +Z80_instr_CB_76: ; BIT 6,(HL) + + jsr (VEC_fetch_via_HL) + and #%01000000 + bne Z80_common_bitHL_1 + bra Z80_common_bitHL_0 + +Z80_instr_CB_7E: ; BIT 7,(HL) + + jsr (VEC_fetch_via_HL) + and #%10000000 + beq Z80_common_bitHL_0 + + lda REG_F + and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_ZF - Z80_PF) + ora #($00 + Z80_HF + Z80_SF) + sta REG_F + rts + +Z80_common_bitHL_0: + + ; XXX behaviour of undefined flags not fully known, thus not implemented + lda REG_F + and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF) + ora #($00 + Z80_HF + Z80_ZF + Z80_PF) + sta REG_F + rts + +Z80_common_bitHL_1: + + ; XXX behaviour of undefined flags not fully known, thus not implemented + lda REG_F + and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF - Z80_ZF - Z80_PF) + ora #($00 + Z80_HF) + sta REG_F + rts + +; bits taken from index register + displacement + +Z80_instr_DDCB_46: ; BIT 0,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%00000001 + bne Z80_common_bitXYx_1 + bra Z80_common_bitXYx_0 + +Z80_instr_DDCB_4E: ; BIT 1,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%00000010 + bne Z80_common_bitXYx_1 + bra Z80_common_bitXYx_0 + +Z80_instr_DDCB_56: ; BIT 2,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%00000100 + bne Z80_common_bitXYx_1 + bra Z80_common_bitXYx_0 + +Z80_instr_DDCB_5E: ; BIT 3,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%00001000 + bne Z80_common_bitXYx_1 + bra Z80_common_bitXYx_0 + +Z80_instr_DDCB_66: ; BIT 4,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%00010000 + bne Z80_common_bitXYx_1 + bra Z80_common_bitXYx_0 + +Z80_instr_DDCB_6E: ; BIT 5,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%00100000 + bne Z80_common_bitXYx_1 + bra Z80_common_bitXYx_0 + +Z80_instr_DDCB_76: ; BIT 6,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%01000000 + bne Z80_common_bitXYx_1 + bra Z80_common_bitXYx_0 + +Z80_instr_DDCB_7E: ; BIT 7,(IX+d) + + jsr (VEC_fetch_via_IX_d) + and #%10000000 + beq Z80_common_bitXYx_0 + + ; FALLTROUGH + +Z80_common_bitXY7_1: + + lda REG_F + and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_ZF - Z80_PF) + ora #($00 + Z80_HF + Z80_SF) + sta REG_F + lda ADDR_IXY_d + and #(Z80_XF + Z80_YF) + ora REG_F + sta REG_F + rts + +Z80_common_bitXYx_0: + + lda REG_F + and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF) + ora #($00 + Z80_HF + Z80_ZF + Z80_PF) + sta REG_F + lda ADDR_IXY_d + and #(Z80_XF + Z80_YF) + ora REG_F + sta REG_F + rts + +Z80_common_bitXYx_1: + + lda REG_F + and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF - Z80_ZF - Z80_PF) + ora #($00 + Z80_HF) + sta REG_F + lda ADDR_IXY_d + and #(Z80_XF + Z80_YF) + ora REG_F + sta REG_F + rts + +Z80_instr_FDCB_46: ; BIT 0,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%00000001 + bne Z80_common_bitXYx_1 + bra Z80_common_bitXYx_0 + +Z80_instr_FDCB_4E: ; BIT 1,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%00000010 + bne Z80_common_bitXYx_1 + bra Z80_common_bitXYx_0 + +Z80_instr_FDCB_56: ; BIT 2,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%00000100 + bne Z80_common_bitXYx_1 + bra Z80_common_bitXYx_0 + +Z80_instr_FDCB_5E: ; BIT 3,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%00001000 + bne Z80_common_bitXYx_1 + bra Z80_common_bitXYx_0 + +Z80_instr_FDCB_66: ; BIT 4,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%00010000 + bne Z80_common_bitXYx_1 + bra Z80_common_bitXYx_0 + +Z80_instr_FDCB_6E: ; BIT 5,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%00100000 + bne Z80_common_bitXYx_1 + bra Z80_common_bitXYx_0 + +Z80_instr_FDCB_76: ; BIT 6,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%01000000 + bne Z80_common_bitXYx_1 + bra Z80_common_bitXYx_0 + +Z80_instr_FDCB_7E: ; BIT 7,(IY+d) + + jsr (VEC_fetch_via_IY_d) + and #%10000000 + bne Z80_common_bitXY7_1 + bra Z80_common_bitXYx_0 + +; SET, RES Z80_instr_CB_C0: ; SET 0,B diff --git a/src/zvm_m65/z80_block.s b/src/zvm_m65/z80_instr_block.s similarity index 100% rename from src/zvm_m65/z80_block.s rename to src/zvm_m65/z80_instr_block.s diff --git a/src/zvm_m65/z80_call_return.s b/src/zvm_m65/z80_instr_call_return.s similarity index 100% rename from src/zvm_m65/z80_call_return.s rename to src/zvm_m65/z80_instr_call_return.s diff --git a/src/zvm_m65/z80_exchange.s b/src/zvm_m65/z80_instr_exchange.s similarity index 100% rename from src/zvm_m65/z80_exchange.s rename to src/zvm_m65/z80_instr_exchange.s diff --git a/src/zvm_m65/z80_general.s b/src/zvm_m65/z80_instr_general.s similarity index 100% rename from src/zvm_m65/z80_general.s rename to src/zvm_m65/z80_instr_general.s diff --git a/src/zvm_m65/z80_io.s b/src/zvm_m65/z80_instr_io.s similarity index 100% rename from src/zvm_m65/z80_io.s rename to src/zvm_m65/z80_instr_io.s diff --git a/src/zvm_m65/z80_jump.s b/src/zvm_m65/z80_instr_jump.s similarity index 100% rename from src/zvm_m65/z80_jump.s rename to src/zvm_m65/z80_instr_jump.s diff --git a/src/zvm_m65/z80_load_16bit.s b/src/zvm_m65/z80_instr_load_16bit.s similarity index 100% rename from src/zvm_m65/z80_load_16bit.s rename to src/zvm_m65/z80_instr_load_16bit.s diff --git a/src/zvm_m65/z80_load_8bit.s b/src/zvm_m65/z80_instr_load_8bit.s similarity index 95% rename from src/zvm_m65/z80_load_8bit.s rename to src/zvm_m65/z80_instr_load_8bit.s index dc564383..67945b99 100644 --- a/src/zvm_m65/z80_load_8bit.s +++ b/src/zvm_m65/z80_instr_load_8bit.s @@ -266,43 +266,43 @@ Z80_instr_7D: ; LD A,L Z80_instr_06: ; LD B,n - jsr VEC_fetch_value + jsr (VEC_fetch_value) sta REG_B rts Z80_instr_0E: ; LD C,n - jsr VEC_fetch_value + jsr (VEC_fetch_value) sta REG_C rts Z80_instr_16: ; LD D,n - jsr VEC_fetch_value + jsr (VEC_fetch_value) sta REG_D rts Z80_instr_1E: ; LD E,n - jsr VEC_fetch_value + jsr (VEC_fetch_value) sta REG_E rts Z80_instr_26: ; LD H,n - jsr VEC_fetch_value + jsr (VEC_fetch_value) sta REG_H rts Z80_instr_2E: ; LD L,n - jsr VEC_fetch_value + jsr (VEC_fetch_value) sta REG_L rts Z80_instr_3E: ; LD A,n - jsr VEC_fetch_value + jsr (VEC_fetch_value) sta REG_A rts @@ -403,7 +403,7 @@ Z80_instr_77: ; LD (HL),A Z80_instr_36: ; LD (HL),n - jsr VEC_fetch_value + jsr (VEC_fetch_value) jmp (VEC_store_via_HL) ; XXX put here LD (IX+d),n family diff --git a/src/zvm_m65/z80_math_16bit.s b/src/zvm_m65/z80_instr_math_16bit.s similarity index 100% rename from src/zvm_m65/z80_math_16bit.s rename to src/zvm_m65/z80_instr_math_16bit.s diff --git a/src/zvm_m65/z80_math_8bit.s b/src/zvm_m65/z80_instr_math_8bit.s similarity index 100% rename from src/zvm_m65/z80_math_8bit.s rename to src/zvm_m65/z80_instr_math_8bit.s diff --git a/src/zvm_m65/z80_rotate_shift.s b/src/zvm_m65/z80_instr_rotate_shift.s similarity index 100% rename from src/zvm_m65/z80_rotate_shift.s rename to src/zvm_m65/z80_instr_rotate_shift.s diff --git a/src/zvm_m65/z80_tables.s b/src/zvm_m65/z80_tables.s index b31a2c64..cc51befc 100644 --- a/src/zvm_m65/z80_tables.s +++ b/src/zvm_m65/z80_tables.s @@ -4,9 +4,9 @@ ; -z80_ftable_parity: - - +PUT_Z80_FTABLE_PARITY +; z80_ftable_parity: +; +; +PUT_Z80_FTABLE_PARITY z80_ftable_INC: diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 5a38da18..cdf2831c 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -18,7 +18,7 @@ ZVM_init: @1: sta REG_A, y iny - cmp #(REG_R7+1) + cmp #(REG_IFF2+1) bne @1 ; XXX what is the initial SP value? @@ -319,70 +319,6 @@ Z80_instr_CB_3C: ; SRL H Z80_instr_CB_3D: ; SRL L Z80_instr_CB_3E: ; SRL (HL) Z80_instr_CB_3F: ; SRL A -Z80_instr_CB_40: ; BIT 0,B -Z80_instr_CB_41: ; BIT 0,C -Z80_instr_CB_42: ; BIT 0,D -Z80_instr_CB_43: ; BIT 0,E -Z80_instr_CB_44: ; BIT 0,H -Z80_instr_CB_45: ; BIT 0,L -Z80_instr_CB_46: ; BIT 0,(HL) -Z80_instr_CB_47: ; BIT 0,A -Z80_instr_CB_48: ; BIT 1,B -Z80_instr_CB_49: ; BIT 1,C -Z80_instr_CB_4A: ; BIT 1,D -Z80_instr_CB_4B: ; BIT 1,E -Z80_instr_CB_4C: ; BIT 1,H -Z80_instr_CB_4D: ; BIT 1,L -Z80_instr_CB_4E: ; BIT 1,(HL) -Z80_instr_CB_4F: ; BIT 1,A -Z80_instr_CB_50: ; BIT 2,B -Z80_instr_CB_51: ; BIT 2,C -Z80_instr_CB_52: ; BIT 2,D -Z80_instr_CB_53: ; BIT 2,E -Z80_instr_CB_54: ; BIT 2,H -Z80_instr_CB_55: ; BIT 2,L -Z80_instr_CB_56: ; BIT 2,(HL) -Z80_instr_CB_57: ; BIT 2,A -Z80_instr_CB_58: ; BIT 3,B -Z80_instr_CB_59: ; BIT 3,C -Z80_instr_CB_5A: ; BIT 3,D -Z80_instr_CB_5B: ; BIT 3,E -Z80_instr_CB_5C: ; BIT 3,H -Z80_instr_CB_5D: ; BIT 3,L -Z80_instr_CB_5E: ; BIT 3,(HL) -Z80_instr_CB_5F: ; BIT 3,A -Z80_instr_CB_60: ; BIT 4,B -Z80_instr_CB_61: ; BIT 4,C -Z80_instr_CB_62: ; BIT 4,D -Z80_instr_CB_63: ; BIT 4,E -Z80_instr_CB_64: ; BIT 4,H -Z80_instr_CB_65: ; BIT 4,L -Z80_instr_CB_66: ; BIT 4,(HL) -Z80_instr_CB_67: ; BIT 4,A -Z80_instr_CB_68: ; BIT 5,B -Z80_instr_CB_69: ; BIT 5,C -Z80_instr_CB_6A: ; BIT 5,D -Z80_instr_CB_6B: ; BIT 5,E -Z80_instr_CB_6C: ; BIT 5,H -Z80_instr_CB_6D: ; BIT 5,L -Z80_instr_CB_6E: ; BIT 5,(HL) -Z80_instr_CB_6F: ; BIT 5,A -Z80_instr_CB_70: ; BIT 6,B -Z80_instr_CB_71: ; BIT 6,C -Z80_instr_CB_72: ; BIT 6,D -Z80_instr_CB_73: ; BIT 6,E -Z80_instr_CB_74: ; BIT 6,H -Z80_instr_CB_75: ; BIT 6,L -Z80_instr_CB_76: ; BIT 6,(HL) -Z80_instr_CB_77: ; BIT 6,A -Z80_instr_CB_78: ; BIT 7,B -Z80_instr_CB_79: ; BIT 7,C -Z80_instr_CB_7A: ; BIT 7,D -Z80_instr_CB_7B: ; BIT 7,E -Z80_instr_CB_7C: ; BIT 7,H -Z80_instr_CB_7D: ; BIT 7,L -Z80_instr_CB_7E: ; BIT 7,(HL) -Z80_instr_CB_7F: ; BIT 7,A Z80_instr_DD_09: ; ADD IX,BC Z80_instr_DD_19: ; ADD IX,DE Z80_instr_DD_21: ; LD IX,nn @@ -520,14 +456,6 @@ Z80_instr_DDCB_1E: ; RR (IX+d) Z80_instr_DDCB_26: ; SLA (IX+d) Z80_instr_DDCB_2E: ; SRA (IX+d) Z80_instr_DDCB_3E: ; SRL (IX+d) -Z80_instr_DDCB_46: ; BIT 0,(IX+d) -Z80_instr_DDCB_4E: ; BIT 1,(IX+d) -Z80_instr_DDCB_56: ; BIT 2,(IX+d) -Z80_instr_DDCB_5E: ; BIT 3,(IX+d) -Z80_instr_DDCB_66: ; BIT 4,(IX+d) -Z80_instr_DDCB_6E: ; BIT 5,(IX+d) -Z80_instr_DDCB_76: ; BIT 6,(IX+d) -Z80_instr_DDCB_7E: ; BIT 7,(IX+d) Z80_instr_FDCB_06: ; RLC (IY+d) Z80_instr_FDCB_0E: ; RRC (IY+d) Z80_instr_FDCB_16: ; RL (IY+d) @@ -535,14 +463,6 @@ Z80_instr_FDCB_1E: ; RR (IY+d) Z80_instr_FDCB_26: ; SLA (IY+d) Z80_instr_FDCB_2E: ; SRA (IY+d) Z80_instr_FDCB_3E: ; SRL (IY+d) -Z80_instr_FDCB_46: ; BIT 0,(IY+d) -Z80_instr_FDCB_4E: ; BIT 1,(IY+d) -Z80_instr_FDCB_56: ; BIT 2,(IY+d) -Z80_instr_FDCB_5E: ; BIT 3,(IY+d) -Z80_instr_FDCB_66: ; BIT 4,(IY+d) -Z80_instr_FDCB_6E: ; BIT 5,(IY+d) -Z80_instr_FDCB_76: ; BIT 6,(IY+d) -Z80_instr_FDCB_7E: ; BIT 7,(IY+d) rts ; XXX From 6095355bb43ff916dbee202e413469682ea85040 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 18 Dec 2020 18:18:12 +0100 Subject: [PATCH 044/257] bugfix --- src/zvm_m65/z80_instr_bit.s | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/zvm_m65/z80_instr_bit.s b/src/zvm_m65/z80_instr_bit.s index e51cba96..e83b7772 100644 --- a/src/zvm_m65/z80_instr_bit.s +++ b/src/zvm_m65/z80_instr_bit.s @@ -503,7 +503,7 @@ Z80_common_bitXY7_1: and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_ZF - Z80_PF) ora #($00 + Z80_HF + Z80_SF) sta REG_F - lda ADDR_IXY_d + lda ADDR_IXY_d+1 and #(Z80_XF + Z80_YF) ora REG_F sta REG_F @@ -515,7 +515,7 @@ Z80_common_bitXYx_0: and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF) ora #($00 + Z80_HF + Z80_ZF + Z80_PF) sta REG_F - lda ADDR_IXY_d + lda ADDR_IXY_d+1 and #(Z80_XF + Z80_YF) ora REG_F sta REG_F @@ -527,7 +527,7 @@ Z80_common_bitXYx_1: and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF - Z80_ZF - Z80_PF) ora #($00 + Z80_HF) sta REG_F - lda ADDR_IXY_d + lda ADDR_IXY_d+1 and #(Z80_XF + Z80_YF) ora REG_F sta REG_F From 67a1b842f1b9276066c380a184e298f6e959962b Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 18 Dec 2020 19:50:01 +0100 Subject: [PATCH 045/257] fixed 40/80 column screen detection in the monitor --- src/mon_m65/,imports_monitor.s | 1 + src/mon_m65/bsmon.s | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/src/mon_m65/,imports_monitor.s b/src/mon_m65/,imports_monitor.s index 49073c70..78a85e28 100644 --- a/src/mon_m65/,imports_monitor.s +++ b/src/mon_m65/,imports_monitor.s @@ -6,6 +6,7 @@ ;; #ALIAS# SETMSG = KERNAL_0.SETMSG ;; #ALIAS# STOP = KERNAL_0.STOP +;; #ALIAS# SCREEN = KERNAL_0.SCREEN ;; #ALIAS# monitor_exit = KERNAL_0.m65_shadow_BZP diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 3a2cc2e6..b28dd9e9 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -466,6 +466,8 @@ Fetch Mon_Memory ; ******** + JSR Set_MODE_80 + JSR Get_LAC ; get 1st. parameter LDZ #16 ; default row count BCS @row ; no address @@ -564,6 +566,8 @@ Mon_Set_Register Mon_Set_Memory ; ************ + JSR Set_MODE_80 + JSR Get_LAC ; get 1st. parameter BCS @exit JSR LAC_To_LPC ; Long_PC = row address @@ -654,6 +658,8 @@ Dump_4_Chars Dump_Row ; ****** + JSR Set_MODE_80 + PHZ JSR Print_CR LDA #'>' @@ -2805,3 +2811,30 @@ Mon_Help !pet 0 JMP Main + + +; ********* +Set_MODE_80 +; ********* + + ; Not too effective, but allows to retain more original code + + PHP + PHA + PHX + PHY + + JSR SCREEN + CPX #80 + BEQ @1 + LDA #$FF + +skip_2_bytes_trash_nvz +@1 LDA #$00 + STA MODE_80 + + PLY + PLX + PLA + PLP + + RTS From ecc2c99d109ba9dabf8d8704251d8dc2c34c7580 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 18 Dec 2020 22:27:26 +0100 Subject: [PATCH 046/257] added SP storage in monitor --- src/mon_m65/bsmon.s | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index b28dd9e9..b9cfc229 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -55,17 +55,18 @@ !addr Buf_Index = $26 !addr MODE_80 = $27 ; 80 column / 40 volumn flag ; XXX add routine to detect this +!addr SP_Storage = $28 ; location to preserve stack pointer -!addr X_Vector = $28 ; monitor exit vector -!addr Ix_Mne = $29 ; index to mnemonics table -!addr Op_Mne = $2A ; 3 bytes for mnemonic -!addr Op_Ix = $2D ; type of constant -!addr Op_Len = $2E ; length of operand -!addr Disk_Track = $2F ; logical track 1 -> 255 -!addr Disk_Sector = $30 ; logical sector 0 -> 255 -!addr Disk_Status = $31 ; BCD value of status +!addr X_Vector = $29 ; monitor exit vector +!addr Ix_Mne = $2B ; index to mnemonics table +!addr Op_Mne = $2C ; 3 bytes for mnemonic +!addr Op_Ix = $2F ; type of constant +!addr Op_Len = $30 ; length of operand +!addr Disk_Track = $31 ; logical track 1 -> 255 +!addr Disk_Sector = $32 ; logical sector 0 -> 255 +!addr Disk_Status = $33 ; BCD value of status - ; $32-$3F - free space, unused for now + ; $34-$3F - free space, unused for now !addr Disk_Msg = $40 ; 40 bytes, disk status as text message ; XXX rework code to make it not needed !addr Mon_Data = $68 ; 40 bytes, buffer for hunt and filename @@ -132,6 +133,7 @@ Mon_Start STY SPH TSX STX SPL + STX SP_Storage LDA #$c0 JSR SETMSG CLI @@ -227,7 +229,7 @@ Mon_Error JSR PRIMM !pet KEY_ESC, 'o', KEY_CRSR_RIGHT, '?', 0 - LDX #$f8 ; reset stack pointer XXX probably would be better to restore original + LDX SP_Storage ; reset stack pointer TXS BRA Main @@ -1761,7 +1763,7 @@ Read_Number PHY PHZ LDA #0 - STA Dig_Cnt ; count columns read + STA Dig_Cnt ; count columns read STA Long_AC ; clear result Long_AC STA Long_AC+1 STA Long_AC+2 From 29a2f8bb6fc2b32b01c1bf2c87dccc84589e8b77 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 18 Dec 2020 23:51:19 +0100 Subject: [PATCH 047/257] more Z80 instructions, including conditional jumps --- src/zvm_m65/z80_instr_general.s | 20 +++++++++ src/zvm_m65/z80_instr_jump.s | 65 ++++++++++++++++++++++++++++++ src/zvm_m65/z80_instr_math_16bit.s | 61 ++++++++++++++++++++++++++++ src/zvm_m65/zvm_core.s | 38 +++-------------- 4 files changed, 152 insertions(+), 32 deletions(-) diff --git a/src/zvm_m65/z80_instr_general.s b/src/zvm_m65/z80_instr_general.s index 67360ba8..efe1aef0 100644 --- a/src/zvm_m65/z80_instr_general.s +++ b/src/zvm_m65/z80_instr_general.s @@ -14,6 +14,7 @@ Z80_illegal__FDCB: ; FALLTROUGH + ; LD instructions with no effect Z80_instr_40: ; LD B,B Z80_instr_49: ; LD C,C Z80_instr_52: ; LD D,D @@ -21,6 +22,25 @@ Z80_instr_5B: ; LD E,E Z80_instr_64: ; LH H,H Z80_instr_6D: ; LD L,L Z80_instr_7F: ; LD A,A + ; For interrupts (not emulated as of yet) +Z80_instr_ED_46: ; IM 0 +Z80_instr_ED_56: ; IM 1 +Z80_instr_ED_5E: ; IM 2 + ; Real NOP Z80_instr_00: ; NOP rts + +Z80_instr_F3: ; DI + + lda #$00 + +skip_2_bytes_trash_nvz + + ; FALLTROUGH + +Z80_instr_FB: ; EI + + lda #Z80_PF + sta REG_IFF1 + sta REG_IFF2 + rts diff --git a/src/zvm_m65/z80_instr_jump.s b/src/zvm_m65/z80_instr_jump.s index 5adcf53e..fb4aa4a8 100644 --- a/src/zvm_m65/z80_instr_jump.s +++ b/src/zvm_m65/z80_instr_jump.s @@ -2,3 +2,68 @@ ; ; Z80 jump instructions ; + + +Z80_instr_C3: ; JP nn + + jsr (VEC_fetch_value) + sta REG_PC+0 + jsr (VEC_fetch_value) + sta REG_PC+1 + rts + +Z80_instr_C2: ; JP NZ,nn + + bbr6 REG_F,Z80_instr_C3 + inw REG_PC + inw REG_PC + rts + +Z80_instr_CA: ; JP Z,nn + + bbs6 REG_F,Z80_instr_C3 + inw REG_PC + inw REG_PC + rts + +Z80_instr_D2: ; JP NC,nn + + bbr0 REG_F,Z80_instr_C3 + inw REG_PC + inw REG_PC + rts + +Z80_instr_DA: ; JP C,nn + + bbs0 REG_F,Z80_instr_C3 + inw REG_PC + inw REG_PC + rts + +Z80_instr_E2: ; JP PO,nn + + bbr2 REG_F,Z80_instr_C3 + inw REG_PC + inw REG_PC + rts + +Z80_instr_EA: ; JP PE,nn + + bbs2 REG_F,Z80_instr_C3 + inw REG_PC + inw REG_PC + rts + +Z80_instr_F2: ; JP P,nn + + bbr7 REG_F,Z80_instr_C3 + inw REG_PC + inw REG_PC + rts + +Z80_instr_FA: ; JP M,nn + + bbs7 REG_F,Z80_instr_C3 + inw REG_PC + inw REG_PC + rts diff --git a/src/zvm_m65/z80_instr_math_16bit.s b/src/zvm_m65/z80_instr_math_16bit.s index e06286be..cbbcef28 100644 --- a/src/zvm_m65/z80_instr_math_16bit.s +++ b/src/zvm_m65/z80_instr_math_16bit.s @@ -2,3 +2,64 @@ ; ; Z80 arithmetic instructions, 16 bit ; + + +Z80_instr_03: ; INC BC + + inw REG_C + rts + +Z80_instr_13: ; INC DE + + inw REG_E + rts + +Z80_instr_23: ; INC HL + + inw REG_L + rts + +Z80_instr_33: ; INC SP + + inw REG_SP + rts + +Z80_instr_DD_23: ; INC IX + + inw REG_IX + rts + +Z80_instr_FD_23: ; INC IY + + inw REG_IY + rts + +Z80_instr_0B: ; DEC BC + + dew REG_C + rts + +Z80_instr_1B: ; DEC DE + + dew REG_E + rts + +Z80_instr_2B: ; DEC HL + + dew REG_L + rts + +Z80_instr_3B: ; DEC SP + + dew REG_SP + rts + +Z80_instr_DD_2B: ; DEC IX + + dew REG_IX + rts + +Z80_instr_FD_2B: ; DEC IY + + dew REG_IY + rts diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index cdf2831c..1d267c9e 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -98,43 +98,41 @@ ZVM_run: ; Not implemented yet - XXX implement them! ; +Z80_instr_CB: ; #CB +Z80_instr_DD: ; #DD +Z80_instr_ED: ; #ED +Z80_instr_FD: ; #FD +Z80_instr_DD_CB: ; #DDCB +Z80_instr_FD_CB: ; #FDCB Z80_instr_01: ; LD BC,nn Z80_instr_02: ; LD (BC),A -Z80_instr_03: ; INC BC Z80_instr_07: ; RLCA Z80_instr_09: ; ADD HL,BC Z80_instr_0A: ; LD A,(BC) -Z80_instr_0B: ; DEC BC Z80_instr_0F: ; RRCA Z80_instr_10: ; DJNZ e Z80_instr_11: ; LD DE,nn Z80_instr_12: ; LD (DE),A -Z80_instr_13: ; INC DE Z80_instr_17: ; RLA Z80_instr_18: ; JR e Z80_instr_19: ; ADD HL,DE Z80_instr_1A: ; LD A,(DE) -Z80_instr_1B: ; DEC DE Z80_instr_1F: ; RRA Z80_instr_20: ; JR NZ,e Z80_instr_21: ; LD HL,nn Z80_instr_22: ; LD (nn),HL -Z80_instr_23: ; INC HL Z80_instr_27: ; DAA Z80_instr_28: ; JR Z,e Z80_instr_29: ; ADD HL,HL Z80_instr_2A: ; LD HL,(nn) -Z80_instr_2B: ; DEC HL Z80_instr_2F: ; CPL Z80_instr_30: ; JR NC,e Z80_instr_31: ; LD SP,nn Z80_instr_32: ; LD (nn),A -Z80_instr_33: ; INC SP Z80_instr_37: ; SCF Z80_instr_38: ; JR C,e Z80_instr_39: ; ADD HL,SP Z80_instr_3A: ; LD A,(nn) -Z80_instr_3B: ; DEC SP Z80_instr_3F: ; CCF Z80_instr_76: ; HALT Z80_instr_80: ; ADD A,B @@ -203,38 +201,30 @@ Z80_instr_BE: ; CP (HL) Z80_instr_BF: ; CP A Z80_instr_C0: ; RET NZ Z80_instr_C1: ; POP BC -Z80_instr_C2: ; JP NZ,nn -Z80_instr_C3: ; JP nn Z80_instr_C4: ; CALL NZ,nn Z80_instr_C5: ; PUSH BC Z80_instr_C6: ; ADD A,n Z80_instr_C7: ; RST 00H Z80_instr_C8: ; RET z Z80_instr_C9: ; RET -Z80_instr_CA: ; JP Z,nn -Z80_instr_CB: ; #CB Z80_instr_CC: ; CALL Z,nn Z80_instr_CD: ; CALL nn Z80_instr_CE: ; ADC A,n Z80_instr_CF: ; RST 08H Z80_instr_D0: ; RET NC Z80_instr_D1: ; POP DE -Z80_instr_D2: ; JP NC,nn Z80_instr_D3: ; OUT (n), A Z80_instr_D4: ; CALL NC,nn Z80_instr_D5: ; PUSH DE Z80_instr_D6: ; SUB n Z80_instr_D7: ; RST 10H Z80_instr_D8: ; RET C -Z80_instr_DA: ; JP C,nn Z80_instr_DB: ; IN A,(n) Z80_instr_DC: ; CALL C,nn -Z80_instr_DD: ; #DD Z80_instr_DE: ; SBC A,n Z80_instr_DF: ; RST 18H Z80_instr_E0: ; RET PO Z80_instr_E1: ; POP HL -Z80_instr_E2: ; JP PO,nn Z80_instr_E3: ; EX (SP),HL Z80_instr_E4: ; CALL PO,nn Z80_instr_E5: ; PUSH HL @@ -242,25 +232,18 @@ Z80_instr_E6: ; AND n Z80_instr_E7: ; RST 20H Z80_instr_E8: ; RET PE Z80_instr_E9: ; JP (HL) -Z80_instr_EA: ; JP PE,nn Z80_instr_EC: ; CALL PE,nn -Z80_instr_ED: ; #ED Z80_instr_EE: ; XOR n Z80_instr_EF: ; RST 28H Z80_instr_F0: ; RET P Z80_instr_F1: ; POP AF -Z80_instr_F2: ; JP P,nn -Z80_instr_F3: ; DI Z80_instr_F4: ; CALL P,nn Z80_instr_F5: ; PUSH AF Z80_instr_F6: ; OR n Z80_instr_F7: ; RST 30H Z80_instr_F8: ; RET M Z80_instr_F9: ; LD SP,HL -Z80_instr_FA: ; JP M,nn -Z80_instr_FB: ; EI Z80_instr_FC: ; CALL M,nn -Z80_instr_FD: ; #FD Z80_instr_FE: ; CP n Z80_instr_FF: ; RST 38H Z80_instr_CB_00: ; RLC B @@ -323,10 +306,8 @@ Z80_instr_DD_09: ; ADD IX,BC Z80_instr_DD_19: ; ADD IX,DE Z80_instr_DD_21: ; LD IX,nn Z80_instr_DD_22: ; LD (nn),IX -Z80_instr_DD_23: ; DEC IX Z80_instr_DD_29: ; ADD IX,IX Z80_instr_DD_2A: ; LD IX,(nn) -Z80_instr_DD_2B: ; DEC IX Z80_instr_DD_39: ; ADD IX,SP Z80_instr_DD_46: ; LD B,(IX+d) Z80_instr_DD_4E: ; LD C,(IX+d) @@ -350,7 +331,6 @@ Z80_instr_DD_A6: ; AND (IX+d) Z80_instr_DD_AE: ; XOR (IX+d) Z80_instr_DD_B6: ; OR (IX+d) Z80_instr_DD_BE: ; CP (IX+d) -Z80_instr_DD_CB: ; #DDCB Z80_instr_DD_E1: ; POP IX Z80_instr_DD_E3: ; EX (SP),IX Z80_instr_DD_E5: ; PUSH IX @@ -362,7 +342,6 @@ Z80_instr_ED_42: ; SBC HL,BC Z80_instr_ED_43: ; LD (nn),BC Z80_instr_ED_44: ; NEG Z80_instr_ED_45: ; RETN -Z80_instr_ED_46: ; IM 0 Z80_instr_ED_47: ; LD I,A Z80_instr_ED_48: ; IN C,(C) Z80_instr_ED_49: ; OUT (C),C @@ -374,13 +353,11 @@ Z80_instr_ED_50: ; IN D,(C) Z80_instr_ED_51: ; OUT (C),D Z80_instr_ED_52: ; SBC HL,DE Z80_instr_ED_53: ; LD (nn),DE -Z80_instr_ED_56: ; IM 1 Z80_instr_ED_57: ; LD A,I Z80_instr_ED_58: ; IN E,(C) Z80_instr_ED_59: ; OUT (C),E Z80_instr_ED_5A: ; ADC HL,DE Z80_instr_ED_5B: ; LD DE,(nn) -Z80_instr_ED_5E: ; IM 2 Z80_instr_ED_5F: ; LD A,R Z80_instr_ED_60: ; IN H,(C) Z80_instr_ED_61: ; OUT (C),H @@ -416,10 +393,8 @@ Z80_instr_FD_09: ; ADD IY,BC Z80_instr_FD_19: ; ADD IY,DE Z80_instr_FD_21: ; LD IY,nn Z80_instr_FD_22: ; LD (nn),IY -Z80_instr_FD_23: ; INC IY Z80_instr_FD_29: ; ADD IY,IY Z80_instr_FD_2A: ; LD IY,(nn) -Z80_instr_FD_2B: ; DEC IY Z80_instr_FD_39: ; ADD IY,SP Z80_instr_FD_46: ; LD B,(IY+d) Z80_instr_FD_4E: ; LD C,(IY+d) @@ -443,7 +418,6 @@ Z80_instr_FD_A6: ; AND (IY+d) Z80_instr_FD_AE: ; XOR (IY+d) Z80_instr_FD_B6: ; OR (IY+d) Z80_instr_FD_BE: ; CP (IY+d) -Z80_instr_FD_CB: ; #FDCB Z80_instr_FD_E1: ; POP IY Z80_instr_FD_E3: ; EX (SP),IY Z80_instr_FD_E5: ; PUSH IY From 9c10a29448d285627ffa1505b6a3ea12dfff427f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 19 Dec 2020 00:11:58 +0100 Subject: [PATCH 048/257] directory cleanup --- .gitignore | 1 + 3rdparty/ROMs/.keepme | 0 Makefile | 25 ++++++++++++++----------- 3 files changed, 15 insertions(+), 11 deletions(-) create mode 100644 3rdparty/ROMs/.keepme diff --git a/.gitignore b/.gitignore index 58427e72..2975228c 100644 --- a/.gitignore +++ b/.gitignore @@ -11,6 +11,7 @@ build/* /basic /kernal +/3rdparty/ROMs/* # Various IDE project files, temporary files, etc. diff --git a/3rdparty/ROMs/.keepme b/3rdparty/ROMs/.keepme new file mode 100644 index 00000000..e69de29b diff --git a/Makefile b/Makefile index 95e58042..d825cadc 100644 --- a/Makefile +++ b/Makefile @@ -92,6 +92,9 @@ CRT_BIN_LIST = assets/cartridge/header-cart.bin \ assets/cartridge/header-seg2.bin \ assets/cartridge/header-seg3.bin +ROM_CBM_BASIC = 3rdparty/ROMs/basic +ROM_CBM_KERNAL = 3rdparty/ROMs/kernal + # Generated files GEN_BASIC = build/,generated/,float_constants.s @@ -260,15 +263,15 @@ updatebin: # Rules - external blobs -kernal: +$(ROM_CBM_KERNAL): @echo - @echo Please copy \'kernal\' file from the original ROM set to the \'open-roms\' directory + @echo Please copy \'kernal\' file from the original ROM set to the \'3rdparty/ROMs\' directory @echo @exit 1 -basic: +$(ROM_CBM_BASIC): @echo - @echo Please copy \'basic\' file from the original ROM set to the \'open-roms\' directory + @echo Please copy \'basic\' file from the original ROM set to the \'3rdparty/ROMs\' directory @echo @exit 1 @@ -653,13 +656,13 @@ build/symbols_generic_crt.vs: build/symbols_ultimate64_crt.vs: @sort $(DIR_U64CRT)/BASIC_0_combined.vs $(DIR_U64CRT)/KERNAL_0_combined.vs | uniq | grep -v "__" > $@ -build/kernal_hybrid.rom: kernal $(DIR_GEN)/OUTK_x.BIN +build/kernal_hybrid.rom: $(ROM_CBM_KERNAL) $(DIR_GEN)/OUTK_x.BIN @echo @echo $(HYBRID_WARNING) @echo - (dd if=kernal bs=1140 count=1 skip=0 ; \ - echo " > HYBRID ROM, DON'T DISTRIBUTE <" ; \ - dd if=kernal bs=1 count=58 skip=1176 ; \ + (dd if=$(ROM_CBM_KERNAL) bs=1140 count=1 skip=0 ; \ + echo " > HYBRID ROM, DON'T DISTRIBUTE <" ; \ + dd if=$(ROM_CBM_KERNAL) bs=1 count=58 skip=1176 ; \ cat $(DIR_GEN)/OUTK_x.BIN) > $@ build/symbols_hybrid.vs: $(DIR_GEN)/KERNAL_combined.vs @@ -858,6 +861,6 @@ test_m65: build/mega65.rom testremote: build/kernal_custom.rom build/basic_custom.rom $(TARGET_CHR_PXL) build/symbols_custom.vs x64 -kernal build/kernal_custom.rom -basic build/basic_custom.rom -chargen $(TARGET_CHR_PXL) -moncommands build/symbols_custom.vs -remotemonitor -testsimilarity: $(TOOL_SIMILARITY) $(DIR_GEN)/OUTx_x.BIN kernal basic - $(TOOL_SIMILARITY) kernal $(DIR_GEN)/OUTx_x.BIN - $(TOOL_SIMILARITY) basic $(DIR_GEN)/OUTx_x.BIN +testsimilarity: $(TOOL_SIMILARITY) $(DIR_GEN)/OUTx_x.BIN $(ROM_CBM_KERNAL) $(ROM_CBM_BASIC) + $(TOOL_SIMILARITY) $(ROM_CBM_KERNAL) $(DIR_GEN)/OUTx_x.BIN + $(TOOL_SIMILARITY) $(ROM_CBM_BASIC) $(DIR_GEN)/OUTx_x.BIN From ed25e2d250e952c6da72ace2ef5dea2b8cb6c409 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 19 Dec 2020 22:24:23 +0100 Subject: [PATCH 049/257] Z*) speed optimizations --- src/zvm_m65/,aliases_zvm.s | 4 +- src/zvm_m65/z80_instr_bit.s | 356 ++++++++++++++--------------- src/zvm_m65/z80_instr_exchange.s | 6 +- src/zvm_m65/z80_instr_general.s | 4 +- src/zvm_m65/z80_instr_jump.s | 18 +- src/zvm_m65/z80_instr_load_8bit.s | 110 ++++----- src/zvm_m65/z80_instr_math_16bit.s | 24 +- src/zvm_m65/z80_instr_math_8bit.s | 16 +- src/zvm_m65/zvm_banking.s | 66 +++++- src/zvm_m65/zvm_core.s | 21 +- 10 files changed, 337 insertions(+), 288 deletions(-) diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index f448259d..b7cd7ec5 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -26,7 +26,9 @@ !addr REG_R06 = $1B ; refresh counter, bits 0-6 (bit 7 is garbage) !addr REG_R7 = $1C ; refresh counter, bit 7 (bits 0-6 are 0's) -!addr ADDR_IXY_d = $1D ; 16-bit calculated address IX+d / IY+d XXX - important!!! +!addr PTR_IXY_d = $1D ; 16-bit calculated address IX+d / IY+d XXX - important!!! +!addr PTR_DATA = $1D ; data source address XXX is it OK to use the same one? + !addr REG_IFF1 = $1F ; interrupt flip-flop flag 1 !addr REG_IFF2 = $20 ; interrupt flip-flop flag 2 diff --git a/src/zvm_m65/z80_instr_bit.s b/src/zvm_m65/z80_instr_bit.s index e83b7772..6d381255 100644 --- a/src/zvm_m65/z80_instr_bit.s +++ b/src/zvm_m65/z80_instr_bit.s @@ -118,7 +118,7 @@ Z80_common_bitx_0: and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF) ora #($00 + Z80_HF + Z80_ZF + Z80_PF) sta REG_F - rts + jmp ZVM_next Z80_common_bitx_1: @@ -126,7 +126,7 @@ Z80_common_bitx_1: and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF - Z80_ZF - Z80_PF) ora #($00 + Z80_HF) sta REG_F - rts + jmp ZVM_next Z80_instr_CB_60: ; BIT 4,B @@ -242,7 +242,7 @@ Z80_common_bit3_0: and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF) ora #($00 + Z80_HF + Z80_ZF + Z80_PF) sta REG_F - rts + jmp ZVM_next Z80_common_bit3_1: @@ -250,7 +250,7 @@ Z80_common_bit3_1: and #($FF - Z80_NF - Z80_YF - Z80_SF - Z80_ZF - Z80_PF) ora #($00 + Z80_HF + Z80_XF) sta REG_F - rts + jmp ZVM_next Z80_instr_CB_68: ; BIT 5,B @@ -295,7 +295,7 @@ Z80_common_bit5_0: and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF) ora #($00 + Z80_HF + Z80_ZF + Z80_PF) sta REG_F - rts + jmp ZVM_next Z80_common_bit5_1: @@ -303,7 +303,7 @@ Z80_common_bit5_1: and #($FF - Z80_NF - Z80_XF - Z80_SF - Z80_ZF - Z80_PF) ora #($00 + Z80_HF + Z80_YF) sta REG_F - rts + jmp ZVM_next Z80_instr_CB_78: ; BIT 7,B @@ -347,7 +347,7 @@ Z80_common_bit7_0: and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF) ora #($00 + Z80_HF + Z80_ZF + Z80_PF) sta REG_F - rts + jmp ZVM_next Z80_common_bit7_1: @@ -355,7 +355,7 @@ Z80_common_bit7_1: and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_ZF - Z80_PF) ora #($00 + Z80_HF + Z80_SF) sta REG_F - rts + jmp ZVM_next ; bits taken from (HL) @@ -418,7 +418,7 @@ Z80_instr_CB_7E: ; BIT 7,(HL) and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_ZF - Z80_PF) ora #($00 + Z80_HF + Z80_SF) sta REG_F - rts + jmp ZVM_next Z80_common_bitHL_0: @@ -427,7 +427,7 @@ Z80_common_bitHL_0: and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF) ora #($00 + Z80_HF + Z80_ZF + Z80_PF) sta REG_F - rts + jmp ZVM_next Z80_common_bitHL_1: @@ -436,7 +436,7 @@ Z80_common_bitHL_1: and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF - Z80_ZF - Z80_PF) ora #($00 + Z80_HF) sta REG_F - rts + jmp ZVM_next ; bits taken from index register + displacement @@ -503,11 +503,11 @@ Z80_common_bitXY7_1: and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_ZF - Z80_PF) ora #($00 + Z80_HF + Z80_SF) sta REG_F - lda ADDR_IXY_d+1 + lda PTR_IXY_d+1 and #(Z80_XF + Z80_YF) ora REG_F sta REG_F - rts + jmp ZVM_next Z80_common_bitXYx_0: @@ -515,11 +515,11 @@ Z80_common_bitXYx_0: and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF) ora #($00 + Z80_HF + Z80_ZF + Z80_PF) sta REG_F - lda ADDR_IXY_d+1 + lda PTR_IXY_d+1 and #(Z80_XF + Z80_YF) ora REG_F sta REG_F - rts + jmp ZVM_next Z80_common_bitXYx_1: @@ -527,11 +527,11 @@ Z80_common_bitXYx_1: and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF - Z80_ZF - Z80_PF) ora #($00 + Z80_HF) sta REG_F - lda ADDR_IXY_d+1 + lda PTR_IXY_d+1 and #(Z80_XF + Z80_YF) ora REG_F sta REG_F - rts + jmp ZVM_next Z80_instr_FDCB_46: ; BIT 0,(IY+d) @@ -586,7 +586,7 @@ Z80_instr_FDCB_7E: ; BIT 7,(IY+d) jsr (VEC_fetch_via_IY_d) and #%10000000 - bne Z80_common_bitXY7_1 + +bne Z80_common_bitXY7_1 ; too far away for normal BNE bra Z80_common_bitXYx_0 ; SET, RES @@ -596,1069 +596,1069 @@ Z80_instr_CB_C0: ; SET 0,B lda REG_B ora #%00000001 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_C1: ; SET 0,C lda REG_C ora #%00000001 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_C2: ; SET 0,D lda REG_D ora #%00000001 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_C3: ; SET 0,E lda REG_E ora #%00000001 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_C4: ; SET 0,H lda REG_H ora #%00000001 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_C5: ; SET 0,L lda REG_L ora #%00000001 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_C7: ; SET 0,A lda REG_A ora #%00000001 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_C8: ; SET 1,B lda REG_B ora #%00000010 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_C9: ; SET 1, lda REG_C ora #%00000010 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_CA: ; SET 1,D lda REG_D ora #%00000010 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_CB: ; SET 1,E lda REG_E ora #%00000010 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_CC: ; SET 1,H lda REG_H ora #%00000010 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_CD: ; SET 1,L lda REG_L ora #%00000010 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_CF: ; SET 1,A lda REG_A ora #%00000010 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_D0: ; SET 2,B lda REG_B ora #%00000100 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_D1: ; SET 2,C lda REG_C ora #%00000100 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_D2: ; SET 2,D lda REG_D ora #%00000100 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_D3: ; SET 2,E lda REG_E ora #%00000100 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_D4: ; SET 2,H lda REG_H ora #%00000100 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_D5: ; SET 2,L lda REG_L ora #%00000100 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_D7: ; SET 2,A lda REG_A ora #%00000100 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_D8: ; SET 3,B lda REG_B ora #%00001000 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_D9: ; SET 3,C lda REG_C ora #%00001000 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_DA: ; SET 3,D lda REG_D ora #%00001000 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_DB: ; SET 3,E lda REG_E ora #%00001000 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_DC: ; SET 3,H lda REG_H ora #%00001000 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_DD: ; SET 3,L lda REG_L ora #%00001000 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_DF: ; SET 3,A lda REG_A ora #%00001000 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_E0: ; SET 4,B lda REG_B ora #%00010000 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_E1: ; SET 4,C lda REG_C ora #%00010000 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_E2: ; SET 4,D lda REG_D ora #%00010000 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_E3: ; SET 4,E lda REG_E ora #%00010000 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_E4: ; SET 4,H lda REG_H ora #%00010000 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_E5: ; SET 4,L lda REG_L ora #%00010000 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_E7: ; SET 4,A lda REG_A ora #%00010000 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_E8: ; SET 5,B lda REG_B ora #%00100000 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_E9: ; SET 5,C lda REG_C ora #%00100000 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_EA: ; SET 5,D lda REG_D ora #%00100000 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_EB: ; SET 5,E lda REG_E ora #%00100000 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_EC: ; SET 5,H lda REG_H ora #%00100000 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_ED: ; SET 5,L lda REG_L ora #%00100000 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_EF: ; SET 5,A lda REG_A ora #%00100000 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_F0: ; SET 6,B lda REG_B ora #%01000000 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_F1: ; SET 6,C lda REG_C ora #%01000000 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_F2: ; SET 6,D lda REG_D ora #%01000000 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_F3: ; SET 6,E lda REG_E ora #%01000000 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_F4: ; SET 6,H lda REG_H ora #%01000000 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_F5: ; SET 6,L lda REG_L ora #%01000000 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_F7: ; SET 6,A lda REG_A ora #%01000000 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_F8: ; SET 7,B lda REG_B ora #%10000000 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_F9: ; SET 7,C lda REG_C ora #%10000000 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_FA: ; SET 7,D lda REG_D ora #%10000000 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_FB: ; SET 7,E lda REG_E ora #%10000000 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_FC: ; SET 7,H lda REG_H ora #%10000000 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_FD: ; SET 7,L lda REG_L ora #%10000000 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_FF: ; SET 7,A lda REG_A ora #%10000000 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_C6: ; SET 0,(HL) jsr (VEC_fetch_via_HL) ora #%00000001 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_CE: ; SET 1,(HL) jsr (VEC_fetch_via_HL) ora #%00000010 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_D6: ; SET 2,(HL) jsr (VEC_fetch_via_HL) ora #%00000100 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_DE: ; SET 3,(HL) jsr (VEC_fetch_via_HL) ora #%00001000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_E6: ; SET 4,(HL) jsr (VEC_fetch_via_HL) ora #%00010000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_EE: ; SET 5,(HL) jsr (VEC_fetch_via_HL) ora #%00100000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_F6: ; SET 6,(HL) jsr (VEC_fetch_via_HL) ora #%01000000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_FE: ; SET 7,(HL) jsr (VEC_fetch_via_HL) ora #%10000000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_C6: ; SET 0,(IX+d) jsr (VEC_fetch_via_IX_d) ora #%00000001 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_CE: ; SET 1,(IX+d) jsr (VEC_fetch_via_IX_d) ora #%00000010 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_D6: ; SET 2,(IX+d) jsr (VEC_fetch_via_IX_d) ora #%00000100 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_DE: ; SET 3,(IX+d) jsr (VEC_fetch_via_IX_d) ora #%00001000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_E6: ; SET 4,(IX+d) jsr (VEC_fetch_via_IX_d) ora #%00010000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_EE: ; SET 5,(IX+d) jsr (VEC_fetch_via_IX_d) ora #%00100000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_F6: ; SET 6,(IX+d) jsr (VEC_fetch_via_IX_d) ora #%01000000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_FE: ; SET 7,(IX+d) jsr (VEC_fetch_via_IX_d) ora #%10000000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_C6: ; SET 0,(IY+d) jsr (VEC_fetch_via_IY_d) ora #%00000001 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_CE: ; SET 1,(IY+d) jsr (VEC_fetch_via_IY_d) ora #%00000010 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_D6: ; SET 2,(IY+d) jsr (VEC_fetch_via_IY_d) ora #%00000100 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_DE: ; SET 3,(IY+d) jsr (VEC_fetch_via_IY_d) ora #%00001000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_E6: ; SET 4,(IY+d) jsr (VEC_fetch_via_IY_d) ora #%00010000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_EE: ; SET 5,(IY+d) jsr (VEC_fetch_via_IY_d) ora #%00100000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_F6: ; SET 6,(IY+d) jsr (VEC_fetch_via_IY_d) ora #%01000000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_FE: ; SET 7,(IY+d) jsr (VEC_fetch_via_IY_d) ora #%10000000 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_80: ; RES 0,B lda REG_B and #%11111110 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_81: ; RES 0,C lda REG_C and #%11111110 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_82: ; RES 0,D lda REG_D and #%11111110 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_83: ; RES 0,E lda REG_E and #%11111110 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_84: ; RES 0,H lda REG_H and #%11111110 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_85: ; RES 0,L lda REG_L and #%11111110 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_87: ; RES 0,A lda REG_A and #%11111110 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_88: ; RES 1,B lda REG_B and #%11111101 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_89: ; RES 1,C lda REG_C and #%11111101 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_8A: ; RES 1,D lda REG_D and #%11111101 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_8B: ; RES 1,E lda REG_E and #%11111101 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_8C: ; RES 1,H lda REG_H and #%11111101 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_8D: ; RES 1,L lda REG_L and #%11111101 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_8F: ; RES 1,A lda REG_A and #%11111101 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_90: ; RES 2,B lda REG_B and #%11111011 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_91: ; RES 2,C lda REG_C and #%11111011 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_92: ; RES 2,D lda REG_D and #%11111011 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_93: ; RES 2,E lda REG_E and #%11111011 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_94: ; RES 2,H lda REG_H and #%11111011 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_95: ; RES 2,L lda REG_L and #%11111011 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_97: ; RES 2,A lda REG_A and #%11111011 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_98: ; RES 3,B lda REG_B and #%11110111 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_99: ; RES 3,C lda REG_C and #%11110111 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_9A: ; RES 3,D lda REG_D and #%11110111 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_9B: ; RES 3,E lda REG_E and #%11110111 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_9C: ; RES 3,H lda REG_H and #%11110111 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_9D: ; RES 3,L lda REG_L and #%11110111 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_9F: ; RES 3,A lda REG_A and #%11110111 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_A0: ; RES 4,B lda REG_B and #%11101111 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_A1: ; RES 4,C lda REG_C and #%11101111 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_A2: ; RES 4,D lda REG_D and #%11101111 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_A3: ; RES 4,E lda REG_E and #%11101111 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_A4: ; RES 4,H lda REG_H and #%11101111 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_A5: ; RES 4,L lda REG_L and #%11101111 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_A7: ; RES 4,A lda REG_A and #%11101111 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_A8: ; RES 5,B lda REG_B and #%11011111 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_A9: ; RES 5,C lda REG_C and #%11011111 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_AA: ; RES 5,D lda REG_D and #%11011111 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_AB: ; RES 5,E lda REG_E and #%11011111 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_AC: ; RES 5,H lda REG_H and #%11011111 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_AD: ; RES 5,L lda REG_L and #%11011111 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_AF: ; RES 5,A lda REG_A and #%11011111 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_B0: ; RES 6,B lda REG_B and #%10111111 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_B1: ; RES 6,C lda REG_C and #%10111111 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_B2: ; RES 6,D lda REG_D and #%10111111 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_B3: ; RES 6,E lda REG_E and #%10111111 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_B4: ; RES 6,H lda REG_H and #%10111111 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_B5: ; RES 6,L lda REG_L and #%10111111 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_B7: ; RES 6,A lda REG_A and #%10111111 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_B8: ; RES 7,B lda REG_B and #%01111111 sta REG_B - rts + jmp ZVM_next Z80_instr_CB_B9: ; RES 7,C lda REG_C and #%01111111 sta REG_C - rts + jmp ZVM_next Z80_instr_CB_BA: ; RES 7,D lda REG_D and #%01111111 sta REG_D - rts + jmp ZVM_next Z80_instr_CB_BB: ; RES 7,E lda REG_E and #%01111111 sta REG_E - rts + jmp ZVM_next Z80_instr_CB_BC: ; RES 7,H lda REG_H and #%01111111 sta REG_H - rts + jmp ZVM_next Z80_instr_CB_BD: ; RES 7,L lda REG_L and #%01111111 sta REG_L - rts + jmp ZVM_next Z80_instr_CB_BF: ; RES 7,A lda REG_A and #%01111111 sta REG_A - rts + jmp ZVM_next Z80_instr_CB_86: ; RES 0,(HL) jsr (VEC_fetch_via_HL) and #%11111110 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_8E: ; RES 1,(HL) jsr (VEC_fetch_via_HL) and #%11111101 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_96: ; RES 2,(HL) jsr (VEC_fetch_via_HL) and #%11111011 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_9E: ; RES 3,(HL) jsr (VEC_fetch_via_HL) and #%11110111 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_A6: ; RES 4,(HL) jsr (VEC_fetch_via_HL) and #%11101111 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_AE: ; RES 5,(HL) jsr (VEC_fetch_via_HL) and #%11011111 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_B6: ; RES 6,(HL) jsr (VEC_fetch_via_HL) and #%10111111 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_CB_BE: ; RES 7,(HL) jsr (VEC_fetch_via_HL) and #%01111111 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_86: ; RES 0,(IX+d) jsr (VEC_fetch_via_IX_d) and #%11111110 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_8E: ; RES 1,(IX+d) jsr (VEC_fetch_via_IX_d) and #%11111101 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_96: ; RES 2,(IX+d) jsr (VEC_fetch_via_IX_d) and #%11111011 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_9E: ; RES 3,(IX+d) jsr (VEC_fetch_via_IX_d) and #%11110111 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_A6: ; RES 4,(IX+d) jsr (VEC_fetch_via_IX_d) and #%11101111 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_AE: ; RES 5,(IX+d) jsr (VEC_fetch_via_IX_d) and #%11011111 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_B6: ; RES 6,(IX+d) jsr (VEC_fetch_via_IX_d) and #%10111111 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_DDCB_BE: ; RES 7,(IX+d) jsr (VEC_fetch_via_IX_d) and #%01111111 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_86: ; RES 0,(IY+d) jsr (VEC_fetch_via_IY_d) and #%11111110 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_8E: ; RES 1,(IY+d) jsr (VEC_fetch_via_IY_d) and #%11111101 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_96: ; RES 2,(IY+d) jsr (VEC_fetch_via_IY_d) and #%11111011 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_9E: ; RES 3,(IY+d) jsr (VEC_fetch_via_IY_d) and #%11110111 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_A6: ; RES 4,(IY+d) jsr (VEC_fetch_via_IY_d) and #%11101111 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_AE: ; RES 5,(IY+d) jsr (VEC_fetch_via_IY_d) and #%11011111 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_B6: ; RES 6,(IY+d) jsr (VEC_fetch_via_IY_d) and #%10111111 - jmp ZVM_store_back + jmp ZVM_store_next Z80_instr_FDCB_BE: ; RES 7,(IY+d) jsr (VEC_fetch_via_IY_d) and #%01111111 - jmp ZVM_store_back + jmp ZVM_store_next diff --git a/src/zvm_m65/z80_instr_exchange.s b/src/zvm_m65/z80_instr_exchange.s index 89ab60e3..ac3b149f 100644 --- a/src/zvm_m65/z80_instr_exchange.s +++ b/src/zvm_m65/z80_instr_exchange.s @@ -16,7 +16,7 @@ Z80_instr_EB: ; EX DE,HL sty REG_E stx REG_L - rts + jmp ZVM_next Z80_instr_08: ; EX AF,AF'' @@ -30,7 +30,7 @@ Z80_instr_08: ; EX AF,AF'' sty REG_F stx REG_F_SH - rts + jmp ZVM_next Z80_instr_D9: ; EXX @@ -64,4 +64,4 @@ Z80_instr_D9: ; EXX sty REG_L stx REG_L_SH - rts + jmp ZVM_next diff --git a/src/zvm_m65/z80_instr_general.s b/src/zvm_m65/z80_instr_general.s index efe1aef0..c9d90897 100644 --- a/src/zvm_m65/z80_instr_general.s +++ b/src/zvm_m65/z80_instr_general.s @@ -29,7 +29,7 @@ Z80_instr_ED_5E: ; IM 2 ; Real NOP Z80_instr_00: ; NOP - rts + jmp ZVM_next Z80_instr_F3: ; DI @@ -43,4 +43,4 @@ Z80_instr_FB: ; EI lda #Z80_PF sta REG_IFF1 sta REG_IFF2 - rts + jmp ZVM_next diff --git a/src/zvm_m65/z80_instr_jump.s b/src/zvm_m65/z80_instr_jump.s index fb4aa4a8..b4a8766e 100644 --- a/src/zvm_m65/z80_instr_jump.s +++ b/src/zvm_m65/z80_instr_jump.s @@ -10,60 +10,60 @@ Z80_instr_C3: ; JP nn sta REG_PC+0 jsr (VEC_fetch_value) sta REG_PC+1 - rts + jmp ZVM_next Z80_instr_C2: ; JP NZ,nn bbr6 REG_F,Z80_instr_C3 inw REG_PC inw REG_PC - rts + jmp ZVM_next Z80_instr_CA: ; JP Z,nn bbs6 REG_F,Z80_instr_C3 inw REG_PC inw REG_PC - rts + jmp ZVM_next Z80_instr_D2: ; JP NC,nn bbr0 REG_F,Z80_instr_C3 inw REG_PC inw REG_PC - rts + jmp ZVM_next Z80_instr_DA: ; JP C,nn bbs0 REG_F,Z80_instr_C3 inw REG_PC inw REG_PC - rts + jmp ZVM_next Z80_instr_E2: ; JP PO,nn bbr2 REG_F,Z80_instr_C3 inw REG_PC inw REG_PC - rts + jmp ZVM_next Z80_instr_EA: ; JP PE,nn bbs2 REG_F,Z80_instr_C3 inw REG_PC inw REG_PC - rts + jmp ZVM_next Z80_instr_F2: ; JP P,nn bbr7 REG_F,Z80_instr_C3 inw REG_PC inw REG_PC - rts + jmp ZVM_next Z80_instr_FA: ; JP M,nn bbs7 REG_F,Z80_instr_C3 inw REG_PC inw REG_PC - rts + jmp ZVM_next diff --git a/src/zvm_m65/z80_instr_load_8bit.s b/src/zvm_m65/z80_instr_load_8bit.s index 67945b99..a6a46e13 100644 --- a/src/zvm_m65/z80_instr_load_8bit.s +++ b/src/zvm_m65/z80_instr_load_8bit.s @@ -12,175 +12,175 @@ Z80_instr_41: ; LD B,C lda REG_C sta REG_B - rts + jmp ZVM_next Z80_instr_42: ; LD B,D lda REG_D sta REG_B - rts + jmp ZVM_next Z80_instr_43: ; LD B,E lda REG_E sta REG_B - rts + jmp ZVM_next Z80_instr_44: ; LD B,H lda REG_H sta REG_B - rts + jmp ZVM_next Z80_instr_45: ; LD B,L lda REG_L sta REG_B - rts + jmp ZVM_next Z80_instr_47: ; LD B,A lda REG_A sta REG_B - rts + jmp ZVM_next Z80_instr_48: ; LD C,B lda REG_B sta REG_C - rts + jmp ZVM_next Z80_instr_4A: ; LD C,D lda REG_D sta REG_C - rts + jmp ZVM_next Z80_instr_4B: ; LD C,E lda REG_E sta REG_C - rts + jmp ZVM_next Z80_instr_4C: ; LD C,H lda REG_H sta REG_C - rts + jmp ZVM_next Z80_instr_4D: ; LD C,L lda REG_L sta REG_C - rts + jmp ZVM_next Z80_instr_4F: ; LD C,A lda REG_A sta REG_C - rts + jmp ZVM_next Z80_instr_50: ; LD D,B lda REG_B sta REG_D - rts + jmp ZVM_next Z80_instr_51: ; LD D,C lda REG_C sta REG_D - rts + jmp ZVM_next Z80_instr_53: ; LD D,E lda REG_E sta REG_D - rts + jmp ZVM_next Z80_instr_54: ; LD D,H lda REG_H sta REG_D - rts + jmp ZVM_next Z80_instr_55: ; LD D,L lda REG_L sta REG_D - rts + jmp ZVM_next Z80_instr_57: ; LD D,A lda REG_A sta REG_D - rts + jmp ZVM_next Z80_instr_58: ; LD E,B lda REG_B sta REG_E - rts + jmp ZVM_next Z80_instr_59: ; LD E,C lda REG_C sta REG_E - rts + jmp ZVM_next Z80_instr_5A: ; LD E,D lda REG_D sta REG_E - rts + jmp ZVM_next Z80_instr_5C: ; LD E,H lda REG_H sta REG_E - rts + jmp ZVM_next Z80_instr_5D: ; LD E,L lda REG_L sta REG_E - rts + jmp ZVM_next Z80_instr_5F: ; LD E,A lda REG_A sta REG_E - rts + jmp ZVM_next Z80_instr_60: ; LD H,B lda REG_B sta REG_H - rts + jmp ZVM_next Z80_instr_61: ; LD H,C lda REG_C sta REG_H - rts + jmp ZVM_next Z80_instr_62: ; LD H,D lda REG_D sta REG_H - rts + jmp ZVM_next Z80_instr_63: ; LD H,E lda REG_E sta REG_H - rts + jmp ZVM_next Z80_instr_65: ; LD H,L lda REG_L sta REG_H - rts + jmp ZVM_next Z80_instr_67: ; LD H,A @@ -192,73 +192,73 @@ Z80_instr_68: ; LD L,B lda REG_B sta REG_L - rts + jmp ZVM_next Z80_instr_69: ; LD L,C lda REG_C sta REG_L - rts + jmp ZVM_next Z80_instr_6A: ; LD L,D lda REG_D sta REG_L - rts + jmp ZVM_next Z80_instr_6B: ; LD L,E lda REG_E sta REG_L - rts + jmp ZVM_next Z80_instr_6C: ; LD L,H lda REG_H sta REG_L - rts + jmp ZVM_next Z80_instr_6F: ; LD L,A lda REG_A sta REG_L - rts + jmp ZVM_next Z80_instr_78: ; LD A,B lda REG_B sta REG_A - rts + jmp ZVM_next Z80_instr_79: ; LD A,C lda REG_C sta REG_A - rts + jmp ZVM_next Z80_instr_7A: ; LD A,D lda REG_D sta REG_A - rts + jmp ZVM_next Z80_instr_7B: ; LD A,E lda REG_E sta REG_A - rts + jmp ZVM_next Z80_instr_7C: ; LD A,H lda REG_H sta REG_A - rts + jmp ZVM_next Z80_instr_7D: ; LD A,L lda REG_L sta REG_A - rts + jmp ZVM_next ; ; load register with immediate value @@ -268,43 +268,43 @@ Z80_instr_06: ; LD B,n jsr (VEC_fetch_value) sta REG_B - rts + jmp ZVM_next Z80_instr_0E: ; LD C,n jsr (VEC_fetch_value) sta REG_C - rts + jmp ZVM_next Z80_instr_16: ; LD D,n jsr (VEC_fetch_value) sta REG_D - rts + jmp ZVM_next Z80_instr_1E: ; LD E,n jsr (VEC_fetch_value) sta REG_E - rts + jmp ZVM_next Z80_instr_26: ; LD H,n jsr (VEC_fetch_value) sta REG_H - rts + jmp ZVM_next Z80_instr_2E: ; LD L,n jsr (VEC_fetch_value) sta REG_L - rts + jmp ZVM_next Z80_instr_3E: ; LD A,n jsr (VEC_fetch_value) sta REG_A - rts + jmp ZVM_next ; ; load register with memory content (via HL) @@ -314,43 +314,43 @@ Z80_instr_46: ; LD B,(HL) jsr (VEC_fetch_via_HL) sta REG_B - rts + jmp ZVM_next Z80_instr_4E: ; LD C,(HL) jsr (VEC_fetch_via_HL) sta REG_C - rts + jmp ZVM_next Z80_instr_56: ; LD D,(HL) jsr (VEC_fetch_via_HL) sta REG_D - rts + jmp ZVM_next Z80_instr_5E: ; LD E,(HL) jsr (VEC_fetch_via_HL) sta REG_E - rts + jmp ZVM_next Z80_instr_66: ; LD H,(HL) jsr (VEC_fetch_via_HL) sta REG_H - rts + jmp ZVM_next Z80_instr_6E: ; LD L,(HL) jsr (VEC_fetch_via_HL) sta REG_L - rts + jmp ZVM_next Z80_instr_7E: ; LD A,(HL) jsr (VEC_fetch_via_HL) sta REG_A - rts + jmp ZVM_next ; XXX put here LD r,(IX+d) family ; XXX put here LD r,(IY+d) family diff --git a/src/zvm_m65/z80_instr_math_16bit.s b/src/zvm_m65/z80_instr_math_16bit.s index cbbcef28..3cef4337 100644 --- a/src/zvm_m65/z80_instr_math_16bit.s +++ b/src/zvm_m65/z80_instr_math_16bit.s @@ -7,59 +7,59 @@ Z80_instr_03: ; INC BC inw REG_C - rts + jmp ZVM_next Z80_instr_13: ; INC DE inw REG_E - rts + jmp ZVM_next Z80_instr_23: ; INC HL inw REG_L - rts + jmp ZVM_next Z80_instr_33: ; INC SP inw REG_SP - rts + jmp ZVM_next Z80_instr_DD_23: ; INC IX inw REG_IX - rts + jmp ZVM_next Z80_instr_FD_23: ; INC IY inw REG_IY - rts + jmp ZVM_next Z80_instr_0B: ; DEC BC dew REG_C - rts + jmp ZVM_next Z80_instr_1B: ; DEC DE dew REG_E - rts + jmp ZVM_next Z80_instr_2B: ; DEC HL dew REG_L - rts + jmp ZVM_next Z80_instr_3B: ; DEC SP dew REG_SP - rts + jmp ZVM_next Z80_instr_DD_2B: ; DEC IX dew REG_IX - rts + jmp ZVM_next Z80_instr_FD_2B: ; DEC IY dew REG_IY - rts + jmp ZVM_next diff --git a/src/zvm_m65/z80_instr_math_8bit.s b/src/zvm_m65/z80_instr_math_8bit.s index 0be65960..87849057 100644 --- a/src/zvm_m65/z80_instr_math_8bit.s +++ b/src/zvm_m65/z80_instr_math_8bit.s @@ -60,14 +60,14 @@ Z80_common_INC: and #(0xFF - Z80_SF - Z80_ZF - Z80_HF - Z80_VF - Z80_NF) ora z80_ftable_INC, x sta REG_F - rts + jmp ZVM_next Z80_instr_34: ; INC (HL) jsr (VEC_fetch_via_HL) tax inc - jsr ZVM_store_back + sta [PTR_DATA],z bra Z80_common_INC Z80_instr_DD_34: ; INC (IX+d) @@ -75,7 +75,7 @@ Z80_instr_DD_34: ; INC (IX+d) jsr (VEC_fetch_via_IX_d) tax inc - jsr ZVM_store_back + sta [PTR_DATA],z bra Z80_common_INC Z80_instr_FD_34: ; INC (IY+d) @@ -83,7 +83,7 @@ Z80_instr_FD_34: ; INC (IY+d) jsr (VEC_fetch_via_IY_d) tax inc - jsr ZVM_store_back + sta [PTR_DATA],z bra Z80_common_INC Z80_instr_05: ; DEC B @@ -135,14 +135,14 @@ Z80_common_DEC: and #(0xFF - Z80_SF - Z80_ZF - Z80_HF - Z80_VF - Z80_NF) ora z80_ftable_DEC, x sta REG_F - rts + jmp ZVM_next Z80_instr_35: ; DEC (HL) jsr (VEC_fetch_via_HL) tax dec - jsr ZVM_store_back + sta [PTR_DATA],z bra Z80_common_DEC Z80_instr_DD_35: ; DEC (IX+d) @@ -150,7 +150,7 @@ Z80_instr_DD_35: ; DEC (IX+d) jsr (VEC_fetch_via_IX_d) tax dec - jsr ZVM_store_back + sta [PTR_DATA],z bra Z80_common_DEC Z80_instr_FD_35: ; DEC (IY+d) @@ -158,5 +158,5 @@ Z80_instr_FD_35: ; DEC (IY+d) jsr (VEC_fetch_via_IY_d) tax dec - jsr ZVM_store_back + sta [PTR_DATA],z bra Z80_common_DEC diff --git a/src/zvm_m65/zvm_banking.s b/src/zvm_m65/zvm_banking.s index 009aef8a..9b365191 100644 --- a/src/zvm_m65/zvm_banking.s +++ b/src/zvm_m65/zvm_banking.s @@ -146,24 +146,66 @@ ZVM_fetch_value_bank_0: ZVM_fetch_value_bank_1: ZVM_fetch_stack_bank_0: ZVM_fetch_stack_bank_1: -ZVM_store_stack_bank_0: -ZVM_store_stack_bank_1: ZVM_fetch_via_HL_bank_0: ZVM_fetch_via_HL_bank_1: -ZVM_store_via_HL_bank_0: -ZVM_store_via_HL_bank_1: ZVM_fetch_via_IX_d_bank_0: ZVM_fetch_via_IX_d_bank_1: ZVM_fetch_via_IY_d_bank_0: ZVM_fetch_via_IY_d_bank_1: -ZVM_store_via_IX_d_bank_0: -ZVM_store_via_IX_d_bank_1: -ZVM_store_via_IY_d_bank_0: -ZVM_store_via_IY_d_bank_1: ZVM_fetch_via_nn_bank_0: ZVM_fetch_via_nn_bank_1: -ZVM_store_via_nn_bank_0: -ZVM_store_via_nn_bank_1: -ZVM_store_back: - ; XXX implement these + ; XXX + rts + + +ZVM_store_stack_bank_0: + + ; XXX + jmp ZVM_next + +ZVM_store_stack_bank_1: + + ; XXX + jmp ZVM_next + +ZVM_store_via_HL_bank_0: + + ; XXX + jmp ZVM_next + +ZVM_store_via_HL_bank_1: + + ; XXX + jmp ZVM_next + +ZVM_store_via_IX_d_bank_0: + + ; XXX + jmp ZVM_next + +ZVM_store_via_IX_d_bank_1: + + ; XXX + jmp ZVM_next + +ZVM_store_via_IY_d_bank_0: + + ; XXX + jmp ZVM_next + +ZVM_store_via_IY_d_bank_1: + + ; XXX + jmp ZVM_next + +ZVM_store_via_nn_bank_0: + + ; XXX + jmp ZVM_next + +ZVM_store_via_nn_bank_1: + + ; XXX + jmp ZVM_next + diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 1d267c9e..c9e50973 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -7,10 +7,14 @@ ZVM_entry: jsr ZVM_init ; XXX fetch BDOS and Command Processor - jmp ZVM_run + jmp ZVM_next ZVM_init: + ; .Z is required to be 0 all the time + + ldz #$00 + ; Reset all the registers lda #$00 @@ -24,9 +28,14 @@ ZVM_init: ; XXX what is the initial SP value? ; XXX clean memory - jmp ZVM_set_bank_0 - -ZVM_run: + jmp ZVM_set_bank_1 + + +ZVM_store_next: + + sta [PTR_DATA],z + +ZVM_next: ; fetch and execute next opcode ; CPU main loop @@ -85,10 +94,6 @@ ZVM_run: - - - - From d33a429876b7796a6c419e56ee28b017315608f6 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 19 Dec 2020 22:41:54 +0100 Subject: [PATCH 050/257] more optimizations --- src/zvm_m65/z80_instr_bit.s | 448 +++++++++--------------------------- 1 file changed, 112 insertions(+), 336 deletions(-) diff --git a/src/zvm_m65/z80_instr_bit.s b/src/zvm_m65/z80_instr_bit.s index 6d381255..0ec05417 100644 --- a/src/zvm_m65/z80_instr_bit.s +++ b/src/zvm_m65/z80_instr_bit.s @@ -593,394 +593,282 @@ Z80_instr_FDCB_7E: ; BIT 7,(IY+d) Z80_instr_CB_C0: ; SET 0,B - lda REG_B - ora #%00000001 - sta REG_B + smb0 REG_B jmp ZVM_next Z80_instr_CB_C1: ; SET 0,C - lda REG_C - ora #%00000001 - sta REG_C + smb0 REG_C jmp ZVM_next Z80_instr_CB_C2: ; SET 0,D - lda REG_D - ora #%00000001 - sta REG_D + smb0 REG_D jmp ZVM_next Z80_instr_CB_C3: ; SET 0,E - lda REG_E - ora #%00000001 - sta REG_E + smb0 REG_E jmp ZVM_next Z80_instr_CB_C4: ; SET 0,H - lda REG_H - ora #%00000001 - sta REG_H + smb0 REG_H jmp ZVM_next Z80_instr_CB_C5: ; SET 0,L - lda REG_L - ora #%00000001 - sta REG_L + smb0 REG_L jmp ZVM_next Z80_instr_CB_C7: ; SET 0,A - lda REG_A - ora #%00000001 - sta REG_A + smb0 REG_A jmp ZVM_next Z80_instr_CB_C8: ; SET 1,B - lda REG_B - ora #%00000010 - sta REG_B + smb1 REG_B jmp ZVM_next Z80_instr_CB_C9: ; SET 1, - lda REG_C - ora #%00000010 - sta REG_C + smb1 REG_C jmp ZVM_next Z80_instr_CB_CA: ; SET 1,D - lda REG_D - ora #%00000010 - sta REG_D + smb1 REG_D jmp ZVM_next Z80_instr_CB_CB: ; SET 1,E - lda REG_E - ora #%00000010 - sta REG_E + smb1 REG_E jmp ZVM_next Z80_instr_CB_CC: ; SET 1,H - lda REG_H - ora #%00000010 - sta REG_H + smb1 REG_H jmp ZVM_next Z80_instr_CB_CD: ; SET 1,L - lda REG_L - ora #%00000010 - sta REG_L + smb1 REG_L jmp ZVM_next Z80_instr_CB_CF: ; SET 1,A - lda REG_A - ora #%00000010 - sta REG_A + smb1 REG_A jmp ZVM_next Z80_instr_CB_D0: ; SET 2,B - lda REG_B - ora #%00000100 - sta REG_B + smb2 REG_B jmp ZVM_next Z80_instr_CB_D1: ; SET 2,C - lda REG_C - ora #%00000100 - sta REG_C + smb2 REG_C jmp ZVM_next Z80_instr_CB_D2: ; SET 2,D - lda REG_D - ora #%00000100 - sta REG_D + smb2 REG_D jmp ZVM_next Z80_instr_CB_D3: ; SET 2,E - lda REG_E - ora #%00000100 - sta REG_E + smb2 REG_E jmp ZVM_next Z80_instr_CB_D4: ; SET 2,H - lda REG_H - ora #%00000100 - sta REG_H + smb2 REG_H jmp ZVM_next Z80_instr_CB_D5: ; SET 2,L - lda REG_L - ora #%00000100 - sta REG_L + smb2 REG_L jmp ZVM_next Z80_instr_CB_D7: ; SET 2,A - lda REG_A - ora #%00000100 - sta REG_A + smb2 REG_A jmp ZVM_next Z80_instr_CB_D8: ; SET 3,B - lda REG_B - ora #%00001000 - sta REG_B + smb3 REG_B jmp ZVM_next Z80_instr_CB_D9: ; SET 3,C - lda REG_C - ora #%00001000 - sta REG_C + smb3 REG_C jmp ZVM_next Z80_instr_CB_DA: ; SET 3,D - lda REG_D - ora #%00001000 - sta REG_D + smb3 REG_D jmp ZVM_next Z80_instr_CB_DB: ; SET 3,E - lda REG_E - ora #%00001000 - sta REG_E + smb3 REG_E jmp ZVM_next Z80_instr_CB_DC: ; SET 3,H - lda REG_H - ora #%00001000 - sta REG_H + smb3 REG_H jmp ZVM_next Z80_instr_CB_DD: ; SET 3,L - lda REG_L - ora #%00001000 - sta REG_L + smb3 REG_L jmp ZVM_next Z80_instr_CB_DF: ; SET 3,A - lda REG_A - ora #%00001000 - sta REG_A + smb3 REG_A jmp ZVM_next Z80_instr_CB_E0: ; SET 4,B - lda REG_B - ora #%00010000 - sta REG_B + smb4 REG_B jmp ZVM_next Z80_instr_CB_E1: ; SET 4,C - lda REG_C - ora #%00010000 - sta REG_C + smb4 REG_C jmp ZVM_next Z80_instr_CB_E2: ; SET 4,D - lda REG_D - ora #%00010000 - sta REG_D + smb4 REG_D jmp ZVM_next Z80_instr_CB_E3: ; SET 4,E - lda REG_E - ora #%00010000 - sta REG_E + smb4 REG_E jmp ZVM_next Z80_instr_CB_E4: ; SET 4,H - lda REG_H - ora #%00010000 - sta REG_H + smb4 REG_H jmp ZVM_next Z80_instr_CB_E5: ; SET 4,L - lda REG_L - ora #%00010000 - sta REG_L + smb4 REG_L jmp ZVM_next Z80_instr_CB_E7: ; SET 4,A - lda REG_A - ora #%00010000 - sta REG_A + smb4 REG_A jmp ZVM_next Z80_instr_CB_E8: ; SET 5,B - lda REG_B - ora #%00100000 - sta REG_B + smb5 REG_B jmp ZVM_next Z80_instr_CB_E9: ; SET 5,C - lda REG_C - ora #%00100000 - sta REG_C + smb5 REG_C jmp ZVM_next Z80_instr_CB_EA: ; SET 5,D - lda REG_D - ora #%00100000 - sta REG_D + smb5 REG_D jmp ZVM_next Z80_instr_CB_EB: ; SET 5,E - lda REG_E - ora #%00100000 - sta REG_E + smb5 REG_E jmp ZVM_next Z80_instr_CB_EC: ; SET 5,H - lda REG_H - ora #%00100000 - sta REG_H + smb5 REG_H jmp ZVM_next Z80_instr_CB_ED: ; SET 5,L - lda REG_L - ora #%00100000 - sta REG_L + smb5 REG_L jmp ZVM_next Z80_instr_CB_EF: ; SET 5,A - lda REG_A - ora #%00100000 - sta REG_A + smb5 REG_A jmp ZVM_next Z80_instr_CB_F0: ; SET 6,B - lda REG_B - ora #%01000000 - sta REG_B + smb6 REG_B jmp ZVM_next Z80_instr_CB_F1: ; SET 6,C - lda REG_C - ora #%01000000 - sta REG_C + smb6 REG_C jmp ZVM_next Z80_instr_CB_F2: ; SET 6,D - lda REG_D - ora #%01000000 - sta REG_D + smb6 REG_D jmp ZVM_next Z80_instr_CB_F3: ; SET 6,E - lda REG_E - ora #%01000000 - sta REG_E + smb6 REG_E jmp ZVM_next Z80_instr_CB_F4: ; SET 6,H - lda REG_H - ora #%01000000 - sta REG_H + smb6 REG_H jmp ZVM_next Z80_instr_CB_F5: ; SET 6,L - lda REG_L - ora #%01000000 - sta REG_L + smb6 REG_L jmp ZVM_next Z80_instr_CB_F7: ; SET 6,A - lda REG_A - ora #%01000000 - sta REG_A + smb6 REG_A jmp ZVM_next Z80_instr_CB_F8: ; SET 7,B - lda REG_B - ora #%10000000 - sta REG_B + smb7 REG_B jmp ZVM_next Z80_instr_CB_F9: ; SET 7,C - lda REG_C - ora #%10000000 - sta REG_C + smb7 REG_C jmp ZVM_next Z80_instr_CB_FA: ; SET 7,D - lda REG_D - ora #%10000000 - sta REG_D + smb7 REG_D jmp ZVM_next Z80_instr_CB_FB: ; SET 7,E - lda REG_E - ora #%10000000 - sta REG_E + smb7 REG_E jmp ZVM_next Z80_instr_CB_FC: ; SET 7,H - lda REG_H - ora #%10000000 - sta REG_H + smb7 REG_H jmp ZVM_next Z80_instr_CB_FD: ; SET 7,L - lda REG_L - ora #%10000000 - sta REG_L + smb7 REG_L jmp ZVM_next Z80_instr_CB_FF: ; SET 7,A - lda REG_A - ora #%10000000 - sta REG_A + smb7 REG_A jmp ZVM_next Z80_instr_CB_C6: ; SET 0,(HL) @@ -1129,394 +1017,282 @@ Z80_instr_FDCB_FE: ; SET 7,(IY+d) Z80_instr_CB_80: ; RES 0,B - lda REG_B - and #%11111110 - sta REG_B + rmb0 REG_B jmp ZVM_next Z80_instr_CB_81: ; RES 0,C - lda REG_C - and #%11111110 - sta REG_C + rmb0 REG_C jmp ZVM_next Z80_instr_CB_82: ; RES 0,D - lda REG_D - and #%11111110 - sta REG_D + rmb0 REG_D jmp ZVM_next Z80_instr_CB_83: ; RES 0,E - lda REG_E - and #%11111110 - sta REG_E + rmb0 REG_E jmp ZVM_next Z80_instr_CB_84: ; RES 0,H - lda REG_H - and #%11111110 - sta REG_H + rmb0 REG_H jmp ZVM_next Z80_instr_CB_85: ; RES 0,L - lda REG_L - and #%11111110 - sta REG_L + rmb0 REG_L jmp ZVM_next Z80_instr_CB_87: ; RES 0,A - lda REG_A - and #%11111110 - sta REG_A + rmb0 REG_A jmp ZVM_next Z80_instr_CB_88: ; RES 1,B - lda REG_B - and #%11111101 - sta REG_B + rmb1 REG_B jmp ZVM_next Z80_instr_CB_89: ; RES 1,C - lda REG_C - and #%11111101 - sta REG_C + rmb1 REG_C jmp ZVM_next Z80_instr_CB_8A: ; RES 1,D - lda REG_D - and #%11111101 - sta REG_D + rmb1 REG_D jmp ZVM_next Z80_instr_CB_8B: ; RES 1,E - lda REG_E - and #%11111101 - sta REG_E + rmb1 REG_E jmp ZVM_next Z80_instr_CB_8C: ; RES 1,H - lda REG_H - and #%11111101 - sta REG_H + rmb1 REG_H jmp ZVM_next Z80_instr_CB_8D: ; RES 1,L - lda REG_L - and #%11111101 - sta REG_L + rmb1 REG_L jmp ZVM_next Z80_instr_CB_8F: ; RES 1,A - lda REG_A - and #%11111101 - sta REG_A + rmb1 REG_A jmp ZVM_next Z80_instr_CB_90: ; RES 2,B - lda REG_B - and #%11111011 - sta REG_B + rmb2 REG_B jmp ZVM_next Z80_instr_CB_91: ; RES 2,C - lda REG_C - and #%11111011 - sta REG_C + rmb2 REG_C jmp ZVM_next Z80_instr_CB_92: ; RES 2,D - lda REG_D - and #%11111011 - sta REG_D + rmb2 REG_D jmp ZVM_next Z80_instr_CB_93: ; RES 2,E - lda REG_E - and #%11111011 - sta REG_E + rmb2 REG_E jmp ZVM_next Z80_instr_CB_94: ; RES 2,H - lda REG_H - and #%11111011 - sta REG_H + rmb2 REG_H jmp ZVM_next Z80_instr_CB_95: ; RES 2,L - lda REG_L - and #%11111011 - sta REG_L + rmb2 REG_L jmp ZVM_next Z80_instr_CB_97: ; RES 2,A - lda REG_A - and #%11111011 - sta REG_A + rmb2 REG_A jmp ZVM_next Z80_instr_CB_98: ; RES 3,B - lda REG_B - and #%11110111 - sta REG_B + rmb3 REG_B jmp ZVM_next Z80_instr_CB_99: ; RES 3,C - lda REG_C - and #%11110111 - sta REG_C + rmb3 REG_C jmp ZVM_next Z80_instr_CB_9A: ; RES 3,D - lda REG_D - and #%11110111 - sta REG_D + rmb3 REG_D jmp ZVM_next Z80_instr_CB_9B: ; RES 3,E - lda REG_E - and #%11110111 - sta REG_E + rmb3 REG_E jmp ZVM_next Z80_instr_CB_9C: ; RES 3,H - lda REG_H - and #%11110111 - sta REG_H + rmb3 REG_H jmp ZVM_next Z80_instr_CB_9D: ; RES 3,L - lda REG_L - and #%11110111 - sta REG_L + rmb3 REG_L jmp ZVM_next Z80_instr_CB_9F: ; RES 3,A - lda REG_A - and #%11110111 - sta REG_A + rmb3 REG_A jmp ZVM_next Z80_instr_CB_A0: ; RES 4,B - lda REG_B - and #%11101111 - sta REG_B + rmb4 REG_B jmp ZVM_next Z80_instr_CB_A1: ; RES 4,C - lda REG_C - and #%11101111 - sta REG_C + rmb4 REG_C jmp ZVM_next Z80_instr_CB_A2: ; RES 4,D - lda REG_D - and #%11101111 - sta REG_D + rmb4 REG_D jmp ZVM_next Z80_instr_CB_A3: ; RES 4,E - lda REG_E - and #%11101111 - sta REG_E + rmb4 REG_E jmp ZVM_next Z80_instr_CB_A4: ; RES 4,H - lda REG_H - and #%11101111 - sta REG_H + rmb4 REG_H jmp ZVM_next Z80_instr_CB_A5: ; RES 4,L - lda REG_L - and #%11101111 - sta REG_L + rmb4 REG_L jmp ZVM_next Z80_instr_CB_A7: ; RES 4,A - lda REG_A - and #%11101111 - sta REG_A + rmb4 REG_A jmp ZVM_next Z80_instr_CB_A8: ; RES 5,B - lda REG_B - and #%11011111 - sta REG_B + rmb5 REG_B jmp ZVM_next Z80_instr_CB_A9: ; RES 5,C - lda REG_C - and #%11011111 - sta REG_C + rmb5 REG_C jmp ZVM_next Z80_instr_CB_AA: ; RES 5,D - lda REG_D - and #%11011111 - sta REG_D + rmb5 REG_D jmp ZVM_next Z80_instr_CB_AB: ; RES 5,E - lda REG_E - and #%11011111 - sta REG_E + rmb5 REG_E jmp ZVM_next Z80_instr_CB_AC: ; RES 5,H - lda REG_H - and #%11011111 - sta REG_H + rmb5 REG_H jmp ZVM_next Z80_instr_CB_AD: ; RES 5,L - lda REG_L - and #%11011111 - sta REG_L + rmb5 REG_L jmp ZVM_next Z80_instr_CB_AF: ; RES 5,A - lda REG_A - and #%11011111 - sta REG_A + rmb5 REG_A jmp ZVM_next Z80_instr_CB_B0: ; RES 6,B - lda REG_B - and #%10111111 - sta REG_B + rmb6 REG_B jmp ZVM_next Z80_instr_CB_B1: ; RES 6,C - lda REG_C - and #%10111111 - sta REG_C + rmb6 REG_C jmp ZVM_next Z80_instr_CB_B2: ; RES 6,D - lda REG_D - and #%10111111 - sta REG_D + rmb6 REG_D jmp ZVM_next Z80_instr_CB_B3: ; RES 6,E - lda REG_E - and #%10111111 - sta REG_E + rmb6 REG_E jmp ZVM_next Z80_instr_CB_B4: ; RES 6,H - lda REG_H - and #%10111111 - sta REG_H + rmb6 REG_H jmp ZVM_next Z80_instr_CB_B5: ; RES 6,L - lda REG_L - and #%10111111 - sta REG_L + rmb6 REG_L jmp ZVM_next Z80_instr_CB_B7: ; RES 6,A - lda REG_A - and #%10111111 - sta REG_A + rmb6 REG_A jmp ZVM_next Z80_instr_CB_B8: ; RES 7,B - lda REG_B - and #%01111111 - sta REG_B + rmb7 REG_B jmp ZVM_next Z80_instr_CB_B9: ; RES 7,C - lda REG_C - and #%01111111 - sta REG_C + rmb7 REG_C jmp ZVM_next Z80_instr_CB_BA: ; RES 7,D - lda REG_D - and #%01111111 - sta REG_D + rmb7 REG_D jmp ZVM_next Z80_instr_CB_BB: ; RES 7,E - lda REG_E - and #%01111111 - sta REG_E + rmb7 REG_E jmp ZVM_next Z80_instr_CB_BC: ; RES 7,H - lda REG_H - and #%01111111 - sta REG_H + rmb7 REG_H jmp ZVM_next Z80_instr_CB_BD: ; RES 7,L - lda REG_L - and #%01111111 - sta REG_L + rmb7 REG_L jmp ZVM_next Z80_instr_CB_BF: ; RES 7,A - lda REG_A - and #%01111111 - sta REG_A + rmb7 REG_A jmp ZVM_next Z80_instr_CB_86: ; RES 0,(HL) From 9410ab9aed6de79aa1edd1e0d11c8c970fe06051 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 19 Dec 2020 23:44:44 +0100 Subject: [PATCH 051/257] small Z80 additions --- src/zvm_m65/,aliases_zvm.s | 44 +++++++++++++++------ src/zvm_m65/z80_instr_rotate_shift.s | 57 ++++++++++++++++++++++++++++ src/zvm_m65/zvm_banking.s | 10 ----- src/zvm_m65/zvm_core.s | 15 ++------ 4 files changed, 92 insertions(+), 34 deletions(-) diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index b7cd7ec5..f75fbbe7 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -33,18 +33,17 @@ !addr REG_IFF1 = $1F ; interrupt flip-flop flag 1 !addr REG_IFF2 = $20 ; interrupt flip-flop flag 2 -!addr VEC_fetch_opcode = $60 -!addr VEC_fetch_value = $62 -!addr VEC_fetch_stack = $64 -!addr VEC_store_stack = $66 -!addr VEC_fetch_via_HL = $68 -!addr VEC_store_via_HL = $6A -!addr VEC_fetch_via_IX_d = $6C -!addr VEC_fetch_via_IY_d = $6E -!addr VEC_store_via_IX_d = $70 -!addr VEC_store_via_IY_d = $72 -!addr VEC_fetch_via_nn = $74 -!addr VEC_store_via_nn = $76 +!addr VEC_fetch_value = $60 +!addr VEC_fetch_stack = $62 +!addr VEC_store_stack = $64 +!addr VEC_fetch_via_HL = $66 +!addr VEC_store_via_HL = $68 +!addr VEC_fetch_via_IX_d = $6A +!addr VEC_fetch_via_IY_d = $6C +!addr VEC_store_via_IX_d = $6E +!addr VEC_store_via_IY_d = $70 +!addr VEC_fetch_via_nn = $72 +!addr VEC_store_via_nn = $74 ; Masks for Z80 flag (F) register @@ -57,3 +56,24 @@ !set Z80_VF = %00000100 ; overflow !set Z80_NF = %00000010 ; subtract !set Z80_CF = %00000001 ; carry + +; Macros to set/reset flags - to avoid mistakes + +!macro Z80_PUT_1_SF { smb7 REG_F } +!macro Z80_PUT_0_SF { rmb7 REG_F } +!macro Z80_PUT_1_ZF { smb6 REG_F } +!macro Z80_PUT_0_ZF { rmb6 REG_F } +!macro Z80_PUT_1_YF { smb5 REG_F } +!macro Z80_PUT_0_YF { rmb5 REG_F } +!macro Z80_PUT_1_HF { smb4 REG_F } +!macro Z80_PUT_0_HF { rmb4 REG_F } +!macro Z80_PUT_1_XF { smb3 REG_F } +!macro Z80_PUT_0_XF { rmb3 REG_F } +!macro Z80_PUT_1_PF { smb2 REG_F } +!macro Z80_PUT_0_PF { rmb2 REG_F } +!macro Z80_PUT_1_VF { smb2 REG_F } +!macro Z80_PUT_0_VF { rmb2 REG_F } +!macro Z80_PUT_1_NF { smb1 REG_F } +!macro Z80_PUT_0_NF { rmb1 REG_F } +!macro Z80_PUT_1_CF { smb0 REG_F } +!macro Z80_PUT_0_CF { rmb0 REG_F } diff --git a/src/zvm_m65/z80_instr_rotate_shift.s b/src/zvm_m65/z80_instr_rotate_shift.s index c46b5e13..8db3c5af 100644 --- a/src/zvm_m65/z80_instr_rotate_shift.s +++ b/src/zvm_m65/z80_instr_rotate_shift.s @@ -2,3 +2,60 @@ ; ; Z80 rotate/shift instructions ; + + +Z80_instr_07: ; RLCA + + lda REG_F + and #($FF - Z80_HF - Z80_NF - Z80_CF) + sta REG_F + + asl REG_A + +bcc ZVM_next + inc REG_A + +Z80_PUT_1_CF + jmp ZVM_next + +Z80_instr_17: ; RLA + + lda REG_F + and #($FF - Z80_HF - Z80_NF - Z80_CF) + sta REG_F + + clc + bbr0 REG_F, @1 + sec +@1: + rol REG_A + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next + +Z80_instr_0F: ; RRCA + + lda REG_F + and #($FF - Z80_HF - Z80_NF - Z80_CF) + sta REG_F + + clc + ror REG_A + +bcc ZVM_next + smb7 REG_A + +Z80_PUT_1_CF + jmp ZVM_next + +Z80_instr_1F: ; RRA + + lda REG_F + and #($FF - Z80_HF - Z80_NF - Z80_CF) + sta REG_F + + clc + bbr0 REG_F, @1 + sec +@1: + ror REG_A + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next + diff --git a/src/zvm_m65/zvm_banking.s b/src/zvm_m65/zvm_banking.s index 9b365191..fe7dcf3d 100644 --- a/src/zvm_m65/zvm_banking.s +++ b/src/zvm_m65/zvm_banking.s @@ -8,11 +8,6 @@ ZVM_set_bank_0: ; XXX consider switchink banks using DMA list - lda #ZVM_fetch_opcode_bank_0 - sta VEC_fetch_opcode+1 - lda #ZVM_fetch_value_bank_0 @@ -72,11 +67,6 @@ ZVM_set_bank_0: ZVM_set_bank_1: - lda #ZVM_fetch_opcode_bank_1 - sta VEC_fetch_opcode+1 - lda #ZVM_fetch_value_bank_1 diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index c9e50973..653133a6 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -39,7 +39,8 @@ ZVM_next: ; fetch and execute next opcode ; CPU main loop - jsr (VEC_fetch_opcode) + inc REG_R06 + jsr (VEC_fetch_value) asl bcs @1 @@ -86,12 +87,6 @@ ZVM_next: ; fetch and execute next opcode - - - - - - @@ -111,18 +106,14 @@ Z80_instr_DD_CB: ; #DDCB Z80_instr_FD_CB: ; #FDCB Z80_instr_01: ; LD BC,nn Z80_instr_02: ; LD (BC),A -Z80_instr_07: ; RLCA Z80_instr_09: ; ADD HL,BC Z80_instr_0A: ; LD A,(BC) -Z80_instr_0F: ; RRCA Z80_instr_10: ; DJNZ e Z80_instr_11: ; LD DE,nn Z80_instr_12: ; LD (DE),A -Z80_instr_17: ; RLA Z80_instr_18: ; JR e Z80_instr_19: ; ADD HL,DE -Z80_instr_1A: ; LD A,(DE) -Z80_instr_1F: ; RRA +Z80_instr_1A: ; LD A,(DE) Z80_instr_20: ; JR NZ,e Z80_instr_21: ; LD HL,nn Z80_instr_22: ; LD (nn),HL From d32e3afc123f95d3ee8c7be2b09a85e39b99cb9d Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 20 Dec 2020 00:57:13 +0100 Subject: [PATCH 052/257] few more Z80 instructions --- src/zvm_m65/,aliases_zvm.s | 6 ++-- src/zvm_m65/z80_instr_load_8bit.s | 50 +++++++++++++++++++++++++++++-- src/zvm_m65/zvm_core.s | 4 --- 3 files changed, 51 insertions(+), 9 deletions(-) diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index f75fbbe7..43fd3094 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -27,11 +27,11 @@ !addr REG_R7 = $1C ; refresh counter, bit 7 (bits 0-6 are 0's) !addr PTR_IXY_d = $1D ; 16-bit calculated address IX+d / IY+d XXX - important!!! -!addr PTR_DATA = $1D ; data source address XXX is it OK to use the same one? +!addr PTR_DATA = $1F ; data source address XXX - important!!! -!addr REG_IFF1 = $1F ; interrupt flip-flop flag 1 -!addr REG_IFF2 = $20 ; interrupt flip-flop flag 2 +!addr REG_IFF1 = $23 ; interrupt flip-flop flag 1 +!addr REG_IFF2 = $24 ; interrupt flip-flop flag 2 !addr VEC_fetch_value = $60 !addr VEC_fetch_stack = $62 diff --git a/src/zvm_m65/z80_instr_load_8bit.s b/src/zvm_m65/z80_instr_load_8bit.s index a6a46e13..c5bedeff 100644 --- a/src/zvm_m65/z80_instr_load_8bit.s +++ b/src/zvm_m65/z80_instr_load_8bit.s @@ -409,5 +409,51 @@ Z80_instr_36: ; LD (HL),n ; XXX put here LD (IX+d),n family ; XXX put here LD (IY+d),n family ; XXX put here LD A,(BC) / LD A,(DE) / LD A,(nn) / LD (BC), A / LD (DE),A / LD (nn),A -; XXX put here LD A,I / LD A,R -; XXX put here LD I,A / LD R,A + +Z80_instr_ED_57: ; LD A,I + + lda REG_F + and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_PF - Z80_NF) + ora REG_IFF2 + sta REG_F + + lda REG_I + sta REG_A + bpl @1 + +Z80_PUT_1_SF +@1: + +bne ZVM_next + +Z80_PUT_1_ZF + jmp ZVM_next + +Z80_instr_ED_5F: ; LD A,R + + lda REG_F + and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_PF - Z80_NF) + ora REG_IFF2 + sta REG_F + + lda REG_R06 + and #%01111111 + ora REG_R7 + sta REG_A + bpl @1 + +Z80_PUT_1_SF +@1: + +bne ZVM_next + +Z80_PUT_1_ZF + jmp ZVM_next + +Z80_instr_ED_47: ; LD I,A + + lda REG_A + sta REG_I + jmp ZVM_next + +Z80_instr_ED_4F: ; LD R,A + + lda REG_A + sta REG_R06 + and #%01111111 + sta REG_R7 + jmp ZVM_next diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 653133a6..ac13cc55 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -338,23 +338,19 @@ Z80_instr_ED_42: ; SBC HL,BC Z80_instr_ED_43: ; LD (nn),BC Z80_instr_ED_44: ; NEG Z80_instr_ED_45: ; RETN -Z80_instr_ED_47: ; LD I,A Z80_instr_ED_48: ; IN C,(C) Z80_instr_ED_49: ; OUT (C),C Z80_instr_ED_4A: ; ADC HL,BC Z80_instr_ED_4B: ; LD BC,(nn) Z80_instr_ED_4D: ; RETTI -Z80_instr_ED_4F: ; LD R,A Z80_instr_ED_50: ; IN D,(C) Z80_instr_ED_51: ; OUT (C),D Z80_instr_ED_52: ; SBC HL,DE Z80_instr_ED_53: ; LD (nn),DE -Z80_instr_ED_57: ; LD A,I Z80_instr_ED_58: ; IN E,(C) Z80_instr_ED_59: ; OUT (C),E Z80_instr_ED_5A: ; ADC HL,DE Z80_instr_ED_5B: ; LD DE,(nn) -Z80_instr_ED_5F: ; LD A,R Z80_instr_ED_60: ; IN H,(C) Z80_instr_ED_61: ; OUT (C),H Z80_instr_ED_62: ; SBC HL,HL From 6ced8b102aa1ecc633ef6584f06ce130188bac15 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 20 Dec 2020 11:28:42 +0100 Subject: [PATCH 053/257] more Z80 work --- src/zvm_m65/,aliases_zvm.s | 26 +++--- src/zvm_m65/z80_instr_general.s | 27 ------ src/zvm_m65/z80_instr_jump.s | 75 +++++++++++++++++ src/zvm_m65/z80_instr_load_16bit.s | 96 +++++++++++++++++++++ src/zvm_m65/z80_instr_load_8bit.s | 13 ++- src/zvm_m65/z80_instr_math_16bit.s | 12 +-- src/zvm_m65/z80_tables.s | 5 ++ src/zvm_m65/zvm_banking.s | 11 +-- src/zvm_m65/zvm_core.s | 129 +++++++++++++---------------- tools/generate_z80_tables.cc | 41 +++++++-- 10 files changed, 297 insertions(+), 138 deletions(-) diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index 43fd3094..483d5053 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -1,15 +1,19 @@ -!addr REG_A = $02 ; 8-bit accumulator -!addr REG_F = $03 ; 8-bit flag register -!addr REG_B = $04 ; general purpose 8-bit registers -!addr REG_C = $05 -!addr REG_D = $06 -!addr REG_E = $07 -!addr REG_H = $08 -!addr REG_L = $09 +!addr REG_AF = $02 ; 16-bit combined register +!addr REG_F = REG_AF+0 ; 8-bit flag register +!addr REG_A = REG_AF+1 ; 8-bit accumulator +!addr REG_BC = $04 +!addr REG_C = REG_BC+0 +!addr REG_B = REG_BC+1 +!addr REG_DE = $06 +!addr REG_E = REG_DE+0 +!addr REG_D = REG_DE+1 +!addr REG_HL = $08 +!addr REG_L = REG_HL+0 +!addr REG_H = REG_HL+1 -!addr REG_A_SH = $0A ; shadow registers -!addr REG_F_SH = $0B +!addr REG_F_SH = $0A ; shadow registers +!addr REG_A_SH = $0B !addr REG_C_SH = $0C !addr REG_B_SH = $0D !addr REG_E_SH = $0E @@ -24,7 +28,7 @@ !addr REG_I = $1A ; 8-bit interrupt vector base !addr REG_R06 = $1B ; refresh counter, bits 0-6 (bit 7 is garbage) -!addr REG_R7 = $1C ; refresh counter, bit 7 (bits 0-6 are 0's) +!addr REG_R7 = $1C ; refresh counter, bit 7 (bits 0-6 are garbage) !addr PTR_IXY_d = $1D ; 16-bit calculated address IX+d / IY+d XXX - important!!! !addr PTR_DATA = $1F ; data source address XXX - important!!! diff --git a/src/zvm_m65/z80_instr_general.s b/src/zvm_m65/z80_instr_general.s index c9d90897..dafaa89d 100644 --- a/src/zvm_m65/z80_instr_general.s +++ b/src/zvm_m65/z80_instr_general.s @@ -4,33 +4,6 @@ ; -Z80_illegal__DD: -Z80_illegal__ED: -Z80_illegal__FD: -Z80_illegal__DDCB: -Z80_illegal__FDCB: - - inc REG_R06 ; XXX check if this is correct - - ; FALLTROUGH - - ; LD instructions with no effect -Z80_instr_40: ; LD B,B -Z80_instr_49: ; LD C,C -Z80_instr_52: ; LD D,D -Z80_instr_5B: ; LD E,E -Z80_instr_64: ; LH H,H -Z80_instr_6D: ; LD L,L -Z80_instr_7F: ; LD A,A - ; For interrupts (not emulated as of yet) -Z80_instr_ED_46: ; IM 0 -Z80_instr_ED_56: ; IM 1 -Z80_instr_ED_5E: ; IM 2 - ; Real NOP -Z80_instr_00: ; NOP - - jmp ZVM_next - Z80_instr_F3: ; DI lda #$00 diff --git a/src/zvm_m65/z80_instr_jump.s b/src/zvm_m65/z80_instr_jump.s index b4a8766e..9d3b611d 100644 --- a/src/zvm_m65/z80_instr_jump.s +++ b/src/zvm_m65/z80_instr_jump.s @@ -67,3 +67,78 @@ Z80_instr_FA: ; JP M,nn inw REG_PC inw REG_PC jmp ZVM_next + +Z80_instr_E9: ; JP (HL) + + lda REG_L+0 + sta REG_PC+0 + lda REG_L+1 + sta REG_PC+1 + jmp ZVM_next + +Z80_instr_DD_E9: ; JP (IX) + + lda REG_IX+0 + sta REG_PC+0 + lda REG_IX+1 + sta REG_PC+1 + jmp ZVM_next + +Z80_instr_FD_E9: ; JP (IY) + + lda REG_IY+0 + sta REG_PC+0 + lda REG_IY+1 + sta REG_PC+1 + jmp ZVM_next + +Z80_instr_18: ; JR e + + bit REG_PC+0 + bmi @1 + dec REG_PC+1 + smb7 REG_PC+0 + bra @2 +@1: + rmb7 REG_PC+0 +@2: + jsr (VEC_fetch_value) + tax + lda z80_otable_displacement,x + clc + adc REG_PC+0 + sta REG_PC+0 + +bcc ZVM_next + inc REG_PC+1 + jmp ZVM_next + +Z80_instr_20: ; JR NZ,e + + bbr6 REG_F,Z80_instr_18 + inw REG_PC + jmp ZVM_next + +Z80_instr_28: ; JR Z,e + + bbs6 REG_F,Z80_instr_18 + inw REG_PC + jmp ZVM_next + +Z80_instr_30: ; JR NC,e + + bbr0 REG_F,Z80_instr_18 + inw REG_PC + jmp ZVM_next + +Z80_instr_38: ; JR C,e + + bbs0 REG_F,Z80_instr_18 + inw REG_PC + jmp ZVM_next + +Z80_instr_10: ; DJNZ e + + dec REG_B + bne Z80_instr_18 + inw REG_PC + jmp ZVM_next diff --git a/src/zvm_m65/z80_instr_load_16bit.s b/src/zvm_m65/z80_instr_load_16bit.s index 22a5f30b..d8089458 100644 --- a/src/zvm_m65/z80_instr_load_16bit.s +++ b/src/zvm_m65/z80_instr_load_16bit.s @@ -2,3 +2,99 @@ ; ; Z80 data load instructions, 16 bit ; + +Z80_instr_C5: ; PUSH BC + + lda REG_BC+1 + jsr (VEC_store_stack) + lda REG_BC+0 + jsr (VEC_store_stack) + jmp ZVM_next + +Z80_instr_D5: ; PUSH DE + + lda REG_DE+1 + jsr (VEC_store_stack) + lda REG_DE+0 + jsr (VEC_store_stack) + jmp ZVM_next + +Z80_instr_E5: ; PUSH HL + + lda REG_HL+1 + jsr (VEC_store_stack) + lda REG_HL+0 + jsr (VEC_store_stack) + jmp ZVM_next + +Z80_instr_F5: ; PUSH AF + + lda REG_AF+1 + jsr (VEC_store_stack) + lda REG_AF+0 + jsr (VEC_store_stack) + jmp ZVM_next + +Z80_instr_DD_E5: ; PUSH IX + + lda REG_IX+1 + jsr (VEC_store_stack) + lda REG_IX+0 + jsr (VEC_store_stack) + jmp ZVM_next + +Z80_instr_FD_E5: ; PUSH IY + + lda REG_IY+1 + jsr (VEC_store_stack) + lda REG_IY+0 + jsr (VEC_store_stack) + jmp ZVM_next + +Z80_instr_C1: ; POP BC + + jsr (VEC_fetch_stack) + sta REG_BC+0 + jsr (VEC_fetch_stack) + lda REG_BC+1 + jmp ZVM_next + +Z80_instr_D1: ; POP DE + + jsr (VEC_fetch_stack) + sta REG_DE+0 + jsr (VEC_fetch_stack) + lda REG_DE+1 + jmp ZVM_next + +Z80_instr_E1: ; POP HL + + jsr (VEC_fetch_stack) + sta REG_HL+0 + jsr (VEC_fetch_stack) + lda REG_HL+1 + jmp ZVM_next + +Z80_instr_F1: ; POP AF + + jsr (VEC_fetch_stack) + sta REG_AF+0 + jsr (VEC_fetch_stack) + lda REG_AF+1 + jmp ZVM_next + +Z80_instr_DD_E1: ; POP IX + + jsr (VEC_fetch_stack) + sta REG_IX+0 + jsr (VEC_fetch_stack) + lda REG_IX+1 + jmp ZVM_next + +Z80_instr_FD_E1: ; POP IY + + jsr (VEC_fetch_stack) + sta REG_IY+0 + jsr (VEC_fetch_stack) + lda REG_IY+1 + jmp ZVM_next diff --git a/src/zvm_m65/z80_instr_load_8bit.s b/src/zvm_m65/z80_instr_load_8bit.s index c5bedeff..ad7eddf5 100644 --- a/src/zvm_m65/z80_instr_load_8bit.s +++ b/src/zvm_m65/z80_instr_load_8bit.s @@ -433,9 +433,14 @@ Z80_instr_ED_5F: ; LD A,R ora REG_IFF2 sta REG_F - lda REG_R06 + lda REG_R06 ; register R only simulates random numbers + eor VIC_RASTER + adc TIME+2 + eor VIC_XPOS + sta REG_R06 + and #%01111111 - ora REG_R7 + eor REG_R7 ; not 'ora', we want to reuse the 'garbage' sta REG_A bpl @1 +Z80_PUT_1_SF @@ -453,7 +458,7 @@ Z80_instr_ED_47: ; LD I,A Z80_instr_ED_4F: ; LD R,A lda REG_A - sta REG_R06 - and #%01111111 + ; Do not do 'sta REG_R06', it will generate a random number + ; Do not do 'and #%01111111', let it have some garbage sta REG_R7 jmp ZVM_next diff --git a/src/zvm_m65/z80_instr_math_16bit.s b/src/zvm_m65/z80_instr_math_16bit.s index 3cef4337..337f6167 100644 --- a/src/zvm_m65/z80_instr_math_16bit.s +++ b/src/zvm_m65/z80_instr_math_16bit.s @@ -6,17 +6,17 @@ Z80_instr_03: ; INC BC - inw REG_C + inw REG_BC jmp ZVM_next Z80_instr_13: ; INC DE - inw REG_E + inw REG_DE jmp ZVM_next Z80_instr_23: ; INC HL - inw REG_L + inw REG_HL jmp ZVM_next Z80_instr_33: ; INC SP @@ -36,17 +36,17 @@ Z80_instr_FD_23: ; INC IY Z80_instr_0B: ; DEC BC - dew REG_C + dew REG_BC jmp ZVM_next Z80_instr_1B: ; DEC DE - dew REG_E + dew REG_DE jmp ZVM_next Z80_instr_2B: ; DEC HL - dew REG_L + dew REG_HL jmp ZVM_next Z80_instr_3B: ; DEC SP diff --git a/src/zvm_m65/z80_tables.s b/src/zvm_m65/z80_tables.s index cc51befc..aaff7e1e 100644 --- a/src/zvm_m65/z80_tables.s +++ b/src/zvm_m65/z80_tables.s @@ -8,6 +8,11 @@ ; ; +PUT_Z80_FTABLE_PARITY + +z80_otable_displacement: + + +PUT_Z80_OTABLE_DISPLACEMENT + z80_ftable_INC: +PUT_Z80_FTABLE_INC diff --git a/src/zvm_m65/zvm_banking.s b/src/zvm_m65/zvm_banking.s index fe7dcf3d..a90bddc5 100644 --- a/src/zvm_m65/zvm_banking.s +++ b/src/zvm_m65/zvm_banking.s @@ -144,20 +144,11 @@ ZVM_fetch_via_IY_d_bank_0: ZVM_fetch_via_IY_d_bank_1: ZVM_fetch_via_nn_bank_0: ZVM_fetch_via_nn_bank_1: - - ; XXX - rts - - ZVM_store_stack_bank_0: - - ; XXX - jmp ZVM_next - ZVM_store_stack_bank_1: ; XXX - jmp ZVM_next + rts ZVM_store_via_HL_bank_0: diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index ac13cc55..6ebf119d 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -11,16 +11,13 @@ ZVM_entry: ZVM_init: - ; .Z is required to be 0 all the time - - ldz #$00 - - ; Reset all the registers + ; Reset registers and internal data + ldz #$00 ; .Z is required to be 0 all the time lda #$00 tay @1: - sta REG_A, y + sta REG_AF, y iny cmp #(REG_IFF2+1) bne @1 @@ -30,63 +27,75 @@ ZVM_init: jmp ZVM_set_bank_1 - ZVM_store_next: sta [PTR_DATA],z + ; unimplemented/illegal instructions +Z80_illegal__DD: +Z80_illegal__ED: +Z80_illegal__FD: +Z80_illegal__DDCB: +Z80_illegal__FDCB: + ; LD instructions with no effect +Z80_instr_40: ; LD B,B +Z80_instr_49: ; LD C,C +Z80_instr_52: ; LD D,D +Z80_instr_5B: ; LD E,E +Z80_instr_64: ; LH H,H +Z80_instr_6D: ; LD L,L +Z80_instr_7F: ; LD A,A + ; For interrupts (not emulated as of yet) +Z80_instr_ED_46: ; IM 0 +Z80_instr_ED_56: ; IM 1 +Z80_instr_ED_5E: ; IM 2 + ; Real NOP +Z80_instr_00: ; NOP + ZVM_next: ; fetch and execute next opcode - ; CPU main loop - - inc REG_R06 jsr (VEC_fetch_value) asl + tax bcs @1 - - ; Execute mnemonic $00-$7F - - ; XXX -@1: - ; Execute mnemonic $80-$FF - - ; XXX - - - - - - - - - - - - - - - - - - - - - - - - - - - - + jmp (Z80_vectab_0) ; execute opcode $00-$7F +@1: jmp (Z80_vectab_1) ; execute opcode $80-$FF +Z80_instr_CB: ; #CB + jsr (VEC_fetch_value) + asl + tax + bcs @1 + jmp (Z80_vectab_CB_0) ; execute opcode $00-$7F +@1: jmp (Z80_vectab_CB_1) ; execute opcode $80-$FF +Z80_instr_DD: ; #DD + jsr (VEC_fetch_value) + asl + tax + bcs @1 + jmp (Z80_vectab_DD_0) ; execute opcode $00-$7F +@1: jmp (Z80_vectab_DD_1) ; execute opcode $80-$FF +Z80_instr_ED: ; #ED + jsr (VEC_fetch_value) + asl + tax + bcs @1 + jmp (Z80_vectab_ED_0) ; execute opcode $00-$7F +@1: jmp (Z80_vectab_ED_1) ; execute opcode $80-$FF +Z80_instr_FD: ; #FD + jsr (VEC_fetch_value) + asl + tax + bcs @1 + jmp (Z80_vectab_FD_0) ; execute opcode $00-$7F +@1: jmp (Z80_vectab_FD_1) ; execute opcode $80-$FF @@ -98,35 +107,26 @@ ZVM_next: ; fetch and execute next opcode ; Not implemented yet - XXX implement them! ; -Z80_instr_CB: ; #CB -Z80_instr_DD: ; #DD -Z80_instr_ED: ; #ED -Z80_instr_FD: ; #FD + Z80_instr_DD_CB: ; #DDCB Z80_instr_FD_CB: ; #FDCB Z80_instr_01: ; LD BC,nn Z80_instr_02: ; LD (BC),A Z80_instr_09: ; ADD HL,BC Z80_instr_0A: ; LD A,(BC) -Z80_instr_10: ; DJNZ e Z80_instr_11: ; LD DE,nn Z80_instr_12: ; LD (DE),A -Z80_instr_18: ; JR e Z80_instr_19: ; ADD HL,DE Z80_instr_1A: ; LD A,(DE) -Z80_instr_20: ; JR NZ,e Z80_instr_21: ; LD HL,nn Z80_instr_22: ; LD (nn),HL Z80_instr_27: ; DAA -Z80_instr_28: ; JR Z,e Z80_instr_29: ; ADD HL,HL Z80_instr_2A: ; LD HL,(nn) Z80_instr_2F: ; CPL -Z80_instr_30: ; JR NC,e Z80_instr_31: ; LD SP,nn Z80_instr_32: ; LD (nn),A Z80_instr_37: ; SCF -Z80_instr_38: ; JR C,e Z80_instr_39: ; ADD HL,SP Z80_instr_3A: ; LD A,(nn) Z80_instr_3F: ; CCF @@ -196,9 +196,7 @@ Z80_instr_BD: ; CP L Z80_instr_BE: ; CP (HL) Z80_instr_BF: ; CP A Z80_instr_C0: ; RET NZ -Z80_instr_C1: ; POP BC Z80_instr_C4: ; CALL NZ,nn -Z80_instr_C5: ; PUSH BC Z80_instr_C6: ; ADD A,n Z80_instr_C7: ; RST 00H Z80_instr_C8: ; RET z @@ -208,10 +206,8 @@ Z80_instr_CD: ; CALL nn Z80_instr_CE: ; ADC A,n Z80_instr_CF: ; RST 08H Z80_instr_D0: ; RET NC -Z80_instr_D1: ; POP DE Z80_instr_D3: ; OUT (n), A Z80_instr_D4: ; CALL NC,nn -Z80_instr_D5: ; PUSH DE Z80_instr_D6: ; SUB n Z80_instr_D7: ; RST 10H Z80_instr_D8: ; RET C @@ -220,21 +216,16 @@ Z80_instr_DC: ; CALL C,nn Z80_instr_DE: ; SBC A,n Z80_instr_DF: ; RST 18H Z80_instr_E0: ; RET PO -Z80_instr_E1: ; POP HL Z80_instr_E3: ; EX (SP),HL Z80_instr_E4: ; CALL PO,nn -Z80_instr_E5: ; PUSH HL Z80_instr_E6: ; AND n Z80_instr_E7: ; RST 20H Z80_instr_E8: ; RET PE -Z80_instr_E9: ; JP (HL) Z80_instr_EC: ; CALL PE,nn Z80_instr_EE: ; XOR n Z80_instr_EF: ; RST 28H Z80_instr_F0: ; RET P -Z80_instr_F1: ; POP AF Z80_instr_F4: ; CALL P,nn -Z80_instr_F5: ; PUSH AF Z80_instr_F6: ; OR n Z80_instr_F7: ; RST 30H Z80_instr_F8: ; RET M @@ -327,10 +318,7 @@ Z80_instr_DD_A6: ; AND (IX+d) Z80_instr_DD_AE: ; XOR (IX+d) Z80_instr_DD_B6: ; OR (IX+d) Z80_instr_DD_BE: ; CP (IX+d) -Z80_instr_DD_E1: ; POP IX Z80_instr_DD_E3: ; EX (SP),IX -Z80_instr_DD_E5: ; PUSH IX -Z80_instr_DD_E9: ; JP (IX) Z80_instr_DD_F9: ; LD SP,IX Z80_instr_ED_40: ; IN B,(C) Z80_instr_ED_41: ; OUT (C),B @@ -410,10 +398,7 @@ Z80_instr_FD_A6: ; AND (IY+d) Z80_instr_FD_AE: ; XOR (IY+d) Z80_instr_FD_B6: ; OR (IY+d) Z80_instr_FD_BE: ; CP (IY+d) -Z80_instr_FD_E1: ; POP IY Z80_instr_FD_E3: ; EX (SP),IY -Z80_instr_FD_E5: ; PUSH IY -Z80_instr_FD_E9: ; JP (IY) Z80_instr_FD_F9: ; LD SP,IY Z80_instr_DDCB_06: ; RLC (IX+d) Z80_instr_DDCB_0E: ; RRC (IX+d) @@ -431,5 +416,5 @@ Z80_instr_FDCB_2E: ; SRA (IY+d) Z80_instr_FDCB_3E: ; SRL (IY+d) - rts ; XXX + jmp ZVM_next ; XXX ; XXX add 'illegal' instructions diff --git a/tools/generate_z80_tables.cc b/tools/generate_z80_tables.cc index 519c404f..bf0d7f7a 100644 --- a/tools/generate_z80_tables.cc +++ b/tools/generate_z80_tables.cc @@ -10,6 +10,10 @@ #include #include +// Global variables + +uint8_t GLOBAL_Parity[256]; + // // Constants // @@ -97,10 +101,12 @@ std::string generateParityTable(void) if (even) { + GLOBAL_Parity[idx] = 4; outStr += std::string("\t!byte %00000100 ; ") + idxInBin + "\n"; } else { + GLOBAL_Parity[idx] = 0; outStr += std::string("\t!byte %00000000 ; ") + idxInBin + "\n"; } } @@ -108,10 +114,31 @@ std::string generateParityTable(void) return outStr + "}\n\n\n"; } +std::string generateDisplacementTable(void) +{ + std::stringstream outStr; + outStr << "!macro PUT_Z80_OTABLE_DISPLACEMENT {\n"; + + for (uint16_t idx = 0; idx < 0x100; idx++) + { + outStr << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0'); + + if (idx < 128) + { + outStr << int(idx + 128) << "\n"; + } + else + { + outStr << int(idx - 128) << "\n"; + } + } + + return outStr.str() + "}\n\n\n"; +} + std::string generateIncTable(void) { std::stringstream outStr; - outStr << "!macro PUT_Z80_FTABLE_INC {\n"; for (uint16_t idx = 0; idx < 0x100; idx++) @@ -123,8 +150,7 @@ std::string generateIncTable(void) if ((idx & 0x0F) == 0x0F) flags |= Z80_HF; if (idx == 0x7F) flags |= Z80_VF; - outStr << "\t!byte "; - outStr << std::hex << std::setw(2) << int(flags) << "\n"; + outStr << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << int(flags) << "\n"; } return outStr.str() + "}\n\n\n"; @@ -133,8 +159,7 @@ std::string generateIncTable(void) std::string generateDecTable(void) { std::stringstream outStr; - - outStr << "!macro PUT_Z80_FTABLE_DEC {\n"; + outStr << "!macro PUT_Z80_FTABLE_DEC {\n" << std::hex << std::setw(2) << std::setfill('0'); for (uint16_t idx = 0; idx < 0x100; idx++) { @@ -145,8 +170,7 @@ std::string generateDecTable(void) if ((idx & 0x0F) == 0x00) flags |= Z80_HF; if (idx == 0x80) flags |= Z80_VF; - outStr << "\t!byte "; - outStr << std::hex << std::setw(2) << int(flags) << "\n"; + outStr << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << int(flags) << "\n"; } return outStr.str() + "}\n\n\n"; @@ -181,7 +205,8 @@ void writeTables() // Write tables - outFile << generateParityTable(); + outFile << generateParityTable(); // always put it first! + outFile << generateDisplacementTable(); outFile << generateIncTable(); outFile << generateDecTable(); outFile << generateDaaTables(); From 597aad5dcbe7e6daa049a0e0665b8a9f9663b64f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 20 Dec 2020 11:54:04 +0100 Subject: [PATCH 054/257] turned some repeating code into macros --- src/zvm_m65/z80_instr_load_16bit.s | 109 ++++++----------------------- src/zvm_m65/zvm_core.s | 82 ++++++++++------------ 2 files changed, 58 insertions(+), 133 deletions(-) diff --git a/src/zvm_m65/z80_instr_load_16bit.s b/src/zvm_m65/z80_instr_load_16bit.s index d8089458..265589fc 100644 --- a/src/zvm_m65/z80_instr_load_16bit.s +++ b/src/zvm_m65/z80_instr_load_16bit.s @@ -3,98 +3,33 @@ ; Z80 data load instructions, 16 bit ; -Z80_instr_C5: ; PUSH BC - lda REG_BC+1 +!macro Z80_PUSH_REGnn .REGnn { + lda .REGnn+1 jsr (VEC_store_stack) - lda REG_BC+0 + lda .REGnn+0 jsr (VEC_store_stack) jmp ZVM_next +} -Z80_instr_D5: ; PUSH DE +Z80_instr_C5: +Z80_PUSH_REGnn REG_BC ; PUSH BC +Z80_instr_D5: +Z80_PUSH_REGnn REG_DE ; PUSH DE +Z80_instr_E5: +Z80_PUSH_REGnn REG_HL ; PUSH HL +Z80_instr_F5: +Z80_PUSH_REGnn REG_AF ; PUSH AF +Z80_instr_DD_E5: +Z80_PUSH_REGnn REG_IX ; PUSH IX +Z80_instr_FD_E5: +Z80_PUSH_REGnn REG_IY ; PUSH IY - lda REG_DE+1 - jsr (VEC_store_stack) - lda REG_DE+0 - jsr (VEC_store_stack) +!macro Z80_POP_REGnn .REGnn { + jsr (VEC_fetch_stack) + sta .REGnn+0 + jsr (VEC_fetch_stack) + lda .REGnn+1 jmp ZVM_next +} -Z80_instr_E5: ; PUSH HL - - lda REG_HL+1 - jsr (VEC_store_stack) - lda REG_HL+0 - jsr (VEC_store_stack) - jmp ZVM_next - -Z80_instr_F5: ; PUSH AF - - lda REG_AF+1 - jsr (VEC_store_stack) - lda REG_AF+0 - jsr (VEC_store_stack) - jmp ZVM_next - -Z80_instr_DD_E5: ; PUSH IX - - lda REG_IX+1 - jsr (VEC_store_stack) - lda REG_IX+0 - jsr (VEC_store_stack) - jmp ZVM_next - -Z80_instr_FD_E5: ; PUSH IY - - lda REG_IY+1 - jsr (VEC_store_stack) - lda REG_IY+0 - jsr (VEC_store_stack) - jmp ZVM_next - -Z80_instr_C1: ; POP BC - - jsr (VEC_fetch_stack) - sta REG_BC+0 - jsr (VEC_fetch_stack) - lda REG_BC+1 - jmp ZVM_next - -Z80_instr_D1: ; POP DE - - jsr (VEC_fetch_stack) - sta REG_DE+0 - jsr (VEC_fetch_stack) - lda REG_DE+1 - jmp ZVM_next - -Z80_instr_E1: ; POP HL - - jsr (VEC_fetch_stack) - sta REG_HL+0 - jsr (VEC_fetch_stack) - lda REG_HL+1 - jmp ZVM_next - -Z80_instr_F1: ; POP AF - - jsr (VEC_fetch_stack) - sta REG_AF+0 - jsr (VEC_fetch_stack) - lda REG_AF+1 - jmp ZVM_next - -Z80_instr_DD_E1: ; POP IX - - jsr (VEC_fetch_stack) - sta REG_IX+0 - jsr (VEC_fetch_stack) - lda REG_IX+1 - jmp ZVM_next - -Z80_instr_FD_E1: ; POP IY - - jsr (VEC_fetch_stack) - sta REG_IY+0 - jsr (VEC_fetch_stack) - lda REG_IY+1 - jmp ZVM_next +Z80_instr_C1: +Z80_POP_REGnn REG_BC ; POP BC +Z80_instr_D1: +Z80_POP_REGnn REG_DE ; POP DE +Z80_instr_E1: +Z80_POP_REGnn REG_HL ; POP HL +Z80_instr_F1: +Z80_POP_REGnn REG_AF ; POP AF +Z80_instr_DD_E1: +Z80_POP_REGnn REG_IX ; POP IX +Z80_instr_FD_E1: +Z80_POP_REGnn REG_IY ; POP IY \ No newline at end of file diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 6ebf119d..1bce3f8b 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -31,6 +31,21 @@ ZVM_store_next: sta [PTR_DATA],z + ; FALLTROUGH + +!macro ZVM_DISPATCH .TAB_LO, .TAB_HI { + + ; Fetch and execute next opcode + + jsr (VEC_fetch_value) + asl + tax + bcs @1 + jmp (.TAB_LO) ; execute opcode $00-$7F +@1: jmp (.TAB_HI) ; execute opcode $80-$FF + +} + ; unimplemented/illegal instructions Z80_illegal__DD: Z80_illegal__ED: @@ -38,64 +53,39 @@ Z80_illegal__FD: Z80_illegal__DDCB: Z80_illegal__FDCB: ; LD instructions with no effect -Z80_instr_40: ; LD B,B -Z80_instr_49: ; LD C,C -Z80_instr_52: ; LD D,D -Z80_instr_5B: ; LD E,E -Z80_instr_64: ; LH H,H -Z80_instr_6D: ; LD L,L -Z80_instr_7F: ; LD A,A +Z80_instr_40: ; LD B,B +Z80_instr_49: ; LD C,C +Z80_instr_52: ; LD D,D +Z80_instr_5B: ; LD E,E +Z80_instr_64: ; LD H,H +Z80_instr_6D: ; LD L,L +Z80_instr_7F: ; LD A,A ; For interrupts (not emulated as of yet) -Z80_instr_ED_46: ; IM 0 -Z80_instr_ED_56: ; IM 1 -Z80_instr_ED_5E: ; IM 2 +Z80_instr_ED_46: ; IM 0 +Z80_instr_ED_56: ; IM 1 +Z80_instr_ED_5E: ; IM 2 ; Real NOP -Z80_instr_00: ; NOP +Z80_instr_00: ; NOP + ; Dispatch via jumptable +ZVM_next: +ZVM_DISPATCH Z80_vectab_0, Z80_vectab_1 +Z80_instr_CB: +ZVM_DISPATCH Z80_vectab_CB_0, Z80_vectab_CB_1 ; #CB +Z80_instr_DD: +ZVM_DISPATCH Z80_vectab_DD_0, Z80_vectab_DD_1 ; #DD +Z80_instr_ED: +ZVM_DISPATCH Z80_vectab_ED_0, Z80_vectab_ED_1 ; #ED +Z80_instr_FD: +ZVM_DISPATCH Z80_vectab_FD_0, Z80_vectab_FD_1 ; #FD + + + + -ZVM_next: ; fetch and execute next opcode - jsr (VEC_fetch_value) - asl - tax - bcs @1 - jmp (Z80_vectab_0) ; execute opcode $00-$7F -@1: jmp (Z80_vectab_1) ; execute opcode $80-$FF -Z80_instr_CB: ; #CB - jsr (VEC_fetch_value) - asl - tax - bcs @1 - jmp (Z80_vectab_CB_0) ; execute opcode $00-$7F -@1: jmp (Z80_vectab_CB_1) ; execute opcode $80-$FF -Z80_instr_DD: ; #DD - jsr (VEC_fetch_value) - asl - tax - bcs @1 - jmp (Z80_vectab_DD_0) ; execute opcode $00-$7F -@1: jmp (Z80_vectab_DD_1) ; execute opcode $80-$FF -Z80_instr_ED: ; #ED - jsr (VEC_fetch_value) - asl - tax - bcs @1 - jmp (Z80_vectab_ED_0) ; execute opcode $00-$7F -@1: jmp (Z80_vectab_ED_1) ; execute opcode $80-$FF -Z80_instr_FD: ; #FD - jsr (VEC_fetch_value) - asl - tax - bcs @1 - jmp (Z80_vectab_FD_0) ; execute opcode $00-$7F -@1: jmp (Z80_vectab_FD_1) ; execute opcode $80-$FF From 055534a5d65ab5e47c3047bc1666d3fe6ab84e7d Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 20 Dec 2020 14:35:34 +0100 Subject: [PATCH 055/257] Z80 and monitor improvements --- src/mon_m65/bsmon.s | 32 +----- src/zvm_m65/z80_instr_load_8bit.s | 24 ++-- src/zvm_m65/z80_instr_math_8bit.s | 176 +++++++++++++++++++++++++++++- src/zvm_m65/z80_tables.s | 8 ++ src/zvm_m65/zvm_banking.s | 35 +----- src/zvm_m65/zvm_core.s | 33 ------ tools/generate_z80_tables.cc | 38 ++++++- 7 files changed, 241 insertions(+), 105 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index b9cfc229..d22f19f6 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -16,7 +16,8 @@ ; * Register storage * ; ******************** -!addr Bank = 2 ; $00 = C64 address, $FF = M65 flat address ; XXX adapt the implementation +!addr Bank = 2 ; XXX remove this +!addr Adr_Mode = 2 ; $00 = C64 address, $80 = M65 flat address ; XXX adapt the implementation !addr PCH = 3 !addr PCL = 4 !addr SR = 5 @@ -76,30 +77,7 @@ Mon_Break ; ******* - JSR Print_Commands - -; pull BP, Z, Y, X, A,SR,PCL,PCH -; 7 6 5 4 3 2 1 0 - - LDX #7 -@loop PLA - STA PCH,X - DEX - BPL @loop - -; decrement PC to point after BRK - - LDA PCL - BNE @nopage - DEC PCH -@nopage DEC PCL - - LDA $011d - BBR7 Bank,@bank - LDA $011f -@bank AND #15 - STA Bank - BRA Mon_Start + ; XXX implement Open ROMs version, connect it to BRK handler ; ****** Mon_Call @@ -468,6 +446,8 @@ Fetch Mon_Memory ; ******** + LDA #$00 + STA Adr_Mode JSR Set_MODE_80 JSR Get_LAC ; get 1st. parameter @@ -1734,7 +1714,7 @@ Got_LAC DEC Buf_Index ; ***** -Get_LAC +Get_LAC ; ; ***** JSR Read_Number diff --git a/src/zvm_m65/z80_instr_load_8bit.s b/src/zvm_m65/z80_instr_load_8bit.s index ad7eddf5..ec3270f5 100644 --- a/src/zvm_m65/z80_instr_load_8bit.s +++ b/src/zvm_m65/z80_instr_load_8bit.s @@ -362,37 +362,44 @@ Z80_instr_7E: ; LD A,(HL) Z80_instr_70: ; LD (HL),B lda REG_B - jmp (VEC_store_via_HL) + jsr (VEC_store_via_HL) + jmp ZVM_next Z80_instr_71: ; LD (HL),C lda REG_C - jmp (VEC_store_via_HL) + jsr (VEC_store_via_HL) + jmp ZVM_next Z80_instr_72: ; LD (HL),D lda REG_D - jmp (VEC_store_via_HL) + jsr (VEC_store_via_HL) + jmp ZVM_next Z80_instr_73: ; LD (HL),E lda REG_E - jmp (VEC_store_via_HL) + jsr (VEC_store_via_HL) + jmp ZVM_next Z80_instr_74: ; LD (HL),H lda REG_H - jmp (VEC_store_via_HL) + jsr (VEC_store_via_HL) + jmp ZVM_next Z80_instr_75: ; LD (HL),L lda REG_L - jmp (VEC_store_via_HL) + jsr (VEC_store_via_HL) + jmp ZVM_next Z80_instr_77: ; LD (HL),A lda REG_A - jmp (VEC_store_via_HL) + jsr (VEC_store_via_HL) + jmp ZVM_next ; XXX put here LD (IX+d),r family ; XXX put here LD (IY+d),r family @@ -404,7 +411,8 @@ Z80_instr_77: ; LD (HL),A Z80_instr_36: ; LD (HL),n jsr (VEC_fetch_value) - jmp (VEC_store_via_HL) + jsr (VEC_store_via_HL) + jmp ZVM_next ; XXX put here LD (IX+d),n family ; XXX put here LD (IY+d),n family diff --git a/src/zvm_m65/z80_instr_math_8bit.s b/src/zvm_m65/z80_instr_math_8bit.s index 87849057..f3377cc1 100644 --- a/src/zvm_m65/z80_instr_math_8bit.s +++ b/src/zvm_m65/z80_instr_math_8bit.s @@ -6,9 +6,179 @@ ; XXX put ADD instructions here ; XXX put SUB instructions here ; XXX put SBC instructions here -; XXX put AND instructions here -; XXX put OR instructions here -; XXX put XOR instructions here + + +!macro Z80_AND_common_int { + lda REG_F + and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_PF - Z80_NF - Z80_CF) + ora z80_ftable_AND, x + sta REG_F + jmp ZVM_next +} + +!macro Z80_AND_common { + and REG_A + sta REG_A + tax + + +Z80_AND_common_int +} + +!macro Z80_AND_REGn .REGn { + lda .REGn + +Z80_AND_common +} + +!macro Z80_AND_SELF { + ldx REG_A + +Z80_AND_common_int +} + +!macro Z80_AND_VIA_HL { + jsr (VEC_fetch_via_HL) + +Z80_AND_common +} + +!macro Z80_AND_n { + jsr (VEC_fetch_value) + +Z80_AND_common +} + +!macro Z80_AND_VIA_IX_d { + jsr (VEC_fetch_via_IX_d) + +Z80_AND_common +} + +!macro Z80_AND_VIA_IY_d { + jsr (VEC_fetch_via_IY_d) + +Z80_AND_common +} + +Z80_instr_A0: +Z80_AND_REGn REG_B ; AND B +Z80_instr_A1: +Z80_AND_REGn REG_C ; AND C +Z80_instr_A2: +Z80_AND_REGn REG_D ; AND D +Z80_instr_A3: +Z80_AND_REGn REG_E ; AND E +Z80_instr_A4: +Z80_AND_REGn REG_H ; AND H +Z80_instr_A5: +Z80_AND_REGn REG_L ; AND L +Z80_instr_A6: +Z80_AND_VIA_HL ; AND (HL) +Z80_instr_A7: +Z80_AND_SELF ; AND A +Z80_instr_E6: +Z80_AND_n ; AND n +Z80_instr_DD_A6: +Z80_AND_VIA_IX_d ; AND (IX+d) +Z80_instr_FD_A6: +Z80_AND_VIA_IY_d ; AND (IY+d) + +!macro Z80_OR_XOR_common_int { + lda REG_F + and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_PF - Z80_NF - Z80_CF) + ora z80_ftable_OR_XOR, x + sta REG_F + jmp ZVM_next +} + +!macro Z80_OR_common { + ora REG_A + sta REG_A + tax + + +Z80_OR_XOR_common_int +} + +!macro Z80_OR_REGn .REGn { + lda .REGn + +Z80_OR_common +} + +!macro Z80_OR_SELF { + ldx REG_A + +Z80_OR_XOR_common_int +} + +!macro Z80_OR_VIA_HL { + jsr (VEC_fetch_via_HL) + +Z80_OR_common +} + +!macro Z80_OR_n { + jsr (VEC_fetch_value) + +Z80_OR_common +} + +!macro Z80_OR_VIA_IX_d { + jsr (VEC_fetch_via_IX_d) + +Z80_OR_common +} + +!macro Z80_OR_VIA_IY_d { + jsr (VEC_fetch_via_IY_d) + +Z80_OR_common +} + +Z80_instr_B0: +Z80_OR_REGn REG_B ; OR B +Z80_instr_B1: +Z80_OR_REGn REG_C ; OR C +Z80_instr_B2: +Z80_OR_REGn REG_D ; OR D +Z80_instr_B3: +Z80_OR_REGn REG_E ; OR E +Z80_instr_B4: +Z80_OR_REGn REG_H ; OR H +Z80_instr_B5: +Z80_OR_REGn REG_L ; OR L +Z80_instr_B6: +Z80_OR_VIA_HL ; OR (HL) +Z80_instr_B7: +Z80_OR_SELF ; OR A +Z80_instr_F6: +Z80_OR_n ; OR n +Z80_instr_DD_B6: +Z80_OR_VIA_IX_d ; OR (IX+d) +Z80_instr_FD_B6: +Z80_OR_VIA_IY_d ; OR (IY+d) + +!macro Z80_XOR_common { + eor REG_A + sta REG_A + tax + + +Z80_OR_XOR_common_int +} + +!macro Z80_XOR_REGn .REGn { + lda .REGn + +Z80_XOR_common +} + +!macro Z80_XOR_SELF { + lda #$00 + sta REG_A + lda REG_F + and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_PF - Z80_NF - Z80_CF) + ora z80_ftable_OR_XOR + sta REG_F + jmp ZVM_next +} + +!macro Z80_XOR_VIA_HL { + jsr (VEC_fetch_via_HL) + +Z80_XOR_common +} + +!macro Z80_XOR_n { + jsr (VEC_fetch_value) + +Z80_XOR_common +} + +!macro Z80_XOR_VIA_IX_d { + jsr (VEC_fetch_via_IX_d) + +Z80_XOR_common +} + +!macro Z80_XOR_VIA_IY_d { + jsr (VEC_fetch_via_IY_d) + +Z80_XOR_common +} + +Z80_instr_A8: +Z80_XOR_REGn REG_B ; XOR B +Z80_instr_A9: +Z80_XOR_REGn REG_C ; XOR C +Z80_instr_AA: +Z80_XOR_REGn REG_D ; XOR D +Z80_instr_AB: +Z80_XOR_REGn REG_E ; XOR E +Z80_instr_AC: +Z80_XOR_REGn REG_H ; XOR H +Z80_instr_AD: +Z80_XOR_REGn REG_L ; XOR L +Z80_instr_AE: +Z80_XOR_VIA_HL ; XOR (HL) +Z80_instr_AF: +Z80_XOR_SELF ; XOR A +Z80_instr_EE: +Z80_XOR_n ; XOR n +Z80_instr_DD_AE: +Z80_XOR_VIA_IX_d ; XOR (IX+d) +Z80_instr_FD_AE: +Z80_XOR_VIA_IY_d ; XOR (IY+d) + ; XXX put CP instructions here Z80_instr_04: ; INC B diff --git a/src/zvm_m65/z80_tables.s b/src/zvm_m65/z80_tables.s index aaff7e1e..81c208bd 100644 --- a/src/zvm_m65/z80_tables.s +++ b/src/zvm_m65/z80_tables.s @@ -20,3 +20,11 @@ z80_ftable_INC: z80_ftable_DEC: +PUT_Z80_FTABLE_DEC + +z80_ftable_AND: + + +PUT_Z80_FTABLE_AND + +z80_ftable_OR_XOR: + + +PUT_Z80_FTABLE_OR_XOR diff --git a/src/zvm_m65/zvm_banking.s b/src/zvm_m65/zvm_banking.s index a90bddc5..99464a3c 100644 --- a/src/zvm_m65/zvm_banking.s +++ b/src/zvm_m65/zvm_banking.s @@ -146,47 +146,14 @@ ZVM_fetch_via_nn_bank_0: ZVM_fetch_via_nn_bank_1: ZVM_store_stack_bank_0: ZVM_store_stack_bank_1: - - ; XXX - rts - ZVM_store_via_HL_bank_0: - - ; XXX - jmp ZVM_next - ZVM_store_via_HL_bank_1: - - ; XXX - jmp ZVM_next - ZVM_store_via_IX_d_bank_0: - - ; XXX - jmp ZVM_next - ZVM_store_via_IX_d_bank_1: - - ; XXX - jmp ZVM_next - ZVM_store_via_IY_d_bank_0: - - ; XXX - jmp ZVM_next - ZVM_store_via_IY_d_bank_1: - - ; XXX - jmp ZVM_next - ZVM_store_via_nn_bank_0: - - ; XXX - jmp ZVM_next - ZVM_store_via_nn_bank_1: ; XXX - jmp ZVM_next - + rts \ No newline at end of file diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 1bce3f8b..06d6d912 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -153,30 +153,6 @@ Z80_instr_9C: ; SBC H Z80_instr_9D: ; SBC L Z80_instr_9E: ; SBC (HL) Z80_instr_9F: ; SBC A -Z80_instr_A0: ; AND B -Z80_instr_A1: ; AND C -Z80_instr_A2: ; AND D -Z80_instr_A3: ; AND E -Z80_instr_A4: ; AND H -Z80_instr_A5: ; AND L -Z80_instr_A6: ; AND (HL) -Z80_instr_A7: ; AND A -Z80_instr_A8: ; XOR B -Z80_instr_A9: ; XOR C -Z80_instr_AA: ; XOR D -Z80_instr_AB: ; XOR E -Z80_instr_AC: ; XOR H -Z80_instr_AD: ; XOR L -Z80_instr_AE: ; XOR (HL) -Z80_instr_AF: ; XOR A -Z80_instr_B0: ; OR B -Z80_instr_B1: ; OR C -Z80_instr_B2: ; OR D -Z80_instr_B3: ; OR E -Z80_instr_B4: ; OR H -Z80_instr_B5: ; OR L -Z80_instr_B6: ; OR (HL) -Z80_instr_B7: ; OR A Z80_instr_B8: ; CP B Z80_instr_B9: ; CP C Z80_instr_BA: ; CP D @@ -208,15 +184,12 @@ Z80_instr_DF: ; RST 18H Z80_instr_E0: ; RET PO Z80_instr_E3: ; EX (SP),HL Z80_instr_E4: ; CALL PO,nn -Z80_instr_E6: ; AND n Z80_instr_E7: ; RST 20H Z80_instr_E8: ; RET PE Z80_instr_EC: ; CALL PE,nn -Z80_instr_EE: ; XOR n Z80_instr_EF: ; RST 28H Z80_instr_F0: ; RET P Z80_instr_F4: ; CALL P,nn -Z80_instr_F6: ; OR n Z80_instr_F7: ; RST 30H Z80_instr_F8: ; RET M Z80_instr_F9: ; LD SP,HL @@ -304,9 +277,6 @@ Z80_instr_DD_86: ; ADD A,(IX+d) Z80_instr_DD_8E: ; ADC A,(IX+d) Z80_instr_DD_96: ; SUB (IX+d) Z80_instr_DD_9E: ; SBC (IX+d) -Z80_instr_DD_A6: ; AND (IX+d) -Z80_instr_DD_AE: ; XOR (IX+d) -Z80_instr_DD_B6: ; OR (IX+d) Z80_instr_DD_BE: ; CP (IX+d) Z80_instr_DD_E3: ; EX (SP),IX Z80_instr_DD_F9: ; LD SP,IX @@ -384,9 +354,6 @@ Z80_instr_FD_86: ; ADD A,(IY+d) Z80_instr_FD_8E: ; ADC A,(IY+d) Z80_instr_FD_96: ; SUB (IY+d) Z80_instr_FD_9E: ; SBC (IY+d) -Z80_instr_FD_A6: ; AND (IY+d) -Z80_instr_FD_AE: ; XOR (IY+d) -Z80_instr_FD_B6: ; OR (IY+d) Z80_instr_FD_BE: ; CP (IY+d) Z80_instr_FD_E3: ; EX (SP),IY Z80_instr_FD_F9: ; LD SP,IY diff --git a/tools/generate_z80_tables.cc b/tools/generate_z80_tables.cc index bf0d7f7a..91c01d0b 100644 --- a/tools/generate_z80_tables.cc +++ b/tools/generate_z80_tables.cc @@ -159,7 +159,7 @@ std::string generateIncTable(void) std::string generateDecTable(void) { std::stringstream outStr; - outStr << "!macro PUT_Z80_FTABLE_DEC {\n" << std::hex << std::setw(2) << std::setfill('0'); + outStr << "!macro PUT_Z80_FTABLE_DEC {\n"; for (uint16_t idx = 0; idx < 0x100; idx++) { @@ -176,6 +176,40 @@ std::string generateDecTable(void) return outStr.str() + "}\n\n\n"; } +std::string generateAndTable(void) +{ + std::stringstream outStr; + outStr << "!macro PUT_Z80_FTABLE_AND {\n"; + + for (uint16_t idx = 0; idx < 0x100; idx++) + { + uint8_t flags = Z80_HF | GLOBAL_Parity[idx]; + if (idx >= 0x80) flags |= Z80_SF; // for negative result + if (idx == 0) flags |= Z80_ZF; // for result equal 0 + + outStr << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << int(flags) << "\n"; + } + + return outStr.str() + "}\n\n\n"; +} + +std::string generateOrXorTable(void) +{ + std::stringstream outStr; + outStr << "!macro PUT_Z80_FTABLE_OR_XOR {\n"; + + for (uint16_t idx = 0; idx < 0x100; idx++) + { + uint8_t flags = GLOBAL_Parity[idx]; + if (idx >= 0x80) flags |= Z80_SF; // for negative result + if (idx == 0) flags |= Z80_ZF; // for result equal 0 + + outStr << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << int(flags) << "\n"; + } + + return outStr.str() + "}\n\n\n"; +} + std::string generateDaaTables() { std::string outStr; @@ -209,6 +243,8 @@ void writeTables() outFile << generateDisplacementTable(); outFile << generateIncTable(); outFile << generateDecTable(); + outFile << generateAndTable(); + outFile << generateOrXorTable(); outFile << generateDaaTables(); // XXX From 5679184d50224c51ad8d57eaa513727e9af4d31f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 20 Dec 2020 18:59:42 +0100 Subject: [PATCH 056/257] added illegal Z80 instruction opcodes --- src/zvm_m65/,aliases_zvm.s | 4 +++ src/zvm_m65/2000.zvm_vectable.s | 26 ++++++++-------- src/zvm_m65/z80_instr_bit.s | 14 +++++++++ src/zvm_m65/zvm_core.s | 53 ++++++++++++++++++++++++++++----- 4 files changed, 77 insertions(+), 20 deletions(-) diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index 483d5053..2e3eeeb0 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -37,6 +37,10 @@ !addr REG_IFF1 = $23 ; interrupt flip-flop flag 1 !addr REG_IFF2 = $24 ; interrupt flip-flop flag 2 +!addr REG_TMP1 = $25 ; emulation-specific temporary storage +!addr REG_TMP2 = $26 + + !addr VEC_fetch_value = $60 !addr VEC_fetch_stack = $62 !addr VEC_store_stack = $64 diff --git a/src/zvm_m65/2000.zvm_vectable.s b/src/zvm_m65/2000.zvm_vectable.s index b3abe91b..9ad98e99 100644 --- a/src/zvm_m65/2000.zvm_vectable.s +++ b/src/zvm_m65/2000.zvm_vectable.s @@ -74,7 +74,7 @@ Z80_vectab_CB_0: !word Z80_instr_CB_20, Z80_instr_CB_21, Z80_instr_CB_22, Z80_instr_CB_23, Z80_instr_CB_24, Z80_instr_CB_25, Z80_instr_CB_26, Z80_instr_CB_27 !word Z80_instr_CB_28, Z80_instr_CB_29, Z80_instr_CB_2A, Z80_instr_CB_2B, Z80_instr_CB_2C, Z80_instr_CB_2D, Z80_instr_CB_2E, Z80_instr_CB_2F - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_illeg_CB_30, Z80_illeg_CB_31, Z80_illeg_CB_32, Z80_illeg_CB_33, Z80_illeg_CB_34, Z80_illeg_CB_35, Z80_illeg_CB_36, Z80_illeg_CB_37 !word Z80_instr_CB_38, Z80_instr_CB_39, Z80_instr_CB_3A, Z80_instr_CB_3B, Z80_instr_CB_3C, Z80_instr_CB_3D, Z80_instr_CB_3E, Z80_instr_CB_3F !word Z80_instr_CB_40, Z80_instr_CB_41, Z80_instr_CB_42, Z80_instr_CB_43, Z80_instr_CB_44, Z80_instr_CB_45, Z80_instr_CB_46, Z80_instr_CB_47 @@ -182,16 +182,16 @@ Z80_vectab_ED_0: !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED !word Z80_instr_ED_40, Z80_instr_ED_41, Z80_instr_ED_42, Z80_instr_ED_43, Z80_instr_ED_44, Z80_instr_ED_45, Z80_instr_ED_46, Z80_instr_ED_47 - !word Z80_instr_ED_48, Z80_instr_ED_49, Z80_instr_ED_4A, Z80_instr_ED_4B, Z80_illegal__ED, Z80_instr_ED_4D, Z80_illegal__ED, Z80_instr_ED_4F + !word Z80_instr_ED_48, Z80_instr_ED_49, Z80_instr_ED_4A, Z80_instr_ED_4B, Z80_illeg_ED_4C, Z80_instr_ED_4D, Z80_illeg_ED_4E, Z80_instr_ED_4F - !word Z80_instr_ED_50, Z80_instr_ED_51, Z80_instr_ED_52, Z80_instr_ED_53, Z80_illegal__ED, Z80_illegal__ED, Z80_instr_ED_56, Z80_instr_ED_57 - !word Z80_instr_ED_58, Z80_instr_ED_59, Z80_instr_ED_5A, Z80_instr_ED_5B, Z80_illegal__ED, Z80_illegal__ED, Z80_instr_ED_5E, Z80_instr_ED_5F + !word Z80_instr_ED_50, Z80_instr_ED_51, Z80_instr_ED_52, Z80_instr_ED_53, Z80_illeg_ED_54, Z80_illeg_ED_55, Z80_instr_ED_56, Z80_instr_ED_57 + !word Z80_instr_ED_58, Z80_instr_ED_59, Z80_instr_ED_5A, Z80_instr_ED_5B, Z80_illeg_ED_5C, Z80_illeg_ED_5D, Z80_instr_ED_5E, Z80_instr_ED_5F - !word Z80_instr_ED_60, Z80_instr_ED_61, Z80_instr_ED_62, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_instr_ED_67 - !word Z80_instr_ED_68, Z80_instr_ED_69, Z80_instr_ED_6A, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_instr_ED_6F + !word Z80_instr_ED_60, Z80_instr_ED_61, Z80_instr_ED_62, Z80_illegal__ED, Z80_illeg_ED_64, Z80_illeg_ED_65, Z80_illeg_ED_66, Z80_instr_ED_67 + !word Z80_instr_ED_68, Z80_instr_ED_69, Z80_instr_ED_6A, Z80_illegal__ED, Z80_illeg_ED_6C, Z80_illeg_ED_6D, Z80_illeg_ED_6E, Z80_instr_ED_6F - !word Z80_illegal__ED, Z80_illegal__ED, Z80_instr_ED_72, Z80_instr_ED_73, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED - !word Z80_instr_ED_78, Z80_instr_ED_79, Z80_instr_ED_7A, Z80_instr_ED_7B, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_illeg_ED_70, Z80_illeg_ED_71, Z80_instr_ED_72, Z80_instr_ED_73, Z80_illeg_ED_74, Z80_illeg_ED_75, Z80_illeg_ED_76, Z80_illeg_ED_77 + !word Z80_instr_ED_78, Z80_instr_ED_79, Z80_instr_ED_7A, Z80_instr_ED_7B, Z80_illeg_ED_7C, Z80_illeg_ED_7D, Z80_illeg_ED_7E, Z80_illeg_ED_7F Z80_vectab_ED_1: @@ -295,12 +295,12 @@ Z80_vectab_DDCB_0: !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_6E, Z80_illegal__DDCB !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_76, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_6E, Z80_illegal__DDCB + !word Z80_illeg_DDCB_78, Z80_illeg_DDCB_79, Z80_illeg_DDCB_7A, Z80_illeg_DDCB_7B, Z80_illeg_DDCB_7C, Z80_illeg_DDCB_7D, Z80_instr_DDCB_7E, Z80_illeg_DDCB_7F Z80_vectab_DDCB_1: !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_86, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_7E, Z80_illegal__DDCB + !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_8E, Z80_illegal__DDCB !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_96, Z80_illegal__DDCB !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_9E, Z80_illegal__DDCB @@ -311,7 +311,7 @@ Z80_vectab_DDCB_1: !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_B6, Z80_illegal__DDCB !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_BE, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_C6, Z80_illegal__DDCB + !word Z80_illeg_DDCB_C0, Z80_illeg_DDCB_C1, Z80_illeg_DDCB_C2, Z80_illeg_DDCB_C3, Z80_illeg_DDCB_C4, Z80_illeg_DDCB_C5, Z80_instr_DDCB_C6, Z80_illeg_DDCB_C7 !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_CE, Z80_illegal__DDCB !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_D6, Z80_illegal__DDCB @@ -347,7 +347,7 @@ Z80_vectab_FDCB_0: !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_6E, Z80_illegal__FDCB !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_76, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_7E, Z80_illegal__FDCB + !word Z80_illeg_FDCB_78, Z80_illeg_FDCB_79, Z80_illeg_FDCB_7A, Z80_illeg_FDCB_7B, Z80_illeg_FDCB_7C, Z80_illeg_FDCB_7D, Z80_instr_FDCB_7E, Z80_illeg_FDCB_7F Z80_vectab_FDCB_1: @@ -363,7 +363,7 @@ Z80_vectab_FDCB_1: !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_B6, Z80_illegal__FDCB !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_BE, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_C6, Z80_illegal__FDCB + !word Z80_illeg_FDCB_C0, Z80_illeg_FDCB_C1, Z80_illeg_FDCB_C2, Z80_illeg_FDCB_C3, Z80_illeg_FDCB_C4, Z80_illeg_FDCB_C5, Z80_instr_FDCB_C6, Z80_illeg_FDCB_C7 !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_CE, Z80_illegal__FDCB !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_D6, Z80_illegal__FDCB diff --git a/src/zvm_m65/z80_instr_bit.s b/src/zvm_m65/z80_instr_bit.s index 0ec05417..8b086c9d 100644 --- a/src/zvm_m65/z80_instr_bit.s +++ b/src/zvm_m65/z80_instr_bit.s @@ -489,7 +489,14 @@ Z80_instr_DDCB_76: ; BIT 6,(IX+d) bne Z80_common_bitXYx_1 bra Z80_common_bitXYx_0 +Z80_illeg_DDCB_78: ; BIT 7,(IX+d) +Z80_illeg_DDCB_79: ; BIT 7,(IX+d) +Z80_illeg_DDCB_7A: ; BIT 7,(IX+d) +Z80_illeg_DDCB_7B: ; BIT 7,(IX+d) +Z80_illeg_DDCB_7C: ; BIT 7,(IX+d) +Z80_illeg_DDCB_7D: ; BIT 7,(IX+d) Z80_instr_DDCB_7E: ; BIT 7,(IX+d) +Z80_illeg_DDCB_7F: ; BIT 7,(IX+d) jsr (VEC_fetch_via_IX_d) and #%10000000 @@ -582,7 +589,14 @@ Z80_instr_FDCB_76: ; BIT 6,(IY+d) bne Z80_common_bitXYx_1 bra Z80_common_bitXYx_0 +Z80_illeg_FDCB_78: ; BIT 7,(IY+d) +Z80_illeg_FDCB_79: ; BIT 7,(IY+d) +Z80_illeg_FDCB_7A: ; BIT 7,(IY+d) +Z80_illeg_FDCB_7B: ; BIT 7,(IY+d) +Z80_illeg_FDCB_7C: ; BIT 7,(IY+d) +Z80_illeg_FDCB_7D: ; BIT 7,(IY+d) Z80_instr_FDCB_7E: ; BIT 7,(IY+d) +Z80_illeg_FDCB_7F: ; BIT 7,(IY+d) jsr (VEC_fetch_via_IY_d) and #%10000000 diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 06d6d912..c0746e1d 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -62,10 +62,17 @@ Z80_instr_6D: ; Z80_instr_7F: ; LD A,A ; For interrupts (not emulated as of yet) Z80_instr_ED_46: ; IM 0 +Z80_illeg_ED_4E: ; IM 0 +Z80_illeg_ED_66: ; IM 0 +Z80_illeg_ED_6E: ; IM 0 Z80_instr_ED_56: ; IM 1 +Z80_illeg_ED_76: ; IM 1 Z80_instr_ED_5E: ; IM 2 +Z80_illeg_ED_7E: ; IM 2 ; Real NOP Z80_instr_00: ; NOP +Z80_illeg_ED_77: ; NOP +Z80_illeg_ED_7F: ; NOP ; Dispatch via jumptable ZVM_next: +ZVM_DISPATCH Z80_vectab_0, Z80_vectab_1 Z80_instr_CB: +ZVM_DISPATCH Z80_vectab_CB_0, Z80_vectab_CB_1 ; #CB @@ -86,12 +93,6 @@ Z80_instr_FD: +ZVM_DISPATCH Z80_vectab_FD_0, Z80_vectab_FD_1 ; - - - - - - ; ; Not implemented yet - XXX implement them! @@ -371,7 +372,45 @@ Z80_instr_FDCB_1E: ; RR (IY+d) Z80_instr_FDCB_26: ; SLA (IY+d) Z80_instr_FDCB_2E: ; SRA (IY+d) Z80_instr_FDCB_3E: ; SRL (IY+d) +Z80_illeg_CB_30: ; SLL B +Z80_illeg_CB_31: ; SLL C +Z80_illeg_CB_32: ; SLL D +Z80_illeg_CB_33: ; SLL E +Z80_illeg_CB_34: ; SLL H +Z80_illeg_CB_35: ; SLL L +Z80_illeg_CB_36: ; SLL (HL) +Z80_illeg_CB_37: ; SLL A +Z80_illeg_ED_4C: ; NEG +Z80_illeg_ED_54: ; NEG +Z80_illeg_ED_55: ; RETN +Z80_illeg_ED_5C: ; NEG +Z80_illeg_ED_5D: ; RETN +Z80_illeg_ED_64: ; NEG +Z80_illeg_ED_65: ; RETN +Z80_illeg_ED_6C: ; NEG +Z80_illeg_ED_6D: ; RETN +Z80_illeg_ED_70: ; IN F,(C) +Z80_illeg_ED_71: ; OUT (C),0 +Z80_illeg_ED_74: ; NEG +Z80_illeg_ED_75: ; RETN +Z80_illeg_ED_7C: ; NEG +Z80_illeg_ED_7D: ; RETN +Z80_illeg_DDCB_C0: ; SET 0,(IX+d),B +Z80_illeg_DDCB_C1: ; SET 0,(IX+d),C +Z80_illeg_DDCB_C2: ; SET 0,(IX+d),D +Z80_illeg_DDCB_C3: ; SET 0,(IX+d),E +Z80_illeg_DDCB_C4: ; SET 0,(IX+d),H +Z80_illeg_DDCB_C5: ; SET 0,(IX+d),L +Z80_illeg_DDCB_C7: ; SET 0,(IX+d),A +Z80_illeg_FDCB_C0: ; SET 0,(IY+d),B +Z80_illeg_FDCB_C1: ; SET 0,(IY+d),C +Z80_illeg_FDCB_C2: ; SET 0,(IY+d),D +Z80_illeg_FDCB_C3: ; SET 0,(IY+d),E +Z80_illeg_FDCB_C4: ; SET 0,(IY+d),H +Z80_illeg_FDCB_C5: ; SET 0,(IY+d),L +Z80_illeg_FDCB_C7: ; SET 0,(IY+d),A jmp ZVM_next ; XXX - ; XXX add 'illegal' instructions + + ; XXX add illegal instructions for combination of prefixes From c1b264ef9ae23344830534002b02a7bb038c64e4 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 20 Dec 2020 20:54:09 +0100 Subject: [PATCH 057/257] added BIOS skeleton --- src/zvm_m65/z80_instr_general.s | 57 ++++++++++- src/zvm_m65/zvm_bios.s | 175 +++++++++++++++++++++++++++++++- src/zvm_m65/zvm_core.s | 8 +- 3 files changed, 230 insertions(+), 10 deletions(-) diff --git a/src/zvm_m65/z80_instr_general.s b/src/zvm_m65/z80_instr_general.s index dafaa89d..dc88a098 100644 --- a/src/zvm_m65/z80_instr_general.s +++ b/src/zvm_m65/z80_instr_general.s @@ -4,12 +4,63 @@ ; +Z80_instr_2F: ; CPL + + lda REG_A + eor #$FF + sta REG_A + + lda REG_F + ora #(Z80_HF + Z80_NF) + sta REG_F + jmp ZVM_next + +; XXX put NEG here + +Z80_instr_3F: ; CCF + + +Z80_PUT_0_NF + bbs0 REG_F,@1 +@0: + +Z80_PUT_0_HF + +Z80_PUT_1_CF + jmp ZVM_next +@1: + +Z80_PUT_1_HF + +Z80_PUT_0_CF + jmp ZVM_next + +Z80_instr_37: ; SCF + + +Z80_PUT_0_HF + +Z80_PUT_0_NF + +Z80_PUT_1_CF + jmp ZVM_next + +Z80_instr_76: ; HALT + + ; Used to call BIOS routines + + ldx #$01 ; default BIOS function, warm start + + lda REG_PC + sec + sbc #$64 + cmp #33 + bcs @1 + tax +@1: + txa + asl + tax + jmp (zvm_BIOS_vectable,x) + Z80_instr_F3: ; DI lda #$00 - +skip_2_bytes_trash_nvz - - ; FALLTROUGH + sta REG_IFF1 + sta REG_IFF2 + jmp ZVM_next Z80_instr_FB: ; EI diff --git a/src/zvm_m65/zvm_bios.s b/src/zvm_m65/zvm_bios.s index 5120a799..b722b289 100644 --- a/src/zvm_m65/zvm_bios.s +++ b/src/zvm_m65/zvm_bios.s @@ -3,4 +3,177 @@ ; Z80 Virtual Machine BIOS for CP/M ; -; XXX implement + +; Virtual BIOS memory map + +; $FE00 - $FE63 - jumptable, 3*33 bytes +; $FE63 - $FE84 - magic HALT instructions to select BIOS routines +; $FE85 - $FEFF - unused +; $FF00 - $FFFF - Disk Drive Tables, dynamically generated, $10 bytes for each one + + + + +zvm_BIOS_vectable: + + !word zvm_BIOS_00_BOOT + !word zvm_BIOS_01_WBOOT + !word zvm_BIOS_02_CONST + !word zvm_BIOS_03_CONIN + !word zvm_BIOS_04_CONOUT + !word zvm_BIOS_05_LIST + !word zvm_BIOS_06_AUXOUT + !word zvm_BIOS_07_AUXIN + !word zvm_BIOS_08_HOME + !word zvm_BIOS_09_SELDSK + !word zvm_BIOS_10_SETTRK + !word zvm_BIOS_11_SETSEC + !word zvm_BIOS_12_SETDMA + !word zvm_BIOS_13_READ + !word zvm_BIOS_14_WRITE + !word zvm_BIOS_15_LISTST + !word zvm_BIOS_16_SECTRN + !word zvm_BIOS_17_CONOST + !word zvm_BIOS_18_AUXIST + !word zvm_BIOS_19_AUXOST + !word zvm_BIOS_20_DEVTBL + !word zvm_BIOS_21_DEVINI + !word zvm_BIOS_22_DRVTBL + !word zvm_BIOS_23_MULTIO + !word zvm_BIOS_24_FLUSH + !word zvm_BIOS_25_MOVE + !word zvm_BIOS_26_TIME + !word zvm_BIOS_27_SELMEM + !word zvm_BIOS_28_SETBNK + !word zvm_BIOS_29_XMOVE + !word zvm_BIOS_30_USERF + !word zvm_BIOS_31_RESERV1 + !word zvm_BIOS_32_RESERV2 + +zvm_BIOS_00_BOOT: ; Cold start + + ; XXX !!! + + ; FALLTROUGH + +zvm_BIOS_01_WBOOT: ; Warm start +zvm_BIOS_31_RESERV1: ; Reserved +zvm_BIOS_32_RESERV2: ; Reserved + + ; XXX !!! + +zvm_BIOS_02_CONST: ; Check if input character available + + ; XXX !!! + +zvm_BIOS_03_CONIN: ; Console input + + ; XXX !!! + +zvm_BIOS_04_CONOUT: ; Console output + + ; XXX + +zvm_BIOS_05_LIST: ; Provide list of character output devices + + ; XXX + +zvm_BIOS_06_AUXOUT: ; AUX output + + ; XXX + +zvm_BIOS_07_AUXIN: ; AUX input + + ; XXX + +zvm_BIOS_08_HOME: ; Go to track 0 + + ; XXX !!! + +zvm_BIOS_09_SELDSK: ; Select drive + + ; XXX !!! + +zvm_BIOS_10_SETTRK: ; Set track number + + ; XXX !!! + +zvm_BIOS_11_SETSEC: ; Set sector number + + ; XXX !!! + +zvm_BIOS_12_SETDMA: ; Set DMA address + + ; XXX !!! + +zvm_BIOS_13_READ: ; Read sector + + ; XXX !!! + +zvm_BIOS_14_WRITE: ; Write sector + + ; XXX !!! + +zvm_BIOS_15_LISTST: ; List status + + ; XXX + +zvm_BIOS_16_SECTRN: ; Convert logical to physical sector + + ; XXX !!! + +zvm_BIOS_17_CONOST: ; Console output status + + ; XXX + +zvm_BIOS_18_AUXIST: ; AUX input status + + ; XXX + +zvm_BIOS_19_AUXOST: ; AUX output status + + ; XXX + +zvm_BIOS_20_DEVTBL: ; Character device table address + + ; XXX + +zvm_BIOS_21_DEVINI: ; Initialize character device + + ; XXX + +zvm_BIOS_22_DRVTBL: ; Disk drive table address + + ; XXX + +zvm_BIOS_23_MULTIO: ; Set number of logically consecutive sectors + + ; XXX !!! + +zvm_BIOS_24_FLUSH: ; Force buffer flushing for user deblocking + + ; XXX !!! + +zvm_BIOS_25_MOVE: ; Memory move + + ; XXX + +zvm_BIOS_26_TIME: ; Get or set time + + ; XXX !!! + +zvm_BIOS_27_SELMEM: ; Select memory bank + + ; XXX + +zvm_BIOS_28_SETBNK: ; Set bank for DMA operation + + ; XXX + +zvm_BIOS_29_XMOVE: ; Set bank if buffer is in bank other than 1 or 2 + + ; XXX + +zvm_BIOS_30_USERF: ; Implementation-specific functionality + + ; XXX implement function to save RAM DISK back to SD CARD diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index c0746e1d..e71b3775 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -41,8 +41,8 @@ ZVM_store_next: asl tax bcs @1 - jmp (.TAB_LO) ; execute opcode $00-$7F -@1: jmp (.TAB_HI) ; execute opcode $80-$FF + jmp (.TAB_LO,x) ; execute opcode $00-$7F +@1: jmp (.TAB_HI,x) ; execute opcode $80-$FF } @@ -114,14 +114,10 @@ Z80_instr_22: ; LD (nn),HL Z80_instr_27: ; DAA Z80_instr_29: ; ADD HL,HL Z80_instr_2A: ; LD HL,(nn) -Z80_instr_2F: ; CPL Z80_instr_31: ; LD SP,nn Z80_instr_32: ; LD (nn),A -Z80_instr_37: ; SCF Z80_instr_39: ; ADD HL,SP Z80_instr_3A: ; LD A,(nn) -Z80_instr_3F: ; CCF -Z80_instr_76: ; HALT Z80_instr_80: ; ADD A,B Z80_instr_81: ; ADD A,C Z80_instr_82: ; ADD A,D From 43d630a7ee663a6cff7b9258dafa29e6754c34f2 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 20 Dec 2020 21:02:01 +0100 Subject: [PATCH 058/257] bugfix for HALT --- src/zvm_m65/z80_instr_general.s | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/zvm_m65/z80_instr_general.s b/src/zvm_m65/z80_instr_general.s index dc88a098..aca40438 100644 --- a/src/zvm_m65/z80_instr_general.s +++ b/src/zvm_m65/z80_instr_general.s @@ -43,7 +43,10 @@ Z80_instr_76: ; HALT ldx #$01 ; default BIOS function, warm start - lda REG_PC + lda REG_PC+1 + cmp #$FE + bne @1 + lda REG_PC+0 sec sbc #$64 cmp #33 From 8a54fdbd5c4986ab4f67c7f873d84595f40a348b Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 20 Dec 2020 22:06:55 +0100 Subject: [PATCH 059/257] some BIOS work --- src/zvm_m65/,aliases_zvm.s | 3 +++ src/zvm_m65/zvm_bios.s | 41 ++++++++++++++++++++++++++++---------- 2 files changed, 33 insertions(+), 11 deletions(-) diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index 2e3eeeb0..0fd794b0 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -40,6 +40,9 @@ !addr REG_TMP1 = $25 ; emulation-specific temporary storage !addr REG_TMP2 = $26 +!addr VEC_MOVE_fetch = $30 ; vector to byte fetch routine, for BIOS routine MOVE +!addr VEC_MOVE_store = $32 ; vector to byte store routine, for BIOS routine MOVE +!addr VEC_DISKIO_store = $34 ; vector to byte store routine, for BIOS disk I/O operations !addr VEC_fetch_value = $60 !addr VEC_fetch_stack = $62 diff --git a/src/zvm_m65/zvm_bios.s b/src/zvm_m65/zvm_bios.s index b722b289..afd1f441 100644 --- a/src/zvm_m65/zvm_bios.s +++ b/src/zvm_m65/zvm_bios.s @@ -11,7 +11,7 @@ ; $FE85 - $FEFF - unused ; $FF00 - $FFFF - Disk Drive Tables, dynamically generated, $10 bytes for each one - +!addr zvm_BIOS_return = Z80_instr_C9 ; RET instruction zvm_BIOS_vectable: @@ -60,6 +60,10 @@ zvm_BIOS_01_WBOOT: ; Warm start zvm_BIOS_31_RESERV1: ; Reserved zvm_BIOS_32_RESERV2: ; Reserved + ; Reset BIOS vectors to point to bank 1 + + ; XXX setup VEC_MOVE_fetch, VEC_MOVE_store, VEC_DISKIO_store + ; XXX !!! zvm_BIOS_02_CONST: ; Check if input character available @@ -115,17 +119,17 @@ zvm_BIOS_14_WRITE: ; Write sector ; XXX !!! zvm_BIOS_15_LISTST: ; List status +zvm_BIOS_17_CONOST: ; Console output status - ; XXX + ; Always report the printer / output console as ready + lda #$FF + sta REG_A + jmp zvm_BIOS_return zvm_BIOS_16_SECTRN: ; Convert logical to physical sector ; XXX !!! -zvm_BIOS_17_CONOST: ; Console output status - - ; XXX - zvm_BIOS_18_AUXIST: ; AUX input status ; XXX @@ -156,7 +160,19 @@ zvm_BIOS_24_FLUSH: ; Force buffer flushing for user deblocking zvm_BIOS_25_MOVE: ; Memory move - ; XXX + lda REG_B + ora REG_C + beq @2 ; branch if nothing to be copied +@1: + jsr (VEC_MOVE_fetch) + jsr (VEC_MOVE_store) + inw REG_DE ; source address + inw REG_HL ; destination address + dew REG_BC ; count + bne @1 +@2: + ; XXX setup VEC_MOVE_fetch (to bank 1), VEC_MOVE_store (to bank 1) + jmp zvm_BIOS_return zvm_BIOS_26_TIME: ; Get or set time @@ -164,15 +180,18 @@ zvm_BIOS_26_TIME: ; Get or set time zvm_BIOS_27_SELMEM: ; Select memory bank - ; XXX + ; XXX !!! + ; XXX setup VEC_MOVE_fetch (REG_A), VEC_MOVE_store (REG_A) -zvm_BIOS_28_SETBNK: ; Set bank for DMA operation +zvm_BIOS_28_SETBNK: ; Set bank for disk DMA operation - ; XXX + ; XXX !!! + ; XXX setup VEC_DISKIO_store (REG_A) zvm_BIOS_29_XMOVE: ; Set bank if buffer is in bank other than 1 or 2 - ; XXX + ; XXX !!! + ; XXX setup VEC_MOVE_fetch (REG_C), VEC_MOVE_store (REG_B) zvm_BIOS_30_USERF: ; Implementation-specific functionality From db14831515c07f71759d7ac733c61b925ba9912f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 21 Dec 2020 20:16:15 +0100 Subject: [PATCH 060/257] IN/OUT Z80 instructions implemented --- src/zvm_m65/,aliases_zvm.s | 2 + src/zvm_m65/z80_instr_general.s | 3 +- src/zvm_m65/z80_instr_io.s | 77 +++++++++++++++++++++++++++++++ src/zvm_m65/z80_instr_math_8bit.s | 4 +- src/zvm_m65/z80_tables.s | 4 +- src/zvm_m65/zvm_banking.s | 14 ++++++ src/zvm_m65/zvm_bios.s | 3 +- src/zvm_m65/zvm_core.s | 16 ------- tools/generate_z80_tables.cc | 6 +-- 9 files changed, 103 insertions(+), 26 deletions(-) diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index 0fd794b0..dc569d1a 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -39,6 +39,8 @@ !addr REG_TMP1 = $25 ; emulation-specific temporary storage !addr REG_TMP2 = $26 +!addr ADDR_IO = $27 ; 16-bit address for fetching/storing the IO + !addr VEC_MOVE_fetch = $30 ; vector to byte fetch routine, for BIOS routine MOVE !addr VEC_MOVE_store = $32 ; vector to byte store routine, for BIOS routine MOVE diff --git a/src/zvm_m65/z80_instr_general.s b/src/zvm_m65/z80_instr_general.s index aca40438..9cae0afa 100644 --- a/src/zvm_m65/z80_instr_general.s +++ b/src/zvm_m65/z80_instr_general.s @@ -40,11 +40,12 @@ Z80_instr_37: ; SCF Z80_instr_76: ; HALT ; Used to call BIOS routines + ; XXX probably not the besta idea, GENCPC seems to do some relocations ldx #$01 ; default BIOS function, warm start lda REG_PC+1 - cmp #$FE + cmp #$FE ; bne @1 lda REG_PC+0 sec diff --git a/src/zvm_m65/z80_instr_io.s b/src/zvm_m65/z80_instr_io.s index fa10ff58..b47beb0b 100644 --- a/src/zvm_m65/z80_instr_io.s +++ b/src/zvm_m65/z80_instr_io.s @@ -2,3 +2,80 @@ ; ; Z80 input/output instructions ; + + +Z80_instr_DB: ; IN A,(n) + + jsr (VEC_fetch_value) + sta ADDR_IO+0 + lda REG_A + sta ADDR_IO+1 + jsr ZVM_fetch_IO + sta REG_A + jmp ZVM_next + +!macro Z80_IN_REGn .REGn { + lda REG_C + sta ADDR_IO+0 + lda REG_B + sta ADDR_IO+1 + jsr ZVM_fetch_IO + sta .REGn + tax + lda REG_F + and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_PF - Z80_NF) + ora z80_ftable_IN_OR_XOR, x + sta REG_F + jmp ZVM_next +} + +Z80_instr_ED_40: +Z80_IN_REGn REG_B ; IN B,(C) +Z80_instr_ED_48: +Z80_IN_REGn REG_C ; IN C,(C) +Z80_instr_ED_50: +Z80_IN_REGn REG_D ; IN D,(C) +Z80_instr_ED_58: +Z80_IN_REGn REG_E ; IN E,(C) +Z80_instr_ED_60: +Z80_IN_REGn REG_H ; IN H,(C) +Z80_instr_ED_68: +Z80_IN_REGn REG_L ; IN L,(C) +Z80_instr_ED_78: +Z80_IN_REGn REG_A ; IN A,(C) + +Z80_instr_D3: ; OUT (n),A + + jsr (VEC_fetch_value) + sta ADDR_IO+0 + lda REG_A + sta ADDR_IO+1 + jsr ZVM_store_IO + jmp ZVM_next + +Z80_instr_ED_41: ; OUT (C),B + + lda REG_C + sta ADDR_IO+0 + lda REG_B + sta ADDR_IO+1 + jsr ZVM_store_IO + jmp ZVM_next + +Z80_instr_ED_49: ; OUT (C),C + + lda REG_B + sta ADDR_IO+1 + lda REG_C + sta ADDR_IO+0 + jsr ZVM_store_IO + jmp ZVM_next + +!macro Z80_OUT_REGn .REGn { + lda REG_C + sta ADDR_IO+0 + lda REG_B + sta ADDR_IO+1 + lda .REGn + jsr ZVM_store_IO + jmp ZVM_next +} + +Z80_instr_ED_51: +Z80_OUT_REGn REG_D ; OUT (C),D +Z80_instr_ED_59: +Z80_OUT_REGn REG_E ; OUT (C),E +Z80_instr_ED_61: +Z80_OUT_REGn REG_H ; OUT (C),H +Z80_instr_ED_69: +Z80_OUT_REGn REG_L ; OUT (C),L +Z80_instr_ED_79: +Z80_OUT_REGn REG_A ; OUT (C),A diff --git a/src/zvm_m65/z80_instr_math_8bit.s b/src/zvm_m65/z80_instr_math_8bit.s index f3377cc1..0c3a33f6 100644 --- a/src/zvm_m65/z80_instr_math_8bit.s +++ b/src/zvm_m65/z80_instr_math_8bit.s @@ -69,7 +69,7 @@ Z80_instr_FD_A6: +Z80_AND_VIA_IY_d ; !macro Z80_OR_XOR_common_int { lda REG_F and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_PF - Z80_NF - Z80_CF) - ora z80_ftable_OR_XOR, x + ora z80_ftable_IN_OR_XOR, x sta REG_F jmp ZVM_next } @@ -142,7 +142,7 @@ Z80_instr_FD_B6: +Z80_OR_VIA_IY_d ; sta REG_A lda REG_F and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_PF - Z80_NF - Z80_CF) - ora z80_ftable_OR_XOR + ora z80_ftable_IN_OR_XOR sta REG_F jmp ZVM_next } diff --git a/src/zvm_m65/z80_tables.s b/src/zvm_m65/z80_tables.s index 81c208bd..ea049522 100644 --- a/src/zvm_m65/z80_tables.s +++ b/src/zvm_m65/z80_tables.s @@ -25,6 +25,6 @@ z80_ftable_AND: +PUT_Z80_FTABLE_AND -z80_ftable_OR_XOR: +z80_ftable_IN_OR_XOR: - +PUT_Z80_FTABLE_OR_XOR + +PUT_Z80_FTABLE_IN_OR_XOR diff --git a/src/zvm_m65/zvm_banking.s b/src/zvm_m65/zvm_banking.s index 99464a3c..d7baa80d 100644 --- a/src/zvm_m65/zvm_banking.s +++ b/src/zvm_m65/zvm_banking.s @@ -124,6 +124,20 @@ ZVM_set_bank_1: rts +ZVM_fetch_IO: + + ; XXX fetch addresses via ADDR_IO - but which ones are safe? Should we have a whitelist? + lda #$00 + sta REG_A + rts + +ZVM_store_IO: + + ; XXX again, we should have a whitelist of addresses + rts + + + ZVM_fetch_opcode_bank_0: ; XXX implement, should return byte in .A diff --git a/src/zvm_m65/zvm_bios.s b/src/zvm_m65/zvm_bios.s index afd1f441..f0924d6d 100644 --- a/src/zvm_m65/zvm_bios.s +++ b/src/zvm_m65/zvm_bios.s @@ -8,8 +8,7 @@ ; $FE00 - $FE63 - jumptable, 3*33 bytes ; $FE63 - $FE84 - magic HALT instructions to select BIOS routines -; $FE85 - $FEFF - unused -; $FF00 - $FFFF - Disk Drive Tables, dynamically generated, $10 bytes for each one +; $FE85 - $FFFF - unassigned as of yet !addr zvm_BIOS_return = Z80_instr_C9 ; RET instruction diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index e71b3775..1e7cbe99 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -169,12 +169,10 @@ Z80_instr_CD: ; CALL nn Z80_instr_CE: ; ADC A,n Z80_instr_CF: ; RST 08H Z80_instr_D0: ; RET NC -Z80_instr_D3: ; OUT (n), A Z80_instr_D4: ; CALL NC,nn Z80_instr_D6: ; SUB n Z80_instr_D7: ; RST 10H Z80_instr_D8: ; RET C -Z80_instr_DB: ; IN A,(n) Z80_instr_DC: ; CALL C,nn Z80_instr_DE: ; SBC A,n Z80_instr_DF: ; RST 18H @@ -277,37 +275,23 @@ Z80_instr_DD_9E: ; SBC (IX+d) Z80_instr_DD_BE: ; CP (IX+d) Z80_instr_DD_E3: ; EX (SP),IX Z80_instr_DD_F9: ; LD SP,IX -Z80_instr_ED_40: ; IN B,(C) -Z80_instr_ED_41: ; OUT (C),B Z80_instr_ED_42: ; SBC HL,BC Z80_instr_ED_43: ; LD (nn),BC Z80_instr_ED_44: ; NEG Z80_instr_ED_45: ; RETN -Z80_instr_ED_48: ; IN C,(C) -Z80_instr_ED_49: ; OUT (C),C Z80_instr_ED_4A: ; ADC HL,BC Z80_instr_ED_4B: ; LD BC,(nn) Z80_instr_ED_4D: ; RETTI -Z80_instr_ED_50: ; IN D,(C) -Z80_instr_ED_51: ; OUT (C),D Z80_instr_ED_52: ; SBC HL,DE Z80_instr_ED_53: ; LD (nn),DE -Z80_instr_ED_58: ; IN E,(C) -Z80_instr_ED_59: ; OUT (C),E Z80_instr_ED_5A: ; ADC HL,DE Z80_instr_ED_5B: ; LD DE,(nn) -Z80_instr_ED_60: ; IN H,(C) -Z80_instr_ED_61: ; OUT (C),H Z80_instr_ED_62: ; SBC HL,HL Z80_instr_ED_67: ; RRD -Z80_instr_ED_68: ; IN L,(C) -Z80_instr_ED_69: ; OUT (C),L Z80_instr_ED_6A: ; ADC HL,HL Z80_instr_ED_6F: ; RLD Z80_instr_ED_72: ; SBC HL,SP Z80_instr_ED_73: ; LD (nn),SP -Z80_instr_ED_78: ; IN A,(C) -Z80_instr_ED_79: ; OUT (C),A Z80_instr_ED_7A: ; ADC HL,SP Z80_instr_ED_7B: ; LD SP,(nn) Z80_instr_ED_A0: ; LDI diff --git a/tools/generate_z80_tables.cc b/tools/generate_z80_tables.cc index 91c01d0b..df0ee434 100644 --- a/tools/generate_z80_tables.cc +++ b/tools/generate_z80_tables.cc @@ -193,10 +193,10 @@ std::string generateAndTable(void) return outStr.str() + "}\n\n\n"; } -std::string generateOrXorTable(void) +std::string generateInOrXorTable(void) { std::stringstream outStr; - outStr << "!macro PUT_Z80_FTABLE_OR_XOR {\n"; + outStr << "!macro PUT_Z80_FTABLE_IN_OR_XOR {\n"; for (uint16_t idx = 0; idx < 0x100; idx++) { @@ -244,7 +244,7 @@ void writeTables() outFile << generateIncTable(); outFile << generateDecTable(); outFile << generateAndTable(); - outFile << generateOrXorTable(); + outFile << generateInOrXorTable(); outFile << generateDaaTables(); // XXX From 8e7ec917297f5eb3cc1e6c9f8644e4de4fa5509c Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 21 Dec 2020 20:29:05 +0100 Subject: [PATCH 061/257] cleanup --- src/zvm_m65/zvm_bios.s | 32 ++++++++++++++++++++++++++++---- src/zvm_m65/zvm_core.s | 41 ++++++++++++++++++++--------------------- 2 files changed, 48 insertions(+), 25 deletions(-) diff --git a/src/zvm_m65/zvm_bios.s b/src/zvm_m65/zvm_bios.s index f0924d6d..17cd7405 100644 --- a/src/zvm_m65/zvm_bios.s +++ b/src/zvm_m65/zvm_bios.s @@ -53,18 +53,42 @@ zvm_BIOS_00_BOOT: ; Cold start ; XXX !!! + ; XXX fetch RAM disk image + ; XXX close all the files, reset I/O, set screen mode + ; XXX clear memory + + ; Reset registers and internal emulation data + + ldz #$00 ; .Z is required to be 0 all the time + lda #$00 + tay +@1: + sta REG_AF, y + iny + cmp #(REG_IFF2+1) + bne @1 + + dew REG_AF ; AF and SP have $FFFF value on start + dew REG_SP + + ; XXX load CPM3.SYS + ; FALLTROUGH zvm_BIOS_01_WBOOT: ; Warm start zvm_BIOS_31_RESERV1: ; Reserved zvm_BIOS_32_RESERV2: ; Reserved - ; Reset BIOS vectors to point to bank 1 - - ; XXX setup VEC_MOVE_fetch, VEC_MOVE_store, VEC_DISKIO_store - ; XXX !!! + ; Select bank 1 as the default one + + jsr ZVM_set_bank_1 + + ; XXX put command processor in memory + + ; XXX setup VEC_MOVE_fetch, VEC_MOVE_store, VEC_DISKIO_store somewhere + zvm_BIOS_02_CONST: ; Check if input character available ; XXX !!! diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 1e7cbe99..22a72078 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -5,27 +5,8 @@ ZVM_entry: - jsr ZVM_init - ; XXX fetch BDOS and Command Processor - jmp ZVM_next - -ZVM_init: - - ; Reset registers and internal data - - ldz #$00 ; .Z is required to be 0 all the time - lda #$00 - tay -@1: - sta REG_AF, y - iny - cmp #(REG_IFF2+1) - bne @1 - - ; XXX what is the initial SP value? - ; XXX clean memory - - jmp ZVM_set_bank_1 + ; XXX mark that this is the first start of CP/M iin the lifecycle, display BIOS information + jmp zvm_BIOS_00_BOOT ZVM_store_next: @@ -91,6 +72,24 @@ Z80_instr_FD: +ZVM_DISPATCH Z80_vectab_FD_0, Z80_vectab_FD_1 ; + + + + + + + + + + + + + + + + + + From 4f3917370550290a8eead2e755f42a353a9a07ce Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 21 Dec 2020 23:28:12 +0100 Subject: [PATCH 062/257] turned more repeating code into macros --- src/zvm_m65/z80_instr_load_16bit.s | 15 ++ src/zvm_m65/z80_instr_load_8bit.s | 307 +++++------------------------ src/zvm_m65/zvm_core.s | 8 +- 3 files changed, 69 insertions(+), 261 deletions(-) diff --git a/src/zvm_m65/z80_instr_load_16bit.s b/src/zvm_m65/z80_instr_load_16bit.s index 265589fc..fa41e3e8 100644 --- a/src/zvm_m65/z80_instr_load_16bit.s +++ b/src/zvm_m65/z80_instr_load_16bit.s @@ -4,6 +4,21 @@ ; +!macro Z80_LD_REGnn_nn .REGnn { + jsr (VEC_fetch_value) + sta .REGnn+0 + jsr (VEC_fetch_value) + sta .REGnn+1 + jmp ZVM_next +} + +Z80_instr_01: +Z80_LD_REGnn_nn REG_BC ; LD BC,nn +Z80_instr_11: +Z80_LD_REGnn_nn REG_DE ; LD DE,nn +Z80_instr_21: +Z80_LD_REGnn_nn REG_HL ; LD HL,nn +Z80_instr_31: +Z80_LD_REGnn_nn REG_SP ; LD SP,nn +Z80_instr_DD_21: +Z80_LD_REGnn_nn REG_IX ; LD IX,nn +Z80_instr_FD_21: +Z80_LD_REGnn_nn REG_IY ; LD IY,nn + !macro Z80_PUSH_REGnn .REGnn { lda .REGnn+1 jsr (VEC_store_stack) diff --git a/src/zvm_m65/z80_instr_load_8bit.s b/src/zvm_m65/z80_instr_load_8bit.s index ec3270f5..fdf14ce6 100644 --- a/src/zvm_m65/z80_instr_load_8bit.s +++ b/src/zvm_m65/z80_instr_load_8bit.s @@ -4,261 +4,60 @@ ; -; -; load register with other register -; - -Z80_instr_41: ; LD B,C - - lda REG_C - sta REG_B - jmp ZVM_next - -Z80_instr_42: ; LD B,D - - lda REG_D - sta REG_B - jmp ZVM_next - -Z80_instr_43: ; LD B,E - - lda REG_E - sta REG_B - jmp ZVM_next - -Z80_instr_44: ; LD B,H - - lda REG_H - sta REG_B - jmp ZVM_next - -Z80_instr_45: ; LD B,L - - lda REG_L - sta REG_B - jmp ZVM_next - -Z80_instr_47: ; LD B,A - - lda REG_A - sta REG_B - jmp ZVM_next - -Z80_instr_48: ; LD C,B - - lda REG_B - sta REG_C - jmp ZVM_next - -Z80_instr_4A: ; LD C,D - - lda REG_D - sta REG_C - jmp ZVM_next - -Z80_instr_4B: ; LD C,E - - lda REG_E - sta REG_C - jmp ZVM_next - -Z80_instr_4C: ; LD C,H - - lda REG_H - sta REG_C - jmp ZVM_next - -Z80_instr_4D: ; LD C,L - - lda REG_L - sta REG_C - jmp ZVM_next - -Z80_instr_4F: ; LD C,A - - lda REG_A - sta REG_C - jmp ZVM_next - -Z80_instr_50: ; LD D,B - - lda REG_B - sta REG_D - jmp ZVM_next - -Z80_instr_51: ; LD D,C - - lda REG_C - sta REG_D - jmp ZVM_next - -Z80_instr_53: ; LD D,E - - lda REG_E - sta REG_D - jmp ZVM_next - -Z80_instr_54: ; LD D,H - - lda REG_H - sta REG_D - jmp ZVM_next - -Z80_instr_55: ; LD D,L - - lda REG_L - sta REG_D - jmp ZVM_next - -Z80_instr_57: ; LD D,A - - lda REG_A - sta REG_D - jmp ZVM_next - -Z80_instr_58: ; LD E,B - - lda REG_B - sta REG_E - jmp ZVM_next - -Z80_instr_59: ; LD E,C - - lda REG_C - sta REG_E - jmp ZVM_next - -Z80_instr_5A: ; LD E,D - - lda REG_D - sta REG_E - jmp ZVM_next - -Z80_instr_5C: ; LD E,H - - lda REG_H - sta REG_E - jmp ZVM_next - -Z80_instr_5D: ; LD E,L - - lda REG_L - sta REG_E - jmp ZVM_next - -Z80_instr_5F: ; LD E,A - - lda REG_A - sta REG_E - jmp ZVM_next - -Z80_instr_60: ; LD H,B - - lda REG_B - sta REG_H - jmp ZVM_next - -Z80_instr_61: ; LD H,C - - lda REG_C - sta REG_H - jmp ZVM_next - -Z80_instr_62: ; LD H,D - - lda REG_D - sta REG_H - jmp ZVM_next - -Z80_instr_63: ; LD H,E - - lda REG_E - sta REG_H - jmp ZVM_next - -Z80_instr_65: ; LD H,L - - lda REG_L - sta REG_H - jmp ZVM_next - -Z80_instr_67: ; LD H,A - - lda REG_A - sta REG_H - rts - -Z80_instr_68: ; LD L,B - - lda REG_B - sta REG_L - jmp ZVM_next - -Z80_instr_69: ; LD L,C - - lda REG_C - sta REG_L - jmp ZVM_next - -Z80_instr_6A: ; LD L,D - - lda REG_D - sta REG_L - jmp ZVM_next - -Z80_instr_6B: ; LD L,E - - lda REG_E - sta REG_L - jmp ZVM_next - -Z80_instr_6C: ; LD L,H - - lda REG_H - sta REG_L - jmp ZVM_next - -Z80_instr_6F: ; LD L,A - - lda REG_A - sta REG_L - jmp ZVM_next - -Z80_instr_78: ; LD A,B - - lda REG_B - sta REG_A - jmp ZVM_next - -Z80_instr_79: ; LD A,C - - lda REG_C - sta REG_A - jmp ZVM_next - -Z80_instr_7A: ; LD A,D - - lda REG_D - sta REG_A - jmp ZVM_next - -Z80_instr_7B: ; LD A,E - - lda REG_E - sta REG_A - jmp ZVM_next - -Z80_instr_7C: ; LD A,H - - lda REG_H - sta REG_A - jmp ZVM_next - -Z80_instr_7D: ; LD A,L - - lda REG_L - sta REG_A +!macro Z80_LD_REGn_REGn .REGn1, .REGn2 { + lda .REGn2 + sta .REGn1 jmp ZVM_next +} + +Z80_instr_41: +Z80_LD_REGn_REGn REG_B, REG_C ; LD B,C +Z80_instr_42: +Z80_LD_REGn_REGn REG_B, REG_D ; LD B,D +Z80_instr_43: +Z80_LD_REGn_REGn REG_B, REG_E ; LD B,E +Z80_instr_44: +Z80_LD_REGn_REGn REG_B, REG_H ; LD B,H +Z80_instr_45: +Z80_LD_REGn_REGn REG_B, REG_L ; LD B,L +Z80_instr_47: +Z80_LD_REGn_REGn REG_B, REG_A ; LD B,A + +Z80_instr_48: +Z80_LD_REGn_REGn REG_C, REG_B ; LD C,B +Z80_instr_4A: +Z80_LD_REGn_REGn REG_C, REG_D ; LD C,D +Z80_instr_4B: +Z80_LD_REGn_REGn REG_C, REG_E ; LD C,E +Z80_instr_4C: +Z80_LD_REGn_REGn REG_C, REG_H ; LD C,H +Z80_instr_4D: +Z80_LD_REGn_REGn REG_C, REG_L ; LD C,L +Z80_instr_4F: +Z80_LD_REGn_REGn REG_C, REG_A ; LD C,A + +Z80_instr_50: +Z80_LD_REGn_REGn REG_D, REG_B ; LD D,B +Z80_instr_51: +Z80_LD_REGn_REGn REG_D, REG_C ; LD D,C +Z80_instr_53: +Z80_LD_REGn_REGn REG_D, REG_E ; LD D,E +Z80_instr_54: +Z80_LD_REGn_REGn REG_D, REG_H ; LD D,H +Z80_instr_55: +Z80_LD_REGn_REGn REG_D, REG_L ; LD D,L +Z80_instr_57: +Z80_LD_REGn_REGn REG_D, REG_A ; LD D,A + +Z80_instr_58: +Z80_LD_REGn_REGn REG_E, REG_B ; LD E,B +Z80_instr_59: +Z80_LD_REGn_REGn REG_E, REG_C ; LD E,C +Z80_instr_5A: +Z80_LD_REGn_REGn REG_E, REG_D ; LD E,D +Z80_instr_5C: +Z80_LD_REGn_REGn REG_E, REG_H ; LD E,H +Z80_instr_5D: +Z80_LD_REGn_REGn REG_E, REG_L ; LD E,L +Z80_instr_5F: +Z80_LD_REGn_REGn REG_E, REG_A ; LD E,A + +Z80_instr_60: +Z80_LD_REGn_REGn REG_H, REG_B ; LD H,B +Z80_instr_61: +Z80_LD_REGn_REGn REG_H, REG_C ; LD H,C +Z80_instr_62: +Z80_LD_REGn_REGn REG_H, REG_D ; LD H,D +Z80_instr_63: +Z80_LD_REGn_REGn REG_H, REG_E ; LD H,E +Z80_instr_65: +Z80_LD_REGn_REGn REG_H, REG_L ; LD H,L +Z80_instr_67: +Z80_LD_REGn_REGn REG_H, REG_A ; LD H,A + +Z80_instr_68: +Z80_LD_REGn_REGn REG_L, REG_B ; LD L,B +Z80_instr_69: +Z80_LD_REGn_REGn REG_L, REG_C ; LD L,C +Z80_instr_6A: +Z80_LD_REGn_REGn REG_L, REG_D ; LD L,D +Z80_instr_6B: +Z80_LD_REGn_REGn REG_L, REG_E ; LD L,E +Z80_instr_6C: +Z80_LD_REGn_REGn REG_L, REG_H ; LD L,H +Z80_instr_6F: +Z80_LD_REGn_REGn REG_L, REG_A ; LD L,A + +Z80_instr_78: +Z80_LD_REGn_REGn REG_A, REG_B ; LD A,B +Z80_instr_79: +Z80_LD_REGn_REGn REG_A, REG_C ; LD A,C +Z80_instr_7A: +Z80_LD_REGn_REGn REG_A, REG_D ; LD A,D +Z80_instr_7B: +Z80_LD_REGn_REGn REG_A, REG_E ; LD A,E +Z80_instr_7C: +Z80_LD_REGn_REGn REG_A, REG_H ; LD A,H +Z80_instr_7D: +Z80_LD_REGn_REGn REG_A, REG_L ; LD A,L ; ; load register with immediate value diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 22a72078..5c08f384 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -100,20 +100,16 @@ Z80_instr_FD: +ZVM_DISPATCH Z80_vectab_FD_0, Z80_vectab_FD_1 ; Z80_instr_DD_CB: ; #DDCB Z80_instr_FD_CB: ; #FDCB -Z80_instr_01: ; LD BC,nn Z80_instr_02: ; LD (BC),A Z80_instr_09: ; ADD HL,BC -Z80_instr_0A: ; LD A,(BC) -Z80_instr_11: ; LD DE,nn +Z80_instr_0A: ; LD A,(BC) Z80_instr_12: ; LD (DE),A Z80_instr_19: ; ADD HL,DE Z80_instr_1A: ; LD A,(DE) -Z80_instr_21: ; LD HL,nn Z80_instr_22: ; LD (nn),HL Z80_instr_27: ; DAA Z80_instr_29: ; ADD HL,HL Z80_instr_2A: ; LD HL,(nn) -Z80_instr_31: ; LD SP,nn Z80_instr_32: ; LD (nn),A Z80_instr_39: ; ADD HL,SP Z80_instr_3A: ; LD A,(nn) @@ -248,7 +244,6 @@ Z80_instr_CB_3E: ; SRL (HL) Z80_instr_CB_3F: ; SRL A Z80_instr_DD_09: ; ADD IX,BC Z80_instr_DD_19: ; ADD IX,DE -Z80_instr_DD_21: ; LD IX,nn Z80_instr_DD_22: ; LD (nn),IX Z80_instr_DD_29: ; ADD IX,IX Z80_instr_DD_2A: ; LD IX,(nn) @@ -311,7 +306,6 @@ Z80_instr_ED_BA: ; INDR Z80_instr_ED_BB: ; OTDR Z80_instr_FD_09: ; ADD IY,BC Z80_instr_FD_19: ; ADD IY,DE -Z80_instr_FD_21: ; LD IY,nn Z80_instr_FD_22: ; LD (nn),IY Z80_instr_FD_29: ; ADD IY,IY Z80_instr_FD_2A: ; LD IY,(nn) From 8f8428ea493c60c7fe2d86c0f3a38330480bdcd8 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 22 Dec 2020 15:38:04 +0100 Subject: [PATCH 063/257] DAA implemented --- src/zvm_m65/z80_instr_general.s | 53 +++++++++++++-- src/zvm_m65/z80_tables.s | 68 +++++++++++++++++++ src/zvm_m65/zvm_banking.s | 112 +------------------------------- src/zvm_m65/zvm_core.s | 1 - tools/generate_z80_tables.cc | 96 +++++++++++++++++++++++++-- 5 files changed, 209 insertions(+), 121 deletions(-) diff --git a/src/zvm_m65/z80_instr_general.s b/src/zvm_m65/z80_instr_general.s index 9cae0afa..ed2f4aeb 100644 --- a/src/zvm_m65/z80_instr_general.s +++ b/src/zvm_m65/z80_instr_general.s @@ -4,7 +4,48 @@ ; -Z80_instr_2F: ; CPL +!macro Z80_DAA_TAB .OTAB, .FTAB { + ldx REG_A + lda .OTAB,x + sta REG_A + lda .FTAB,x + sta REG_F + jmp ZVM_next +} + +Z80_instr_27: ; DAA + + bbs1 REG_F, @N1 +@N0: + bbs0 REG_F, @N0C1 +@N0C0: + bbs4 REG_F, @N0C0H1 +@N0C0H0: + +Z80_DAA_TAB z80_otable_DAA_N0C0H0, z80_ftable_DAA_N0C0H0 +@N0C0H1: + +Z80_DAA_TAB z80_otable_DAA_N0C0H1, z80_ftable_DAA_N0C0H1 +@N0C1: + bbs4 REG_F, @N0C1H1 +@N0C1H0: + +Z80_DAA_TAB z80_otable_DAA_N0C1H0, z80_ftable_DAA_N0C1H0 +@N0C1H1: + +Z80_DAA_TAB z80_otable_DAA_N0C1H1, z80_ftable_DAA_N0C1H1 +@N1: + bbs0 REG_F, @N1C1 +@N1C0: + bbs4 REG_F, @N1C0H1 +@N1C0H0: + +Z80_DAA_TAB z80_otable_DAA_N1C0H0, z80_ftable_DAA_N1C0H0 +@N1C0H1: + +Z80_DAA_TAB z80_otable_DAA_N1C0H1, z80_ftable_DAA_N1C0H1 +@N1C1: + bbs4 REG_F, @N1C1H1 +@N1C1H0: + +Z80_DAA_TAB z80_otable_DAA_N1C1H0, z80_ftable_DAA_N1C1H0 +@N1C1H1: + +Z80_DAA_TAB z80_otable_DAA_N1C1H1, z80_ftable_DAA_N1C1H1 + +Z80_instr_2F: ; CPL lda REG_A eor #$FF @@ -17,7 +58,7 @@ Z80_instr_2F: ; CPL ; XXX put NEG here -Z80_instr_3F: ; CCF +Z80_instr_3F: ; CCF +Z80_PUT_0_NF bbs0 REG_F,@1 @@ -30,14 +71,14 @@ Z80_instr_3F: ; CCF +Z80_PUT_0_CF jmp ZVM_next -Z80_instr_37: ; SCF +Z80_instr_37: ; SCF +Z80_PUT_0_HF +Z80_PUT_0_NF +Z80_PUT_1_CF jmp ZVM_next -Z80_instr_76: ; HALT +Z80_instr_76: ; HALT ; Used to call BIOS routines ; XXX probably not the besta idea, GENCPC seems to do some relocations @@ -59,14 +100,14 @@ Z80_instr_76: ; HALT tax jmp (zvm_BIOS_vectable,x) -Z80_instr_F3: ; DI +Z80_instr_F3: ; DI lda #$00 sta REG_IFF1 sta REG_IFF2 jmp ZVM_next -Z80_instr_FB: ; EI +Z80_instr_FB: ; EI lda #Z80_PF sta REG_IFF1 diff --git a/src/zvm_m65/z80_tables.s b/src/zvm_m65/z80_tables.s index ea049522..b7545b59 100644 --- a/src/zvm_m65/z80_tables.s +++ b/src/zvm_m65/z80_tables.s @@ -28,3 +28,71 @@ z80_ftable_AND: z80_ftable_IN_OR_XOR: +PUT_Z80_FTABLE_IN_OR_XOR + +; +; That horrific DAA instruction +; + +z80_otable_DAA_N0C0H0: + + +PUT_Z80_OTABLE_DAA_N0C0H0 + +z80_otable_DAA_N0C0H1: + + +PUT_Z80_OTABLE_DAA_N0C0H1 + +z80_otable_DAA_N0C1H0: + + +PUT_Z80_OTABLE_DAA_N0C1H0 + +z80_otable_DAA_N0C1H1: + + +PUT_Z80_OTABLE_DAA_N0C1H1 + +z80_otable_DAA_N1C0H0: + + +PUT_Z80_OTABLE_DAA_N1C0H0 + +z80_otable_DAA_N1C0H1: + + +PUT_Z80_OTABLE_DAA_N1C0H1 + +z80_otable_DAA_N1C1H0: + + +PUT_Z80_OTABLE_DAA_N1C1H0 + +z80_otable_DAA_N1C1H1: + + +PUT_Z80_OTABLE_DAA_N1C1H1 + +z80_ftable_DAA_N0C0H0: + + +PUT_Z80_FTABLE_DAA_N0C0H0 + +z80_ftable_DAA_N0C0H1: + + +PUT_Z80_FTABLE_DAA_N0C0H1 + +z80_ftable_DAA_N0C1H0: + + +PUT_Z80_FTABLE_DAA_N0C1H0 + +z80_ftable_DAA_N0C1H1: + + +PUT_Z80_FTABLE_DAA_N0C1H1 + +z80_ftable_DAA_N1C0H0: + + +PUT_Z80_FTABLE_DAA_N1C0H0 + +z80_ftable_DAA_N1C0H1: + + +PUT_Z80_FTABLE_DAA_N1C0H1 + +z80_ftable_DAA_N1C1H0: + + +PUT_Z80_FTABLE_DAA_N1C1H0 + +z80_ftable_DAA_N1C1H1: + + +PUT_Z80_FTABLE_DAA_N1C1H1 diff --git a/src/zvm_m65/zvm_banking.s b/src/zvm_m65/zvm_banking.s index d7baa80d..3403d769 100644 --- a/src/zvm_m65/zvm_banking.s +++ b/src/zvm_m65/zvm_banking.s @@ -6,121 +6,13 @@ ZVM_set_bank_0: - ; XXX consider switchink banks using DMA list - - lda #ZVM_fetch_value_bank_0 - sta VEC_fetch_value+1 - - lda #ZVM_fetch_stack_bank_0 - sta VEC_fetch_stack+1 - - lda #ZVM_store_stack_bank_0 - sta VEC_store_stack+1 - - lda #ZVM_fetch_via_HL_bank_0 - sta VEC_fetch_via_HL+1 - - lda #ZVM_store_via_HL_bank_0 - sta VEC_store_via_HL+1 - - lda #ZVM_fetch_via_IX_d_bank_0 - sta VEC_fetch_via_IX_d+1 - - lda #ZVM_fetch_via_IY_d_bank_0 - sta VEC_fetch_via_IY_d+1 - - lda #ZVM_store_via_IX_d_bank_0 - sta VEC_store_via_IX_d+1 - - lda #ZVM_store_via_IY_d_bank_0 - sta VEC_store_via_IY_d+1 - - lda #ZVM_fetch_via_nn_bank_0 - sta VEC_fetch_via_nn+1 - - lda #ZVM_store_via_nn_bank_0 - sta VEC_store_via_nn+1 + ; XXX use DMAgic to switch banks (vectors on zeropage) rts ZVM_set_bank_1: - lda #ZVM_fetch_value_bank_1 - sta VEC_fetch_value+1 - - lda #ZVM_fetch_stack_bank_1 - sta VEC_fetch_stack+1 - - lda #ZVM_store_stack_bank_1 - sta VEC_store_stack+1 - - lda #ZVM_fetch_via_HL_bank_1 - sta VEC_fetch_via_HL+1 - - lda #ZVM_store_via_HL_bank_1 - sta VEC_store_via_HL+1 - - lda #ZVM_fetch_via_IX_d_bank_1 - sta VEC_fetch_via_IX_d+1 - - lda #ZVM_fetch_via_IY_d_bank_1 - sta VEC_fetch_via_IY_d+1 - - lda #ZVM_store_via_IX_d_bank_1 - sta VEC_store_via_IX_d+1 - - lda #ZVM_store_via_IY_d_bank_1 - sta VEC_store_via_IY_d+1 - - lda #ZVM_fetch_via_nn_bank_1 - sta VEC_fetch_via_nn+1 - - lda #ZVM_store_via_nn_bank_1 - sta VEC_store_via_nn+1 + ; XXX use DMAgic to switch banks (vectors on zeropage) rts diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 5c08f384..addeb42a 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -107,7 +107,6 @@ Z80_instr_12: ; LD (DE),A Z80_instr_19: ; ADD HL,DE Z80_instr_1A: ; LD A,(DE) Z80_instr_22: ; LD (nn),HL -Z80_instr_27: ; DAA Z80_instr_29: ; ADD HL,HL Z80_instr_2A: ; LD HL,(nn) Z80_instr_32: ; LD (nn),A diff --git a/tools/generate_z80_tables.cc b/tools/generate_z80_tables.cc index df0ee434..db236721 100644 --- a/tools/generate_z80_tables.cc +++ b/tools/generate_z80_tables.cc @@ -210,14 +210,102 @@ std::string generateInOrXorTable(void) return outStr.str() + "}\n\n\n"; } + + +typedef struct FlagsDAA +{ + uint8_t N = 0; // input/output + uint8_t C = 0; // input/output + uint8_t H = 0; // input/output + uint8_t S = 0; // output + uint8_t Z = 0; // output + uint8_t P = 0; // output + uint8_t X = 0; // output + uint8_t Y = 0; // output + +} Flags; + + +uint8_t calculateDAA(FlagsDAA &flags, uint8_t A) +{ + // Based on code by Rui Ribeiro, see the discussion here: + // https://stackoverflow.com/questions/8119577/z80-daa-instruction + + int t = 0; + + if (flags.H || ((A & 0xF) > 9)) t++; + + if (flags.C || (A > 0x99)) + { + t += 2; + flags.C = 1; + } + + if (flags.N && !flags.H) + { + flags.H = 0; + } + else + { + if (flags.N && flags.H) + flags.H = (((A & 0x0F)) < 6); + else + flags.H = ((A & 0x0F) >= 0x0A); + } + + switch (t) + { + case 1: A += (flags.N) ? 0xFA : 0x06; break; // -6:6 + case 2: A += (flags.N) ? 0xA0 : 0x60; break; // -0x60:0x60 + case 3: A += (flags.N) ? 0x9A : 0x66; break; // -0x66:0x66 + } + + flags.S = (A & 0x80); + flags.Z = !A; + flags.P = GLOBAL_Parity[A]; + flags.X = A & 0x20; + flags.Y = A & 0x08; + + return A; +} + std::string generateDaaTables() { std::string outStr; - // iterate by SF, HF, CF flags + for (uint8_t NF : {0, 1}) for (uint8_t CF : {0, 1}) for (uint8_t HF : {0, 1}) + { + std::string keyStr = std::string("_") + (NF ? "N1" : "N0") + (CF ? "C1" : "C0") + (HF ? "H1" : "H0"); - // XXX - // Check code by Rui Ribeiro, see https://stackoverflow.com/questions/8119577/z80-daa-instruction + std::stringstream outStrF; + outStrF << "!macro PUT_Z80_FTABLE_DAA" << keyStr << " {\n"; + + std::stringstream outStrO; + outStrO << "!macro PUT_Z80_OTABLE_DAA" << keyStr << " {\n"; + + for (uint16_t idx = 0; idx < 0x100; idx++) + { + FlagsDAA flags; + if (NF) flags.N = 1; + if (CF) flags.C = 1; + if (HF) flags.H = 1; + + outStrO << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << (int) calculateDAA(flags, idx) << "\n"; + + int fResult = (flags.N ? Z80_NF : 0) + + (flags.C ? Z80_CF : 0) + + (flags.H ? Z80_HF : 0) + + (flags.S ? Z80_SF : 0) + + (flags.P ? Z80_PF : 0) + + (flags.Z ? Z80_ZF : 0) + + (flags.X ? Z80_XF : 0) + + (flags.Y ? Z80_YF : 0); + + outStrF << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << fResult << "\n"; + } + + outStr += outStrF.str() + "}\n\n\n" + outStrO.str() + "}\n\n\n"; + } return outStr; } @@ -239,7 +327,7 @@ void writeTables() // Write tables - outFile << generateParityTable(); // always put it first! + outFile << generateParityTable(); // always put this one first! outFile << generateDisplacementTable(); outFile << generateIncTable(); outFile << generateDecTable(); From b79f01582d7a51d4ab16def8740cd4a4fe797463 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 22 Dec 2020 19:29:36 +0100 Subject: [PATCH 064/257] code size optimization --- src/zvm_m65/2000.zvm_vectable.s | 120 +++-------- src/zvm_m65/z80_instr_bit.s | 353 ++++++++++---------------------- src/zvm_m65/zvm_core.s | 47 ++--- 3 files changed, 156 insertions(+), 364 deletions(-) diff --git a/src/zvm_m65/2000.zvm_vectable.s b/src/zvm_m65/2000.zvm_vectable.s index 9ad98e99..7c12fe9c 100644 --- a/src/zvm_m65/2000.zvm_vectable.s +++ b/src/zvm_m65/2000.zvm_vectable.s @@ -271,106 +271,54 @@ Z80_vectab_FD_1: !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD !word Z80_illegal__FD, Z80_instr_FD_F9, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD -Z80_vectab_DDCB_0: +Z80_vectab_xDCB_0: - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_06, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_0E, Z80_illegal__DDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_06, Z80_illegal__xDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_0E, Z80_illegal__xDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_16, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_1E, Z80_illegal__DDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_16, Z80_illegal__xDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_1E, Z80_illegal__xDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_26, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_2E, Z80_illegal__DDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_26, Z80_illegal__xDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_2E, Z80_illegal__xDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_3E, Z80_illegal__DDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_3E, Z80_illegal__xDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_46, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_4E, Z80_illegal__DDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_46, Z80_illegal__xDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_4E, Z80_illegal__xDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_56, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_5E, Z80_illegal__DDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_56, Z80_illegal__xDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_5E, Z80_illegal__xDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_66, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_6E, Z80_illegal__DDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_66, Z80_illegal__xDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_6E, Z80_illegal__xDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_76, Z80_illegal__DDCB - !word Z80_illeg_DDCB_78, Z80_illeg_DDCB_79, Z80_illeg_DDCB_7A, Z80_illeg_DDCB_7B, Z80_illeg_DDCB_7C, Z80_illeg_DDCB_7D, Z80_instr_DDCB_7E, Z80_illeg_DDCB_7F + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_76, Z80_illegal__xDCB + !word Z80_illeg_xDCB_78, Z80_illeg_xDCB_79, Z80_illeg_xDCB_7A, Z80_illeg_xDCB_7B, Z80_illeg_xDCB_7C, Z80_illeg_xDCB_7D, Z80_instr_xDCB_7E, Z80_illeg_xDCB_7F -Z80_vectab_DDCB_1: +Z80_vectab_xDCB_1: - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_86, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_8E, Z80_illegal__DDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_86, Z80_illegal__xDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_8E, Z80_illegal__xDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_96, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_9E, Z80_illegal__DDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_96, Z80_illegal__xDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_9E, Z80_illegal__xDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_A6, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_AE, Z80_illegal__DDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_A6, Z80_illegal__xDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_AE, Z80_illegal__xDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_B6, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_BE, Z80_illegal__DDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_B6, Z80_illegal__xDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_BE, Z80_illegal__xDCB - !word Z80_illeg_DDCB_C0, Z80_illeg_DDCB_C1, Z80_illeg_DDCB_C2, Z80_illeg_DDCB_C3, Z80_illeg_DDCB_C4, Z80_illeg_DDCB_C5, Z80_instr_DDCB_C6, Z80_illeg_DDCB_C7 - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_CE, Z80_illegal__DDCB + !word Z80_illeg_xDCB_C0, Z80_illeg_xDCB_C1, Z80_illeg_xDCB_C2, Z80_illeg_xDCB_C3, Z80_illeg_xDCB_C4, Z80_illeg_xDCB_C5, Z80_instr_xDCB_C6, Z80_illeg_xDCB_C7 + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_CE, Z80_illegal__xDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_D6, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_DE, Z80_illegal__DDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_D6, Z80_illegal__xDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_DE, Z80_illegal__xDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_E6, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_EE, Z80_illegal__DDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_E6, Z80_illegal__xDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_EE, Z80_illegal__xDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_F6, Z80_illegal__DDCB - !word Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_illegal__DDCB, Z80_instr_DDCB_FE, Z80_illegal__DDCB - -Z80_vectab_FDCB_0: - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_06, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_0E, Z80_illegal__FDCB - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_16, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_1E, Z80_illegal__FDCB - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_26, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_2E, Z80_illegal__FDCB - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_3E, Z80_illegal__FDCB - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_46, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_4E, Z80_illegal__FDCB - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_56, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_5E, Z80_illegal__FDCB - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_66, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_6E, Z80_illegal__FDCB - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_76, Z80_illegal__FDCB - !word Z80_illeg_FDCB_78, Z80_illeg_FDCB_79, Z80_illeg_FDCB_7A, Z80_illeg_FDCB_7B, Z80_illeg_FDCB_7C, Z80_illeg_FDCB_7D, Z80_instr_FDCB_7E, Z80_illeg_FDCB_7F - -Z80_vectab_FDCB_1: - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_86, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_8E, Z80_illegal__FDCB - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_96, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_9E, Z80_illegal__FDCB - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_A6, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_AE, Z80_illegal__FDCB - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_B6, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_BE, Z80_illegal__FDCB - - !word Z80_illeg_FDCB_C0, Z80_illeg_FDCB_C1, Z80_illeg_FDCB_C2, Z80_illeg_FDCB_C3, Z80_illeg_FDCB_C4, Z80_illeg_FDCB_C5, Z80_instr_FDCB_C6, Z80_illeg_FDCB_C7 - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_CE, Z80_illegal__FDCB - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_D6, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_DE, Z80_illegal__FDCB - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_E6, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_EE, Z80_illegal__FDCB - - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_F6, Z80_illegal__FDCB - !word Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_illegal__FDCB, Z80_instr_FDCB_FE, Z80_illegal__FDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_F6, Z80_illegal__xDCB + !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_FE, Z80_illegal__xDCB diff --git a/src/zvm_m65/z80_instr_bit.s b/src/zvm_m65/z80_instr_bit.s index 8b086c9d..25796f06 100644 --- a/src/zvm_m65/z80_instr_bit.s +++ b/src/zvm_m65/z80_instr_bit.s @@ -440,71 +440,71 @@ Z80_common_bitHL_1: ; bits taken from index register + displacement -Z80_instr_DDCB_46: ; BIT 0,(IX+d) +Z80_instr_xDCB_46: ; BIT 0,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%00000001 - bne Z80_common_bitXYx_1 - bra Z80_common_bitXYx_0 + bne Z80_common_bitIXYx_1 + bra Z80_common_bitIXYx_0 -Z80_instr_DDCB_4E: ; BIT 1,(IX+d) +Z80_instr_xDCB_4E: ; BIT 1,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%00000010 - bne Z80_common_bitXYx_1 - bra Z80_common_bitXYx_0 + bne Z80_common_bitIXYx_1 + bra Z80_common_bitIXYx_0 -Z80_instr_DDCB_56: ; BIT 2,(IX+d) +Z80_instr_xDCB_56: ; BIT 2,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%00000100 - bne Z80_common_bitXYx_1 - bra Z80_common_bitXYx_0 + bne Z80_common_bitIXYx_1 + bra Z80_common_bitIXYx_0 -Z80_instr_DDCB_5E: ; BIT 3,(IX+d) +Z80_instr_xDCB_5E: ; BIT 3,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%00001000 - bne Z80_common_bitXYx_1 - bra Z80_common_bitXYx_0 + bne Z80_common_bitIXYx_1 + bra Z80_common_bitIXYx_0 -Z80_instr_DDCB_66: ; BIT 4,(IX+d) +Z80_instr_xDCB_66: ; BIT 4,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%00010000 - bne Z80_common_bitXYx_1 - bra Z80_common_bitXYx_0 + bne Z80_common_bitIXYx_1 + bra Z80_common_bitIXYx_0 -Z80_instr_DDCB_6E: ; BIT 5,(IX+d) +Z80_instr_xDCB_6E: ; BIT 5,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%00100000 - bne Z80_common_bitXYx_1 - bra Z80_common_bitXYx_0 + bne Z80_common_bitIXYx_1 + bra Z80_common_bitIXYx_0 -Z80_instr_DDCB_76: ; BIT 6,(IX+d) +Z80_instr_xDCB_76: ; BIT 6,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%01000000 - bne Z80_common_bitXYx_1 - bra Z80_common_bitXYx_0 + bne Z80_common_bitIXYx_1 + bra Z80_common_bitIXYx_0 -Z80_illeg_DDCB_78: ; BIT 7,(IX+d) -Z80_illeg_DDCB_79: ; BIT 7,(IX+d) -Z80_illeg_DDCB_7A: ; BIT 7,(IX+d) -Z80_illeg_DDCB_7B: ; BIT 7,(IX+d) -Z80_illeg_DDCB_7C: ; BIT 7,(IX+d) -Z80_illeg_DDCB_7D: ; BIT 7,(IX+d) -Z80_instr_DDCB_7E: ; BIT 7,(IX+d) -Z80_illeg_DDCB_7F: ; BIT 7,(IX+d) +Z80_illeg_xDCB_78: ; BIT 7,(IXY+d) +Z80_illeg_xDCB_79: ; BIT 7,(IXY+d) +Z80_illeg_xDCB_7A: ; BIT 7,(IXY+d) +Z80_illeg_xDCB_7B: ; BIT 7,(IXY+d) +Z80_illeg_xDCB_7C: ; BIT 7,(IXY+d) +Z80_illeg_xDCB_7D: ; BIT 7,(IXY+d) +Z80_instr_xDCB_7E: ; BIT 7,(IXY+d) +Z80_illeg_xDCB_7F: ; BIT 7,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%10000000 - beq Z80_common_bitXYx_0 + beq Z80_common_bitIXYx_0 ; FALLTROUGH -Z80_common_bitXY7_1: +Z80_common_bitIXY7_1: lda REG_F and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_ZF - Z80_PF) @@ -516,7 +516,7 @@ Z80_common_bitXY7_1: sta REG_F jmp ZVM_next -Z80_common_bitXYx_0: +Z80_common_bitIXYx_0: lda REG_F and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF) @@ -528,7 +528,7 @@ Z80_common_bitXYx_0: sta REG_F jmp ZVM_next -Z80_common_bitXYx_1: +Z80_common_bitIXYx_1: lda REG_F and #($FF - Z80_NF - Z80_XF - Z80_YF - Z80_SF - Z80_ZF - Z80_PF) @@ -540,69 +540,6 @@ Z80_common_bitXYx_1: sta REG_F jmp ZVM_next -Z80_instr_FDCB_46: ; BIT 0,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%00000001 - bne Z80_common_bitXYx_1 - bra Z80_common_bitXYx_0 - -Z80_instr_FDCB_4E: ; BIT 1,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%00000010 - bne Z80_common_bitXYx_1 - bra Z80_common_bitXYx_0 - -Z80_instr_FDCB_56: ; BIT 2,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%00000100 - bne Z80_common_bitXYx_1 - bra Z80_common_bitXYx_0 - -Z80_instr_FDCB_5E: ; BIT 3,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%00001000 - bne Z80_common_bitXYx_1 - bra Z80_common_bitXYx_0 - -Z80_instr_FDCB_66: ; BIT 4,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%00010000 - bne Z80_common_bitXYx_1 - bra Z80_common_bitXYx_0 - -Z80_instr_FDCB_6E: ; BIT 5,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%00100000 - bne Z80_common_bitXYx_1 - bra Z80_common_bitXYx_0 - -Z80_instr_FDCB_76: ; BIT 6,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%01000000 - bne Z80_common_bitXYx_1 - bra Z80_common_bitXYx_0 - -Z80_illeg_FDCB_78: ; BIT 7,(IY+d) -Z80_illeg_FDCB_79: ; BIT 7,(IY+d) -Z80_illeg_FDCB_7A: ; BIT 7,(IY+d) -Z80_illeg_FDCB_7B: ; BIT 7,(IY+d) -Z80_illeg_FDCB_7C: ; BIT 7,(IY+d) -Z80_illeg_FDCB_7D: ; BIT 7,(IY+d) -Z80_instr_FDCB_7E: ; BIT 7,(IY+d) -Z80_illeg_FDCB_7F: ; BIT 7,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%10000000 - +bne Z80_common_bitXY7_1 ; too far away for normal BNE - bra Z80_common_bitXYx_0 - ; SET, RES Z80_instr_CB_C0: ; SET 0,B @@ -933,101 +870,61 @@ Z80_instr_CB_FE: ; SET 7,(HL) ora #%10000000 jmp ZVM_store_next -Z80_instr_DDCB_C6: ; SET 0,(IX+d) +Z80_instr_xDCB_C6: ; SET 0,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z ora #%00000001 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next -Z80_instr_DDCB_CE: ; SET 1,(IX+d) +Z80_instr_xDCB_CE: ; SET 1,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z ora #%00000010 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next -Z80_instr_DDCB_D6: ; SET 2,(IX+d) +Z80_instr_xDCB_D6: ; SET 2,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z ora #%00000100 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next -Z80_instr_DDCB_DE: ; SET 3,(IX+d) +Z80_instr_xDCB_DE: ; SET 3,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z ora #%00001000 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next -Z80_instr_DDCB_E6: ; SET 4,(IX+d) +Z80_instr_xDCB_E6: ; SET 4,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z ora #%00010000 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next -Z80_instr_DDCB_EE: ; SET 5,(IX+d) +Z80_instr_xDCB_EE: ; SET 5,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z ora #%00100000 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next -Z80_instr_DDCB_F6: ; SET 6,(IX+d) +Z80_instr_xDCB_F6: ; SET 6,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z ora #%01000000 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next -Z80_instr_DDCB_FE: ; SET 7,(IX+d) +Z80_instr_xDCB_FE: ; SET 7,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z ora #%10000000 - jmp ZVM_store_next - -Z80_instr_FDCB_C6: ; SET 0,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%00000001 - jmp ZVM_store_next - -Z80_instr_FDCB_CE: ; SET 1,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%00000010 - jmp ZVM_store_next - -Z80_instr_FDCB_D6: ; SET 2,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%00000100 - jmp ZVM_store_next - -Z80_instr_FDCB_DE: ; SET 3,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%00001000 - jmp ZVM_store_next - -Z80_instr_FDCB_E6: ; SET 4,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%00010000 - jmp ZVM_store_next - -Z80_instr_FDCB_EE: ; SET 5,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%00100000 - jmp ZVM_store_next - -Z80_instr_FDCB_F6: ; SET 6,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%01000000 - jmp ZVM_store_next - -Z80_instr_FDCB_FE: ; SET 7,(IY+d) - - jsr (VEC_fetch_via_IY_d) - ora #%10000000 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next Z80_instr_CB_80: ; RES 0,B @@ -1357,98 +1254,58 @@ Z80_instr_CB_BE: ; RES 7,(HL) and #%01111111 jmp ZVM_store_next -Z80_instr_DDCB_86: ; RES 0,(IX+d) +Z80_instr_xDCB_86: ; RES 0,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%11111110 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next -Z80_instr_DDCB_8E: ; RES 1,(IX+d) +Z80_instr_xDCB_8E: ; RES 1,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%11111101 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next -Z80_instr_DDCB_96: ; RES 2,(IX+d) +Z80_instr_xDCB_96: ; RES 2,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%11111011 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next -Z80_instr_DDCB_9E: ; RES 3,(IX+d) +Z80_instr_xDCB_9E: ; RES 3,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%11110111 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next -Z80_instr_DDCB_A6: ; RES 4,(IX+d) +Z80_instr_xDCB_A6: ; RES 4,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%11101111 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next -Z80_instr_DDCB_AE: ; RES 5,(IX+d) +Z80_instr_xDCB_AE: ; RES 5,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%11011111 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next -Z80_instr_DDCB_B6: ; RES 6,(IX+d) +Z80_instr_xDCB_B6: ; RES 6,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%10111111 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next -Z80_instr_DDCB_BE: ; RES 7,(IX+d) +Z80_instr_xDCB_BE: ; RES 7,(IXY+d) - jsr (VEC_fetch_via_IX_d) + lda [PTR_IXY_d],z and #%01111111 - jmp ZVM_store_next - -Z80_instr_FDCB_86: ; RES 0,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%11111110 - jmp ZVM_store_next - -Z80_instr_FDCB_8E: ; RES 1,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%11111101 - jmp ZVM_store_next - -Z80_instr_FDCB_96: ; RES 2,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%11111011 - jmp ZVM_store_next - -Z80_instr_FDCB_9E: ; RES 3,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%11110111 - jmp ZVM_store_next - -Z80_instr_FDCB_A6: ; RES 4,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%11101111 - jmp ZVM_store_next - -Z80_instr_FDCB_AE: ; RES 5,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%11011111 - jmp ZVM_store_next - -Z80_instr_FDCB_B6: ; RES 6,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%10111111 - jmp ZVM_store_next - -Z80_instr_FDCB_BE: ; RES 7,(IY+d) - - jsr (VEC_fetch_via_IY_d) - and #%01111111 - jmp ZVM_store_next + sta [PTR_IXY_d],z + jmp ZVM_next diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index addeb42a..5ac4ac87 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -31,8 +31,8 @@ ZVM_store_next: Z80_illegal__DD: Z80_illegal__ED: Z80_illegal__FD: -Z80_illegal__DDCB: -Z80_illegal__FDCB: +Z80_illegal__xDCB: + ; XXX add a separate handler for illegal instructions ; LD instructions with no effect Z80_instr_40: ; LD B,B Z80_instr_49: ; LD C,C @@ -330,20 +330,13 @@ Z80_instr_FD_9E: ; SBC (IY+d) Z80_instr_FD_BE: ; CP (IY+d) Z80_instr_FD_E3: ; EX (SP),IY Z80_instr_FD_F9: ; LD SP,IY -Z80_instr_DDCB_06: ; RLC (IX+d) -Z80_instr_DDCB_0E: ; RRC (IX+d) -Z80_instr_DDCB_16: ; RL (IX+d) -Z80_instr_DDCB_1E: ; RR (IX+d) -Z80_instr_DDCB_26: ; SLA (IX+d) -Z80_instr_DDCB_2E: ; SRA (IX+d) -Z80_instr_DDCB_3E: ; SRL (IX+d) -Z80_instr_FDCB_06: ; RLC (IY+d) -Z80_instr_FDCB_0E: ; RRC (IY+d) -Z80_instr_FDCB_16: ; RL (IY+d) -Z80_instr_FDCB_1E: ; RR (IY+d) -Z80_instr_FDCB_26: ; SLA (IY+d) -Z80_instr_FDCB_2E: ; SRA (IY+d) -Z80_instr_FDCB_3E: ; SRL (IY+d) +Z80_instr_xDCB_06: ; RLC (IXY+d) +Z80_instr_xDCB_0E: ; RRC (IXY+d) +Z80_instr_xDCB_16: ; RL (IXY+d) +Z80_instr_xDCB_1E: ; RR (IXY+d) +Z80_instr_xDCB_26: ; SLA (IXY+d) +Z80_instr_xDCB_2E: ; SRA (IXY+d) +Z80_instr_xDCB_3E: ; SRL (IXY+d) Z80_illeg_CB_30: ; SLL B Z80_illeg_CB_31: ; SLL C Z80_illeg_CB_32: ; SLL D @@ -367,20 +360,14 @@ Z80_illeg_ED_74: ; NEG Z80_illeg_ED_75: ; RETN Z80_illeg_ED_7C: ; NEG Z80_illeg_ED_7D: ; RETN -Z80_illeg_DDCB_C0: ; SET 0,(IX+d),B -Z80_illeg_DDCB_C1: ; SET 0,(IX+d),C -Z80_illeg_DDCB_C2: ; SET 0,(IX+d),D -Z80_illeg_DDCB_C3: ; SET 0,(IX+d),E -Z80_illeg_DDCB_C4: ; SET 0,(IX+d),H -Z80_illeg_DDCB_C5: ; SET 0,(IX+d),L -Z80_illeg_DDCB_C7: ; SET 0,(IX+d),A -Z80_illeg_FDCB_C0: ; SET 0,(IY+d),B -Z80_illeg_FDCB_C1: ; SET 0,(IY+d),C -Z80_illeg_FDCB_C2: ; SET 0,(IY+d),D -Z80_illeg_FDCB_C3: ; SET 0,(IY+d),E -Z80_illeg_FDCB_C4: ; SET 0,(IY+d),H -Z80_illeg_FDCB_C5: ; SET 0,(IY+d),L -Z80_illeg_FDCB_C7: ; SET 0,(IY+d),A +Z80_illeg_xDCB_C0: ; SET 0,(IXY+d),B +Z80_illeg_xDCB_C1: ; SET 0,(IXY+d),C +Z80_illeg_xDCB_C2: ; SET 0,(IXY+d),D +Z80_illeg_xDCB_C3: ; SET 0,(IXY+d),E +Z80_illeg_xDCB_C4: ; SET 0,(IXY+d),H +Z80_illeg_xDCB_C5: ; SET 0,(IXY+d),L +Z80_illeg_xDCB_C7: ; SET 0,(IXY+d),A + jmp ZVM_next ; XXX From cfd875de0b47ef953e95936c4187a8aece3ea53e Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 22 Dec 2020 19:51:23 +0100 Subject: [PATCH 065/257] added remaining Z80 illegal opcodes --- src/zvm_m65/zvm_core.s | 309 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 308 insertions(+), 1 deletion(-) diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 5ac4ac87..5634d389 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -369,7 +369,314 @@ Z80_illeg_xDCB_C5: ; SET 0,(IXY+d),L Z80_illeg_xDCB_C7: ; SET 0,(IXY+d),A - jmp ZVM_next ; XXX ; XXX add illegal instructions for combination of prefixes + + ; XXX include these in the table, add mnemonics + +Z80_illeg_ED_63: +Z80_illeg_ED_6B: +Z80_illeg_DD_24: +Z80_illeg_DD_25: +Z80_illeg_DD_26: +Z80_illeg_DD_2C: +Z80_illeg_DD_2D: +Z80_illeg_DD_2E: +Z80_illeg_DD_44: +Z80_illeg_DD_45: +Z80_illeg_DD_4C: +Z80_illeg_DD_4D: +Z80_illeg_DD_54: +Z80_illeg_DD_55: +Z80_illeg_DD_5C: +Z80_illeg_DD_5D: +Z80_illeg_DD_60: +Z80_illeg_DD_61: +Z80_illeg_DD_62: +Z80_illeg_DD_63: +Z80_illeg_DD_64: +Z80_illeg_DD_65: +Z80_illeg_DD_67: +Z80_illeg_DD_68: +Z80_illeg_DD_69: +Z80_illeg_DD_6A: +Z80_illeg_DD_6B: +Z80_illeg_DD_6C: +Z80_illeg_DD_6D: +Z80_illeg_DD_6F: +Z80_illeg_DD_7C: +Z80_illeg_DD_6D: +Z80_illeg_DD_84: +Z80_illeg_DD_85: +Z80_illeg_DD_8C: +Z80_illeg_DD_8D: +Z80_illeg_DD_94: +Z80_illeg_DD_95: +Z80_illeg_DD_9C: +Z80_illeg_DD_9D: +Z80_illeg_DD_A4: +Z80_illeg_DD_A5: +Z80_illeg_DD_AC: +Z80_illeg_DD_AD: +Z80_illeg_DD_B4: +Z80_illeg_DD_B5: +Z80_illeg_DD_BC: +Z80_illeg_DD_BD: +Z80_illeg_FD_24: +Z80_illeg_FD_25: +Z80_illeg_FD_26: +Z80_illeg_FD_2C: +Z80_illeg_FD_2D: +Z80_illeg_FD_2E: +Z80_illeg_FD_44: +Z80_illeg_FD_45: +Z80_illeg_FD_4C: +Z80_illeg_FD_4D: +Z80_illeg_FD_54: +Z80_illeg_FD_55: +Z80_illeg_FD_5C: +Z80_illeg_FD_5D: +Z80_illeg_FD_60: +Z80_illeg_FD_61: +Z80_illeg_FD_62: +Z80_illeg_FD_63: +Z80_illeg_FD_64: +Z80_illeg_FD_65: +Z80_illeg_FD_67: +Z80_illeg_FD_68: +Z80_illeg_FD_69: +Z80_illeg_FD_6A: +Z80_illeg_FD_6B: +Z80_illeg_FD_6C: +Z80_illeg_FD_6D: +Z80_illeg_FD_6F: +Z80_illeg_FD_7C: +Z80_illeg_FD_6D: +Z80_illeg_FD_84: +Z80_illeg_FD_85: +Z80_illeg_FD_8C: +Z80_illeg_FD_8D: +Z80_illeg_FD_94: +Z80_illeg_FD_95: +Z80_illeg_FD_9C: +Z80_illeg_FD_9D: +Z80_illeg_FD_A4: +Z80_illeg_FD_A5: +Z80_illeg_FD_AC: +Z80_illeg_FD_AD: +Z80_illeg_FD_B4: +Z80_illeg_FD_B5: +Z80_illeg_FD_BC: +Z80_illeg_FD_BD: +Z80_illeg_xDCB_00: +Z80_illeg_xDCB_01: +Z80_illeg_xDCB_02: +Z80_illeg_xDCB_03: +Z80_illeg_xDCB_04: +Z80_illeg_xDCB_05: +Z80_illeg_xDCB_07: +Z80_illeg_xDCB_08: +Z80_illeg_xDCB_09: +Z80_illeg_xDCB_0A: +Z80_illeg_xDCB_0B: +Z80_illeg_xDCB_0C: +Z80_illeg_xDCB_0D: +Z80_illeg_xDCB_0F: +Z80_illeg_xDCB_10: +Z80_illeg_xDCB_11: +Z80_illeg_xDCB_12: +Z80_illeg_xDCB_13: +Z80_illeg_xDCB_14: +Z80_illeg_xDCB_15: +Z80_illeg_xDCB_17: +Z80_illeg_xDCB_18: +Z80_illeg_xDCB_19: +Z80_illeg_xDCB_1A: +Z80_illeg_xDCB_1B: +Z80_illeg_xDCB_1C: +Z80_illeg_xDCB_1D: +Z80_illeg_xDCB_1F: +Z80_illeg_xDCB_20: +Z80_illeg_xDCB_21: +Z80_illeg_xDCB_22: +Z80_illeg_xDCB_23: +Z80_illeg_xDCB_24: +Z80_illeg_xDCB_25: +Z80_illeg_xDCB_27: +Z80_illeg_xDCB_28: +Z80_illeg_xDCB_29: +Z80_illeg_xDCB_2A: +Z80_illeg_xDCB_2B: +Z80_illeg_xDCB_2C: +Z80_illeg_xDCB_2D: +Z80_illeg_xDCB_2F: +Z80_illeg_xDCB_30: +Z80_illeg_xDCB_31: +Z80_illeg_xDCB_32: +Z80_illeg_xDCB_33: +Z80_illeg_xDCB_34: +Z80_illeg_xDCB_35: +Z80_illeg_xDCB_36: +Z80_illeg_xDCB_37: +Z80_illeg_xDCB_38: +Z80_illeg_xDCB_39: +Z80_illeg_xDCB_3A: +Z80_illeg_xDCB_3B: +Z80_illeg_xDCB_3C: +Z80_illeg_xDCB_3D: +Z80_illeg_xDCB_3F: +Z80_illeg_xDCB_40: +Z80_illeg_xDCB_41: +Z80_illeg_xDCB_42: +Z80_illeg_xDCB_43: +Z80_illeg_xDCB_44: +Z80_illeg_xDCB_45: +Z80_illeg_xDCB_47: +Z80_illeg_xDCB_48: +Z80_illeg_xDCB_49: +Z80_illeg_xDCB_4A: +Z80_illeg_xDCB_4B: +Z80_illeg_xDCB_4C: +Z80_illeg_xDCB_4D: +Z80_illeg_xDCB_4F: +Z80_illeg_xDCB_50: +Z80_illeg_xDCB_51: +Z80_illeg_xDCB_52: +Z80_illeg_xDCB_53: +Z80_illeg_xDCB_54: +Z80_illeg_xDCB_55: +Z80_illeg_xDCB_57: +Z80_illeg_xDCB_58: +Z80_illeg_xDCB_59: +Z80_illeg_xDCB_5A: +Z80_illeg_xDCB_5B: +Z80_illeg_xDCB_5C: +Z80_illeg_xDCB_5D: +Z80_illeg_xDCB_5F: +Z80_illeg_xDCB_60: +Z80_illeg_xDCB_61: +Z80_illeg_xDCB_62: +Z80_illeg_xDCB_63: +Z80_illeg_xDCB_64: +Z80_illeg_xDCB_65: +Z80_illeg_xDCB_67: +Z80_illeg_xDCB_68: +Z80_illeg_xDCB_69: +Z80_illeg_xDCB_6A: +Z80_illeg_xDCB_6B: +Z80_illeg_xDCB_6C: +Z80_illeg_xDCB_6D: +Z80_illeg_xDCB_6F: +Z80_illeg_xDCB_70: +Z80_illeg_xDCB_71: +Z80_illeg_xDCB_72: +Z80_illeg_xDCB_73: +Z80_illeg_xDCB_74: +Z80_illeg_xDCB_75: +Z80_illeg_xDCB_77: +Z80_illeg_xDCB_80: +Z80_illeg_xDCB_81: +Z80_illeg_xDCB_82: +Z80_illeg_xDCB_83: +Z80_illeg_xDCB_84: +Z80_illeg_xDCB_85: +Z80_illeg_xDCB_87: +Z80_illeg_xDCB_88: +Z80_illeg_xDCB_89: +Z80_illeg_xDCB_8A: +Z80_illeg_xDCB_8B: +Z80_illeg_xDCB_8C: +Z80_illeg_xDCB_8D: +Z80_illeg_xDCB_8F: +Z80_illeg_xDCB_90: +Z80_illeg_xDCB_91: +Z80_illeg_xDCB_92: +Z80_illeg_xDCB_93: +Z80_illeg_xDCB_94: +Z80_illeg_xDCB_95: +Z80_illeg_xDCB_97: +Z80_illeg_xDCB_98: +Z80_illeg_xDCB_99: +Z80_illeg_xDCB_9A: +Z80_illeg_xDCB_9B: +Z80_illeg_xDCB_9C: +Z80_illeg_xDCB_9D: +Z80_illeg_xDCB_9F: +Z80_illeg_xDCB_A0: +Z80_illeg_xDCB_A1: +Z80_illeg_xDCB_A2: +Z80_illeg_xDCB_A3: +Z80_illeg_xDCB_A4: +Z80_illeg_xDCB_A5: +Z80_illeg_xDCB_A7: +Z80_illeg_xDCB_A8: +Z80_illeg_xDCB_A9: +Z80_illeg_xDCB_AA: +Z80_illeg_xDCB_AB: +Z80_illeg_xDCB_AC: +Z80_illeg_xDCB_AD: +Z80_illeg_xDCB_AF: +Z80_illeg_xDCB_B0: +Z80_illeg_xDCB_B1: +Z80_illeg_xDCB_B2: +Z80_illeg_xDCB_B3: +Z80_illeg_xDCB_B4: +Z80_illeg_xDCB_B5: +Z80_illeg_xDCB_B7: +Z80_illeg_xDCB_B8: +Z80_illeg_xDCB_B9: +Z80_illeg_xDCB_BA: +Z80_illeg_xDCB_BB: +Z80_illeg_xDCB_BC: +Z80_illeg_xDCB_BD: +Z80_illeg_xDCB_BF: +Z80_illeg_xDCB_C8: +Z80_illeg_xDCB_C9: +Z80_illeg_xDCB_CA: +Z80_illeg_xDCB_CB: +Z80_illeg_xDCB_CC: +Z80_illeg_xDCB_CD: +Z80_illeg_xDCB_CF: +Z80_illeg_xDCB_D0: +Z80_illeg_xDCB_D1: +Z80_illeg_xDCB_D2: +Z80_illeg_xDCB_D3: +Z80_illeg_xDCB_D4: +Z80_illeg_xDCB_D5: +Z80_illeg_xDCB_D7: +Z80_illeg_xDCB_D8: +Z80_illeg_xDCB_D9: +Z80_illeg_xDCB_DA: +Z80_illeg_xDCB_DB: +Z80_illeg_xDCB_DC: +Z80_illeg_xDCB_DD: +Z80_illeg_xDCB_DF: +Z80_illeg_xDCB_E0: +Z80_illeg_xDCB_E1: +Z80_illeg_xDCB_E2: +Z80_illeg_xDCB_E3: +Z80_illeg_xDCB_E4: +Z80_illeg_xDCB_E5: +Z80_illeg_xDCB_E7: +Z80_illeg_xDCB_E8: +Z80_illeg_xDCB_E9: +Z80_illeg_xDCB_EA: +Z80_illeg_xDCB_EB: +Z80_illeg_xDCB_EC: +Z80_illeg_xDCB_ED: +Z80_illeg_xDCB_EF: +Z80_illeg_xDCB_F0: +Z80_illeg_xDCB_F1: +Z80_illeg_xDCB_F2: +Z80_illeg_xDCB_F3: +Z80_illeg_xDCB_F4: +Z80_illeg_xDCB_F5: +Z80_illeg_xDCB_F7: +Z80_illeg_xDCB_F8: +Z80_illeg_xDCB_F9: +Z80_illeg_xDCB_FA: +Z80_illeg_xDCB_FB: +Z80_illeg_xDCB_FC: +Z80_illeg_xDCB_FD: +Z80_illeg_xDCB_FF: From 363b198a0304ed87dc2533a0f2bf902ea5f4883d Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 22 Dec 2020 20:45:38 +0100 Subject: [PATCH 066/257] addede command for booting --- STATUS.md | 1 + src/,,config_mega65.s | 2 +- src/basic/,imports.s | 1 + src/basic/basic_commands_04/cmd__jumptable_04.s | 6 ++++-- src/kernal/board_m65/mega65_bootcpm.s | 9 +++++++++ src/kernal/jumptable_m65/jbootcpm.s | 10 ++++++++++ tools/generate_strings.cc | 5 +++-- 7 files changed, 29 insertions(+), 5 deletions(-) create mode 100644 src/kernal/board_m65/mega65_bootcpm.s create mode 100644 src/kernal/jumptable_m65/jbootcpm.s diff --git a/STATUS.md b/STATUS.md index ef7fdd6e..c4f1f877 100644 --- a/STATUS.md +++ b/STATUS.md @@ -408,6 +408,7 @@ Note: this is likely to change in the future, possibly in an incompatible way! | Address | Name | Status | Remarks | | :-------: | :------- | :------: | :--------------------------------------------------------------------: | | ? | MONITOR | WIP | launches a machine language monitor | +| ? | BOOTCPM | WIP | launches the CP/M operating system | | ? | PRHEX | DONE | print hex value from .A | | `$FF7D` | PRIMM | DONE | print immediate, address compatible with C128 and C65 ROMs | | `$FFF8` | | DONE | reset vector for usage within hypervisor, starts in legacy mode | diff --git a/src/,,config_mega65.s b/src/,,config_mega65.s index 8c5ea1f7..1c0939e2 100644 --- a/src/,,config_mega65.s +++ b/src/,,config_mega65.s @@ -71,7 +71,7 @@ ;; #CONFIG# KEYCMD_F11 "REM F11" ;; #CONFIG# KEYCMD_F12 "\5FHF" ;; #CONFIG# KEYCMD_F13 "JOYCRSR 2" -;; #CONFIG# KEYCMD_F14 "JOYCRSR 0" +;; #CONFIG# KEYCMD_F14 "BOOTCPM" ; --- Screen editor diff --git a/src/basic/,imports.s b/src/basic/,imports.s index 2e144cc4..9ae7f663 100644 --- a/src/basic/,imports.s +++ b/src/basic/,imports.s @@ -20,6 +20,7 @@ ;; #ALIAS# printf = KERNAL_0.printf ;; #ALIAS# PRIMM = KERNAL_0.PRIMM ;; #ALIAS# MONITOR = KERNAL_0.MONITOR +;; #ALIAS# BOOTCPM = KERNAL_0.BOOTCPM ;; #ALIAS# plot_set = KERNAL_0.plot_set ;; #ALIAS# print_hex_byte = KERNAL_0.print_hex_byte diff --git a/src/basic/basic_commands_04/cmd__jumptable_04.s b/src/basic/basic_commands_04/cmd__jumptable_04.s index cee40047..9fc274ef 100644 --- a/src/basic/basic_commands_04/cmd__jumptable_04.s +++ b/src/basic/basic_commands_04/cmd__jumptable_04.s @@ -6,8 +6,9 @@ ; !set ITEM_01 = cmd_sysinfo -!set ITEM_02 = cmd_joycrsr -!set ITEM_03 = cmd_monitor +!set ITEM_02 = cmd_monitor +!set ITEM_03 = BOOTCPM +!set ITEM_04 = cmd_joycrsr !ifndef HAS_OPCODES_65C02 { @@ -33,4 +34,5 @@ command_04_jumptable: !word ITEM_01 !word ITEM_02 !word ITEM_03 + !word ITEM_04 } diff --git a/src/kernal/board_m65/mega65_bootcpm.s b/src/kernal/board_m65/mega65_bootcpm.s new file mode 100644 index 00000000..8c2f5501 --- /dev/null +++ b/src/kernal/board_m65/mega65_bootcpm.s @@ -0,0 +1,9 @@ +;; #LAYOUT# M65 KERNAL_0 #TAKE +;; #LAYOUT# * * #IGNORE + + +BOOTCPM: + + ; jsr map_MON_1 + ; XXX implement system startupo + jmp BOOTCPM diff --git a/src/kernal/jumptable_m65/jbootcpm.s b/src/kernal/jumptable_m65/jbootcpm.s new file mode 100644 index 00000000..e7c1f269 --- /dev/null +++ b/src/kernal/jumptable_m65/jbootcpm.s @@ -0,0 +1,10 @@ +;; #LAYOUT# M65 KERNAL_0 #TAKE +;; #LAYOUT# * * #IGNORE + + +; Launches the CP/M operating system + + +JBOOTCPM: + + jmp BOOTCPM diff --git a/tools/generate_strings.cc b/tools/generate_strings.cc index 4e23e8a8..835b0b07 100644 --- a/tools/generate_strings.cc +++ b/tools/generate_strings.cc @@ -200,8 +200,9 @@ const StringEntryList GLOBAL_Keywords_04 = { ListType::KEYWORDS, "keywords_04", { // STD CRT M65 U64 X16 { false, false, true, false, false, "K04_01", "SYSINFO", }, // Not present in CBM BASIC dialects, Open ROMs specific - { false, false, true, false, false, "K04_02", "JOYCRSR", }, // Not present in CBM BASIC dialects, Open ROMs specific - { false, false, true, false, false, "K04_03", "MONITOR", }, // Amos Professional Manual, Command Index + { false, false, true, false, false, "K04_02", "MONITOR", }, // Amos Professional Manual, Command Index + { false, false, true, false, false, "K04_03", "BOOTCPM", }, // Not present in CBM BASIC dialects, Open ROMs specific + { false, false, true, false, false, "K04_04", "JOYCRSR", }, // Not present in CBM BASIC dialects, Open ROMs specific } }; From beedad3377dcfda8d547de30b798da5eb9c2c24f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 22 Dec 2020 21:09:18 +0100 Subject: [PATCH 067/257] implemented NEG --- src/zvm_m65/z80_instr_general.s | 18 +++++++++++++++++- src/zvm_m65/z80_tables.s | 4 ++++ src/zvm_m65/zvm_core.s | 8 -------- tools/generate_z80_tables.cc | 21 +++++++++++++++++++++ 4 files changed, 42 insertions(+), 9 deletions(-) diff --git a/src/zvm_m65/z80_instr_general.s b/src/zvm_m65/z80_instr_general.s index ed2f4aeb..414adb76 100644 --- a/src/zvm_m65/z80_instr_general.s +++ b/src/zvm_m65/z80_instr_general.s @@ -56,7 +56,23 @@ Z80_instr_2F: ; sta REG_F jmp ZVM_next -; XXX put NEG here +Z80_instr_ED_44: ; NEG +Z80_illeg_ED_4C: ; NEG +Z80_illeg_ED_54: ; NEG +Z80_illeg_ED_5C: ; NEG +Z80_illeg_ED_64: ; NEG +Z80_illeg_ED_6C: ; NEG +Z80_illeg_ED_74: ; NEG +Z80_illeg_ED_7C: ; NEG + + ldx REG_A + lda z80_ftable_NEG, x + sta REG_F + lda #$00 + sec + sbc REG_A + sta REG_A + jmp ZVM_next Z80_instr_3F: ; CCF diff --git a/src/zvm_m65/z80_tables.s b/src/zvm_m65/z80_tables.s index b7545b59..a43d6d54 100644 --- a/src/zvm_m65/z80_tables.s +++ b/src/zvm_m65/z80_tables.s @@ -29,6 +29,10 @@ z80_ftable_IN_OR_XOR: +PUT_Z80_FTABLE_IN_OR_XOR +z80_ftable_NEG: + + +PUT_Z80_FTABLE_NEG + ; ; That horrific DAA instruction ; diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 5634d389..c1cb26cb 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -270,7 +270,6 @@ Z80_instr_DD_E3: ; EX (SP),IX Z80_instr_DD_F9: ; LD SP,IX Z80_instr_ED_42: ; SBC HL,BC Z80_instr_ED_43: ; LD (nn),BC -Z80_instr_ED_44: ; NEG Z80_instr_ED_45: ; RETN Z80_instr_ED_4A: ; ADC HL,BC Z80_instr_ED_4B: ; LD BC,(nn) @@ -345,20 +344,13 @@ Z80_illeg_CB_34: ; SLL H Z80_illeg_CB_35: ; SLL L Z80_illeg_CB_36: ; SLL (HL) Z80_illeg_CB_37: ; SLL A -Z80_illeg_ED_4C: ; NEG -Z80_illeg_ED_54: ; NEG Z80_illeg_ED_55: ; RETN -Z80_illeg_ED_5C: ; NEG Z80_illeg_ED_5D: ; RETN -Z80_illeg_ED_64: ; NEG Z80_illeg_ED_65: ; RETN -Z80_illeg_ED_6C: ; NEG Z80_illeg_ED_6D: ; RETN Z80_illeg_ED_70: ; IN F,(C) Z80_illeg_ED_71: ; OUT (C),0 -Z80_illeg_ED_74: ; NEG Z80_illeg_ED_75: ; RETN -Z80_illeg_ED_7C: ; NEG Z80_illeg_ED_7D: ; RETN Z80_illeg_xDCB_C0: ; SET 0,(IXY+d),B Z80_illeg_xDCB_C1: ; SET 0,(IXY+d),C diff --git a/tools/generate_z80_tables.cc b/tools/generate_z80_tables.cc index db236721..c98c7ce9 100644 --- a/tools/generate_z80_tables.cc +++ b/tools/generate_z80_tables.cc @@ -210,6 +210,26 @@ std::string generateInOrXorTable(void) return outStr.str() + "}\n\n\n"; } +std::string generateNegTable(void) +{ + std::stringstream outStr; + outStr << "!macro PUT_Z80_FTABLE_NEG {\n"; + + for (uint16_t idx = 0; idx < 0x100; idx++) + { + uint8_t flags = Z80_NF; + if (0 - idx >= 0x80) flags |= Z80_SF; + if (idx == 0) flags |= Z80_ZF; + if (idx != 0) flags |= Z80_HF | Z80_CF; + if (idx == 0x80) flags |= Z80_VF; + if ((0 - idx) & 0x08) flags |= Z80_XF; + if ((0 - idx) & 0x20) flags |= Z80_YF; + + outStr << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << int(flags) << "\n"; + } + + return outStr.str() + "}\n\n\n"; +} typedef struct FlagsDAA @@ -333,6 +353,7 @@ void writeTables() outFile << generateDecTable(); outFile << generateAndTable(); outFile << generateInOrXorTable(); + outFile << generateNegTable(); outFile << generateDaaTables(); // XXX From cd94519dab9ee159f5b6e648ab0da29261f55037 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 22 Dec 2020 23:02:05 +0100 Subject: [PATCH 068/257] startup tweaks --- src/basic/init/initmsg_m65.s | 54 +++++++++++++++--------------------- tools/generate_strings.cc | 3 +- 2 files changed, 23 insertions(+), 34 deletions(-) diff --git a/src/basic/init/initmsg_m65.s b/src/basic/init/initmsg_m65.s index f0fa4b64..e36672d7 100644 --- a/src/basic/init/initmsg_m65.s +++ b/src/basic/init/initmsg_m65.s @@ -11,20 +11,24 @@ INITMSG: jsr INITMSG_main_banner - ; Display additional information, depending on the mode - jsr M65_MODEGET - bcc @1 + bcc INITMSG_native + +INITMSG_legacy: ; Legacy C64 compatibility mode - jsr INITMSG_partial - - ldx #IDX__STR_ORS_LEGACY_2 + ldx #IDX__STR_ORS_LEGACY jsr print_packed_misc_str - bra INITMSG_end -@1: + jsr initmsg_bytes_free + + ldx #$07 + ldy #$00 + jmp plot_set + +INITMSG_native: + ; Native mode ldx #48 @@ -48,15 +52,16 @@ INITMSG: ldx #IDX__STR_ORS jsr print_packed_misc_str - jsr INITMSG_revision + ldx #IDX__STR_PRE_REV + jsr print_packed_misc_str + + lda #rom_revision_basic_string + jsr STROUT jsr print_return jsr print_return - ; FALLTROUGH - -INITMSG_end: - jsr initmsg_bytes_free !ifdef HAS_NOLGPL3_WARN { @@ -85,26 +90,11 @@ INITMSG_main_banner: ldy #>startup_banner jmp STROUT -INITMSG_autoswitch: ; entry point for 'SYS command' +INITMSG_autoswitch: jsr INITMSG_main_banner - jsr INITMSG_partial - jsr print_return + ldx #IDX__STR_ORS_LEGACY + jsr print_packed_misc_str + jmp print_return - -INITMSG_partial: - - ldx #IDX__STR_ORS_LEGACY_1 - jsr print_packed_misc_str - - ; FALLTROUGH - -INITMSG_revision: - - ldx #IDX__STR_PRE_REV - jsr print_packed_misc_str - - lda #rom_revision_basic_string - jmp STROUT diff --git a/tools/generate_strings.cc b/tools/generate_strings.cc index 835b0b07..00407a18 100644 --- a/tools/generate_strings.cc +++ b/tools/generate_strings.cc @@ -294,8 +294,7 @@ const StringEntryList GLOBAL_MiscStrings = { ListType::STRINGS_BASIC, "misc", { true, true, true, true, true, "STR_BRK_AT", "\rBRK AT $" }, { false, false, true, false, false, "STR_ORS", "OPEN ROMS BASIC & KERNAL\r" }, - { false, false, true, false, false, "STR_ORS_LEGACY_1", "OPEN ROMS " }, - { false, false, true, false, false, "STR_ORS_LEGACY_2", "\r\rLEGACY MODE " }, + { false, false, true, false, false, "STR_ORS_LEGACY", "(LEGACY MODE) " }, { false, true, true, false, false, "STR_MEM_HDR", "\r\x12 AREA START SIZE \r" }, { false, true, true, false, false, "STR_MEM_1", " $" }, From daf43ea2200756bd022a90adbc18b2168032252a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 23 Dec 2020 17:56:24 +0100 Subject: [PATCH 069/257] more work on Z80 opcodes --- src/zvm_m65/,aliases_zvm.s | 26 +- src/zvm_m65/2000.zvm_vectable.s | 240 ++++++------ src/zvm_m65/z80_instr_bit.s | 49 +++ src/zvm_m65/z80_instr_bit_sizeopt.s | 5 + src/zvm_m65/z80_instr_call_return.s | 158 ++++++++ src/zvm_m65/z80_instr_load_8bit.s | 299 +++++++------- src/zvm_m65/z80_instr_math_8bit.s | 114 +++--- src/zvm_m65/zvm_core.s | 578 +++++++++------------------- 8 files changed, 754 insertions(+), 715 deletions(-) create mode 100644 src/zvm_m65/z80_instr_bit_sizeopt.s diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index dc569d1a..be9415f5 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -22,7 +22,11 @@ !addr REG_H_SH = $11 !addr REG_IX = $12 ; 16-bit index register +!addr REG_IXL = $12 +!addr REG_IXH = $13 !addr REG_IY = $14 ; 16-bit index register +!addr REG_IYL = $14 +!addr REG_IYH = $15 !addr REG_SP = $16 ; 16-bit stack pointer !addr REG_PC = $18 ; 16-bit program counter @@ -49,14 +53,20 @@ !addr VEC_fetch_value = $60 !addr VEC_fetch_stack = $62 !addr VEC_store_stack = $64 -!addr VEC_fetch_via_HL = $66 -!addr VEC_store_via_HL = $68 -!addr VEC_fetch_via_IX_d = $6A -!addr VEC_fetch_via_IY_d = $6C -!addr VEC_store_via_IX_d = $6E -!addr VEC_store_via_IY_d = $70 -!addr VEC_fetch_via_nn = $72 -!addr VEC_store_via_nn = $74 +!addr VEC_fetch_via_BC = $66 ; XXX add routines +!addr VEC_store_via_BC = $68 ; XXX add routines +!addr VEC_fetch_via_DE = $6A ; XXX add routines +!addr VEC_store_via_DE = $6C ; XXX add routines +!addr VEC_fetch_via_HL = $6E +!addr VEC_store_via_HL = $70 +!addr VEC_fetch_via_IX_d = $72 +!addr VEC_fetch_via_IY_d = $74 +!addr VEC_store_via_IX_d = $76 +!addr VEC_store_via_IY_d = $78 +!addr VEC_fetch_via_nn = $7A +!addr VEC_store_via_nn = $7C + + ; Masks for Z80 flag (F) register diff --git a/src/zvm_m65/2000.zvm_vectable.s b/src/zvm_m65/2000.zvm_vectable.s index 7c12fe9c..dffd5274 100644 --- a/src/zvm_m65/2000.zvm_vectable.s +++ b/src/zvm_m65/2000.zvm_vectable.s @@ -117,69 +117,69 @@ Z80_vectab_CB_1: Z80_vectab_DD_0: - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD - !word Z80_illegal__DD, Z80_instr_DD_09, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_instr_DD_09, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD - !word Z80_illegal__DD, Z80_instr_DD_19, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_instr_DD_19, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__DD, Z80_instr_DD_21, Z80_instr_DD_22, Z80_instr_DD_23, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD - !word Z80_illegal__DD, Z80_instr_DD_29, Z80_instr_DD_2A, Z80_instr_DD_2B, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_unsupported, Z80_instr_DD_21, Z80_instr_DD_22, Z80_instr_DD_23, Z80_illeg_DD_24, Z80_illeg_DD_25, Z80_illeg_DD_26, Z80_unsupported + !word Z80_unsupported, Z80_instr_DD_29, Z80_instr_DD_2A, Z80_instr_DD_2B, Z80_illeg_DD_2C, Z80_illeg_DD_2D, Z80_illeg_DD_2E, Z80_unsupported - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_34, Z80_instr_DD_35, Z80_illegal__DD, Z80_illegal__DD - !word Z80_illegal__DD, Z80_instr_DD_39, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_instr_DD_34, Z80_instr_DD_35, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_instr_DD_39, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_46, Z80_illegal__DD - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_4E, Z80_illegal__DD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_DD_44, Z80_illeg_DD_45, Z80_instr_DD_46, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_DD_4C, Z80_illeg_DD_4D, Z80_instr_DD_4E, Z80_unsupported - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_56, Z80_illegal__DD - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_5E, Z80_illegal__DD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_DD_54, Z80_illeg_DD_55, Z80_instr_DD_56, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_DD_5C, Z80_illeg_DD_5D, Z80_instr_DD_5E, Z80_unsupported - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_66, Z80_illegal__DD - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_6E, Z80_illegal__DD + !word Z80_illeg_DD_60, Z80_illeg_DD_61, Z80_illeg_DD_62, Z80_illeg_DD_63, Z80_illeg_DD_64, Z80_illeg_DD_65, Z80_instr_DD_66, Z80_illeg_DD_67 + !word Z80_illeg_DD_68, Z80_illeg_DD_69, Z80_illeg_DD_6A, Z80_illeg_DD_6B, Z80_illeg_DD_6C, Z80_illeg_DD_6D, Z80_instr_DD_6E, Z80_illeg_DD_6F - !word Z80_instr_DD_70, Z80_instr_DD_71, Z80_instr_DD_72, Z80_instr_DD_73, Z80_instr_DD_74, Z80_instr_DD_75, Z80_illegal__DD, Z80_instr_DD_77 - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_7E, Z80_illegal__DD + !word Z80_instr_DD_70, Z80_instr_DD_71, Z80_instr_DD_72, Z80_instr_DD_73, Z80_instr_DD_74, Z80_instr_DD_75, Z80_unsupported, Z80_instr_DD_77 + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_DD_7C, Z80_illeg_DD_7D, Z80_instr_DD_7E, Z80_unsupported Z80_vectab_DD_1: - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_86, Z80_illegal__DD - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_8E, Z80_illegal__DD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_DD_84, Z80_illeg_DD_85, Z80_instr_DD_86, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_DD_8C, Z80_illeg_DD_8D, Z80_instr_DD_8E, Z80_unsupported - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_96, Z80_illegal__DD - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_9E, Z80_illegal__DD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_DD_94, Z80_illeg_DD_95, Z80_instr_DD_96, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_DD_9C, Z80_illeg_DD_9D, Z80_instr_DD_9E, Z80_unsupported - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_A6, Z80_illegal__DD - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_AE, Z80_illegal__DD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_DD_A4, Z80_illeg_DD_A5, Z80_instr_DD_A6, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_DD_AC, Z80_illeg_DD_AD, Z80_instr_DD_AE, Z80_unsupported - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_B6, Z80_illegal__DD - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_BE, Z80_illegal__DD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_DD_B4, Z80_illeg_DD_B5, Z80_instr_DD_B6, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_DD_BC, Z80_illeg_DD_BD, Z80_instr_DD_BE, Z80_unsupported - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_instr_DD_CB, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_instr_DD_CB, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__DD, Z80_instr_DD_E1, Z80_illegal__DD, Z80_instr_DD_E3, Z80_illegal__DD, Z80_instr_DD_E5, Z80_illegal__DD, Z80_illegal__DD - !word Z80_illegal__DD, Z80_instr_DD_E9, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_unsupported, Z80_instr_DD_E1, Z80_unsupported, Z80_instr_DD_E3, Z80_unsupported, Z80_instr_DD_E5, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_instr_DD_E9, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD - !word Z80_illegal__DD, Z80_instr_DD_F9, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD, Z80_illegal__DD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_instr_DD_F9, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported Z80_vectab_ED_0: - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported !word Z80_instr_ED_40, Z80_instr_ED_41, Z80_instr_ED_42, Z80_instr_ED_43, Z80_instr_ED_44, Z80_instr_ED_45, Z80_instr_ED_46, Z80_instr_ED_47 !word Z80_instr_ED_48, Z80_instr_ED_49, Z80_instr_ED_4A, Z80_instr_ED_4B, Z80_illeg_ED_4C, Z80_instr_ED_4D, Z80_illeg_ED_4E, Z80_instr_ED_4F @@ -187,138 +187,138 @@ Z80_vectab_ED_0: !word Z80_instr_ED_50, Z80_instr_ED_51, Z80_instr_ED_52, Z80_instr_ED_53, Z80_illeg_ED_54, Z80_illeg_ED_55, Z80_instr_ED_56, Z80_instr_ED_57 !word Z80_instr_ED_58, Z80_instr_ED_59, Z80_instr_ED_5A, Z80_instr_ED_5B, Z80_illeg_ED_5C, Z80_illeg_ED_5D, Z80_instr_ED_5E, Z80_instr_ED_5F - !word Z80_instr_ED_60, Z80_instr_ED_61, Z80_instr_ED_62, Z80_illegal__ED, Z80_illeg_ED_64, Z80_illeg_ED_65, Z80_illeg_ED_66, Z80_instr_ED_67 - !word Z80_instr_ED_68, Z80_instr_ED_69, Z80_instr_ED_6A, Z80_illegal__ED, Z80_illeg_ED_6C, Z80_illeg_ED_6D, Z80_illeg_ED_6E, Z80_instr_ED_6F + !word Z80_instr_ED_60, Z80_instr_ED_61, Z80_instr_ED_62, Z80_illeg_ED_63, Z80_illeg_ED_64, Z80_illeg_ED_65, Z80_illeg_ED_66, Z80_instr_ED_67 + !word Z80_instr_ED_68, Z80_instr_ED_69, Z80_instr_ED_6A, Z80_illeg_ED_6B, Z80_illeg_ED_6C, Z80_illeg_ED_6D, Z80_illeg_ED_6E, Z80_instr_ED_6F !word Z80_illeg_ED_70, Z80_illeg_ED_71, Z80_instr_ED_72, Z80_instr_ED_73, Z80_illeg_ED_74, Z80_illeg_ED_75, Z80_illeg_ED_76, Z80_illeg_ED_77 !word Z80_instr_ED_78, Z80_instr_ED_79, Z80_instr_ED_7A, Z80_instr_ED_7B, Z80_illeg_ED_7C, Z80_illeg_ED_7D, Z80_illeg_ED_7E, Z80_illeg_ED_7F Z80_vectab_ED_1: - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_instr_ED_A0, Z80_instr_ED_A1, Z80_instr_ED_A2, Z80_instr_ED_A3, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED - !word Z80_instr_ED_A8, Z80_instr_ED_A9, Z80_instr_ED_AA, Z80_instr_ED_AB, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_instr_ED_A0, Z80_instr_ED_A1, Z80_instr_ED_A2, Z80_instr_ED_A3, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_instr_ED_A8, Z80_instr_ED_A9, Z80_instr_ED_AA, Z80_instr_ED_AB, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_instr_ED_B0, Z80_instr_ED_B1, Z80_instr_ED_B2, Z80_instr_ED_B3, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED - !word Z80_instr_ED_B8, Z80_instr_ED_B9, Z80_instr_ED_BA, Z80_instr_ED_BB, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_instr_ED_B0, Z80_instr_ED_B1, Z80_instr_ED_B2, Z80_instr_ED_B3, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_instr_ED_B8, Z80_instr_ED_B9, Z80_instr_ED_BA, Z80_instr_ED_BB, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED - !word Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED, Z80_illegal__ED + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported Z80_vectab_FD_0: - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD - !word Z80_illegal__FD, Z80_instr_FD_09, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_instr_FD_09, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD - !word Z80_illegal__FD, Z80_instr_FD_19, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_instr_FD_19, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__FD, Z80_instr_FD_21, Z80_instr_FD_22, Z80_instr_FD_23, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD - !word Z80_illegal__FD, Z80_instr_FD_29, Z80_instr_FD_2A, Z80_instr_FD_2B, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + !word Z80_unsupported, Z80_instr_FD_21, Z80_instr_FD_22, Z80_instr_FD_23, Z80_illeg_FD_24, Z80_illeg_FD_25, Z80_illeg_FD_26, Z80_unsupported + !word Z80_unsupported, Z80_instr_FD_29, Z80_instr_FD_2A, Z80_instr_FD_2B, Z80_illeg_FD_2C, Z80_illeg_FD_2D, Z80_illeg_FD_2E, Z80_unsupported - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_34, Z80_instr_FD_35, Z80_illegal__FD, Z80_illegal__FD - !word Z80_illegal__FD, Z80_instr_FD_39, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_instr_FD_34, Z80_instr_FD_35, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_instr_FD_39, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_46, Z80_illegal__FD - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_4E, Z80_illegal__FD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_FD_44, Z80_illeg_FD_45, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_FD_4C, Z80_illeg_FD_4D, Z80_instr_FD_4E, Z80_unsupported - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_56, Z80_illegal__FD - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_5E, Z80_illegal__FD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_FD_54, Z80_illeg_FD_55, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_FD_5C, Z80_illeg_FD_5D, Z80_instr_FD_5E, Z80_unsupported - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_66, Z80_illegal__FD - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_6E, Z80_illegal__FD + !word Z80_illeg_FD_60, Z80_illeg_FD_61, Z80_illeg_FD_62, Z80_illeg_FD_63, Z80_illeg_FD_64, Z80_illeg_FD_65, Z80_instr_FD_66, Z80_illeg_FD_67 + !word Z80_illeg_FD_68, Z80_illeg_FD_69, Z80_illeg_FD_6A, Z80_illeg_FD_6B, Z80_illeg_FD_6C, Z80_illeg_FD_6D, Z80_instr_FD_6E, Z80_illeg_FD_6F - !word Z80_instr_FD_70, Z80_instr_FD_71, Z80_instr_FD_72, Z80_instr_FD_73, Z80_instr_FD_74, Z80_instr_FD_75, Z80_illegal__FD, Z80_instr_FD_77 - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_7E, Z80_illegal__FD + !word Z80_instr_FD_70, Z80_instr_FD_71, Z80_instr_FD_72, Z80_instr_FD_73, Z80_instr_FD_74, Z80_instr_FD_75, Z80_unsupported, Z80_instr_FD_77 + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_FD_7C, Z80_illeg_FD_7D, Z80_instr_FD_7E, Z80_unsupported Z80_vectab_FD_1: - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_86, Z80_illegal__FD - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_8E, Z80_illegal__FD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_FD_84, Z80_illeg_FD_85, Z80_instr_FD_86, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_FD_8C, Z80_illeg_FD_8D, Z80_instr_FD_8E, Z80_unsupported - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_96, Z80_illegal__FD - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_9E, Z80_illegal__FD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_FD_94, Z80_illeg_FD_95, Z80_instr_FD_96, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_FD_9C, Z80_illeg_FD_9D, Z80_instr_FD_9E, Z80_unsupported - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_A6, Z80_illegal__FD - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_AE, Z80_illegal__FD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_FD_A4, Z80_illeg_FD_A5, Z80_instr_FD_A6, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_FD_AC, Z80_illeg_FD_AD, Z80_instr_FD_AE, Z80_unsupported - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_B6, Z80_illegal__FD - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_BE, Z80_illegal__FD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_FD_B4, Z80_illeg_FD_B5, Z80_instr_FD_B6, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_illeg_FD_BC, Z80_illeg_FD_BD, Z80_instr_FD_BE, Z80_unsupported - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_instr_FD_CB, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_instr_FD_CB, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__FD, Z80_instr_FD_E1, Z80_illegal__FD, Z80_instr_FD_E3, Z80_illegal__FD, Z80_instr_FD_E5, Z80_illegal__FD, Z80_illegal__FD - !word Z80_illegal__FD, Z80_instr_FD_E9, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + !word Z80_unsupported, Z80_instr_FD_E1, Z80_unsupported, Z80_instr_FD_E3, Z80_unsupported, Z80_instr_FD_E5, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_instr_FD_E9, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported - !word Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD - !word Z80_illegal__FD, Z80_instr_FD_F9, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD, Z80_illegal__FD + !word Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported + !word Z80_unsupported, Z80_instr_FD_F9, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported, Z80_unsupported Z80_vectab_xDCB_0: - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_06, Z80_illegal__xDCB - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_0E, Z80_illegal__xDCB + !word Z80_illeg_xDCB_00, Z80_illeg_xDCB_01, Z80_illeg_xDCB_02, Z80_illeg_xDCB_03, Z80_illeg_xDCB_04, Z80_illeg_xDCB_05, Z80_instr_xDCB_06, Z80_illeg_xDCB_07 + !word Z80_illeg_xDCB_08, Z80_illeg_xDCB_09, Z80_illeg_xDCB_0A, Z80_illeg_xDCB_0B, Z80_illeg_xDCB_0C, Z80_illeg_xDCB_0D, Z80_instr_xDCB_0E, Z80_illeg_xDCB_0F - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_16, Z80_illegal__xDCB - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_1E, Z80_illegal__xDCB + !word Z80_illeg_xDCB_10, Z80_illeg_xDCB_11, Z80_illeg_xDCB_12, Z80_illeg_xDCB_13, Z80_illeg_xDCB_14, Z80_illeg_xDCB_15, Z80_instr_xDCB_16, Z80_illeg_xDCB_17 + !word Z80_illeg_xDCB_18, Z80_illeg_xDCB_19, Z80_illeg_xDCB_1A, Z80_illeg_xDCB_1B, Z80_illeg_xDCB_1C, Z80_illeg_xDCB_1D, Z80_instr_xDCB_1E, Z80_illeg_xDCB_1F - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_26, Z80_illegal__xDCB - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_2E, Z80_illegal__xDCB + !word Z80_illeg_xDCB_20, Z80_illeg_xDCB_21, Z80_illeg_xDCB_22, Z80_illeg_xDCB_23, Z80_illeg_xDCB_24, Z80_illeg_xDCB_25, Z80_instr_xDCB_26, Z80_illeg_xDCB_27 + !word Z80_illeg_xDCB_28, Z80_illeg_xDCB_29, Z80_illeg_xDCB_2A, Z80_illeg_xDCB_2B, Z80_illeg_xDCB_2C, Z80_illeg_xDCB_2D, Z80_instr_xDCB_2E, Z80_illeg_xDCB_2F - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_3E, Z80_illegal__xDCB + !word Z80_illeg_xDCB_30, Z80_illeg_xDCB_31, Z80_illeg_xDCB_32, Z80_illeg_xDCB_33, Z80_illeg_xDCB_34, Z80_illeg_xDCB_35, Z80_illeg_xDCB_36, Z80_illeg_xDCB_37 + !word Z80_illeg_xDCB_38, Z80_illeg_xDCB_39, Z80_illeg_xDCB_3A, Z80_illeg_xDCB_3B, Z80_illeg_xDCB_3C, Z80_illeg_xDCB_3D, Z80_instr_xDCB_3E, Z80_illeg_xDCB_3F - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_46, Z80_illegal__xDCB - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_4E, Z80_illegal__xDCB + !word Z80_illeg_xDCB_40, Z80_illeg_xDCB_41, Z80_illeg_xDCB_42, Z80_illeg_xDCB_43, Z80_illeg_xDCB_44, Z80_illeg_xDCB_45, Z80_instr_xDCB_46, Z80_illeg_xDCB_47 + !word Z80_illeg_xDCB_48, Z80_illeg_xDCB_49, Z80_illeg_xDCB_4A, Z80_illeg_xDCB_4B, Z80_illeg_xDCB_4C, Z80_illeg_xDCB_4D, Z80_instr_xDCB_4E, Z80_illeg_xDCB_4F - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_56, Z80_illegal__xDCB - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_5E, Z80_illegal__xDCB + !word Z80_illeg_xDCB_50, Z80_illeg_xDCB_51, Z80_illeg_xDCB_52, Z80_illeg_xDCB_53, Z80_illeg_xDCB_54, Z80_illeg_xDCB_55, Z80_instr_xDCB_56, Z80_illeg_xDCB_57 + !word Z80_illeg_xDCB_58, Z80_illeg_xDCB_59, Z80_illeg_xDCB_5A, Z80_illeg_xDCB_5B, Z80_illeg_xDCB_5C, Z80_illeg_xDCB_5D, Z80_instr_xDCB_5E, Z80_illeg_xDCB_5F - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_66, Z80_illegal__xDCB - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_6E, Z80_illegal__xDCB + !word Z80_illeg_xDCB_60, Z80_illeg_xDCB_61, Z80_illeg_xDCB_62, Z80_illeg_xDCB_63, Z80_illeg_xDCB_64, Z80_illeg_xDCB_65, Z80_instr_xDCB_66, Z80_illeg_xDCB_67 + !word Z80_illeg_xDCB_68, Z80_illeg_xDCB_69, Z80_illeg_xDCB_6A, Z80_illeg_xDCB_6B, Z80_illeg_xDCB_6C, Z80_illeg_xDCB_6D, Z80_instr_xDCB_6E, Z80_illeg_xDCB_6F - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_76, Z80_illegal__xDCB + !word Z80_illeg_xDCB_70, Z80_illeg_xDCB_71, Z80_illeg_xDCB_72, Z80_illeg_xDCB_73, Z80_illeg_xDCB_74, Z80_illeg_xDCB_75, Z80_instr_xDCB_76, Z80_illeg_xDCB_77 !word Z80_illeg_xDCB_78, Z80_illeg_xDCB_79, Z80_illeg_xDCB_7A, Z80_illeg_xDCB_7B, Z80_illeg_xDCB_7C, Z80_illeg_xDCB_7D, Z80_instr_xDCB_7E, Z80_illeg_xDCB_7F Z80_vectab_xDCB_1: - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_86, Z80_illegal__xDCB - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_8E, Z80_illegal__xDCB + !word Z80_illeg_xDCB_80, Z80_illeg_xDCB_81, Z80_illeg_xDCB_82, Z80_illeg_xDCB_83, Z80_illeg_xDCB_84, Z80_illeg_xDCB_85, Z80_instr_xDCB_86, Z80_illeg_xDCB_87 + !word Z80_illeg_xDCB_88, Z80_illeg_xDCB_89, Z80_illeg_xDCB_8A, Z80_illeg_xDCB_8B, Z80_illeg_xDCB_8C, Z80_illeg_xDCB_8D, Z80_instr_xDCB_8E, Z80_illeg_xDCB_8F - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_96, Z80_illegal__xDCB - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_9E, Z80_illegal__xDCB + !word Z80_illeg_xDCB_90, Z80_illeg_xDCB_91, Z80_illeg_xDCB_92, Z80_illeg_xDCB_93, Z80_illeg_xDCB_94, Z80_illeg_xDCB_95, Z80_instr_xDCB_96, Z80_illeg_xDCB_97 + !word Z80_illeg_xDCB_98, Z80_illeg_xDCB_99, Z80_illeg_xDCB_9A, Z80_illeg_xDCB_9B, Z80_illeg_xDCB_9C, Z80_illeg_xDCB_9D, Z80_instr_xDCB_9E, Z80_illeg_xDCB_9F - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_A6, Z80_illegal__xDCB - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_AE, Z80_illegal__xDCB + !word Z80_illeg_xDCB_A0, Z80_illeg_xDCB_A1, Z80_illeg_xDCB_A2, Z80_illeg_xDCB_A3, Z80_illeg_xDCB_A4, Z80_illeg_xDCB_A5, Z80_instr_xDCB_A6, Z80_illeg_xDCB_A7 + !word Z80_illeg_xDCB_A8, Z80_illeg_xDCB_A9, Z80_illeg_xDCB_AA, Z80_illeg_xDCB_AB, Z80_illeg_xDCB_AC, Z80_illeg_xDCB_AD, Z80_instr_xDCB_AE, Z80_illeg_xDCB_AF - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_B6, Z80_illegal__xDCB - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_BE, Z80_illegal__xDCB + !word Z80_illeg_xDCB_B0, Z80_illeg_xDCB_B1, Z80_illeg_xDCB_B2, Z80_illeg_xDCB_B3, Z80_illeg_xDCB_B4, Z80_illeg_xDCB_B5, Z80_instr_xDCB_B6, Z80_illeg_xDCB_B7 + !word Z80_illeg_xDCB_B8, Z80_illeg_xDCB_B9, Z80_illeg_xDCB_BA, Z80_illeg_xDCB_BB, Z80_illeg_xDCB_BC, Z80_illeg_xDCB_BD, Z80_instr_xDCB_BE, Z80_illeg_xDCB_BF !word Z80_illeg_xDCB_C0, Z80_illeg_xDCB_C1, Z80_illeg_xDCB_C2, Z80_illeg_xDCB_C3, Z80_illeg_xDCB_C4, Z80_illeg_xDCB_C5, Z80_instr_xDCB_C6, Z80_illeg_xDCB_C7 - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_CE, Z80_illegal__xDCB + !word Z80_illeg_xDCB_C8, Z80_illeg_xDCB_C9, Z80_illeg_xDCB_CA, Z80_illeg_xDCB_CB, Z80_illeg_xDCB_CC, Z80_illeg_xDCB_CD, Z80_instr_xDCB_CE, Z80_illeg_xDCB_CF - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_D6, Z80_illegal__xDCB - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_DE, Z80_illegal__xDCB + !word Z80_illeg_xDCB_D0, Z80_illeg_xDCB_D1, Z80_illeg_xDCB_D2, Z80_illeg_xDCB_D3, Z80_illeg_xDCB_D4, Z80_illeg_xDCB_D5, Z80_instr_xDCB_D6, Z80_illeg_xDCB_D7 + !word Z80_illeg_xDCB_D8, Z80_illeg_xDCB_D9, Z80_illeg_xDCB_DA, Z80_illeg_xDCB_DB, Z80_illeg_xDCB_DC, Z80_illeg_xDCB_DD, Z80_instr_xDCB_DE, Z80_illeg_xDCB_DF - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_E6, Z80_illegal__xDCB - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_EE, Z80_illegal__xDCB + !word Z80_illeg_xDCB_E0, Z80_illeg_xDCB_E1, Z80_illeg_xDCB_E2, Z80_illeg_xDCB_E3, Z80_illeg_xDCB_E4, Z80_illeg_xDCB_E5, Z80_instr_xDCB_E6, Z80_illeg_xDCB_E7 + !word Z80_illeg_xDCB_E8, Z80_illeg_xDCB_E9, Z80_illeg_xDCB_EA, Z80_illeg_xDCB_EB, Z80_illeg_xDCB_EC, Z80_illeg_xDCB_ED, Z80_instr_xDCB_EE, Z80_illeg_xDCB_EF - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_F6, Z80_illegal__xDCB - !word Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_illegal__xDCB, Z80_instr_xDCB_FE, Z80_illegal__xDCB + !word Z80_illeg_xDCB_F0, Z80_illeg_xDCB_F1, Z80_illeg_xDCB_F2, Z80_illeg_xDCB_F3, Z80_illeg_xDCB_F4, Z80_illeg_xDCB_F5, Z80_instr_xDCB_F6, Z80_illeg_xDCB_F7 + !word Z80_illeg_xDCB_F8, Z80_illeg_xDCB_F9, Z80_illeg_xDCB_FA, Z80_illeg_xDCB_FB, Z80_illeg_xDCB_FC, Z80_illeg_xDCB_FD, Z80_instr_xDCB_FE, Z80_illeg_xDCB_FF diff --git a/src/zvm_m65/z80_instr_bit.s b/src/zvm_m65/z80_instr_bit.s index 25796f06..050acc05 100644 --- a/src/zvm_m65/z80_instr_bit.s +++ b/src/zvm_m65/z80_instr_bit.s @@ -440,49 +440,98 @@ Z80_common_bitHL_1: ; bits taken from index register + displacement +Z80_illeg_xDCB_40: ; BIT 0,(IXY+d) +Z80_illeg_xDCB_41: ; BIT 0,(IXY+d) +Z80_illeg_xDCB_42: ; BIT 0,(IXY+d) +Z80_illeg_xDCB_43: ; BIT 0,(IXY+d) +Z80_illeg_xDCB_44: ; BIT 0,(IXY+d) +Z80_illeg_xDCB_45: ; BIT 0,(IXY+d) Z80_instr_xDCB_46: ; BIT 0,(IXY+d) +Z80_illeg_xDCB_47: ; BIT 0,(IXY+d) lda [PTR_IXY_d],z and #%00000001 bne Z80_common_bitIXYx_1 bra Z80_common_bitIXYx_0 +Z80_illeg_xDCB_48: ; BIT 1,(IXY+d) +Z80_illeg_xDCB_49: ; BIT 1,(IXY+d) +Z80_illeg_xDCB_4A: ; BIT 1,(IXY+d) +Z80_illeg_xDCB_4B: ; BIT 1,(IXY+d) +Z80_illeg_xDCB_4C: ; BIT 1,(IXY+d) +Z80_illeg_xDCB_4D: ; BIT 1,(IXY+d) Z80_instr_xDCB_4E: ; BIT 1,(IXY+d) +Z80_illeg_xDCB_4F: ; BIT 1,(IXY+d) lda [PTR_IXY_d],z and #%00000010 bne Z80_common_bitIXYx_1 bra Z80_common_bitIXYx_0 +Z80_illeg_xDCB_50: ; BIT 2,(IXY+d) +Z80_illeg_xDCB_51: ; BIT 2,(IXY+d) +Z80_illeg_xDCB_52: ; BIT 2,(IXY+d) +Z80_illeg_xDCB_53: ; BIT 2,(IXY+d) +Z80_illeg_xDCB_54: ; BIT 2,(IXY+d) +Z80_illeg_xDCB_55: ; BIT 2,(IXY+d) Z80_instr_xDCB_56: ; BIT 2,(IXY+d) +Z80_illeg_xDCB_57: ; BIT 2,(IXY+d) lda [PTR_IXY_d],z and #%00000100 bne Z80_common_bitIXYx_1 bra Z80_common_bitIXYx_0 +Z80_illeg_xDCB_58: ; BIT 3,(IXY+d) +Z80_illeg_xDCB_59: ; BIT 3,(IXY+d) +Z80_illeg_xDCB_5A: ; BIT 3,(IXY+d) +Z80_illeg_xDCB_5B: ; BIT 3,(IXY+d) +Z80_illeg_xDCB_5C: ; BIT 3,(IXY+d) +Z80_illeg_xDCB_5D: ; BIT 3,(IXY+d) Z80_instr_xDCB_5E: ; BIT 3,(IXY+d) +Z80_illeg_xDCB_5F: ; BIT 3,(IXY+d) lda [PTR_IXY_d],z and #%00001000 bne Z80_common_bitIXYx_1 bra Z80_common_bitIXYx_0 +Z80_illeg_xDCB_60: ; BIT 4,(IXY+d) +Z80_illeg_xDCB_61: ; BIT 4,(IXY+d) +Z80_illeg_xDCB_62: ; BIT 4,(IXY+d) +Z80_illeg_xDCB_63: ; BIT 4,(IXY+d) +Z80_illeg_xDCB_64: ; BIT 4,(IXY+d) +Z80_illeg_xDCB_65: ; BIT 4,(IXY+d) Z80_instr_xDCB_66: ; BIT 4,(IXY+d) +Z80_illeg_xDCB_67: ; BIT 4,(IXY+d) lda [PTR_IXY_d],z and #%00010000 bne Z80_common_bitIXYx_1 bra Z80_common_bitIXYx_0 +Z80_illeg_xDCB_68: ; BIT 5,(IXY+d) +Z80_illeg_xDCB_69: ; BIT 5,(IXY+d) +Z80_illeg_xDCB_6A: ; BIT 5,(IXY+d) +Z80_illeg_xDCB_6B: ; BIT 5,(IXY+d) +Z80_illeg_xDCB_6C: ; BIT 5,(IXY+d) +Z80_illeg_xDCB_6D: ; BIT 5,(IXY+d) Z80_instr_xDCB_6E: ; BIT 5,(IXY+d) +Z80_illeg_xDCB_6F: ; BIT 5,(IXY+d) lda [PTR_IXY_d],z and #%00100000 bne Z80_common_bitIXYx_1 bra Z80_common_bitIXYx_0 +Z80_illeg_xDCB_70: ; BIT 6,(IXY+d) +Z80_illeg_xDCB_71: ; BIT 6,(IXY+d) +Z80_illeg_xDCB_72: ; BIT 6,(IXY+d) +Z80_illeg_xDCB_73: ; BIT 6,(IXY+d) +Z80_illeg_xDCB_74: ; BIT 6,(IXY+d) +Z80_illeg_xDCB_75: ; BIT 6,(IXY+d) Z80_instr_xDCB_76: ; BIT 6,(IXY+d) +Z80_illeg_xDCB_77: ; BIT 6,(IXY+d) lda [PTR_IXY_d],z and #%01000000 diff --git a/src/zvm_m65/z80_instr_bit_sizeopt.s b/src/zvm_m65/z80_instr_bit_sizeopt.s new file mode 100644 index 00000000..5d1027bd --- /dev/null +++ b/src/zvm_m65/z80_instr_bit_sizeopt.s @@ -0,0 +1,5 @@ + +; +; Z80 bit set/reset/test instructions - these illegals are size optimized +; + diff --git a/src/zvm_m65/z80_instr_call_return.s b/src/zvm_m65/z80_instr_call_return.s index 552f3b61..15ef8033 100644 --- a/src/zvm_m65/z80_instr_call_return.s +++ b/src/zvm_m65/z80_instr_call_return.s @@ -2,3 +2,161 @@ ; ; Z80 call/return instructions ; + + +Z80_instr_CD: ; CALL nn + + jsr (VEC_fetch_value) + pha + jsr (VEC_fetch_value) + pha + + lda REG_PC+1 + jsr (VEC_store_stack) + lda REG_PC+0 + jsr (VEC_store_stack) + + pla + sta REG_PC+1 + pla + sta REG_PC+0 + jmp ZVM_next + +Z80_instr_C4: ; CALL NZ,nn + + bbr6 REG_F,Z80_instr_CD + inw REG_PC + inw REG_PC + jmp ZVM_next + +Z80_instr_CC: ; CALL Z,nn + + bbs6 REG_F,Z80_instr_CD + inw REG_PC + inw REG_PC + jmp ZVM_next + +Z80_instr_D4: ; CALL NC,nn + + bbr0 REG_F,Z80_instr_CD + inw REG_PC + inw REG_PC + jmp ZVM_next + +Z80_instr_DC: ; CALL C,nn + + bbs0 REG_F,Z80_instr_CD + inw REG_PC + inw REG_PC + jmp ZVM_next + +Z80_instr_E4: ; CALL PO,nn + + bbr2 REG_F,Z80_instr_CD + inw REG_PC + inw REG_PC + jmp ZVM_next + +Z80_instr_EC: ; CALL PE,nn + + bbs2 REG_F,Z80_instr_CD + inw REG_PC + inw REG_PC + jmp ZVM_next + +Z80_instr_F4: ; CALL P,nn + + bbr7 REG_F,Z80_instr_CD + inw REG_PC + inw REG_PC + jmp ZVM_next + +Z80_instr_FC: ; CALL M,nn + + bbs7 REG_F,Z80_instr_CD + inw REG_PC + inw REG_PC + jmp ZVM_next + +Z80_instr_ED_45: ; RETN +Z80_illeg_ED_55: ; RETN +Z80_illeg_ED_5D: ; RETN +Z80_illeg_ED_65: ; RETN +Z80_illeg_ED_6D: ; RETN +Z80_illeg_ED_75: ; RETN +Z80_illeg_ED_7D: ; RETN + + lda REG_IFF2 + sta REG_IFF1 + +Z80_instr_ED_4D: ; RETTI +Z80_instr_C9: ; RET + + jsr (VEC_fetch_stack) + sta REG_PC+0 + jsr (VEC_fetch_stack) + sta REG_PC+1 + jmp ZVM_next + +Z80_instr_C0: ; RET NZ + + bbr6 REG_F,Z80_instr_C9 + jmp ZVM_next + +Z80_instr_C8: ; RET Z + + bbs6 REG_F,Z80_instr_C9 + jmp ZVM_next + +Z80_instr_D0: ; RET NC + + bbr0 REG_F,Z80_instr_C9 + jmp ZVM_next + +Z80_instr_D8: ; RET C + + bbs0 REG_F,Z80_instr_C9 + jmp ZVM_next + +Z80_instr_E0: ; RET PO + + bbr2 REG_F,Z80_instr_C9 + jmp ZVM_next + +Z80_instr_E8: ; RET PE + + bbs2 REG_F,Z80_instr_C9 + jmp ZVM_next + +Z80_instr_F0: ; RET P + + bbr7 REG_F,Z80_instr_C9 + jmp ZVM_next + +Z80_instr_F8: ; RET M + + bbs7 REG_F,Z80_instr_C9 + jmp ZVM_next + + +!macro Z80_RST .P { + + lda REG_PC+1 + jsr (VEC_store_stack) + lda REG_PC+0 + jsr (VEC_store_stack) + lda #$00 + sta REG_PC+1 + lda #.P + sta REG_PC+0 + jmp ZVM_next +} + +Z80_instr_C7: +Z80_RST $00 ; RST 00H +Z80_instr_CF: +Z80_RST $08 ; RST 08H +Z80_instr_D7: +Z80_RST $10 ; RST 10H +Z80_instr_DF: +Z80_RST $18 ; RST 18H +Z80_instr_E7: +Z80_RST $20 ; RST 20H +Z80_instr_EF: +Z80_RST $28 ; RST 28H +Z80_instr_F7: +Z80_RST $30 ; RST 30H +Z80_instr_FF: +Z80_RST $38 ; RST 38H diff --git a/src/zvm_m65/z80_instr_load_8bit.s b/src/zvm_m65/z80_instr_load_8bit.s index fdf14ce6..e3b0bc68 100644 --- a/src/zvm_m65/z80_instr_load_8bit.s +++ b/src/zvm_m65/z80_instr_load_8bit.s @@ -59,153 +59,194 @@ Z80_instr_7B: +Z80_LD_REGn_REGn REG_A, REG_E ; Z80_instr_7C: +Z80_LD_REGn_REGn REG_A, REG_H ; LD A,H Z80_instr_7D: +Z80_LD_REGn_REGn REG_A, REG_L ; LD A,L -; -; load register with immediate value -; +Z80_illeg_DD_44: +Z80_LD_REGn_REGn REG_B, REG_IXH ; LD B,IXH +Z80_illeg_DD_45: +Z80_LD_REGn_REGn REG_B, REG_IXL ; LD B,IXL +Z80_illeg_DD_4C: +Z80_LD_REGn_REGn REG_C, REG_IXH ; LD C,IXH +Z80_illeg_DD_4D: +Z80_LD_REGn_REGn REG_C, REG_IXL ; LD C,IXL +Z80_illeg_DD_54: +Z80_LD_REGn_REGn REG_D, REG_IXH ; LD D,IXH +Z80_illeg_DD_55: +Z80_LD_REGn_REGn REG_D, REG_IXL ; LD D,IXL +Z80_illeg_DD_5C: +Z80_LD_REGn_REGn REG_E, REG_IXH ; LD E,IXH +Z80_illeg_DD_5D: +Z80_LD_REGn_REGn REG_E, REG_IXL ; LD E,IXL +Z80_illeg_DD_7C: +Z80_LD_REGn_REGn REG_A, REG_IXH ; LD A,IXH +Z80_illeg_DD_7D: +Z80_LD_REGn_REGn REG_A, REG_IXL ; LD A,IXL -Z80_instr_06: ; LD B,n +Z80_illeg_FD_44: +Z80_LD_REGn_REGn REG_B, REG_IYH ; LD B,IYH +Z80_illeg_FD_45: +Z80_LD_REGn_REGn REG_B, REG_IYL ; LD B,IYL +Z80_illeg_FD_4C: +Z80_LD_REGn_REGn REG_C, REG_IYH ; LD C,IYH +Z80_illeg_FD_4D: +Z80_LD_REGn_REGn REG_C, REG_IYL ; LD C,IYL +Z80_illeg_FD_54: +Z80_LD_REGn_REGn REG_D, REG_IYH ; LD D,IYH +Z80_illeg_FD_55: +Z80_LD_REGn_REGn REG_D, REG_IYL ; LD D,IYL +Z80_illeg_FD_5C: +Z80_LD_REGn_REGn REG_E, REG_IYH ; LD E,IYH +Z80_illeg_FD_5D: +Z80_LD_REGn_REGn REG_E, REG_IYL ; LD E,IYL +Z80_illeg_FD_7C: +Z80_LD_REGn_REGn REG_A, REG_IYH ; LD A,IYH +Z80_illeg_FD_7D: +Z80_LD_REGn_REGn REG_A, REG_IYL ; LD A,IYL +Z80_illeg_DD_60: +Z80_LD_REGn_REGn REG_IXH, REG_B ; LD IXH,B +Z80_illeg_DD_61: +Z80_LD_REGn_REGn REG_IXH, REG_C ; LD IXH,C +Z80_illeg_DD_62: +Z80_LD_REGn_REGn REG_IXH, REG_D ; LD IXH,D +Z80_illeg_DD_63: +Z80_LD_REGn_REGn REG_IXH, REG_E ; LD IXH,E +Z80_illeg_DD_65: +Z80_LD_REGn_REGn REG_IXH, REG_IXL ; LD IXH,IXL +Z80_illeg_DD_67: +Z80_LD_REGn_REGn REG_IXH, REG_A ; LD IXH,A + +Z80_illeg_DD_68: +Z80_LD_REGn_REGn REG_IXL, REG_B ; LD IXL,B +Z80_illeg_DD_69: +Z80_LD_REGn_REGn REG_IXL, REG_C ; LD IXL,C +Z80_illeg_DD_6A: +Z80_LD_REGn_REGn REG_IXL, REG_D ; LD IXL,D +Z80_illeg_DD_6B: +Z80_LD_REGn_REGn REG_IXL, REG_E ; LD IXL,E +Z80_illeg_DD_6C: +Z80_LD_REGn_REGn REG_IXL, REG_IXH ; LD IXL,IXH +Z80_illeg_DD_6F: +Z80_LD_REGn_REGn REG_IXL, REG_A ; LD IXL,A + +Z80_illeg_FD_60: +Z80_LD_REGn_REGn REG_IYH, REG_B ; LD IYH,B +Z80_illeg_FD_61: +Z80_LD_REGn_REGn REG_IYH, REG_C ; LD IYH,C +Z80_illeg_FD_62: +Z80_LD_REGn_REGn REG_IYH, REG_D ; LD IYH,D +Z80_illeg_FD_63: +Z80_LD_REGn_REGn REG_IYH, REG_E ; LD IYH,E +Z80_illeg_FD_65: +Z80_LD_REGn_REGn REG_IYH, REG_IYL ; LD IYH,IYL +Z80_illeg_FD_67: +Z80_LD_REGn_REGn REG_IYH, REG_A ; LD IYH,A + +Z80_illeg_FD_68: +Z80_LD_REGn_REGn REG_IYL, REG_B ; LD IYL,B +Z80_illeg_FD_69: +Z80_LD_REGn_REGn REG_IYL, REG_C ; LD IYL,C +Z80_illeg_FD_6A: +Z80_LD_REGn_REGn REG_IYL, REG_D ; LD IYL,D +Z80_illeg_FD_6B: +Z80_LD_REGn_REGn REG_IYL, REG_E ; LD IYL,E +Z80_illeg_FD_6C: +Z80_LD_REGn_REGn REG_IYL, REG_IYH ; LD IYL,IYH +Z80_illeg_FD_6F: +Z80_LD_REGn_REGn REG_IYL, REG_A ; LD IYL,A + +!macro Z80_LD_REGn_n .REGn { jsr (VEC_fetch_value) - sta REG_B + sta .REGn jmp ZVM_next +} -Z80_instr_0E: ; LD C,n +Z80_instr_06: +Z80_LD_REGn_n REG_B ; LD B,n +Z80_instr_0E: +Z80_LD_REGn_n REG_C ; LD C,n +Z80_instr_16: +Z80_LD_REGn_n REG_D ; LD D,n +Z80_instr_1E: +Z80_LD_REGn_n REG_E ; LD E,n +Z80_instr_26: +Z80_LD_REGn_n REG_H ; LD H,n +Z80_instr_2E: +Z80_LD_REGn_n REG_L ; LD L,n +Z80_instr_3E: +Z80_LD_REGn_n REG_A ; LD A,n - jsr (VEC_fetch_value) - sta REG_C - jmp ZVM_next - -Z80_instr_16: ; LD D,n - - jsr (VEC_fetch_value) - sta REG_D - jmp ZVM_next - -Z80_instr_1E: ; LD E,n - - jsr (VEC_fetch_value) - sta REG_E - jmp ZVM_next - -Z80_instr_26: ; LD H,n - - jsr (VEC_fetch_value) - sta REG_H - jmp ZVM_next - -Z80_instr_2E: ; LD L,n - - jsr (VEC_fetch_value) - sta REG_L - jmp ZVM_next - -Z80_instr_3E: ; LD A,n - - jsr (VEC_fetch_value) - sta REG_A - jmp ZVM_next - -; -; load register with memory content (via HL) -; - -Z80_instr_46: ; LD B,(HL) +Z80_illeg_DD_26: +Z80_LD_REGn_n REG_IXH ; LD IXH,n +Z80_illeg_DD_2E: +Z80_LD_REGn_n REG_IXL ; LD IXL,n +Z80_illeg_FD_26: +Z80_LD_REGn_n REG_IYH ; LD IYH,n +Z80_illeg_FD_2E: +Z80_LD_REGn_n REG_IYL ; LD IYL,n +!macro Z80_LD_REGn_VIA_HL .REGn { jsr (VEC_fetch_via_HL) - sta REG_B + sta .REGn jmp ZVM_next +} -Z80_instr_4E: ; LD C,(HL) +Z80_instr_46: +Z80_LD_REGn_VIA_HL REG_B ; LD B,(HL) +Z80_instr_4E: +Z80_LD_REGn_VIA_HL REG_C ; LD C,(HL) +Z80_instr_56: +Z80_LD_REGn_VIA_HL REG_D ; LD D,(HL) +Z80_instr_5E: +Z80_LD_REGn_VIA_HL REG_E ; LD E,(HL) +Z80_instr_66: +Z80_LD_REGn_VIA_HL REG_H ; LD H,(HL) +Z80_instr_6E: +Z80_LD_REGn_VIA_HL REG_L ; LD L,(HL) +Z80_instr_7E: +Z80_LD_REGn_VIA_HL REG_A ; LD A,(HL) - jsr (VEC_fetch_via_HL) - sta REG_C - jmp ZVM_next - -Z80_instr_56: ; LD D,(HL) - - jsr (VEC_fetch_via_HL) - sta REG_D - jmp ZVM_next - -Z80_instr_5E: ; LD E,(HL) - - jsr (VEC_fetch_via_HL) - sta REG_E - jmp ZVM_next - -Z80_instr_66: ; LD H,(HL) - - jsr (VEC_fetch_via_HL) - sta REG_H - jmp ZVM_next - -Z80_instr_6E: ; LD L,(HL) - - jsr (VEC_fetch_via_HL) - sta REG_L - jmp ZVM_next - -Z80_instr_7E: ; LD A,(HL) - - jsr (VEC_fetch_via_HL) - sta REG_A - jmp ZVM_next - -; XXX put here LD r,(IX+d) family -; XXX put here LD r,(IY+d) family - -; -; load memory content (via HL) with register -; - -Z80_instr_70: ; LD (HL),B - - lda REG_B +!macro Z80_LD_VIA_HL_REGn .REGn { + lda .REGn jsr (VEC_store_via_HL) jmp ZVM_next +} -Z80_instr_71: ; LD (HL),C +Z80_instr_70: +Z80_LD_VIA_HL_REGn REG_B ; LD (HL),B +Z80_instr_71: +Z80_LD_VIA_HL_REGn REG_C ; LD (HL),C +Z80_instr_72: +Z80_LD_VIA_HL_REGn REG_D ; LD (HL),D +Z80_instr_73: +Z80_LD_VIA_HL_REGn REG_E ; LD (HL),E +Z80_instr_74: +Z80_LD_VIA_HL_REGn REG_H ; LD (HL),H +Z80_instr_75: +Z80_LD_VIA_HL_REGn REG_L ; LD (HL),L +Z80_instr_77: +Z80_LD_VIA_HL_REGn REG_A ; LD (HL),A - lda REG_C - jsr (VEC_store_via_HL) - jmp ZVM_next - -Z80_instr_72: ; LD (HL),D - - lda REG_D - jsr (VEC_store_via_HL) - jmp ZVM_next - -Z80_instr_73: ; LD (HL),E - - lda REG_E - jsr (VEC_store_via_HL) - jmp ZVM_next - -Z80_instr_74: ; LD (HL),H - - lda REG_H - jsr (VEC_store_via_HL) - jmp ZVM_next - -Z80_instr_75: ; LD (HL),L - - lda REG_L - jsr (VEC_store_via_HL) - jmp ZVM_next - -Z80_instr_77: ; LD (HL),A +Z80_instr_02: ; LD (BC),A lda REG_A - jsr (VEC_store_via_HL) + jsr (VEC_store_via_BC) jmp ZVM_next -; XXX put here LD (IX+d),r family -; XXX put here LD (IY+d),r family +Z80_instr_0A: ; LD A,(BC) -; -; load memory content (via HL) with immediate value -; + jsr (VEC_fetch_via_BC) + sta REG_A + jmp ZVM_next + +Z80_instr_12: ; LD (DE),A + + lda REG_A + jsr (VEC_store_via_DE) + jmp ZVM_next + +Z80_instr_1A: ; LD A,(DE) + + jsr (VEC_fetch_via_DE) + sta REG_A + jmp ZVM_next + +Z80_instr_32: ; LD (nn),A + + lda REG_A + jsr (VEC_store_via_nn) + jmp ZVM_next + +Z80_instr_3A: ; LD A,(nn) + + jsr (VEC_fetch_via_nn) + sta REG_A + jmp ZVM_next + +!macro Z80_LD_REGn_VIA_IX_d .REGn { + jsr (VEC_fetch_via_IX_d) + sta .REGn + jmp ZVM_next +} + +Z80_instr_DD_46: +Z80_LD_REGn_VIA_IX_d REG_B ; LD B,(IX+d) +Z80_instr_DD_4E: +Z80_LD_REGn_VIA_IX_d REG_C ; LD C,(IX+d) +Z80_instr_DD_56: +Z80_LD_REGn_VIA_IX_d REG_D ; LD D,(IX+d) +Z80_instr_DD_5E: +Z80_LD_REGn_VIA_IX_d REG_E ; LD E,(IX+d) +Z80_instr_DD_66: +Z80_LD_REGn_VIA_IX_d REG_H ; LD H,(IX+d) +Z80_instr_DD_6E: +Z80_LD_REGn_VIA_IX_d REG_L ; LD L,(IX+d) +Z80_instr_DD_7E: +Z80_LD_REGn_VIA_IX_d REG_A ; LD A,(IX+d) + +!macro Z80_LD_REGn_VIA_IY_d .REGn { + jsr (VEC_fetch_via_IY_d) + sta .REGn + jmp ZVM_next +} + +Z80_instr_FD_46: +Z80_LD_REGn_VIA_IY_d REG_B ; LD B,(IY+d) +Z80_instr_FD_4E: +Z80_LD_REGn_VIA_IY_d REG_C ; LD C,(IY+d) +Z80_instr_FD_56: +Z80_LD_REGn_VIA_IY_d REG_D ; LD D,(IY+d) +Z80_instr_FD_5E: +Z80_LD_REGn_VIA_IY_d REG_E ; LD E,(IY+d) +Z80_instr_FD_66: +Z80_LD_REGn_VIA_IY_d REG_H ; LD H,(IY+d) +Z80_instr_FD_6E: +Z80_LD_REGn_VIA_IY_d REG_L ; LD L,(IY+d) +Z80_instr_FD_7E: +Z80_LD_REGn_VIA_IY_d REG_A ; LD A,(IY+d) + +!macro Z80_LD_VIA_IX_d_REG_n .REGn { + lda .REGn + jsr (VEC_store_via_IX_d) + jmp ZVM_next +} + +Z80_instr_DD_70: +Z80_LD_VIA_IX_d_REG_n REG_B ; LD (IX+d),B +Z80_instr_DD_71: +Z80_LD_VIA_IX_d_REG_n REG_C ; LD (IX+d),C +Z80_instr_DD_72: +Z80_LD_VIA_IX_d_REG_n REG_D ; LD (IX+d),D +Z80_instr_DD_73: +Z80_LD_VIA_IX_d_REG_n REG_E ; LD (IX+d),E +Z80_instr_DD_74: +Z80_LD_VIA_IX_d_REG_n REG_H ; LD (IX+d),H +Z80_instr_DD_75: +Z80_LD_VIA_IX_d_REG_n REG_L ; LD (IX+d),L +Z80_instr_DD_77: +Z80_LD_VIA_IX_d_REG_n REG_A ; LD (IX+d),A + +!macro Z80_LD_VIA_IY_d_REG_n .REGn { + lda .REGn + jsr (VEC_store_via_IY_d) + jmp ZVM_next +} + +Z80_instr_FD_70: +Z80_LD_VIA_IY_d_REG_n REG_B ; LD (IY+d),B +Z80_instr_FD_71: +Z80_LD_VIA_IY_d_REG_n REG_C ; LD (IY+d),C +Z80_instr_FD_72: +Z80_LD_VIA_IY_d_REG_n REG_D ; LD (IY+d),D +Z80_instr_FD_73: +Z80_LD_VIA_IY_d_REG_n REG_E ; LD (IY+d),E +Z80_instr_FD_74: +Z80_LD_VIA_IY_d_REG_n REG_H ; LD (IY+d),H +Z80_instr_FD_75: +Z80_LD_VIA_IY_d_REG_n REG_L ; LD (IY+d),L +Z80_instr_FD_77: +Z80_LD_VIA_IY_d_REG_n REG_A ; LD (IY+d),A Z80_instr_36: ; LD (HL),n @@ -213,10 +254,6 @@ Z80_instr_36: ; LD (HL),n jsr (VEC_store_via_HL) jmp ZVM_next -; XXX put here LD (IX+d),n family -; XXX put here LD (IY+d),n family -; XXX put here LD A,(BC) / LD A,(DE) / LD A,(nn) / LD (BC), A / LD (DE),A / LD (nn),A - Z80_instr_ED_57: ; LD A,I lda REG_F diff --git a/src/zvm_m65/z80_instr_math_8bit.s b/src/zvm_m65/z80_instr_math_8bit.s index 0c3a33f6..b0ee1343 100644 --- a/src/zvm_m65/z80_instr_math_8bit.s +++ b/src/zvm_m65/z80_instr_math_8bit.s @@ -60,6 +60,10 @@ Z80_instr_A2: +Z80_AND_REGn REG_D ; Z80_instr_A3: +Z80_AND_REGn REG_E ; AND E Z80_instr_A4: +Z80_AND_REGn REG_H ; AND H Z80_instr_A5: +Z80_AND_REGn REG_L ; AND L +Z80_illeg_DD_A4: +Z80_AND_REGn REG_IXH ; AND IXH +Z80_illeg_DD_A5: +Z80_AND_REGn REG_IXL ; AND IXL +Z80_illeg_FD_A4: +Z80_AND_REGn REG_IYH ; AND IYH +Z80_illeg_FD_A5: +Z80_AND_REGn REG_IXL ; AND IYL Z80_instr_A6: +Z80_AND_VIA_HL ; AND (HL) Z80_instr_A7: +Z80_AND_SELF ; AND A Z80_instr_E6: +Z80_AND_n ; AND n @@ -118,6 +122,10 @@ Z80_instr_B2: +Z80_OR_REGn REG_D ; Z80_instr_B3: +Z80_OR_REGn REG_E ; OR E Z80_instr_B4: +Z80_OR_REGn REG_H ; OR H Z80_instr_B5: +Z80_OR_REGn REG_L ; OR L +Z80_illeg_DD_B4: +Z80_OR_REGn REG_IXH ; OR IXH +Z80_illeg_DD_B5: +Z80_OR_REGn REG_IXL ; OR IXL +Z80_illeg_FD_B4: +Z80_OR_REGn REG_IYH ; OR IYH +Z80_illeg_FD_B5: +Z80_OR_REGn REG_IYL ; OR IYL Z80_instr_B6: +Z80_OR_VIA_HL ; OR (HL) Z80_instr_B7: +Z80_OR_SELF ; OR A Z80_instr_F6: +Z80_OR_n ; OR n @@ -173,51 +181,34 @@ Z80_instr_AA: +Z80_XOR_REGn REG_D ; Z80_instr_AB: +Z80_XOR_REGn REG_E ; XOR E Z80_instr_AC: +Z80_XOR_REGn REG_H ; XOR H Z80_instr_AD: +Z80_XOR_REGn REG_L ; XOR L +Z80_illeg_DD_AC: +Z80_XOR_REGn REG_IXH ; XOR IXH +Z80_illeg_DD_AD: +Z80_XOR_REGn REG_IXL ; XOR IXL +Z80_illeg_FD_AC: +Z80_XOR_REGn REG_IYH ; XOR IYH +Z80_illeg_FD_AD: +Z80_XOR_REGn REG_IXL ; XOR IYL Z80_instr_AE: +Z80_XOR_VIA_HL ; XOR (HL) Z80_instr_AF: +Z80_XOR_SELF ; XOR A Z80_instr_EE: +Z80_XOR_n ; XOR n Z80_instr_DD_AE: +Z80_XOR_VIA_IX_d ; XOR (IX+d) Z80_instr_FD_AE: +Z80_XOR_VIA_IY_d ; XOR (IY+d) -; XXX put CP instructions here - -Z80_instr_04: ; INC B - - ldx REG_B - inc REG_B +!macro Z80_INC_REG_n .REG_n { + ldx .REG_n + inc .REG_n bra Z80_common_INC +} -Z80_instr_0C: ; INC C +Z80_instr_04: +Z80_INC_REG_n REG_B ; INC B +Z80_instr_0C: +Z80_INC_REG_n REG_C ; INC C +Z80_instr_14: +Z80_INC_REG_n REG_D ; INC D +Z80_instr_1C: +Z80_INC_REG_n REG_E ; INC E +Z80_instr_24: +Z80_INC_REG_n REG_H ; INC H +Z80_instr_2C: +Z80_INC_REG_n REG_L ; INC L +Z80_illeg_DD_24: +Z80_INC_REG_n REG_IXH ; INC IXH +Z80_illeg_DD_2C: +Z80_INC_REG_n REG_IXL ; INC IXL +Z80_illeg_FD_24: +Z80_INC_REG_n REG_IYH ; INC IYH +Z80_illeg_FD_2C: +Z80_INC_REG_n REG_IYL ; INC IYL - ldx REG_C - inc REG_C - bra Z80_common_INC - -Z80_instr_14: ; INC D - - ldx REG_D - inc REG_D - bra Z80_common_INC - -Z80_instr_1C: ; INC E - - ldx REG_E - inc REG_E - bra Z80_common_INC - -Z80_instr_24: ; INC H - - ldx REG_H - inc REG_H - bra Z80_common_INC - -Z80_instr_2C: ; INC L - - ldx REG_L - inc REG_L - bra Z80_common_INC - -Z80_instr_3C: ; INC A +Z80_instr_3C: ; INC A ldx REG_A inc REG_A @@ -256,43 +247,24 @@ Z80_instr_FD_34: ; INC (IY+d) sta [PTR_DATA],z bra Z80_common_INC -Z80_instr_05: ; DEC B - - ldx REG_B - dec REG_B +!macro Z80_DEC_REG_n .REG_n { + ldx .REG_n + dec .REG_n bra Z80_common_DEC +} -Z80_instr_0D: ; DEC C +Z80_instr_05: +Z80_DEC_REG_n REG_B ; DEC B +Z80_instr_0D: +Z80_DEC_REG_n REG_C ; DEC C +Z80_instr_15: +Z80_DEC_REG_n REG_D ; DEC D +Z80_instr_1D: +Z80_DEC_REG_n REG_E ; DEC E +Z80_instr_25: +Z80_DEC_REG_n REG_H ; DEC H +Z80_instr_2D: +Z80_DEC_REG_n REG_L ; DEC L +Z80_illeg_DD_25: +Z80_DEC_REG_n REG_IXH ; DEC IXH +Z80_illeg_DD_2D: +Z80_DEC_REG_n REG_IXL ; DEC IXL +Z80_illeg_FD_25: +Z80_DEC_REG_n REG_IYH ; DEC IYH +Z80_illeg_FD_2D: +Z80_DEC_REG_n REG_IYL ; DEC IYL - ldx REG_C - dec REG_C - bra Z80_common_DEC - -Z80_instr_15: ; DEC D - - ldx REG_D - dec REG_D - bra Z80_common_DEC - -Z80_instr_1D: ; DEC E - - ldx REG_E - dec REG_E - bra Z80_common_DEC - -Z80_instr_25: ; DEC H - - ldx REG_H - dec REG_H - bra Z80_common_DEC - -Z80_instr_2D: ; DEC L - - ldx REG_L - dec REG_L - bra Z80_common_DEC - -Z80_instr_3D: ; DEC A +Z80_instr_3D: ; DEC A ldx REG_A dec REG_A @@ -330,3 +302,5 @@ Z80_instr_FD_35: ; DEC (IY+d) dec sta [PTR_DATA],z bra Z80_common_DEC + + diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index c1cb26cb..aeaedb17 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -27,11 +27,8 @@ ZVM_store_next: } - ; unimplemented/illegal instructions -Z80_illegal__DD: -Z80_illegal__ED: -Z80_illegal__FD: -Z80_illegal__xDCB: + ; unsupported illegal instructions +Z80_unsupported: ; XXX add a separate handler for illegal instructions ; LD instructions with no effect Z80_instr_40: ; LD B,B @@ -41,7 +38,11 @@ Z80_instr_5B: ; Z80_instr_64: ; LD H,H Z80_instr_6D: ; LD L,L Z80_instr_7F: ; LD A,A - ; For interrupts (not emulated as of yet) +Z80_illeg_DD_64: ; LD IXH,IXH +Z80_illeg_DD_6D: ; LD IXL,IXL +Z80_illeg_FD_64: ; LD IYH,IYH +Z80_illeg_FD_6D: ; LD IYL,IYL + ; For interrupts (emulation not needed for CP/M) Z80_instr_ED_46: ; IM 0 Z80_illeg_ED_4E: ; IM 0 Z80_illeg_ED_66: ; IM 0 @@ -90,7 +91,6 @@ Z80_instr_FD: +ZVM_DISPATCH Z80_vectab_FD_0, Z80_vectab_FD_1 ; - ; @@ -100,18 +100,12 @@ Z80_instr_FD: +ZVM_DISPATCH Z80_vectab_FD_0, Z80_vectab_FD_1 ; Z80_instr_DD_CB: ; #DDCB Z80_instr_FD_CB: ; #FDCB -Z80_instr_02: ; LD (BC),A Z80_instr_09: ; ADD HL,BC -Z80_instr_0A: ; LD A,(BC) -Z80_instr_12: ; LD (DE),A Z80_instr_19: ; ADD HL,DE -Z80_instr_1A: ; LD A,(DE) Z80_instr_22: ; LD (nn),HL Z80_instr_29: ; ADD HL,HL Z80_instr_2A: ; LD HL,(nn) -Z80_instr_32: ; LD (nn),A Z80_instr_39: ; ADD HL,SP -Z80_instr_3A: ; LD A,(nn) Z80_instr_80: ; ADD A,B Z80_instr_81: ; ADD A,C Z80_instr_82: ; ADD A,D @@ -152,39 +146,13 @@ Z80_instr_BC: ; CP H Z80_instr_BD: ; CP L Z80_instr_BE: ; CP (HL) Z80_instr_BF: ; CP A -Z80_instr_C0: ; RET NZ -Z80_instr_C4: ; CALL NZ,nn Z80_instr_C6: ; ADD A,n -Z80_instr_C7: ; RST 00H -Z80_instr_C8: ; RET z -Z80_instr_C9: ; RET -Z80_instr_CC: ; CALL Z,nn -Z80_instr_CD: ; CALL nn Z80_instr_CE: ; ADC A,n -Z80_instr_CF: ; RST 08H -Z80_instr_D0: ; RET NC -Z80_instr_D4: ; CALL NC,nn Z80_instr_D6: ; SUB n -Z80_instr_D7: ; RST 10H -Z80_instr_D8: ; RET C -Z80_instr_DC: ; CALL C,nn Z80_instr_DE: ; SBC A,n -Z80_instr_DF: ; RST 18H -Z80_instr_E0: ; RET PO Z80_instr_E3: ; EX (SP),HL -Z80_instr_E4: ; CALL PO,nn -Z80_instr_E7: ; RST 20H -Z80_instr_E8: ; RET PE -Z80_instr_EC: ; CALL PE,nn -Z80_instr_EF: ; RST 28H -Z80_instr_F0: ; RET P -Z80_instr_F4: ; CALL P,nn -Z80_instr_F7: ; RST 30H -Z80_instr_F8: ; RET M Z80_instr_F9: ; LD SP,HL -Z80_instr_FC: ; CALL M,nn Z80_instr_FE: ; CP n -Z80_instr_FF: ; RST 38H Z80_instr_CB_00: ; RLC B Z80_instr_CB_01: ; RLC C Z80_instr_CB_02: ; RLC D @@ -247,20 +215,6 @@ Z80_instr_DD_22: ; LD (nn),IX Z80_instr_DD_29: ; ADD IX,IX Z80_instr_DD_2A: ; LD IX,(nn) Z80_instr_DD_39: ; ADD IX,SP -Z80_instr_DD_46: ; LD B,(IX+d) -Z80_instr_DD_4E: ; LD C,(IX+d) -Z80_instr_DD_56: ; LD D,(IX+d) -Z80_instr_DD_5E: ; LD E,(IX+d) -Z80_instr_DD_66: ; LD H,(IX+d) -Z80_instr_DD_6E: ; LD L,(IX+d) -Z80_instr_DD_70: ; LD (IX+d),B -Z80_instr_DD_71: ; LD (IX+d),C -Z80_instr_DD_72: ; LD (IX+d),D -Z80_instr_DD_73: ; LD (IX+d),E -Z80_instr_DD_74: ; LD (IX+d),H -Z80_instr_DD_75: ; LD (IX+d),L -Z80_instr_DD_77: ; LD (IX+d),A -Z80_instr_DD_7E: ; LD A,(IX+d) Z80_instr_DD_86: ; ADD A,(IX+d) Z80_instr_DD_8E: ; ADC A,(IX+d) Z80_instr_DD_96: ; SUB (IX+d) @@ -270,10 +224,8 @@ Z80_instr_DD_E3: ; EX (SP),IX Z80_instr_DD_F9: ; LD SP,IX Z80_instr_ED_42: ; SBC HL,BC Z80_instr_ED_43: ; LD (nn),BC -Z80_instr_ED_45: ; RETN Z80_instr_ED_4A: ; ADC HL,BC Z80_instr_ED_4B: ; LD BC,(nn) -Z80_instr_ED_4D: ; RETTI Z80_instr_ED_52: ; SBC HL,DE Z80_instr_ED_53: ; LD (nn),DE Z80_instr_ED_5A: ; ADC HL,DE @@ -308,20 +260,6 @@ Z80_instr_FD_22: ; LD (nn),IY Z80_instr_FD_29: ; ADD IY,IY Z80_instr_FD_2A: ; LD IY,(nn) Z80_instr_FD_39: ; ADD IY,SP -Z80_instr_FD_46: ; LD B,(IY+d) -Z80_instr_FD_4E: ; LD C,(IY+d) -Z80_instr_FD_56: ; LD D,(IY+d) -Z80_instr_FD_5E: ; LD E,(IY+d) -Z80_instr_FD_66: ; LD H,(IY+d) -Z80_instr_FD_6E: ; LD L,(IY+d) -Z80_instr_FD_70: ; LD (IY+d),B -Z80_instr_FD_71: ; LD (IY+d),C -Z80_instr_FD_72: ; LD (IY+d),D -Z80_instr_FD_73: ; LD (IY+d),E -Z80_instr_FD_74: ; LD (IY+d),H -Z80_instr_FD_75: ; LD (IY+d),L -Z80_instr_FD_77: ; LD (IY+d),A -Z80_instr_FD_7E: ; LD A,(IY+d) Z80_instr_FD_86: ; ADD A,(IY+d) Z80_instr_FD_8E: ; ADC A,(IY+d) Z80_instr_FD_96: ; SUB (IY+d) @@ -344,14 +282,143 @@ Z80_illeg_CB_34: ; SLL H Z80_illeg_CB_35: ; SLL L Z80_illeg_CB_36: ; SLL (HL) Z80_illeg_CB_37: ; SLL A -Z80_illeg_ED_55: ; RETN -Z80_illeg_ED_5D: ; RETN -Z80_illeg_ED_65: ; RETN -Z80_illeg_ED_6D: ; RETN Z80_illeg_ED_70: ; IN F,(C) Z80_illeg_ED_71: ; OUT (C),0 -Z80_illeg_ED_75: ; RETN -Z80_illeg_ED_7D: ; RETN +Z80_illeg_ED_63: ; LD (nn),HL +Z80_illeg_ED_6B: ; LD HL,(nn) +Z80_illeg_DD_84: ; ADD A,IXH +Z80_illeg_DD_85: ; ADD A,IXL +Z80_illeg_DD_8C: ; ADC A,IXH +Z80_illeg_DD_8D: ; ADC A,IXL +Z80_illeg_DD_94: ; SUB A,IXH +Z80_illeg_DD_95: ; SUB A,IXL +Z80_illeg_DD_9C: ; SBC A,IXH +Z80_illeg_DD_9D: ; SBC A,IXL +Z80_illeg_DD_BC: ; CP IXH +Z80_illeg_DD_BD: ; CP IXL +Z80_illeg_FD_84: ; ADD A,IYH +Z80_illeg_FD_85: ; ADD A,IYL +Z80_illeg_FD_8C: ; ADC A,IYH +Z80_illeg_FD_8D: ; ADC A,IYL +Z80_illeg_FD_94: ; SUB A,IYH +Z80_illeg_FD_95: ; SUB A,IYL +Z80_illeg_FD_9C: ; SBC A,IYH +Z80_illeg_FD_9D: ; SBC A,IYL +Z80_illeg_FD_BC: ; CP IYH +Z80_illeg_FD_BD: ; CP IYL +Z80_illeg_xDCB_00: ; RLC (IXY+d),B +Z80_illeg_xDCB_01: ; RLC (IXY+d),C +Z80_illeg_xDCB_02: ; RLC (IXY+d),D +Z80_illeg_xDCB_03: ; RLC (IXY+d),E +Z80_illeg_xDCB_04: ; RLC (IXY+d),H +Z80_illeg_xDCB_05: ; RLC (IXY+d),L +Z80_illeg_xDCB_07: ; RLC (IXY+d),A +Z80_illeg_xDCB_08: ; RRC (IXY+d),B +Z80_illeg_xDCB_09: ; RRC (IXY+d),C +Z80_illeg_xDCB_0A: ; RRC (IXY+d),D +Z80_illeg_xDCB_0B: ; RRC (IXY+d),E +Z80_illeg_xDCB_0C: ; RRC (IXY+d),H +Z80_illeg_xDCB_0D: ; RRC (IXY+d),L +Z80_illeg_xDCB_0F: ; RRC (IXY+d),A +Z80_illeg_xDCB_10: ; RL (IXY+d),B +Z80_illeg_xDCB_11: ; RL (IXY+d),C +Z80_illeg_xDCB_12: ; RL (IXY+d),D +Z80_illeg_xDCB_13: ; RL (IXY+d),E +Z80_illeg_xDCB_14: ; RL (IXY+d),H +Z80_illeg_xDCB_15: ; RL (IXY+d),L +Z80_illeg_xDCB_17: ; RL (IXY+d),A +Z80_illeg_xDCB_18: ; RR (IXY+d),B +Z80_illeg_xDCB_19: ; RR (IXY+d),C +Z80_illeg_xDCB_1A: ; RR (IXY+d),D +Z80_illeg_xDCB_1B: ; RR (IXY+d),E +Z80_illeg_xDCB_1C: ; RR (IXY+d),H +Z80_illeg_xDCB_1D: ; RR (IXY+d),L +Z80_illeg_xDCB_1F: ; RR (IXY+d),A +Z80_illeg_xDCB_20: ; SLA (IXY+d),B +Z80_illeg_xDCB_21: ; SLA (IXY+d),C +Z80_illeg_xDCB_22: ; SLA (IXY+d),D +Z80_illeg_xDCB_23: ; SLA (IXY+d),E +Z80_illeg_xDCB_24: ; SLA (IXY+d),H +Z80_illeg_xDCB_25: ; SLA (IXY+d),L +Z80_illeg_xDCB_27: ; SLA (IXY+d),A +Z80_illeg_xDCB_28: ; SRA (IXY+d),B +Z80_illeg_xDCB_29: ; SRA (IXY+d),C +Z80_illeg_xDCB_2A: ; SRA (IXY+d),D +Z80_illeg_xDCB_2B: ; SRA (IXY+d),E +Z80_illeg_xDCB_2C: ; SRA (IXY+d),H +Z80_illeg_xDCB_2D: ; SRA (IXY+d),L +Z80_illeg_xDCB_2F: ; SRA (IXY+d),A +Z80_illeg_xDCB_30: ; SLL (IXY+d),B +Z80_illeg_xDCB_31: ; SLL (IXY+d),C +Z80_illeg_xDCB_32: ; SLL (IXY+d),D +Z80_illeg_xDCB_33: ; SLL (IXY+d),E +Z80_illeg_xDCB_34: ; SLL (IXY+d),H +Z80_illeg_xDCB_35: ; SLL (IXY+d),L +Z80_illeg_xDCB_36: ; SLL (IXY+d) +Z80_illeg_xDCB_37: ; SLL (IXY+d),A +Z80_illeg_xDCB_38: ; SLR (IXY+d),B +Z80_illeg_xDCB_39: ; SLR (IXY+d),C +Z80_illeg_xDCB_3A: ; SLR (IXY+d),D +Z80_illeg_xDCB_3B: ; SLR (IXY+d),E +Z80_illeg_xDCB_3C: ; SLR (IXY+d),H +Z80_illeg_xDCB_3D: ; SLR (IXY+d),L +Z80_illeg_xDCB_3F: ; SLR (IXY+d),A +Z80_illeg_xDCB_80: ; RES 0,(IXY+d),B +Z80_illeg_xDCB_81: ; RES 0,(IXY+d),C +Z80_illeg_xDCB_82: ; RES 0,(IXY+d),D +Z80_illeg_xDCB_83: ; RES 0,(IXY+d),E +Z80_illeg_xDCB_84: ; RES 0,(IXY+d),H +Z80_illeg_xDCB_85: ; RES 0,(IXY+d),L +Z80_illeg_xDCB_87: ; RES 0,(IXY+d),A +Z80_illeg_xDCB_88: ; RES 1,(IXY+d),B +Z80_illeg_xDCB_89: ; RES 1,(IXY+d),C +Z80_illeg_xDCB_8A: ; RES 1,(IXY+d),D +Z80_illeg_xDCB_8B: ; RES 1,(IXY+d),E +Z80_illeg_xDCB_8C: ; RES 1,(IXY+d),H +Z80_illeg_xDCB_8D: ; RES 1,(IXY+d),L +Z80_illeg_xDCB_8F: ; RES 1,(IXY+d),A +Z80_illeg_xDCB_90: ; RES 2,(IXY+d),B +Z80_illeg_xDCB_91: ; RES 2,(IXY+d),C +Z80_illeg_xDCB_92: ; RES 2,(IXY+d),D +Z80_illeg_xDCB_93: ; RES 2,(IXY+d),E +Z80_illeg_xDCB_94: ; RES 2,(IXY+d),H +Z80_illeg_xDCB_95: ; RES 2,(IXY+d),L +Z80_illeg_xDCB_97: ; RES 2,(IXY+d),A +Z80_illeg_xDCB_98: ; RES 3,(IXY+d),B +Z80_illeg_xDCB_99: ; RES 3,(IXY+d),C +Z80_illeg_xDCB_9A: ; RES 3,(IXY+d),D +Z80_illeg_xDCB_9B: ; RES 3,(IXY+d),E +Z80_illeg_xDCB_9C: ; RES 3,(IXY+d),H +Z80_illeg_xDCB_9D: ; RES 3,(IXY+d),L +Z80_illeg_xDCB_9F: ; RES 3,(IXY+d),A +Z80_illeg_xDCB_A0: ; RES 4,(IXY+d),B +Z80_illeg_xDCB_A1: ; RES 4,(IXY+d),C +Z80_illeg_xDCB_A2: ; RES 4,(IXY+d),D +Z80_illeg_xDCB_A3: ; RES 4,(IXY+d),E +Z80_illeg_xDCB_A4: ; RES 4,(IXY+d),H +Z80_illeg_xDCB_A5: ; RES 4,(IXY+d),L +Z80_illeg_xDCB_A7: ; RES 4,(IXY+d),A +Z80_illeg_xDCB_A8: ; RES 5,(IXY+d),B +Z80_illeg_xDCB_A9: ; RES 5,(IXY+d),C +Z80_illeg_xDCB_AA: ; RES 5,(IXY+d),D +Z80_illeg_xDCB_AB: ; RES 5,(IXY+d),E +Z80_illeg_xDCB_AC: ; RES 5,(IXY+d),H +Z80_illeg_xDCB_AD: ; RES 5,(IXY+d),L +Z80_illeg_xDCB_AF: ; RES 5,(IXY+d),A +Z80_illeg_xDCB_B0: ; RES 6,(IXY+d),B +Z80_illeg_xDCB_B1: ; RES 6,(IXY+d),C +Z80_illeg_xDCB_B2: ; RES 6,(IXY+d),D +Z80_illeg_xDCB_B3: ; RES 6,(IXY+d),E +Z80_illeg_xDCB_B4: ; RES 6,(IXY+d),H +Z80_illeg_xDCB_B5: ; RES 6,(IXY+d),L +Z80_illeg_xDCB_B7: ; RES 6,(IXY+d),A +Z80_illeg_xDCB_B8: ; RES 7,(IXY+d),B +Z80_illeg_xDCB_B9: ; RES 7,(IXY+d),C +Z80_illeg_xDCB_BA: ; RES 7,(IXY+d),D +Z80_illeg_xDCB_BB: ; RES 7,(IXY+d),E +Z80_illeg_xDCB_BC: ; RES 7,(IXY+d),H +Z80_illeg_xDCB_BD: ; RES 7,(IXY+d),L +Z80_illeg_xDCB_BF: ; RES 7,(IXY+d),A Z80_illeg_xDCB_C0: ; SET 0,(IXY+d),B Z80_illeg_xDCB_C1: ; SET 0,(IXY+d),C Z80_illeg_xDCB_C2: ; SET 0,(IXY+d),D @@ -359,316 +426,55 @@ Z80_illeg_xDCB_C3: ; SET 0,(IXY+d),E Z80_illeg_xDCB_C4: ; SET 0,(IXY+d),H Z80_illeg_xDCB_C5: ; SET 0,(IXY+d),L Z80_illeg_xDCB_C7: ; SET 0,(IXY+d),A +Z80_illeg_xDCB_C8: ; SET 1,(IXY+d),B +Z80_illeg_xDCB_C9: ; SET 1,(IXY+d),C +Z80_illeg_xDCB_CA: ; SET 1,(IXY+d),D +Z80_illeg_xDCB_CB: ; SET 1,(IXY+d),E +Z80_illeg_xDCB_CC: ; SET 1,(IXY+d),H +Z80_illeg_xDCB_CD: ; SET 1,(IXY+d),L +Z80_illeg_xDCB_CF: ; SET 1,(IXY+d),A +Z80_illeg_xDCB_D0: ; SET 2,(IXY+d),B +Z80_illeg_xDCB_D1: ; SET 2,(IXY+d),C +Z80_illeg_xDCB_D2: ; SET 2,(IXY+d),D +Z80_illeg_xDCB_D3: ; SET 2,(IXY+d),E +Z80_illeg_xDCB_D4: ; SET 2,(IXY+d),H +Z80_illeg_xDCB_D5: ; SET 2,(IXY+d),L +Z80_illeg_xDCB_D7: ; SET 2,(IXY+d),A +Z80_illeg_xDCB_D8: ; SET 3,(IXY+d),B +Z80_illeg_xDCB_D9: ; SET 3,(IXY+d),C +Z80_illeg_xDCB_DA: ; SET 3,(IXY+d),D +Z80_illeg_xDCB_DB: ; SET 3,(IXY+d),E +Z80_illeg_xDCB_DC: ; SET 3,(IXY+d),H +Z80_illeg_xDCB_DD: ; SET 3,(IXY+d),L +Z80_illeg_xDCB_DF: ; SET 3,(IXY+d),A +Z80_illeg_xDCB_E0: ; SET 4,(IXY+d),B +Z80_illeg_xDCB_E1: ; SET 4,(IXY+d),C +Z80_illeg_xDCB_E2: ; SET 4,(IXY+d),D +Z80_illeg_xDCB_E3: ; SET 4,(IXY+d),E +Z80_illeg_xDCB_E4: ; SET 4,(IXY+d),H +Z80_illeg_xDCB_E5: ; SET 4,(IXY+d),L +Z80_illeg_xDCB_E7: ; SET 4,(IXY+d),A +Z80_illeg_xDCB_E8: ; SET 5,(IXY+d),B +Z80_illeg_xDCB_E9: ; SET 5,(IXY+d),C +Z80_illeg_xDCB_EA: ; SET 5,(IXY+d),D +Z80_illeg_xDCB_EB: ; SET 5,(IXY+d),E +Z80_illeg_xDCB_EC: ; SET 5,(IXY+d),H +Z80_illeg_xDCB_ED: ; SET 5,(IXY+d),L +Z80_illeg_xDCB_EF: ; SET 5,(IXY+d),A +Z80_illeg_xDCB_F0: ; SET 6,(IXY+d),B +Z80_illeg_xDCB_F1: ; SET 6,(IXY+d),C +Z80_illeg_xDCB_F2: ; SET 6,(IXY+d),D +Z80_illeg_xDCB_F3: ; SET 6,(IXY+d),E +Z80_illeg_xDCB_F4: ; SET 6,(IXY+d),H +Z80_illeg_xDCB_F5: ; SET 6,(IXY+d),L +Z80_illeg_xDCB_F7: ; SET 6,(IXY+d),A +Z80_illeg_xDCB_F8: ; SET 7,(IXY+d),B +Z80_illeg_xDCB_F9: ; SET 7,(IXY+d),C +Z80_illeg_xDCB_FA: ; SET 7,(IXY+d),D +Z80_illeg_xDCB_FB: ; SET 7,(IXY+d),E +Z80_illeg_xDCB_FC: ; SET 7,(IXY+d),H +Z80_illeg_xDCB_FD: ; SET 7,(IXY+d),L +Z80_illeg_xDCB_FF: ; SET 7,(IXY+d),A + jmp ZVM_next ; XXX provide implementation - jmp ZVM_next ; XXX - - ; XXX add illegal instructions for combination of prefixes - - ; XXX include these in the table, add mnemonics - -Z80_illeg_ED_63: -Z80_illeg_ED_6B: -Z80_illeg_DD_24: -Z80_illeg_DD_25: -Z80_illeg_DD_26: -Z80_illeg_DD_2C: -Z80_illeg_DD_2D: -Z80_illeg_DD_2E: -Z80_illeg_DD_44: -Z80_illeg_DD_45: -Z80_illeg_DD_4C: -Z80_illeg_DD_4D: -Z80_illeg_DD_54: -Z80_illeg_DD_55: -Z80_illeg_DD_5C: -Z80_illeg_DD_5D: -Z80_illeg_DD_60: -Z80_illeg_DD_61: -Z80_illeg_DD_62: -Z80_illeg_DD_63: -Z80_illeg_DD_64: -Z80_illeg_DD_65: -Z80_illeg_DD_67: -Z80_illeg_DD_68: -Z80_illeg_DD_69: -Z80_illeg_DD_6A: -Z80_illeg_DD_6B: -Z80_illeg_DD_6C: -Z80_illeg_DD_6D: -Z80_illeg_DD_6F: -Z80_illeg_DD_7C: -Z80_illeg_DD_6D: -Z80_illeg_DD_84: -Z80_illeg_DD_85: -Z80_illeg_DD_8C: -Z80_illeg_DD_8D: -Z80_illeg_DD_94: -Z80_illeg_DD_95: -Z80_illeg_DD_9C: -Z80_illeg_DD_9D: -Z80_illeg_DD_A4: -Z80_illeg_DD_A5: -Z80_illeg_DD_AC: -Z80_illeg_DD_AD: -Z80_illeg_DD_B4: -Z80_illeg_DD_B5: -Z80_illeg_DD_BC: -Z80_illeg_DD_BD: -Z80_illeg_FD_24: -Z80_illeg_FD_25: -Z80_illeg_FD_26: -Z80_illeg_FD_2C: -Z80_illeg_FD_2D: -Z80_illeg_FD_2E: -Z80_illeg_FD_44: -Z80_illeg_FD_45: -Z80_illeg_FD_4C: -Z80_illeg_FD_4D: -Z80_illeg_FD_54: -Z80_illeg_FD_55: -Z80_illeg_FD_5C: -Z80_illeg_FD_5D: -Z80_illeg_FD_60: -Z80_illeg_FD_61: -Z80_illeg_FD_62: -Z80_illeg_FD_63: -Z80_illeg_FD_64: -Z80_illeg_FD_65: -Z80_illeg_FD_67: -Z80_illeg_FD_68: -Z80_illeg_FD_69: -Z80_illeg_FD_6A: -Z80_illeg_FD_6B: -Z80_illeg_FD_6C: -Z80_illeg_FD_6D: -Z80_illeg_FD_6F: -Z80_illeg_FD_7C: -Z80_illeg_FD_6D: -Z80_illeg_FD_84: -Z80_illeg_FD_85: -Z80_illeg_FD_8C: -Z80_illeg_FD_8D: -Z80_illeg_FD_94: -Z80_illeg_FD_95: -Z80_illeg_FD_9C: -Z80_illeg_FD_9D: -Z80_illeg_FD_A4: -Z80_illeg_FD_A5: -Z80_illeg_FD_AC: -Z80_illeg_FD_AD: -Z80_illeg_FD_B4: -Z80_illeg_FD_B5: -Z80_illeg_FD_BC: -Z80_illeg_FD_BD: -Z80_illeg_xDCB_00: -Z80_illeg_xDCB_01: -Z80_illeg_xDCB_02: -Z80_illeg_xDCB_03: -Z80_illeg_xDCB_04: -Z80_illeg_xDCB_05: -Z80_illeg_xDCB_07: -Z80_illeg_xDCB_08: -Z80_illeg_xDCB_09: -Z80_illeg_xDCB_0A: -Z80_illeg_xDCB_0B: -Z80_illeg_xDCB_0C: -Z80_illeg_xDCB_0D: -Z80_illeg_xDCB_0F: -Z80_illeg_xDCB_10: -Z80_illeg_xDCB_11: -Z80_illeg_xDCB_12: -Z80_illeg_xDCB_13: -Z80_illeg_xDCB_14: -Z80_illeg_xDCB_15: -Z80_illeg_xDCB_17: -Z80_illeg_xDCB_18: -Z80_illeg_xDCB_19: -Z80_illeg_xDCB_1A: -Z80_illeg_xDCB_1B: -Z80_illeg_xDCB_1C: -Z80_illeg_xDCB_1D: -Z80_illeg_xDCB_1F: -Z80_illeg_xDCB_20: -Z80_illeg_xDCB_21: -Z80_illeg_xDCB_22: -Z80_illeg_xDCB_23: -Z80_illeg_xDCB_24: -Z80_illeg_xDCB_25: -Z80_illeg_xDCB_27: -Z80_illeg_xDCB_28: -Z80_illeg_xDCB_29: -Z80_illeg_xDCB_2A: -Z80_illeg_xDCB_2B: -Z80_illeg_xDCB_2C: -Z80_illeg_xDCB_2D: -Z80_illeg_xDCB_2F: -Z80_illeg_xDCB_30: -Z80_illeg_xDCB_31: -Z80_illeg_xDCB_32: -Z80_illeg_xDCB_33: -Z80_illeg_xDCB_34: -Z80_illeg_xDCB_35: -Z80_illeg_xDCB_36: -Z80_illeg_xDCB_37: -Z80_illeg_xDCB_38: -Z80_illeg_xDCB_39: -Z80_illeg_xDCB_3A: -Z80_illeg_xDCB_3B: -Z80_illeg_xDCB_3C: -Z80_illeg_xDCB_3D: -Z80_illeg_xDCB_3F: -Z80_illeg_xDCB_40: -Z80_illeg_xDCB_41: -Z80_illeg_xDCB_42: -Z80_illeg_xDCB_43: -Z80_illeg_xDCB_44: -Z80_illeg_xDCB_45: -Z80_illeg_xDCB_47: -Z80_illeg_xDCB_48: -Z80_illeg_xDCB_49: -Z80_illeg_xDCB_4A: -Z80_illeg_xDCB_4B: -Z80_illeg_xDCB_4C: -Z80_illeg_xDCB_4D: -Z80_illeg_xDCB_4F: -Z80_illeg_xDCB_50: -Z80_illeg_xDCB_51: -Z80_illeg_xDCB_52: -Z80_illeg_xDCB_53: -Z80_illeg_xDCB_54: -Z80_illeg_xDCB_55: -Z80_illeg_xDCB_57: -Z80_illeg_xDCB_58: -Z80_illeg_xDCB_59: -Z80_illeg_xDCB_5A: -Z80_illeg_xDCB_5B: -Z80_illeg_xDCB_5C: -Z80_illeg_xDCB_5D: -Z80_illeg_xDCB_5F: -Z80_illeg_xDCB_60: -Z80_illeg_xDCB_61: -Z80_illeg_xDCB_62: -Z80_illeg_xDCB_63: -Z80_illeg_xDCB_64: -Z80_illeg_xDCB_65: -Z80_illeg_xDCB_67: -Z80_illeg_xDCB_68: -Z80_illeg_xDCB_69: -Z80_illeg_xDCB_6A: -Z80_illeg_xDCB_6B: -Z80_illeg_xDCB_6C: -Z80_illeg_xDCB_6D: -Z80_illeg_xDCB_6F: -Z80_illeg_xDCB_70: -Z80_illeg_xDCB_71: -Z80_illeg_xDCB_72: -Z80_illeg_xDCB_73: -Z80_illeg_xDCB_74: -Z80_illeg_xDCB_75: -Z80_illeg_xDCB_77: -Z80_illeg_xDCB_80: -Z80_illeg_xDCB_81: -Z80_illeg_xDCB_82: -Z80_illeg_xDCB_83: -Z80_illeg_xDCB_84: -Z80_illeg_xDCB_85: -Z80_illeg_xDCB_87: -Z80_illeg_xDCB_88: -Z80_illeg_xDCB_89: -Z80_illeg_xDCB_8A: -Z80_illeg_xDCB_8B: -Z80_illeg_xDCB_8C: -Z80_illeg_xDCB_8D: -Z80_illeg_xDCB_8F: -Z80_illeg_xDCB_90: -Z80_illeg_xDCB_91: -Z80_illeg_xDCB_92: -Z80_illeg_xDCB_93: -Z80_illeg_xDCB_94: -Z80_illeg_xDCB_95: -Z80_illeg_xDCB_97: -Z80_illeg_xDCB_98: -Z80_illeg_xDCB_99: -Z80_illeg_xDCB_9A: -Z80_illeg_xDCB_9B: -Z80_illeg_xDCB_9C: -Z80_illeg_xDCB_9D: -Z80_illeg_xDCB_9F: -Z80_illeg_xDCB_A0: -Z80_illeg_xDCB_A1: -Z80_illeg_xDCB_A2: -Z80_illeg_xDCB_A3: -Z80_illeg_xDCB_A4: -Z80_illeg_xDCB_A5: -Z80_illeg_xDCB_A7: -Z80_illeg_xDCB_A8: -Z80_illeg_xDCB_A9: -Z80_illeg_xDCB_AA: -Z80_illeg_xDCB_AB: -Z80_illeg_xDCB_AC: -Z80_illeg_xDCB_AD: -Z80_illeg_xDCB_AF: -Z80_illeg_xDCB_B0: -Z80_illeg_xDCB_B1: -Z80_illeg_xDCB_B2: -Z80_illeg_xDCB_B3: -Z80_illeg_xDCB_B4: -Z80_illeg_xDCB_B5: -Z80_illeg_xDCB_B7: -Z80_illeg_xDCB_B8: -Z80_illeg_xDCB_B9: -Z80_illeg_xDCB_BA: -Z80_illeg_xDCB_BB: -Z80_illeg_xDCB_BC: -Z80_illeg_xDCB_BD: -Z80_illeg_xDCB_BF: -Z80_illeg_xDCB_C8: -Z80_illeg_xDCB_C9: -Z80_illeg_xDCB_CA: -Z80_illeg_xDCB_CB: -Z80_illeg_xDCB_CC: -Z80_illeg_xDCB_CD: -Z80_illeg_xDCB_CF: -Z80_illeg_xDCB_D0: -Z80_illeg_xDCB_D1: -Z80_illeg_xDCB_D2: -Z80_illeg_xDCB_D3: -Z80_illeg_xDCB_D4: -Z80_illeg_xDCB_D5: -Z80_illeg_xDCB_D7: -Z80_illeg_xDCB_D8: -Z80_illeg_xDCB_D9: -Z80_illeg_xDCB_DA: -Z80_illeg_xDCB_DB: -Z80_illeg_xDCB_DC: -Z80_illeg_xDCB_DD: -Z80_illeg_xDCB_DF: -Z80_illeg_xDCB_E0: -Z80_illeg_xDCB_E1: -Z80_illeg_xDCB_E2: -Z80_illeg_xDCB_E3: -Z80_illeg_xDCB_E4: -Z80_illeg_xDCB_E5: -Z80_illeg_xDCB_E7: -Z80_illeg_xDCB_E8: -Z80_illeg_xDCB_E9: -Z80_illeg_xDCB_EA: -Z80_illeg_xDCB_EB: -Z80_illeg_xDCB_EC: -Z80_illeg_xDCB_ED: -Z80_illeg_xDCB_EF: -Z80_illeg_xDCB_F0: -Z80_illeg_xDCB_F1: -Z80_illeg_xDCB_F2: -Z80_illeg_xDCB_F3: -Z80_illeg_xDCB_F4: -Z80_illeg_xDCB_F5: -Z80_illeg_xDCB_F7: -Z80_illeg_xDCB_F8: -Z80_illeg_xDCB_F9: -Z80_illeg_xDCB_FA: -Z80_illeg_xDCB_FB: -Z80_illeg_xDCB_FC: -Z80_illeg_xDCB_FD: -Z80_illeg_xDCB_FF: From 6935ece3869bd3dc079cf7c8121fbef8b6d6df92 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 23 Dec 2020 18:02:48 +0100 Subject: [PATCH 070/257] screen editor bugfix --- src/kernal/screen/chrout_screen_jumptable_codes.s | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/kernal/screen/chrout_screen_jumptable_codes.s b/src/kernal/screen/chrout_screen_jumptable_codes.s index 6b37055d..e408e7ea 100644 --- a/src/kernal/screen/chrout_screen_jumptable_codes.s +++ b/src/kernal/screen/chrout_screen_jumptable_codes.s @@ -23,10 +23,11 @@ chrout_screen_jumptable_codes: !byte KEY_CRSR_LEFT !byte KEY_CRSR_DOWN !byte KEY_CRSR_UP - !byte KEY_INS __chrout_screen_jumptable_quote_guard: + !byte KEY_INS + !ifdef CONFIG_EDIT_STOPQUOTE { !byte KEY_STOP } From 94a699119aa25baab58379dac49440ecce4be4df Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 23 Dec 2020 20:23:17 +0100 Subject: [PATCH 071/257] BIOS now attached to BOOTCPM command, fixed another screen editor bug --- Makefile | 2 +- src/kernal/board_m65/mega65_bootcpm.s | 13 +++- src/kernal/board_m65/mega65_imports_C.s | 8 +++ src/kernal/board_m65/mega65_map_helpers.s | 19 ++++++ src/kernal/board_m65/mega65_proxies_zvm.s | 17 +++++ .../mega65_chrout_screen_control_2.s | 8 +-- src/zvm_m65/z80_instr_load_8bit.s | 10 ++- src/zvm_m65/zvm_bios.s | 3 + src/zvm_m65/zvm_core.s | 64 ++++++++++++------- src/zvm_m65/zvm_imports.s | 41 ++++++++++++ 10 files changed, 151 insertions(+), 34 deletions(-) create mode 100644 src/kernal/board_m65/mega65_proxies_zvm.s create mode 100644 src/zvm_m65/zvm_imports.s diff --git a/Makefile b/Makefile index d825cadc..1a01ffcd 100644 --- a/Makefile +++ b/Makefile @@ -382,7 +382,7 @@ $(DIR_M65)/dos.seg_1 $(DIR_M65)/DOS_1_combined.vs $(DIR_M65)/DOS_1_combine $(DIR_M65)/mon.seg_1 $(DIR_M65)/MON_1_combined.vs $(DIR_M65)/MON_1_combined.sym: \ $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_MON_M65) $(CFG_M65) $(DIR_M65)/KERNAL_0_combined.sym $(DIR_M65)/zvm.seg_1 $(DIR_M65)/ZVM_1_combined.vs $(DIR_M65)/ZVM_1_combined.sym: \ - $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_ZVM_M65) $(CFG_M65) $(DIR_M65)/KERNAL_0_combined.sym + $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_ZVM_M65) $(CFG_M65) $(DIR_M65)/KERNAL_0_combined.sym $(DIR_M65)/KERNAL_C_combined.sym $(DIR_X16)/basic.seg_1 $(DIR_X16)/BASIC_1_combined.vs $(DIR_X16)/BASIC_1_combined.sym: \ $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_BASIC) $(CFG_X16) $(GEN_STR_X16) $(DIR_X16)/KERNAL_0_combined.sym $(DIR_X16)/BASIC_0_combined.sym diff --git a/src/kernal/board_m65/mega65_bootcpm.s b/src/kernal/board_m65/mega65_bootcpm.s index 8c2f5501..859b3163 100644 --- a/src/kernal/board_m65/mega65_bootcpm.s +++ b/src/kernal/board_m65/mega65_bootcpm.s @@ -4,6 +4,13 @@ BOOTCPM: - ; jsr map_MON_1 - ; XXX implement system startupo - jmp BOOTCPM + jsr CLALL + clc + jsr M65_MODESET + + jsr viciv_init ; do it now, later it will not be safe anymore + lda #$01 + jsr M65_SCRMODESET + + jsr map_ZVM_1 + jmp ($2000) diff --git a/src/kernal/board_m65/mega65_imports_C.s b/src/kernal/board_m65/mega65_imports_C.s index 4e0c8a92..bfe90027 100644 --- a/src/kernal/board_m65/mega65_imports_C.s +++ b/src/kernal/board_m65/mega65_imports_C.s @@ -15,3 +15,11 @@ ;; #ALIAS# __kb_matrix_alwaysrepeat_end = KERNAL_0.__kb_matrix_alwaysrepeat_end ;; #ALIAS# kb_matrix_joy_status = KERNAL_0.kb_matrix_joy_status ;; #ALIAS# kb_matrix_joy_keytab_idx = KERNAL_0.kb_matrix_joy_status + +; +; Definitions needed to perform proxy functionality for Z80 Virtual Machione +; + +;; #ALIAS# CHROUT = KERNAL_0.CHROUT + +;; #ALIAS# map_ZVM_1 = KERNAL_0.map_ZVM_1 diff --git a/src/kernal/board_m65/mega65_map_helpers.s b/src/kernal/board_m65/mega65_map_helpers.s index d5bb88cc..0c9005bf 100644 --- a/src/kernal/board_m65/mega65_map_helpers.s +++ b/src/kernal/board_m65/mega65_map_helpers.s @@ -10,6 +10,8 @@ ; - KERNAL_1 - for calling KERNAL_1 segment code ; - DOS_1 - for swiching to DOS context ; - NORMAL_from_DOS_1 - for switching bact from DOS context +; - MON_1 - for the monitor +; - ZVM_1 - for Z80 virtual machine map_NORMAL: @@ -117,3 +119,20 @@ map_MON_1: map bra map_end + +map_ZVM_1: + + php + pha + phx + phy + phz + + lda #$00 + tay + taz + + ldx #$E3 ; $2000 <- map 24KB from $32000 + + map + bra map_end diff --git a/src/kernal/board_m65/mega65_proxies_zvm.s b/src/kernal/board_m65/mega65_proxies_zvm.s new file mode 100644 index 00000000..f8166f40 --- /dev/null +++ b/src/kernal/board_m65/mega65_proxies_zvm.s @@ -0,0 +1,17 @@ +;; #LAYOUT# M65 KERNAL_C #TAKE +;; #LAYOUT# * * #IGNORE + +; +; Proxies for calling MEGA65 segment KERNAL_0 routines from ZVM_1 +; + + +proxy_Z1_CHROUT: + + jsr CHROUT + + ; FALLTROUGH + +proxy_Z1_end: + + jmp map_ZVM_1 diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_2.s b/src/kernal/screen_m65/mega65_chrout_screen_control_2.s index b3895d31..f0d235f2 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control_2.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_2.s @@ -72,23 +72,23 @@ m65_chrout_screen_HOME: ; Character set switching -m65_chrout_screen_GFX: +m65_chrout_screen_TXT: lda VIC_CHARPTR+1 ora #%00001000 ; FALLTROUGH -m65_chrout_screen_GFX_cont: +m65_chrout_screen_GFXTXT_cont: sta VIC_CHARPTR+1 bra m65_chrout_screen_ctrl2_end -m65_chrout_screen_TXT: +m65_chrout_screen_GFX: lda VIC_CHARPTR+1 and #%11110111 - bra m65_chrout_screen_GFX_cont + bra m65_chrout_screen_GFXTXT_cont ; INS key diff --git a/src/zvm_m65/z80_instr_load_8bit.s b/src/zvm_m65/z80_instr_load_8bit.s index e3b0bc68..1258b049 100644 --- a/src/zvm_m65/z80_instr_load_8bit.s +++ b/src/zvm_m65/z80_instr_load_8bit.s @@ -277,18 +277,22 @@ Z80_instr_ED_5F: ; LD A,R ora REG_IFF2 sta REG_F + clc lda REG_R06 ; register R only simulates random numbers + bpl @1 + sec +@1: + rol eor VIC_RASTER - adc TIME+2 eor VIC_XPOS sta REG_R06 and #%01111111 eor REG_R7 ; not 'ora', we want to reuse the 'garbage' sta REG_A - bpl @1 + bpl @2 +Z80_PUT_1_SF -@1: +@2: +bne ZVM_next +Z80_PUT_1_ZF jmp ZVM_next diff --git a/src/zvm_m65/zvm_bios.s b/src/zvm_m65/zvm_bios.s index 17cd7405..c8d73d83 100644 --- a/src/zvm_m65/zvm_bios.s +++ b/src/zvm_m65/zvm_bios.s @@ -71,6 +71,9 @@ zvm_BIOS_00_BOOT: ; Cold start dew REG_AF ; AF and SP have $FFFF value on start dew REG_SP + lda TIME+2 ; give a little initial randomness to register R + sta REG_R06 + ; XXX load CPM3.SYS ; FALLTROUGH diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index aeaedb17..6974e18d 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -5,7 +5,47 @@ ZVM_entry: - ; XXX mark that this is the first start of CP/M iin the lifecycle, display BIOS information + ; Reset stack pointer - this routine will never return + + ldx #$FF + txs + + ; Skip the IRQ processing, even if Kernal reenables it + + sei + lda #return_from_interrupt + sta CINV+1 + + ; Make sure $C000-$CFFF ROM is mapped-in, we keep our proxies there + + lda VIC_CTRLA + ora #%00100000 + sta VIC_CTRLA + + ; Setup colours, print welcome message + + lda #$00 + sta VIC_EXTCOL + sta VIC_BGCOL0 + + jsr PRIMM + !byte KEY_GREEN, KEY_ESC, 'o', KEY_CLR, KEY_C65_SHIFT_ON, KEY_TXT, KEY_C65_SHIFT_OFF + !pet "Open ROMs MEGA65 BIOS for CP/M", $0D + !pet "Zilog Z80 to 45GS02 translator", $0D + !byte $0D,$0D + !byte 0 + + ; XXX code is not ready to progress further + + jsr PRIMM + !byte $0D + !pet "* Implementation not finished yet - system HALTED *" + !byte 0 +@1 + bra @1 + jmp zvm_BIOS_00_BOOT ZVM_store_next: @@ -71,28 +111,6 @@ Z80_instr_FD: +ZVM_DISPATCH Z80_vectab_FD_0, Z80_vectab_FD_1 ; - - - - - - - - - - - - - - - - - - - - - - ; ; Not implemented yet - XXX implement them! ; diff --git a/src/zvm_m65/zvm_imports.s b/src/zvm_m65/zvm_imports.s new file mode 100644 index 00000000..92d77b53 --- /dev/null +++ b/src/zvm_m65/zvm_imports.s @@ -0,0 +1,41 @@ + +;; #IMPORT# KERNAL_0 = KERNAL_0_combined.sym +;; #IMPORT# KERNAL_C = KERNAL_C_combined.sym + +; +; Definitions for calling MEGA65 segment KERNAL_0 routines from ZVM_1 +; + +;; #ALIAS# CHROUT = KERNAL_C.proxy_Z1_CHROUT + +;; #ALIAS# return_from_interrupt = KERNAL_0.return_from_interrupt + + +; 'Print immediate', original implementation by Mike Barry, adapted to 65CE02, modified to preserve .Y +; see http://www.6502.org/source/io/primm.htm + +PRIMM: + + pla ; get low part of (string address-1) + sta PTR1 + pla ; get high part of (string address-1) + sta PTR2 + phy + +bra @2 +@1: + jsr CHROUT ; output a string char +@2: + inc PTR1 ; advance the string pointer + bne @3 + inc PTR2 +@3: + ldy #$00 + lda (PTR1), y ; get string char + bne @1 ; output and continue if not NUL + ply + lda PTR2 + pha + lda PTR1 + pha + + rts From 872f72f4a538e38c87fdd1b2a60405275dfb570a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 24 Dec 2020 14:55:12 +0100 Subject: [PATCH 072/257] more work on monitor adaptation --- src/mon_m65/4000.mon_vectable.s | 1 - src/mon_m65/bsmon.s | 788 +++++++++++------- src/mon_m65/bsmon_glue.s | 28 - .../{,imports_monitor.s => mon_imports.s} | 30 + 4 files changed, 498 insertions(+), 349 deletions(-) delete mode 100644 src/mon_m65/bsmon_glue.s rename src/mon_m65/{,imports_monitor.s => mon_imports.s} (61%) diff --git a/src/mon_m65/4000.mon_vectable.s b/src/mon_m65/4000.mon_vectable.s index 78bace5c..c3f4e014 100644 --- a/src/mon_m65/4000.mon_vectable.s +++ b/src/mon_m65/4000.mon_vectable.s @@ -2,4 +2,3 @@ ; A vector table to integrate BSMON with the MEGA65 Kernal !word Mon_Call -!word Mon_Break diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index d22f19f6..7860cc1d 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -74,14 +74,12 @@ ; ******* -Mon_Break +Mon_Call: ; ******* - ; XXX implement Open ROMs version, connect it to BRK handler + jsr PRIMM + !pet $0D, "* warning * - adaptation to open roms not finished yet", $0D, $0D, $00 -; ****** -Mon_Call -; ****** JSR Print_Commands @@ -102,9 +100,9 @@ Mon_Call STX PCH STX X_Vector+1 -; ******* -Mon_Start -; ******* +; ******** +Mon_Start: +; ******** CLD TSY @@ -117,9 +115,9 @@ Mon_Start CLI +NOP -; ********** -Mon_Register -; ********** +; *********** +Mon_Register: +; *********** JSR Reg_Text @@ -167,9 +165,9 @@ Main ; read one line into buffer -; **** -Main_A -; **** +; ***** +Main_A: +; ***** @loop JSR CHRIN STA BUF,X @@ -187,9 +185,9 @@ Main_A CMP #' ' BEQ @getcomm -; ******** -Mon_Switch -; ******** +; ********* +Mon_Switch: +; ********* LDX #24 @loop CMP Command_Char,X @@ -199,9 +197,9 @@ Mon_Switch ; fall through to error routine if not found -; ******* -Mon_Error -; ******* +; ******** +Mon_Error: +; ******** ; put a question mark at the end of the text @@ -211,9 +209,9 @@ Mon_Error TXS BRA Main -; ******** -Mon_Select -; ******** +; ********* +Mon_Select: +; ********* STA VERCKK CPX #22 @@ -223,69 +221,68 @@ Mon_Select TAX JMP (Jump_Table,X) -; ************ -Print_Commands -; ************ +; ************* +Print_Commands: +; ************* JSR PRIMM !pet KEY_RETURN,KEY_YELLOW,KEY_RVS_ON," commands: " -; ********** -Command_Char -; ********** +; *********** +Command_Char: +; *********** ; 0123456789abcdef !pet "abcdfghjmrtx@.>;?" -; ********* -Cons_Prefix -; ********* +; ********** +Cons_Prefix: +; ********** !pet "$+&%'" -; ************** -Load_Save_Verify -; ************** +; *************** +Load_Save_Verify: +; *************** !pet "lsv ",KEY_WHITE,KEY_RETURN,0 RTS -; ******** -Jump_Table -; ******** +; ********* +Jump_Table: +; ********* - !word Mon_Assemble ; A - !word Mon_Bits ; B - !word Mon_Compare ; C - !word Mon_Disassemble ; D - !word Mon_Fill ; F - !word Mon_Go ; G - !word Mon_Hunt ; H - !word Mon_JSR ; J - !word Mon_Memory ; M + !word Mon_Assemble ; A XXX to be debugged/adapted + !word Mon_Bits ; B XXX to be debugged/adapted + !word Mon_Compare ; C XXX to be debugged/adapted + !word Mon_Disassemble ; D XXX to be debugged/adapted + !word Mon_Fill ; F XXX to be debugged/adapted + !word Mon_Go ; G XXX to be debugged/adapted + !word Mon_Hunt ; H XXX to be debugged/adapted + !word Mon_JSR ; J XXX to be debugged/adapted + !word Mon_Memory ; M XXX to be debugged/adapted !word Mon_Register ; R - !word Mon_Transfer ; T + !word Mon_Transfer ; T XXX to be debugged/adapted !word Mon_Exit ; X - !word Mon_DOS ; @ - !word Mon_Assemble ; . - !word Mon_Set_Memory ; > - !word Mon_Set_Register ; ; + !word Mon_DOS ; @ XXX to be debugged/adapted + !word Mon_Assemble ; . XXX to be debugged/adapted + !word Mon_Set_Memory ; > XXX to be debugged/adapted + !word Mon_Set_Register ; ; XXX to be debugged/adapted !word Mon_Help ; ? - !word Converter ; $ - !word Converter ; + - !word Converter ; & - !word Converter ; % + !word Converter ; $ XXX to be debugged/adapted + !word Converter ; + XXX to be debugged/adapted + !word Converter ; & XXX to be debugged/adapted + !word Converter ; % XXX to be debugged/adapted - -; ****** -Mon_Exit -; ****** +; ******* +Mon_Exit: +; ******* JMP (X_Vector) -; ******* -LAC_To_PC -; ******* +; ******** +LAC_To_PC: +; ******** ; called from Mon_Set_Register, Mon_Go and Mon_JSR ; as the first instruction. The carry flag was set from @@ -305,9 +302,9 @@ LAC_To_PC STA Bank @error RTS -; ******** -LAC_To_LPC -; ******** +; ********* +LAC_To_LPC: +; ********* PHX LDX #3 @@ -318,9 +315,9 @@ LAC_To_LPC PLX RTS -; ******** -LAC_To_LCT -; ******** +; ********* +LAC_To_LCT: +; ********* PHX LDX #3 @@ -331,9 +328,9 @@ LAC_To_LCT PLX RTS -; ******** -LAC_To_LDA -; ******** +; ********* +LAC_To_LDA: +; ********* PHX LDX #3 @@ -344,9 +341,9 @@ LAC_To_LDA PLX RTS -; ********** -LAC_Plus_LCT -; ********** +; *********** +LAC_Plus_LCT: +; *********** PHX LDX #252 ; use ZP wrap around @@ -359,9 +356,9 @@ LAC_Plus_LCT PLX RTS -; *********** -LAC_Minus_LPC -; *********** +; ************ +LAC_Minus_LPC: +; ************ PHX LDX #252 ; use ZP wrap around @@ -374,9 +371,9 @@ LAC_Minus_LPC PLX RTS -; ************* -LAC_Compare_LPC -; ************* +; ************** +LAC_Compare_LPC: +; ************** PHX LDX #252 ; use ZP wrap around @@ -388,18 +385,18 @@ LAC_Compare_LPC PLX RTS -; ***** -Inc_LAC -; ***** +; ****** +Inc_LAC: +; ****** INW Long_AC BNE @return INW Long_AC+2 @return RTS -; ***** -Dec_LAC -; ***** +; ****** +Dec_LAC: +; ****** LDA Long_AC ORA Long_AC+1 @@ -408,18 +405,18 @@ Dec_LAC @skip DEW Long_AC RTS -; ***** -Inc_LPC -; ***** +; ****** +Inc_LPC: +; ****** INW Long_PC BNE @return INW Long_PC+2 @return RTS -; ***** -Dec_LDA -; ***** +; ****** +Dec_LDA: +; ****** LDA Long_DA ORA Long_DA+1 @@ -428,9 +425,9 @@ Dec_LDA @skip DEW Long_DA RTS -; *** -Fetch -; *** +; **** +Fetch: +; **** PHZ TYA @@ -442,15 +439,19 @@ Fetch AND #$ff RTS -; ******** -Mon_Memory -; ******** +; ********* +Mon_Memory: +; ********* - LDA #$00 - STA Adr_Mode - JSR Set_MODE_80 + lda #$00 + sta Adr_Mode ; by default use C64-style addressing + jsr Set_MODE_80 ; check if we have 80 columns + + jsr Get_Addr_To_LAC ; get 1st. parameter + +bcs Mon_Error + + ; XXX !!! adapt from here - JSR Get_LAC ; get 1st. parameter LDZ #16 ; default row count BCS @row ; no address JSR LAC_To_LPC ; Long_PC = start address @@ -476,9 +477,9 @@ Mon_Memory BNE @row @exit JMP Main -; ******** -Print_Bits -; ******** +; ********* +Print_Bits: +; ********* PHZ STA Long_DA @@ -493,9 +494,9 @@ Print_Bits PLZ RTS -; ****** -Mon_Bits -; ****** +; ******* +Mon_Bits: +; ******* JSR Get_LAC ; get 1st. parameter BCS @lab @@ -528,9 +529,9 @@ Mon_Bits BNE @row JMP Main -; ************** -Mon_Set_Register -; ************** +; *************** +Mon_Set_Register: +; *************** JSR Get_LAC ; get 1st. parameter JSR LAC_To_PC @@ -544,9 +545,9 @@ Mon_Set_Register BCC @loop @exit JMP Main -; ************ -Mon_Set_Memory -; ************ +; ************* +Mon_Set_Memory: +; ************* JSR Set_MODE_80 @@ -572,9 +573,9 @@ Mon_Set_Memory JSR Dump_Row JMP Main -; **** -Mon_Go -; **** +; ***** +Mon_Go: +; ***** ; XXX to be rewritten for Open ROMs! jmp Main @@ -584,9 +585,9 @@ Mon_Go ; TXS ; JMP JMPFAR -; ***** -Mon_JSR -; ***** +; ****** +Mon_JSR: +; ****** ; XXX to be rewritten for Open ROMs! jmp Main @@ -599,9 +600,9 @@ Mon_JSR ; STX SPL ; JMP Main -; ********** -Dump_4_Bytes -; ********** +; *********** +Dump_4_Bytes: ; XXX to be adapted +; *********** JSR CHROUT ; colour @loop BBS7 Long_PC+3,@banked ; trigger banked access @@ -614,9 +615,9 @@ Dump_4_Bytes BNE @loop RTS -; ********** -Dump_4_Chars -; ********** +; *********** +Dump_4_Chars: ; XXX to be adapted +; *********** LDY #0 STY QTSW ; disable quote mode @@ -636,9 +637,9 @@ Dump_4_Chars BNE @loop RTS -; ****** -Dump_Row -; ****** +; ******* +Dump_Row: +; ******* JSR Set_MODE_80 @@ -677,9 +678,9 @@ Dump_Row PLZ RTS -; ********** -Mon_Transfer -; ********** +; *********** +Mon_Transfer: +; *********** JSR Param_Range ; Long_PC = source LBCS Mon_Error ; Long_CT = count @@ -710,9 +711,9 @@ Mon_Transfer BPL @forward JMP Main -; ********* -Mon_Compare -; ********* +; ********** +Mon_Compare: +; ********** JSR Param_Range ; Long_PC = source LBCS Mon_Error ; Long_CT = count @@ -730,9 +731,9 @@ Mon_Compare BPL @loop JMP Main -; ****** -Mon_Hunt -; ****** +; ******* +Mon_Hunt: +; ******* JSR Param_Range ; Long_PC = start LBCS Mon_Error ; Long_CT = count @@ -779,9 +780,9 @@ Mon_Hunt BPL @lpstart JMP Main -; ******* -Load_Save -; ******* +; ******** +Load_Save: +; ******** ; XXX to be rewritten for Open ROMs! jmp Main @@ -865,9 +866,9 @@ Load_Save ; STA SA ; and ignore load address from file ; BRA @do -; ****** -Mon_Fill -; ****** +; ******* +Mon_Fill: +; ******* JSR Param_Range ; Long_PC = target LBCS Mon_Error ; Long_CT = count @@ -882,9 +883,9 @@ Mon_Fill BPL @loop JMP Main -; ********** -Mon_Assemble -; ********** +; *********** +Mon_Assemble: +; *********** JSR Get_LAC ; get 1st. parameter LBCS Mon_Error @@ -1289,9 +1290,9 @@ Mon_Assemble TAX JMP Main_A -; *********** -Branch_Target -; *********** +; ************ +Branch_Target: +; ************ DEW Long_AC DEC @@ -1308,9 +1309,9 @@ Branch_Target STA Long_AC+1 RTS -; ******** -Match_Mode -; ******** +; ********* +Match_Mode: +; ********* ; find matching mnemonic and address mode @@ -1331,9 +1332,9 @@ Match_Mode @error DEX ; X = $ff ZF=0 @return RTS -; ******** -Mode_Index -; ******** +; ********* +Mode_Index: +; ********* LDA Mode_Flags LDX #0 @@ -1346,9 +1347,9 @@ Mode_Index RTS @found STX Mode_Flags -; ********** -Size_To_Mode -; ********** +; *********** +Size_To_Mode: +; *********** LDA Op_Len LSR @@ -1359,9 +1360,9 @@ Size_To_Mode LDX #0 RTS -; ************* -Mon_Disassemble -; ************* +; ************** +Mon_Disassemble: +; ************** JSR Get_LAC ; get 1st. parameter BCS @nopar @@ -1388,16 +1389,16 @@ Mon_Disassemble BCS @loop JMP Main -; ****** -Dis_Code -; ****** +; ******* +Dis_Code: +; ******* JSR PRIMM !pet ". ",0 -; ******** -Print_Code -; ******** +; ********* +Print_Code: +; ********* ; print 24 bit address of instruction @@ -1707,15 +1708,157 @@ Print_Code INC Op_Size @return RTS -; ***** -Got_LAC -; ***** +; ************** +Get_Addr_To_LAC: +; ************** + + phx + phy + phz + lda #$00 + sta Dig_Cnt ; count columns read + sta Long_AC+0 ; clear result Long_AC + lda Long_AC+1 + sta Long_AC+2 + sta Long_AC+3 + + jsr Get_Glyph ; get 1st. character + beq @exit + + ldy #$03 ; here we allow '$', '+', '&', and '%' prefixes + +@loop_prefix: + + cmp Cons_Prefix,Y ; Y = base index + + beq @valid_prefix ; -> valid prefix + dey + bpl @loop_prefix + iny ; Y = 0 + dec Buf_Index ; character is a digit + +@valid_prefix: + + ; at this point .Y value determines a numeric system + + jsr Get_Char + beq @exit ; '?', ':'', ';' and zero terminate + cmp #'0' + bcc @exit + cmp #':' + bcc @valid_digit ; 0-9 + cmp #'A' + bcc @exit + cmp #'G' + bcs @exit + sbc #$07 ; hex conversion + +@valid_digit: + + sbc #'0'-1 + cmp Num_Base,Y + bcs @error ; branch if digit above numerical system limit + pha ; push digit to the stack + inc Dig_Cnt + + cpy #$01 + bne @laba ; branch if not decimal + + ldx #$03 ; decimal - push Long_AC * 2 + clc + +@push2x: + + lda Long_AC,X + rol + pha + dex + bpl @push2x + +@laba: + + ldx Num_Bits,Y ; multiply Long_AC by power of 2 (depending on numeric system) + +@shift: + + asl Long_AC+0 + rol Long_AC+1 + row Long_AC+2 + bcs @error ; overflow + dec + bne @shift + + cpy #$01 ; decimal adjustment + bne @add_digit ; branch if not a decimal number + ldx #$00 + ldz #$03 + clc + +@pull_and_add: + + pla + adc Long_AC,X + sta Long_AC,X + inx + dez + bpl @pull_and_add + +@add_digit: + + pla ; pull digit + clc + adc Long_AC+0 + sta Long_AC+0 + bcc @valid_prefix + inc Long_AC+1 + bne @valid_prefix + inw Long_AC+2 + bne @valid_prefix + +@error: + + sec + bra @return + +@exit: + + lda Dig_Cnt ; check if we should enable long addressing mode + cmp Num_Limit,Y + bcc @check_done + + cpy #$1 + bne @set_long_mode + + lda Long_AC+2 ; for decimal system check most significant bytes instead + ora Long_AC+3 + beq @check_done + +@set_long_mode: + + lda #$80 ; set addressing mode to long + sta Adr_Mode + +@check_done: + + lda Dig_Cnt + clc + +@return: + + plz + ply + plx + rts + +; ****** +Got_LAC: ; XXX to be replaced/adapted +; ****** DEC Buf_Index -; ***** -Get_LAC ; -; ***** +; ****** +Get_LAC: ; XXX to be replaced/adapted +; ****** JSR Read_Number BCS @error ; illegal character @@ -1735,9 +1878,9 @@ Get_LAC ; @ok CLC RTS -; ********* -Read_Number -; ********* +; ********** +Read_Number: ; XXX obsolete, to be replaced +; ********** PHX PHY @@ -1832,9 +1975,9 @@ Read_Number LDA Dig_Cnt ; digits read RTS -; ***** -Hex_LPC -; ***** +; ****** +Hex_LPC: +; ****** LDX Long_PC+3 BEQ @laba @@ -1853,46 +1996,46 @@ Hex_LPC @labb LDX Long_PC+1 LDA Long_PC -; ********** -Print_XA_Hex -; ********** +; *********** +Print_XA_Hex: +; *********** PHA TXA JSR Print_Hex PLA -; ************* -Print_Hex_Blank -; ************* +; ************** +Print_Hex_Blank: +; ************** JSR Print_Hex -; ********* -Print_Blank -; ********* +; ********** +Print_Blank: +; ********** LDA #' ' JMP CHROUT -; ****** -Print_CR -; ****** +; ******* +Print_CR: +; ******* LDA #13 JMP CHROUT -; ****** -CR_Erase -; ****** +; ******* +CR_Erase: +; ******* JSR PRIMM !pet KEY_RETURN, KEY_ESC, 'q', 0 RTS -; ******* -Print_Hex -; ******* +; ******** +Print_Hex: +; ******** PHX JSR A_To_Hex @@ -1901,9 +2044,9 @@ Print_Hex PLX JMP CHROUT -; ****** -A_To_Hex -; ****** +; ******* +A_To_Hex: +; ******* PHA JSR @nibble @@ -1921,9 +2064,10 @@ A_To_Hex @lab ADC #'0' RTS -; ******* -Get_Glyph -; ******* +; ******** +Get_Glyph: +; ******** + PHX LDA #' ' @loop LDX Buf_Index @@ -1932,15 +2076,15 @@ Get_Glyph BEQ @loop PLX ; fall through -; ****** -Got_Char -; ****** +; ******* +Got_Char: +; ******* DEC Buf_Index -; ****** -Get_Char -; ****** +; ******* +Get_Char: +; ******* PHX LDX Buf_Index @@ -1959,9 +2103,9 @@ Get_Char @return RTS -; ***** -Dec_LCT -; ***** +; ****** +Dec_LCT: +; ****** LDA Long_CT ORA Long_CT+1 @@ -1971,18 +2115,18 @@ Dec_LCT LDA Long_CT+3 ; set N flag RTS -; ***** -Add_LPC -; ***** +; ****** +Add_LPC: +; ****** CLC ADC Long_PC STA Long_PC BCC Inc_LPC_Page_return -; ********** -Inc_LPC_Page -; ********** +; *********** +Inc_LPC_Page: +; *********** INC Long_PC+1 BNE Inc_LPC_Page_return @@ -1990,9 +2134,9 @@ Inc_LPC_Page Inc_LPC_Page_return RTS -; ********* -Param_Range -; ********* +; ********** +Param_Range: +; ********** ; read two (address) parameters @@ -2015,9 +2159,9 @@ Param_Range @error SEC RTS -; ******* -Converter -; ******* +; ******** +Converter: +; ******** LDX #0 STX Buf_Index @@ -2043,17 +2187,17 @@ Conv_Tab !word Print_Hexval !word Print_Octal !word Print_Dual -; ******** -Print_Dual -; ******** +; ********* +Print_Dual: +; ********* LDX #24 ; digits LDY #1 ; bits per digit BRA Print_Octal_entry -; ********* -Print_Octal -; ********* +; ********** +Print_Octal: +; ********** LDX #8 ; digits LDY #3 ; bits per digit @@ -2084,18 +2228,18 @@ Print_Octal_entry PLY ; cleanup stack RTS -; ********** -Print_Hexval -; ********** +; *********** +Print_Hexval: +; *********** JSR LAC_To_LPC LDA #0 STA Long_PC+3 BRA Print_BCD -; *********** -Print_Decimal -; *********** +; ************ +Print_Decimal: +; ************ ; max $ffffff = 16777215 (8 digits) @@ -2127,9 +2271,9 @@ Print_Decimal BNE @loop CLD -; ******* -Print_BCD -; ******* +; ******** +Print_BCD: +; ******** LDA #0 STA Long_CT @@ -2159,9 +2303,9 @@ Print_BCD RTS -; ************* -Get_Disk_Status -; ************* +; ************** +Get_Disk_Status: +; ************** LDA FA JSR TALK @@ -2192,15 +2336,15 @@ Get_Disk_Status LDA Disk_Status RTS -; *************** -Print_Disk_Status -; *************** +; **************** +Print_Disk_Status: +; **************** JSR Get_Disk_Status -; ************ -Print_Disk_Msg -; ************ +; ************* +Print_Disk_Msg: +; ************* JSR Print_CR LDY #0 @@ -2211,16 +2355,16 @@ Print_Disk_Msg BRA @loop @exit JMP Print_CR -; ***** -Mon_DOS -; ***** +; ****** +Mon_DOS: +; ****** ; XXX for Open ROMs it should invoke internal DOS wedge! jmp Main -; *** -DOS_U ; XXX connect it somehow to command list -; *** +; **** +DOS_U: ; XXX connect it somehow to command list +; **** ; @[u],U1 mem track startsec [endsec] : read disk sector(s) ; @[u],U2 mem track startsec [endsec] : write disk sector(s) @@ -2273,9 +2417,9 @@ DOS_U ; XXX connect it somehow to command list JSR Close_Disk_Buffer JMP Main -; ************** -Find_next_Sector -; ************** +; *************** +Find_next_Sector: +; *************** JSR Build_U_String JSR Send_Disk_Command @@ -2294,9 +2438,9 @@ Find_next_Sector LDA Disk_Status @return RTS -; ****************** -Open_Command_Channel -; ****************** +; ******************* +Open_Command_Channel: +; ******************* LDA FA JSR LISTEN @@ -2318,9 +2462,9 @@ Reset_BP BRA @loop @end JMP UNLSN -; *************** -Send_Disk_Command -; *************** +; **************** +Send_Disk_Command: +; **************** JSR Open_Command_Channel @loop LDA Mon_Data,Y @@ -2330,9 +2474,9 @@ Send_Disk_Command BRA @loop @end JMP UNLSN -; ********* -Read_Sector -; ********* +; ********** +Read_Sector: +; ********** LDA FA JSR TALK @@ -2346,9 +2490,9 @@ Read_Sector BNE @loop JMP UNTLK -; ********** -Write_Sector -; ********** +; *********** +Write_Sector: +; *********** JSR Reset_BP ; reset disk buffer pointer LDA FA @@ -2364,9 +2508,9 @@ Write_Sector JSR UNLSN RTS -; **** -Set_TS -; **** +; ***** +Set_TS: +; ***** ; Input A = track or sector ; X = string index @@ -2389,9 +2533,9 @@ Set_TS ; U1:CHANNEL DRIVE TRACK SECTOR -; ************ -Build_U_String -; ************ +; ************* +Build_U_String: +; ************* LDX #14 @loop LDA U1,X @@ -2408,9 +2552,9 @@ Build_U_String LDX #11 JMP Set_TS -; ************** -Open_Disk_Buffer -; ************** +; *************** +Open_Disk_Buffer: +; *************** LDA #0 STA IOSTATUS @@ -2425,9 +2569,9 @@ Open_Disk_Buffer LBNE Print_Disk_Status RTS -; *************** -Close_Disk_Buffer -; *************** +; **************** +Close_Disk_Buffer: +; **************** LDA #0 STA IOSTATUS @@ -2573,10 +2717,9 @@ Close_Disk_Buffer !set ENC_TYS = (ENC_T * 32 * 32 + ENC_Y * 32 + ENC_S) * 2 !set ENC_TZA = (ENC_T * 32 * 32 + ENC_Z * 32 + ENC_A) * 2 - -; *** -MNE_L -; *** +; **** +MNE_L: +; **** !byte >ENC_ADC, >ENC_AND, >ENC_ASL, >ENC_ASR, >ENC_ASW, >ENC_BBR, >ENC_BBS, >ENC_BCC !byte >ENC_BCS, >ENC_BEQ, >ENC_BIT, >ENC_BMI, >ENC_BNE, >ENC_BPL, >ENC_BRA, >ENC_BRK @@ -2591,10 +2734,9 @@ MNE_L !byte >ENC_TAZ, >ENC_TBA, >ENC_TRB, >ENC_TSB, >ENC_TSX, >ENC_TSY, >ENC_TXA, >ENC_TXS !byte >ENC_TYA, >ENC_TYS, >ENC_TZA - -; *** -MNE_R -; *** +; **** +MNE_R: +; **** !byte ",KEY_WHITE," - > address byte sequence",KEY_RETURN !pet KEY_LT_RED,";",KEY_WHITE," - ; register contents",KEY_RETURN !pet KEY_LT_RED,"@",KEY_WHITE,"dos - @ [dos command]",KEY_RETURN + !pet KEY_LT_RED,"$",KEY_WHITE," - hexadecimal number (default)",KEY_RETURN + !pet KEY_LT_RED,"+",KEY_WHITE," - decimal number",KEY_RETURN + !pet KEY_LT_RED,"&",KEY_WHITE," - octal number",KEY_RETURN + !pet KEY_LT_RED,"%",KEY_WHITE," - binary number",KEY_RETURN !pet KEY_LT_RED,"?",KEY_WHITE,"help - ?",KEY_RETURN !pet 0 JMP Main -; ********* -Set_MODE_80 -; ********* +; ********** +Set_MODE_80: +; ********** ; Not too effective, but allows to retain more original code diff --git a/src/mon_m65/bsmon_glue.s b/src/mon_m65/bsmon_glue.s deleted file mode 100644 index 031db660..00000000 --- a/src/mon_m65/bsmon_glue.s +++ /dev/null @@ -1,28 +0,0 @@ -; 'Print immediate', original implementation by Mike Barry, adapted to 65CE02, modified to preserve .Y -; see http://www.6502.org/source/io/primm.htm - -PRIMM: - - pla ; get low part of (string address-1) - sta PTR1 - pla ; get high part of (string address-1) - sta PTR2 - phy - +bra @2 -@1: - jsr CHROUT ; output a string char -@2: - inc PTR1 ; advance the string pointer - bne @3 - inc PTR2 -@3: - ldy #$00 - lda (PTR1), y ; get string char - bne @1 ; output and continue if not NUL - ply - lda PTR2 - pha - lda PTR1 - pha - - rts diff --git a/src/mon_m65/,imports_monitor.s b/src/mon_m65/mon_imports.s similarity index 61% rename from src/mon_m65/,imports_monitor.s rename to src/mon_m65/mon_imports.s index 78a85e28..f8fcf6ac 100644 --- a/src/mon_m65/,imports_monitor.s +++ b/src/mon_m65/mon_imports.s @@ -20,3 +20,33 @@ ;; #ALIAS# UNLSN = KERNAL_0.proxy_M1_UNLSN ;; #ALIAS# LISTEN = KERNAL_0.proxy_M1_LISTEN ;; #ALIAS# TALK = KERNAL_0.proxy_M1_TALK + + +; 'Print immediate', original implementation by Mike Barry, adapted to 65CE02, modified to preserve .Y +; see http://www.6502.org/source/io/primm.htm + +PRIMM: + + pla ; get low part of (string address-1) + sta PTR1 + pla ; get high part of (string address-1) + sta PTR2 + phy + +bra @2 +@1: + jsr CHROUT ; output a string char +@2: + inc PTR1 ; advance the string pointer + bne @3 + inc PTR2 +@3: + ldy #$00 + lda (PTR1), y ; get string char + bne @1 ; output and continue if not NUL + ply + lda PTR2 + pha + lda PTR1 + pha + + rts From 312abd150a9e1ca2858623d2eed753114b8a5401 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 24 Dec 2020 16:48:44 +0100 Subject: [PATCH 073/257] started work on color palette support --- CONFIG.md | 4 + src/,,config_mega65.s | 1 + src/aliases/,aliases_config.s | 8 + src/aliases/,aliases_hardware_m65.s | 8 + src/kernal/board_m65/mega65_modeset.s | 1 + src/kernal/board_m65/mega65_reset_palette.s | 244 ++++++++++++++++++ src/kernal/board_m65/mega65_reset_part.s | 6 +- .../board_m65/mega65_viciv_setctrl_AC.s | 1 + src/zvm_m65/zvm_core.s | 15 +- tools/generate_strings.cc | 2 +- 10 files changed, 284 insertions(+), 6 deletions(-) create mode 100644 src/kernal/board_m65/mega65_reset_palette.s diff --git a/CONFIG.md b/CONFIG.md index 12699fbf..9b0c565f 100644 --- a/CONFIG.md +++ b/CONFIG.md @@ -247,6 +247,10 @@ If enabled, STOP key terminates insert/quote mode (like on some _Black Box_ cart Feature needs 12 bytes in KERNAL segment. If unsure - enable. +### `VIC_PALETTE` + +Selects the default system palette - MEGA65 only. + ## Software features ### `PANIC_SCREEN` diff --git a/src/,,config_mega65.s b/src/,,config_mega65.s index 1c0939e2..769ac1c3 100644 --- a/src/,,config_mega65.s +++ b/src/,,config_mega65.s @@ -77,6 +77,7 @@ ; --- Screen editor ;; #CONFIG# EDIT_STOPQUOTE YES +;; #CONFIG# VIC_PALETTE 0 ; 0 = default; 1 = C65, 2 = Colodore, 3 = VICE, 4 = Frodo, 5 = Deekay ; --- Software features diff --git a/src/aliases/,aliases_config.s b/src/aliases/,aliases_config.s index d334a0d8..fdeeb70f 100644 --- a/src/aliases/,aliases_config.s +++ b/src/aliases/,aliases_config.s @@ -237,6 +237,14 @@ } +; Check that screen settings are correct + +!ifndef CONFIG_MB_M65 { + !ifdef CONFIG_VIC_PALETTE { !error "CONFIG_VIC_PALETTE is only possible for MEGA65 motherboard" } +} +!ifdef CONFIG_MB_MEGA65 { + !ifndef CONFIG_VIC_PALETTE { !error "CONFIG_VIC_PALETTE not specified" } +} ; Check that internal DOS configuration is correct diff --git a/src/aliases/,aliases_hardware_m65.s b/src/aliases/,aliases_hardware_m65.s index 9ca89e57..bfc5e178 100644 --- a/src/aliases/,aliases_hardware_m65.s +++ b/src/aliases/,aliases_hardware_m65.s @@ -27,6 +27,14 @@ !addr VIC_CHARPTR = $D068 ; 3 bytes - pointer to start of character generator + !addr VIC_PALSEL = $D070 ; - palette selection register + + ; Palette memory areas + + !addr PALETTE_R = $D100 + !addr PALETTE_G = $D200 + !addr PALETTE_B = $D300 + ; Keyboard !addr C65_EXTKEYS_PR = $D607 diff --git a/src/kernal/board_m65/mega65_modeset.s b/src/kernal/board_m65/mega65_modeset.s index c02eb04a..8495b111 100644 --- a/src/kernal/board_m65/mega65_modeset.s +++ b/src/kernal/board_m65/mega65_modeset.s @@ -67,6 +67,7 @@ m65_mode65: jsr vicii_init jsr viciv_init + jsr m65_reset_palette ; Initialize various memory structures diff --git a/src/kernal/board_m65/mega65_reset_palette.s b/src/kernal/board_m65/mega65_reset_palette.s new file mode 100644 index 00000000..4ad9f0df --- /dev/null +++ b/src/kernal/board_m65/mega65_reset_palette.s @@ -0,0 +1,244 @@ +;; #LAYOUT# M65 KERNAL_1 #TAKE +;; #LAYOUT# * * #IGNORE + + + +!if (CONFIG_VIC_PALETTE = 0) { !set CONFIG_VIC_PALETTE = 4 } ; override palette to default value + +!if (CONFIG_VIC_PALETTE = 1) { + + ; Original C65 palette, taken from C65 manual + + ; RRGGBB + !set RGB_0 = $000000 ; black + !set RGB_1 = $FFFFFF ; white + !set RGB_2 = $FF0000 ; red + !set RGB_3 = $00FFFF ; cyan + !set RGB_4 = $FF00FF ; purple / magenta + !set RGB_5 = $00FF00 ; green + !set RGB_6 = $0000FF ; blue + !set RGB_7 = $FFFF00 ; yellow + !set RGB_8 = $FF6600 ; orange + !set RGB_9 = $AA4400 ; brown + !set RGB_A = $FF7777 ; light red / pink + !set RGB_B = $555555 ; dark grey + !set RGB_C = $888888 ; medium grey + !set RGB_D = $99FF99 ; light green + !set RGB_E = $9999FF ; light blue + !set RGB_F = $BBBBBB ; light gray + +} else if (CONFIG_VIC_PALETTE = 2) { + + ; A Colodore palette, values taken from VICE emulator + ; Based on http://www.colodore.com/ + + ; RRGGBB + !set RGB_0 = $000000 ; black + !set RGB_1 = $FFFFFF ; white + !set RGB_2 = $96282E ; red + !set RGB_3 = $5BD6CE ; cyan + !set RGB_4 = $9F2DAD ; purple / magenta + !set RGB_5 = $41B936 ; green + !set RGB_6 = $2724C4 ; blue + !set RGB_7 = $EFF347 ; yellow + !set RGB_8 = $9F4815 ; orange + !set RGB_9 = $5E3500 ; brown + !set RGB_A = $DA5F66 ; light red / pink + !set RGB_B = $474747 ; dark grey + !set RGB_C = $787878 ; medium grey + !set RGB_D = $91FF84 ; light green + !set RGB_E = $6864FF ; light blue + !set RGB_F = $AEAEAE ; light gray + +} else if (CONFIG_VIC_PALETTE = 3) { + + ; A VICE emulator palette + + ; RRGGBB + !set RGB_0 = $000000 ; black + !set RGB_1 = $FDFEFC ; white + !set RGB_2 = $BE1A24 ; red + !set RGB_3 = $30E6C6 ; cyan + !set RGB_4 = $B41AE2 ; purple / magenta + !set RGB_5 = $1FD21E ; green + !set RGB_6 = $211BAE ; blue + !set RGB_7 = $DFF60A ; yellow + !set RGB_8 = $B84104 ; orange + !set RGB_9 = $6A3304 ; brown + !set RGB_A = $FE4A57 ; light red / pink + !set RGB_B = $424540 ; dark grey + !set RGB_C = $70746F ; medium grey + !set RGB_D = $59FE59 ; light green + !set RGB_E = $5F53FE ; light blue + !set RGB_F = $A4A7A2 ; light gray + +} else if (CONFIG_VIC_PALETTE = 4) { + + ; A Frodo palette, values taken from VICE emulator + + ; RRGGBB + !set RGB_0 = $000000 ; black + !set RGB_1 = $FDFEFC ; white + !set RGB_2 = $BE1A24 ; red + !set RGB_3 = $30E6C6 ; cyan + !set RGB_4 = $B41AE2 ; purple / magenta + !set RGB_5 = $1FD21E ; green + !set RGB_6 = $211BAE ; blue + !set RGB_7 = $DFF60A ; yellow + !set RGB_8 = $B84104 ; orange + !set RGB_9 = $6A3304 ; brown + !set RGB_A = $FE4A57 ; light red / pink + !set RGB_B = $424540 ; dark grey + !set RGB_C = $70746F ; medium grey + !set RGB_D = $59FE59 ; light green + !set RGB_E = $5F53FE ; light blue + !set RGB_F = $A4A7A2 ; light gray + + +} else if (CONFIG_VIC_PALETTE = 5) { + + ; A Deekay palette, values taken from VICE emulator + + + ; RRGGBB + !set RGB_0 = $000000 ; black + !set RGB_1 = $FFFFFF ; white + !set RGB_2 = $882000 ; red + !set RGB_3 = $68D0A8 ; cyan + !set RGB_4 = $A838A0 ; purple / magenta + !set RGB_5 = $50B818 ; green + !set RGB_6 = $181090 ; blue + !set RGB_7 = $F0E858 ; yellow + !set RGB_8 = $A04800 ; orange + !set RGB_9 = $472B1B ; brown + !set RGB_A = $C87870 ; light red / pink + !set RGB_B = $484848 ; dark grey + !set RGB_C = $808080 ; medium grey + !set RGB_D = $98FF98 ; light green + !set RGB_E = $5090D0 ; light blue + !set RGB_F = $B8B8B8 ; light gray + +} else { !error "Unknown palette ID" } + + + +m65_reset_palette: + + ; Enable RAM palette + + lda VIC_CTRLA + ora #$04 + sta VIC_CTRLA + + + ; XXX loop instead + + lda #%11000000 + sta VIC_PALSEL + jsr m65_reset_palette_selected + + lda #%10000000 + sta VIC_PALSEL + jsr m65_reset_palette_selected + + lda #%01000000 + sta VIC_PALSEL + jsr m65_reset_palette_selected + + lda #%00000000 + sta VIC_PALSEL + jsr m65_reset_palette_selected + + rts + +m65_reset_palette_selected: + + ; First clear the entire palette + + lda #$00 + ldx #$00 +@1: + sta PALETTE_R, x + sta PALETTE_G, x + sta PALETTE_B, x + + inx + bne @1 + + ; Now set default colors + + ldx #$0F +@2: + lda m65_COL_R,x + sta $D100, x + lda m65_COL_G,x + sta $D200, x + lda m65_COL_B,x + sta $D300, x + dex + bpl @2 + + rts + +; Macros to convert colors to C65/M65 palette + +!macro COL_R .x { !byte ((((^.x & $0F) * $10) + ((^.x & $F0) / $10)) & %11101111) } +!macro COL_G .x { !byte (((>.x & $0F) * $10) + ((>.x & $F0) / $10)) } +!macro COL_B .x { !byte (((<.x & $0F) * $10) + ((<.x & $F0) / $10)) } + +m65_COL_R: + + +COL_R RGB_0 + +COL_R RGB_1 + +COL_R RGB_2 + +COL_R RGB_3 + +COL_R RGB_4 + +COL_R RGB_5 + +COL_R RGB_6 + +COL_R RGB_7 + +COL_R RGB_8 + +COL_R RGB_9 + +COL_R RGB_A + +COL_R RGB_B + +COL_R RGB_C + +COL_R RGB_D + +COL_R RGB_E + +COL_R RGB_F + +m65_COL_G: + + +COL_G RGB_0 + +COL_G RGB_1 + +COL_G RGB_2 + +COL_G RGB_3 + +COL_G RGB_4 + +COL_G RGB_5 + +COL_G RGB_6 + +COL_G RGB_7 + +COL_G RGB_8 + +COL_G RGB_9 + +COL_G RGB_A + +COL_G RGB_B + +COL_G RGB_C + +COL_G RGB_D + +COL_G RGB_E + +COL_G RGB_F + +m65_COL_B: + + +COL_B RGB_0 + +COL_B RGB_1 + +COL_B RGB_2 + +COL_B RGB_3 + +COL_B RGB_4 + +COL_B RGB_5 + +COL_B RGB_6 + +COL_B RGB_7 + +COL_B RGB_8 + +COL_B RGB_9 + +COL_B RGB_A + +COL_B RGB_B + +COL_B RGB_C + +COL_B RGB_D + +COL_B RGB_E + +COL_B RGB_F diff --git a/src/kernal/board_m65/mega65_reset_part.s b/src/kernal/board_m65/mega65_reset_part.s index 12086d46..a687df09 100644 --- a/src/kernal/board_m65/mega65_reset_part.s +++ b/src/kernal/board_m65/mega65_reset_part.s @@ -6,15 +6,15 @@ m65_reset_part: - jsr map_NORMAL ; we want normal memory mapping - jsr viciv_shutdown ; by default we do not want the VIC-IV + jsr map_NORMAL ; we want normal memory mapping + jsr viciv_shutdown ; by default we do not want the VIC-IV jsr M65_MODEGET bcs m65_clr_end ; Clear MEAGA65 native mode mark, it might cause confusion -m65_clr_magictstr: ; entry point for mode switching routine +m65_clr_magictstr: ; entry point for mode switching routine lda #$00 sta M65_MAGICSTR+0 diff --git a/src/kernal/board_m65/mega65_viciv_setctrl_AC.s b/src/kernal/board_m65/mega65_viciv_setctrl_AC.s index c49f31de..bc47695d 100644 --- a/src/kernal/board_m65/mega65_viciv_setctrl_AC.s +++ b/src/kernal/board_m65/mega65_viciv_setctrl_AC.s @@ -9,6 +9,7 @@ mega65_viciv_setctrl_AC: sta VIC_CTRLA + ora #%00000100 ; always use RAM color palette lda VIC_CTRLC and #%01101000 diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 6974e18d..499d677d 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -19,16 +19,27 @@ ZVM_entry: sta CINV+1 ; Make sure $C000-$CFFF ROM is mapped-in, we keep our proxies there + ; Also make sure the palette is taken from RAM lda VIC_CTRLA - ora #%00100000 + ora #%00100100 sta VIC_CTRLA - ; Setup colours, print welcome message + ; Setup colours to ressemble vintage green monitor from the 70s, print welcome message lda #$00 sta VIC_EXTCOL sta VIC_BGCOL0 + sta PALETTE_R+0 + sta PALETTE_G+0 + sta PALETTE_B+0 + + lda #$01 + sta PALETTE_R+5 + lda #$47 + sta PALETTE_G+5 + lda #$02 + sta PALETTE_B+5 jsr PRIMM !byte KEY_GREEN, KEY_ESC, 'o', KEY_CLR, KEY_C65_SHIFT_ON, KEY_TXT, KEY_C65_SHIFT_OFF diff --git a/tools/generate_strings.cc b/tools/generate_strings.cc index 00407a18..113a2bf6 100644 --- a/tools/generate_strings.cc +++ b/tools/generate_strings.cc @@ -294,7 +294,7 @@ const StringEntryList GLOBAL_MiscStrings = { ListType::STRINGS_BASIC, "misc", { true, true, true, true, true, "STR_BRK_AT", "\rBRK AT $" }, { false, false, true, false, false, "STR_ORS", "OPEN ROMS BASIC & KERNAL\r" }, - { false, false, true, false, false, "STR_ORS_LEGACY", "(LEGACY MODE) " }, + { false, false, true, false, false, "STR_ORS_LEGACY", "(LEGACY MODE) " }, { false, true, true, false, false, "STR_MEM_HDR", "\r\x12 AREA START SIZE \r" }, { false, true, true, false, false, "STR_MEM_1", " $" }, From 5888f7987d858863e35313ac9d102ed59e42b4df Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 24 Dec 2020 18:24:56 +0100 Subject: [PATCH 074/257] bugfixes in monitor integration code --- src/mon_m65/bsmon.s | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 7860cc1d..8fcc4ce6 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -448,7 +448,7 @@ Mon_Memory: jsr Set_MODE_80 ; check if we have 80 columns jsr Get_Addr_To_LAC ; get 1st. parameter - +bcs Mon_Error + +beq Mon_Error ; XXX !!! adapt from here @@ -1718,7 +1718,7 @@ Get_Addr_To_LAC: lda #$00 sta Dig_Cnt ; count columns read sta Long_AC+0 ; clear result Long_AC - lda Long_AC+1 + sta Long_AC+1 sta Long_AC+2 sta Long_AC+3 @@ -1757,7 +1757,7 @@ Get_Addr_To_LAC: sbc #'0'-1 cmp Num_Base,Y - bcs @error ; branch if digit above numerical system limit + +bcs Mon_Error ; branch if digit above numerical system limit pha ; push digit to the stack inc Dig_Cnt @@ -1784,8 +1784,8 @@ Get_Addr_To_LAC: asl Long_AC+0 rol Long_AC+1 row Long_AC+2 - bcs @error ; overflow - dec + +bcs Mon_Error ; overflow + dex bne @shift cpy #$01 ; decimal adjustment @@ -1815,13 +1815,14 @@ Get_Addr_To_LAC: inw Long_AC+2 bne @valid_prefix -@error: - - sec - bra @return + jmp Mon_Error ; number foo large @exit: + lda Long_AC+3 + and #%11110000 + +bne Mon_Error ; MEGA65 has a 28-bit address bu + lda Dig_Cnt ; check if we should enable long addressing mode cmp Num_Limit,Y bcc @check_done @@ -1841,13 +1842,12 @@ Get_Addr_To_LAC: @check_done: lda Dig_Cnt - clc - -@return: plz ply plx + + cmp #$00 ; allow to easily check if a parameter was given rts ; ****** From a7c8b91436c502351871a33b983482c7cbfc7d8f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 24 Dec 2020 20:26:17 +0100 Subject: [PATCH 075/257] more work on monitor integration --- src/mon_m65/,aliases_mon.s | 67 +++++ src/mon_m65/bsmon.s | 395 ++++++++++-------------------- src/mon_m65/mon_get_addr_to_lac.s | 140 +++++++++++ 3 files changed, 332 insertions(+), 270 deletions(-) create mode 100644 src/mon_m65/,aliases_mon.s create mode 100644 src/mon_m65/mon_get_addr_to_lac.s diff --git a/src/mon_m65/,aliases_mon.s b/src/mon_m65/,aliases_mon.s new file mode 100644 index 00000000..7d444c08 --- /dev/null +++ b/src/mon_m65/,aliases_mon.s @@ -0,0 +1,67 @@ + +!macro NOP { eom } ; ACME does not allow NOP for MEGA65 CPU + + +; Due to shadowing mechanism, we are free to use zeropage addresses $02-$8F +; for any purpose - they won't conflict with BASIC interpreter varaibles + + +; ******************** +; * Register storage * +; ******************** + +!addr Bank = 2 ; XXX remove this +!addr Adr_Mode = 2 ; $00 = C64 address, $80 = M65 flat address ; XXX adapt the implementation +!addr PCH = 3 +!addr PCL = 4 +!addr SR = 5 +!addr AC = 6 +!addr XR = 7 +!addr YR = 8 +!addr ZR = 9 +!addr BP = 10 +!addr SPH = 11 +!addr SPL = 12 + + +; ******************* +; * Other variables * +; ******************* + + +; A set of 32 bit variables also used as 32 bit pointer + +!addr Long_AC = $10 ; 32 bit accumulator +!addr Long_CT = $14 ; 32 bit counter +!addr Long_PC = $18 ; 32 bit program counter +!addr Long_DA = $1C ; 32 bit data pointer + +; Flags are used in BBR BBS instructions + +!addr Adr_Flags = $20 +!addr Mode_Flags = $21 +!addr Op_Code = $22 +!addr Op_Flag = $23 ; 7: two operands + ; 6: long branch + ; 5: 32 bit address + ; 4: Q register +!addr Op_Size = $24 +!addr Dig_Cnt = $25 +!addr Buf_Index = $26 + +!addr MODE_80 = $27 ; 80 column / 40 volumn flag ; XXX add routine to detect this +!addr SP_Storage = $28 ; location to preserve stack pointer + +!addr X_Vector = $29 ; monitor exit vector +!addr Ix_Mne = $2B ; index to mnemonics table +!addr Op_Mne = $2C ; 3 bytes for mnemonic +!addr Op_Ix = $2F ; type of constant +!addr Op_Len = $30 ; length of operand +!addr Disk_Track = $31 ; logical track 1 -> 255 +!addr Disk_Sector = $32 ; logical sector 0 -> 255 +!addr Disk_Status = $33 ; BCD value of status + + ; $34-$3F - free space, unused for now + +!addr Disk_Msg = $40 ; 40 bytes, disk status as text message ; XXX rework code to make it not needed +!addr Mon_Data = $68 ; 40 bytes, buffer for hunt and filename diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 8fcc4ce6..5234d254 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -5,74 +5,6 @@ ; ******************************* -!macro NOP { eom } ; ACME does not allow NOP for MEGA65 CPU - - -; Due to shadowing mechanism, we are free to use zeropage addresses $02-$8F -; for any purpose - they won't conflict with BASIC interpreter varaibles - - -; ******************** -; * Register storage * -; ******************** - -!addr Bank = 2 ; XXX remove this -!addr Adr_Mode = 2 ; $00 = C64 address, $80 = M65 flat address ; XXX adapt the implementation -!addr PCH = 3 -!addr PCL = 4 -!addr SR = 5 -!addr AC = 6 -!addr XR = 7 -!addr YR = 8 -!addr ZR = 9 -!addr BP = 10 -!addr SPH = 11 -!addr SPL = 12 - - -; ******************* -; * Other variables * -; ******************* - - -; A set of 32 bit variables also used as 32 bit pointer - -!addr Long_AC = $10 ; 32 bit accumulator -!addr Long_CT = $14 ; 32 bit counter -!addr Long_PC = $18 ; 32 bit program counter -!addr Long_DA = $1C ; 32 bit data pointer - -; Flags are used in BBR BBS instructions - -!addr Adr_Flags = $20 -!addr Mode_Flags = $21 -!addr Op_Code = $22 -!addr Op_Flag = $23 ; 7: two operands - ; 6: long branch - ; 5: 32 bit address - ; 4: Q register -!addr Op_Size = $24 -!addr Dig_Cnt = $25 -!addr Buf_Index = $26 - -!addr MODE_80 = $27 ; 80 column / 40 volumn flag ; XXX add routine to detect this -!addr SP_Storage = $28 ; location to preserve stack pointer - -!addr X_Vector = $29 ; monitor exit vector -!addr Ix_Mne = $2B ; index to mnemonics table -!addr Op_Mne = $2C ; 3 bytes for mnemonic -!addr Op_Ix = $2F ; type of constant -!addr Op_Len = $30 ; length of operand -!addr Disk_Track = $31 ; logical track 1 -> 255 -!addr Disk_Sector = $32 ; logical sector 0 -> 255 -!addr Disk_Status = $33 ; BCD value of status - - ; $34-$3F - free space, unused for now - -!addr Disk_Msg = $40 ; 40 bytes, disk status as text message ; XXX rework code to make it not needed -!addr Mon_Data = $68 ; 40 bytes, buffer for hunt and filename - - ; ******* Mon_Call: ; ******* @@ -281,7 +213,7 @@ Mon_Exit: JMP (X_Vector) ; ******** -LAC_To_PC: +LAC_To_PC: ; XXX to be adapted, get rid of 'bcs'! ; ******** ; called from Mon_Set_Register, Mon_Go and Mon_JSR @@ -306,14 +238,42 @@ LAC_To_PC: LAC_To_LPC: ; ********* - PHX - LDX #3 -@loop LDA Long_AC,X - STA Long_PC,X - DEX - BPL @loop - PLX - RTS + phx + ldx #$03 + +@loop: + + lda Long_AC,X + sta Long_PC,X + dex + bpl @loop + plx + + rts + +; ******************* +LPC_Plus_Page_To_LAC: +; ******************* + + phx + ldx #$03 + +@loop: + + lda Long_PC,X + sta Long_AC,X + dex + bpl @loop + plx + + inc Long_AC+1 + bcc @exit + inw Long_AC+2 + +@exit: + + rts + ; ********* LAC_To_LCT: @@ -445,37 +405,59 @@ Mon_Memory: lda #$00 sta Adr_Mode ; by default use C64-style addressing - jsr Set_MODE_80 ; check if we have 80 columns - jsr Get_Addr_To_LAC ; get 1st. parameter + jsr Get_Addr_To_LAC ; get 1st parameter (start address) +beq Mon_Error + jsr LAC_To_LPC ; Long_PC = start address - ; XXX !!! adapt from here + jsr Get_Addr_To_LAC ; get 2nd parameter (end address) + bne @got_end_address + jsr LPC_Plus_Page_To_LAC ; set default end address by start plus one page - LDZ #16 ; default row count - BCS @row ; no address - JSR LAC_To_LPC ; Long_PC = start address - JSR Get_LAC ; Long_AC = end address - BCS @row ; not given +@got_end_address: - JSR LAC_Minus_LPC ; Long_CT = range - LBCC Mon_Error ; negative range -> error - LDX #4 ; 16 bytes / line - BBR7 MODE_80,@shift - DEX ; 8 bytes / line -@shift LSR Long_CT+1 - ROR Long_CT - DEX - BNE @shift - LDZ Long_CT ; row count - INZ + jsr LAC_Minus_LPC ; Long_CT = range + +bcc Mon_Error ; error if negative range + +@loop: + + jsr Print_CR ; XXX for debug only + lda Long_CT+3 + jsr Print_Hex + lda Long_CT+2 + jsr Print_Hex + lda Long_CT+1 + jsr Print_Hex + lda Long_CT+0 + jsr Print_Hex + + jsr Dump_Row + + jsr Print_CR ; XXX for debug only + lda Long_CT+3 + jsr Print_Hex + lda Long_CT+2 + jsr Print_Hex + lda Long_CT+1 + jsr Print_Hex + lda Long_CT+0 + jsr Print_Hex + jsr Print_CR + + jsr STOP + beq @exit + + + ; !!! loop till end reached + + + + + +@exit: + + jmp Main -@row JSR STOP - BEQ @exit - JSR Dump_Row - DEZ - BNE @row -@exit JMP Main ; ********* Print_Bits: @@ -507,7 +489,7 @@ Mon_Bits: LDX #8 @row PHX - JSR Hex_LPC + JSR Print_LPC_Addr LDZ #0 @col SEC LDA #KEY_WHITE+KEY_LT_RED ; toggle colour @@ -647,7 +629,7 @@ Dump_Row: JSR Print_CR LDA #'>' JSR CHROUT - JSR Hex_LPC + JSR Print_LPC_Addr LDZ #0 LDX #2 ; 2 blocks in 80 columns @@ -724,7 +706,7 @@ Mon_Compare: @loop LDA [Long_PC],Z CMP [Long_AC],Z BEQ @laba - JSR Hex_LPC + JSR Print_LPC_Addr @laba JSR Inc_LAC JSR Inc_LPC JSR Dec_LCT @@ -772,7 +754,7 @@ Mon_Hunt: INY CPY Long_DA BNE @lpins - JSR Hex_LPC ; match + JSR Print_LPC_Addr ; match @next JSR STOP LBEQ Main JSR Inc_LPC @@ -1400,9 +1382,9 @@ Dis_Code: Print_Code: ; ********* -; print 24 bit address of instruction +; print address of instruction - JSR Hex_LPC ; 24 bit address + JSR Print_LPC_Addr ; read opcode and calculate length and address mode @@ -1708,148 +1690,6 @@ Print_Code: INC Op_Size @return RTS -; ************** -Get_Addr_To_LAC: -; ************** - - phx - phy - phz - lda #$00 - sta Dig_Cnt ; count columns read - sta Long_AC+0 ; clear result Long_AC - sta Long_AC+1 - sta Long_AC+2 - sta Long_AC+3 - - jsr Get_Glyph ; get 1st. character - beq @exit - - ldy #$03 ; here we allow '$', '+', '&', and '%' prefixes - -@loop_prefix: - - cmp Cons_Prefix,Y ; Y = base index - - beq @valid_prefix ; -> valid prefix - dey - bpl @loop_prefix - iny ; Y = 0 - dec Buf_Index ; character is a digit - -@valid_prefix: - - ; at this point .Y value determines a numeric system - - jsr Get_Char - beq @exit ; '?', ':'', ';' and zero terminate - cmp #'0' - bcc @exit - cmp #':' - bcc @valid_digit ; 0-9 - cmp #'A' - bcc @exit - cmp #'G' - bcs @exit - sbc #$07 ; hex conversion - -@valid_digit: - - sbc #'0'-1 - cmp Num_Base,Y - +bcs Mon_Error ; branch if digit above numerical system limit - pha ; push digit to the stack - inc Dig_Cnt - - cpy #$01 - bne @laba ; branch if not decimal - - ldx #$03 ; decimal - push Long_AC * 2 - clc - -@push2x: - - lda Long_AC,X - rol - pha - dex - bpl @push2x - -@laba: - - ldx Num_Bits,Y ; multiply Long_AC by power of 2 (depending on numeric system) - -@shift: - - asl Long_AC+0 - rol Long_AC+1 - row Long_AC+2 - +bcs Mon_Error ; overflow - dex - bne @shift - - cpy #$01 ; decimal adjustment - bne @add_digit ; branch if not a decimal number - ldx #$00 - ldz #$03 - clc - -@pull_and_add: - - pla - adc Long_AC,X - sta Long_AC,X - inx - dez - bpl @pull_and_add - -@add_digit: - - pla ; pull digit - clc - adc Long_AC+0 - sta Long_AC+0 - bcc @valid_prefix - inc Long_AC+1 - bne @valid_prefix - inw Long_AC+2 - bne @valid_prefix - - jmp Mon_Error ; number foo large - -@exit: - - lda Long_AC+3 - and #%11110000 - +bne Mon_Error ; MEGA65 has a 28-bit address bu - - lda Dig_Cnt ; check if we should enable long addressing mode - cmp Num_Limit,Y - bcc @check_done - - cpy #$1 - bne @set_long_mode - - lda Long_AC+2 ; for decimal system check most significant bytes instead - ora Long_AC+3 - beq @check_done - -@set_long_mode: - - lda #$80 ; set addressing mode to long - sta Adr_Mode - -@check_done: - - lda Dig_Cnt - - plz - ply - plx - - cmp #$00 ; allow to easily check if a parameter was given - rts - ; ****** Got_LAC: ; XXX to be replaced/adapted ; ****** @@ -1975,26 +1815,29 @@ Read_Number: ; XXX obsolete, to be replaced LDA Dig_Cnt ; digits read RTS -; ****** -Hex_LPC: -; ****** +; ************* +Print_LPC_Addr: ; prints out the address in PC +; ************* - LDX Long_PC+3 - BEQ @laba - LDA #KEY_YELLOW - JSR CHROUT - TXA - JSR Print_Hex - LDA Long_PC+2 - JSR Print_Hex - LDA #KEY_WHITE - JSR CHROUT - BRA @labb -@laba LDA Long_PC+2 - BEQ @labb - JSR Print_Hex -@labb LDX Long_PC+1 - LDA Long_PC + bbr7 Adr_Mode, @short + + lda Long_PC+3 + jsr Print_Hex_Low_Digit + lda Long_PC+2 + jsr Print_Hex + bra @remaining + +@short: + + jsr PRIMM + !pet "...", 0 + +@remaining: + + lda Long_PC+1 + jsr Print_Hex + lda Long_PC+0 + bra Print_Hex_Blank ; *********** Print_XA_Hex: @@ -2033,6 +1876,18 @@ CR_Erase: !pet KEY_RETURN, KEY_ESC, 'q', 0 RTS +; ****************** +Print_Hex_Low_Digit: +; ****************** + + phx + jsr A_To_Hex + txa + jsr CHROUT + plx + + rts + ; ******** Print_Hex: ; ******** @@ -2892,7 +2747,7 @@ ACCUMODE: !byte $0a,$1a,$2a,$3a,$4a,$6a,$42,$43 Num_Base: !byte 16,10, 8, 2 ; hex, dec, oct, bin Num_Bits: !byte 4, 3, 3, 1 ; hex, dec, oct, bin -Num_Limit: !byte 4, 4, 8, 32 ; hex, dec, oct, bin +Num_Limit: !byte 5, 5, 9, 33 ; hex, dec, oct, bin Index_Char: !pet "xyz" ; 0123456789abcd diff --git a/src/mon_m65/mon_get_addr_to_lac.s b/src/mon_m65/mon_get_addr_to_lac.s new file mode 100644 index 00000000..0ddaa110 --- /dev/null +++ b/src/mon_m65/mon_get_addr_to_lac.s @@ -0,0 +1,140 @@ + + +Get_Addr_To_LAC: ; XXX !!! seems to work correctly for hex only + + phx + phy + phz + lda #$00 + sta Dig_Cnt ; count columns read + sta Long_AC+0 ; clear result Long_AC + sta Long_AC+1 + sta Long_AC+2 + sta Long_AC+3 + + jsr Get_Glyph ; get 1st. character + beq @exit + + ldy #$03 ; here we allow '$', '+', '&', and '%' prefixes + +@loop_prefix: + + cmp Cons_Prefix,Y ; Y = base index + + beq @valid_prefix ; -> valid prefix + dey + bpl @loop_prefix + iny ; Y = 0 + +@valid_prefix: + + ; at this point .Y value determines a numeric system + + jsr Get_Char + beq @exit ; '?', ':'', ';' and zero terminate + cmp #'0' + bcc @exit + cmp #':' + bcc @valid_digit ; 0-9 + cmp #'A' + bcc @exit + cmp #'G' + bcs @exit + sbc #$07 ; hex conversion + +@valid_digit: + + sbc #'0'-1 + cmp Num_Base,Y + +bcs Mon_Error ; branch if digit above numerical system limit + pha ; push digit to the stack + inc Dig_Cnt + + cpy #$01 + bne @laba ; branch if not decimal + + ldx #$03 ; decimal - push Long_AC * 2 + clc + +@push2x: + + lda Long_AC,X + rol + pha + dex + bpl @push2x + +@laba: + + ldx Num_Bits,Y ; multiply Long_AC by power of 2 (depending on numeric system) + +@shift: + + asl Long_AC+0 + rol Long_AC+1 + row Long_AC+2 + +bcs Mon_Error ; overflow + dex + bne @shift + + cpy #$01 ; decimal adjustment + bne @add_digit ; branch if not a decimal number + ldx #$00 + ldz #$03 + clc + +@pull_and_add: + + pla + adc Long_AC,X + sta Long_AC,X + inx + dez + bpl @pull_and_add + +@add_digit: + + pla ; pull digit + clc + adc Long_AC+0 + sta Long_AC+0 + bcc @valid_prefix + inc Long_AC+1 + bne @valid_prefix + inw Long_AC+2 + bne @valid_prefix + + jmp Mon_Error ; number foo large + +@exit: + + lda Long_AC+3 + and #%11110000 + +bne Mon_Error ; MEGA65 has a 28-bit address bu + + lda Dig_Cnt ; check if we should enable long addressing mode + cmp Num_Limit,Y + bcc @check_done + + cpy #$1 + bne @set_long_mode + + lda Long_AC+2 ; for decimal system check most significant bytes instead + ora Long_AC+3 + beq @check_done + +@set_long_mode: + + lda #$80 ; set addressing mode to long + sta Adr_Mode + +@check_done: + + lda Dig_Cnt + + plz + ply + plx + + cmp #$00 ; allow to easily check if a parameter was given + rts From ee286e0f352ca4253524a985806900e853868928 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 26 Dec 2020 21:41:04 +0100 Subject: [PATCH 076/257] added command to change color palette on MEGA65 --- doc/Extended-BASIC.md | 6 +- src/,,config_mega65.s | 4 +- src/aliases/,aliases_ram_lowmem.s | 4 +- src/basic/,imports.s | 2 + .../basic_commands_04/cmd__jumptable_04.s | 6 + src/basic/basic_commands_04/cmd_colorset.s | 21 + .../board_m65/4000.mega65_vectable_kernal_1.s | 2 + src/kernal/board_m65/mega65_colorset.s | 182 +++++++ src/kernal/board_m65/mega65_colorset_assets.s | 476 ++++++++++++++++++ src/kernal/board_m65/mega65_modeset.s | 2 +- src/kernal/board_m65/mega65_reset_palette.s | 244 --------- src/kernal/jumptable_m65/mega65__jumptable.s | 2 +- tools/generate_strings.cc | 1 + 13 files changed, 701 insertions(+), 251 deletions(-) create mode 100644 src/basic/basic_commands_04/cmd_colorset.s create mode 100644 src/kernal/board_m65/mega65_colorset.s create mode 100644 src/kernal/board_m65/mega65_colorset_assets.s delete mode 100644 src/kernal/board_m65/mega65_reset_palette.s diff --git a/doc/Extended-BASIC.md b/doc/Extended-BASIC.md index cad3279c..3688e594 100644 --- a/doc/Extended-BASIC.md +++ b/doc/Extended-BASIC.md @@ -100,12 +100,16 @@ Displays BASIC memory usage information: ### `MONITOR` (MEGA65) -Invokes a machine language monitor +Invokes a machine language monitor. Not finished yet! ### `SYSINFO` (MEGA65) Displays various system information. +### `COLORSET id` (MEGA65) + +Changes the color set (palette). 0 = alias for the default one. Add 128 for a greyscale version. + ### `CLEAR` (cart, MEGA65) Clears the screen content. diff --git a/src/,,config_mega65.s b/src/,,config_mega65.s index 769ac1c3..ae76fe61 100644 --- a/src/,,config_mega65.s +++ b/src/,,config_mega65.s @@ -68,7 +68,7 @@ ;; #CONFIG# KEYCMD_F9 "REM F9" ;; #CONFIG# KEYCMD_F10 "\5FL" -;; #CONFIG# KEYCMD_F11 "REM F11" +;; #CONFIG# KEYCMD_F11 "COLORSET 128" ;; #CONFIG# KEYCMD_F12 "\5FHF" ;; #CONFIG# KEYCMD_F13 "JOYCRSR 2" ;; #CONFIG# KEYCMD_F14 "BOOTCPM" @@ -77,7 +77,7 @@ ; --- Screen editor ;; #CONFIG# EDIT_STOPQUOTE YES -;; #CONFIG# VIC_PALETTE 0 ; 0 = default; 1 = C65, 2 = Colodore, 3 = VICE, 4 = Frodo, 5 = Deekay +;; #CONFIG# VIC_PALETTE 0 ; 0 = default; 1 = C65, 2 = Frodo, 3 = VICE, 4 = Colodore, 5 = Deekay ; --- Software features diff --git a/src/aliases/,aliases_ram_lowmem.s b/src/aliases/,aliases_ram_lowmem.s index e82c13be..d6660835 100644 --- a/src/aliases/,aliases_ram_lowmem.s +++ b/src/aliases/,aliases_ram_lowmem.s @@ -100,8 +100,8 @@ !addr COLSTORE = $9C ; [!] screen border storage for tape routines } !addr MSGFLG = $9D ; bit 6 = error messages, bit 7 = control message - !addr PTR1 = $9E ; for tape support, counter of errorneous bytes [!] also used by PRIMM - !addr PTR2 = $9F ; for tape support, counter for errorneous bytes correction [!] also used by PRIMM + !addr PTR1 = $9E ; for tape support, counter of errorneous bytes [!] also used by PRIMM and other routines + !addr PTR2 = $9F ; for tape support, counter for errorneous bytes correction [!] also used by PRIMM and other routines !addr TIME = $A0 ; $A0-$A2 jiffy clock !addr IECPROTO = $A3 ; [!] IEC or pseudo-IEC protocol, >= $80 for unknown; originally named TSFCNT !addr TBTCNT = $A4 ; temporary variable for tape and IEC, [!] our usage probably differs in details diff --git a/src/basic/,imports.s b/src/basic/,imports.s index 9ae7f663..56443282 100644 --- a/src/basic/,imports.s +++ b/src/basic/,imports.s @@ -45,6 +45,8 @@ ;; #ALIAS# M65_MODESET = KERNAL_0.M65_MODESET ;; #ALIAS# M65_SETWIN_Y = KERNAL_0.M65_SETWIN_Y +;; #ALIAS# m65_colorset = KERNAL_0.m65_colorset + ; ; Ultimate 64 specific parts ; diff --git a/src/basic/basic_commands_04/cmd__jumptable_04.s b/src/basic/basic_commands_04/cmd__jumptable_04.s index 9fc274ef..4b1b3373 100644 --- a/src/basic/basic_commands_04/cmd__jumptable_04.s +++ b/src/basic/basic_commands_04/cmd__jumptable_04.s @@ -9,6 +9,7 @@ !set ITEM_02 = cmd_monitor !set ITEM_03 = BOOTCPM !set ITEM_04 = cmd_joycrsr +!set ITEM_05 = cmd_colorset !ifndef HAS_OPCODES_65C02 { @@ -18,12 +19,16 @@ command_04_jumptable_lo: !byte <(ITEM_01-1) !byte <(ITEM_02-1) !byte <(ITEM_03-1) + !byte <(ITEM_04-1) + !byte <(ITEM_05-1) command_04_jumptable_hi: !byte >(ITEM_01-1) !byte >(ITEM_02-1) !byte >(ITEM_03-1) + !byte >(ITEM_04-1) + !byte >(ITEM_05-1) } else { ; HAS_OPCODES_65C02 @@ -35,4 +40,5 @@ command_04_jumptable: !word ITEM_02 !word ITEM_03 !word ITEM_04 + !word ITEM_05 } diff --git a/src/basic/basic_commands_04/cmd_colorset.s b/src/basic/basic_commands_04/cmd_colorset.s new file mode 100644 index 00000000..7ea8cd70 --- /dev/null +++ b/src/basic/basic_commands_04/cmd_colorset.s @@ -0,0 +1,21 @@ +;; #LAYOUT# M65 BASIC_0 #TAKE +;; #LAYOUT# * * #IGNORE + + +cmd_colorset: + + ; Make sure we are in MEGA65 native mode + + jsr helper_ensure_native_mode + + ; Fetch palette ID + + jsr fetch_uint8 + +bcs do_SYNTAX_error + + ; Set the palette + + jsr m65_colorset + +bcs do_ILLEGAL_QUANTITY_error + + rts diff --git a/src/kernal/board_m65/4000.mega65_vectable_kernal_1.s b/src/kernal/board_m65/4000.mega65_vectable_kernal_1.s index 699a48c5..ec3a1fb8 100644 --- a/src/kernal/board_m65/4000.mega65_vectable_kernal_1.s +++ b/src/kernal/board_m65/4000.mega65_vectable_kernal_1.s @@ -27,6 +27,7 @@ !addr VK1__M65_CLRWIN = $4000 + 2 * 13 !addr VK1__m65_screen_upd_txtrow_off = $4000 + 2 * 14 !addr VK1__m65_shadow_BZP = $4000 + 2 * 15 + !addr VK1__m65_colorset = $4000 + 2 * 16 } else { @@ -62,4 +63,5 @@ !word M65_CLRWIN !word m65_screen_upd_txtrow_off !word m65_shadow_BZP + !word m65_colorset } diff --git a/src/kernal/board_m65/mega65_colorset.s b/src/kernal/board_m65/mega65_colorset.s new file mode 100644 index 00000000..640096ca --- /dev/null +++ b/src/kernal/board_m65/mega65_colorset.s @@ -0,0 +1,182 @@ +;; #LAYOUT# M65 KERNAL_0 #TAKE +;; #LAYOUT# M65 KERNAL_1 #TAKE +;; #LAYOUT# * * #IGNORE + + +!ifdef SEGMENT_KERNAL_0 { + +m65_colorset: + + jsr map_KERNAL_1 + jsr (VK1__m65_colorset) + jmp map_NORMAL + +} else { + + +m65_colorset_reset: + + ; Enable RAM palette + + lda VIC_CTRLA + ora #$04 + sta VIC_CTRLA + + ; Clear all the pallettes, select the 1st one + + ldx #$03 +@1: + lda m65_colorset_selection, x + sta VIC_PALSEL + + ; Clear concrete palette + + lda #$00 + tay +@2: + sta PALETTE_R, y + sta PALETTE_G, y + sta PALETTE_B, y + + iny + bne @2 + + dex + bpl @1 + + ; Select default palette + + lda #CONFIG_VIC_PALETTE + + ; FALLTROUGH + +m65_colorset: ; entry point for BASIC; .A - palette, where bit 7 selects greyscale; sets Carry to mark palette out of range + + asl + php + + cmp #($06 * 2) + bcs m65_colorset_error + + ; Prepare pointer to palette + + tax + lda m65_colorset_presets+0, x + sta PTR1+0 + lda m65_colorset_presets+1, x + sta PTR1+1 + + ; Select color/greyscale variant + + plp + bcs m65_colorset_greyscale + + ; FALLTROUGH + +m65_colorset_color: + + ldx #$03 +@1: + lda m65_colorset_selection, x + sta VIC_PALSEL + + ldy #$0F +@2: + lda (PTR1), y + sta PALETTE_R, y + + jsr m65_colorset_PTR1_inc_16 + + lda (PTR1), y + sta PALETTE_G, y + + jsr m65_colorset_PTR1_inc_16 + + lda (PTR1), y + sta PALETTE_B, y + + jsr m65_colorset_PTR1_dec_32 + + dey + bpl @2 + + dex + bpl @1 + + ; FALLTROUGH + +m65_colorset_done: + + clc + rts + +m65_colorset_error: + + plp + sec + rts + +m65_colorset_greyscale: + + jsr m65_colorset_PTR1_inc_16 + jsr m65_colorset_PTR1_inc_16 + jsr m65_colorset_PTR1_inc_16 + + ldx #$03 +@1: + lda m65_colorset_selection, x + sta VIC_PALSEL + + ldy #$0F +@2: + lda (PTR1), y + + sta PALETTE_R, y + sta PALETTE_G, y + sta PALETTE_B, y + + dey + bpl @2 + + dex + bpl @1 + + clc + rts + +m65_colorset_PTR1_inc_16: + + clc + lda PTR1+0 + adc #$10 + sta PTR1+0 + bcc @1 + inc PTR1+1 +@1: + rts + +m65_colorset_PTR1_dec_32: + + sec + lda PTR1+0 + sbc #$20 + sta PTR1+0 + bcs @1 + dec PTR1+1 +@1: + rts + + +m65_colorset_selection: + + !byte %11000000, %10000000, %01000000, %00000000 + +m65_colorset_presets: + + !word m65_colorset_2 ; default one + !word m65_colorset_1 + !word m65_colorset_2 + !word m65_colorset_3 + !word m65_colorset_4 + !word m65_colorset_5 +} diff --git a/src/kernal/board_m65/mega65_colorset_assets.s b/src/kernal/board_m65/mega65_colorset_assets.s new file mode 100644 index 00000000..d1001ed7 --- /dev/null +++ b/src/kernal/board_m65/mega65_colorset_assets.s @@ -0,0 +1,476 @@ +;; #LAYOUT# M65 KERNAL_1 #TAKE +;; #LAYOUT# * * #IGNORE + + +; #1 - original C65 palette, data taken from C65 manual + +; RRGGBB +!set RGB_1_0 = $000000 ; black +!set RGB_1_1 = $FFFFFF ; white +!set RGB_1_2 = $FF0000 ; red +!set RGB_1_3 = $00FFFF ; cyan +!set RGB_1_4 = $FF00FF ; purple / magenta +!set RGB_1_5 = $00FF00 ; green +!set RGB_1_6 = $0000FF ; blue +!set RGB_1_7 = $FFFF00 ; yellow +!set RGB_1_8 = $FF6600 ; orange +!set RGB_1_9 = $AA4400 ; brown +!set RGB_1_A = $FF7777 ; light red / pink +!set RGB_1_B = $555555 ; dark grey +!set RGB_1_C = $888888 ; medium grey +!set RGB_1_D = $99FF99 ; light green +!set RGB_1_E = $9999FF ; light blue +!set RGB_1_F = $BBBBBB ; light gray + +; #2 - a Frodo palette, values taken from VICE emulator + +; RRGGBB +!set RGB_2_0 = $000000 ; black +!set RGB_2_1 = $FFFFFF ; white +!set RGB_2_2 = $CC0000 ; red +!set RGB_2_3 = $00FFCC ; cyan +!set RGB_2_4 = $FF00FF ; purple / magenta +!set RGB_2_5 = $00CC00 ; green +!set RGB_2_6 = $0000CC ; blue +!set RGB_2_7 = $FFFF00 ; yellow +!set RGB_2_8 = $FF8800 ; orange +!set RGB_2_9 = $884400 ; brown +!set RGB_2_A = $FF8888 ; light red / pink +!set RGB_2_B = $444444 ; dark grey +!set RGB_2_C = $888888 ; medium grey +!set RGB_2_D = $88FF88 ; light green +!set RGB_2_E = $8888FF ; light blue +!set RGB_2_F = $CCCCCC ; light gray + +; #3 - a VICE emulator palette + +; RRGGBB +!set RGB_3_0 = $000000 ; black +!set RGB_3_1 = $FDFEFC ; white +!set RGB_3_2 = $BE1A24 ; red +!set RGB_3_3 = $30E6C6 ; cyan +!set RGB_3_4 = $B41AE2 ; purple / magenta +!set RGB_3_5 = $1FD21E ; green +!set RGB_3_6 = $211BAE ; blue +!set RGB_3_7 = $DFF60A ; yellow +!set RGB_3_8 = $B84104 ; orange +!set RGB_3_9 = $6A3304 ; brown +!set RGB_3_A = $FE4A57 ; light red / pink +!set RGB_3_B = $424540 ; dark grey +!set RGB_3_C = $70746F ; medium grey +!set RGB_3_D = $59FE59 ; light green +!set RGB_3_E = $5F53FE ; light blue +!set RGB_3_F = $A4A7A2 ; light gray + +; #4 - a Colodore palette, values taken from VICE emulator, based on http://www.colodore.com/ + +; RRGGBB +!set RGB_4_0 = $000000 ; black +!set RGB_4_1 = $FFFFFF ; white +!set RGB_4_2 = $96282E ; red +!set RGB_4_3 = $5BD6CE ; cyan +!set RGB_4_4 = $9F2DAD ; purple / magenta +!set RGB_4_5 = $41B936 ; green +!set RGB_4_6 = $2724C4 ; blue +!set RGB_4_7 = $EFF347 ; yellow +!set RGB_4_8 = $9F4815 ; orange +!set RGB_4_9 = $5E3500 ; brown +!set RGB_4_A = $DA5F66 ; light red / pink +!set RGB_4_B = $474747 ; dark grey +!set RGB_4_C = $787878 ; medium grey +!set RGB_4_D = $91FF84 ; light green +!set RGB_4_E = $6864FF ; light blue +!set RGB_4_F = $AEAEAE ; light gray + +; #5 - a Deekay palette, values taken from VICE emulator + +; RRGGBB +!set RGB_5_0 = $000000 ; black +!set RGB_5_1 = $FFFFFF ; white +!set RGB_5_2 = $882000 ; red +!set RGB_5_3 = $68D0A8 ; cyan +!set RGB_5_4 = $A838A0 ; purple / magenta +!set RGB_5_5 = $50B818 ; green +!set RGB_5_6 = $181090 ; blue +!set RGB_5_7 = $F0E858 ; yellow +!set RGB_5_8 = $A04800 ; orange +!set RGB_5_9 = $472B1B ; brown +!set RGB_5_A = $C87870 ; light red / pink +!set RGB_5_B = $484848 ; dark grey +!set RGB_5_C = $808080 ; medium grey +!set RGB_5_D = $98FF98 ; light green +!set RGB_5_E = $5090D0 ; light blue +!set RGB_5_F = $B8B8B8 ; light gray + + +; Macros to convert colors to C65/M65 palette / greyscale palette (CCIR 601 conversion) + +!macro RGB_R .x { !byte ((((^.x & $0F) * $10) + ((^.x & $F0) / $10)) & %11101111) } +!macro RGB_G .x { !byte (((>.x & $0F) * $10) + ((>.x & $F0) / $10)) } +!macro RGB_B .x { !byte (((<.x & $0F) * $10) + ((<.x & $F0) / $10)) } + +!macro GSCAL .x { + !set tmp = int(0.2989 * (^.x) + 0.5870 * (>.x) + 0.1140 * (<.x)) + !if (tmp > $FF) { !set tmp = $FF } + !byte (((tmp & $0F) * $10) + ((tmp & $F0) / $10)) & %11101111 +} + +; Set 1 + +m65_colorset_1: + + +RGB_R RGB_1_0 + +RGB_R RGB_1_1 + +RGB_R RGB_1_2 + +RGB_R RGB_1_3 + +RGB_R RGB_1_4 + +RGB_R RGB_1_5 + +RGB_R RGB_1_6 + +RGB_R RGB_1_7 + +RGB_R RGB_1_8 + +RGB_R RGB_1_9 + +RGB_R RGB_1_A + +RGB_R RGB_1_B + +RGB_R RGB_1_C + +RGB_R RGB_1_D + +RGB_R RGB_1_E + +RGB_R RGB_1_F + + +RGB_G RGB_1_0 + +RGB_G RGB_1_1 + +RGB_G RGB_1_2 + +RGB_G RGB_1_3 + +RGB_G RGB_1_4 + +RGB_G RGB_1_5 + +RGB_G RGB_1_6 + +RGB_G RGB_1_7 + +RGB_G RGB_1_8 + +RGB_G RGB_1_9 + +RGB_G RGB_1_A + +RGB_G RGB_1_B + +RGB_G RGB_1_C + +RGB_G RGB_1_D + +RGB_G RGB_1_E + +RGB_G RGB_1_F + + +RGB_B RGB_1_0 + +RGB_B RGB_1_1 + +RGB_B RGB_1_2 + +RGB_B RGB_1_3 + +RGB_B RGB_1_4 + +RGB_B RGB_1_5 + +RGB_B RGB_1_6 + +RGB_B RGB_1_7 + +RGB_B RGB_1_8 + +RGB_B RGB_1_9 + +RGB_B RGB_1_A + +RGB_B RGB_1_B + +RGB_B RGB_1_C + +RGB_B RGB_1_D + +RGB_B RGB_1_E + +RGB_B RGB_1_F + + +GSCAL RGB_1_0 + +GSCAL RGB_1_1 + +GSCAL RGB_1_2 + +GSCAL RGB_1_3 + +GSCAL RGB_1_4 + +GSCAL RGB_1_5 + +GSCAL RGB_1_6 + +GSCAL RGB_1_7 + +GSCAL RGB_1_8 + +GSCAL RGB_1_9 + +GSCAL RGB_1_A + +GSCAL RGB_1_B + +GSCAL RGB_1_C + +GSCAL RGB_1_D + +GSCAL RGB_1_E + +GSCAL RGB_1_F + +; Set 2 + +m65_colorset_2: + + +RGB_R RGB_2_0 + +RGB_R RGB_2_1 + +RGB_R RGB_2_2 + +RGB_R RGB_2_3 + +RGB_R RGB_2_4 + +RGB_R RGB_2_5 + +RGB_R RGB_2_6 + +RGB_R RGB_2_7 + +RGB_R RGB_2_8 + +RGB_R RGB_2_9 + +RGB_R RGB_2_A + +RGB_R RGB_2_B + +RGB_R RGB_2_C + +RGB_R RGB_2_D + +RGB_R RGB_2_E + +RGB_R RGB_2_F + + +RGB_G RGB_2_0 + +RGB_G RGB_2_1 + +RGB_G RGB_2_2 + +RGB_G RGB_2_3 + +RGB_G RGB_2_4 + +RGB_G RGB_2_5 + +RGB_G RGB_2_6 + +RGB_G RGB_2_7 + +RGB_G RGB_2_8 + +RGB_G RGB_2_9 + +RGB_G RGB_2_A + +RGB_G RGB_2_B + +RGB_G RGB_2_C + +RGB_G RGB_2_D + +RGB_G RGB_2_E + +RGB_G RGB_2_F + + +RGB_B RGB_2_0 + +RGB_B RGB_2_1 + +RGB_B RGB_2_2 + +RGB_B RGB_2_3 + +RGB_B RGB_2_4 + +RGB_B RGB_2_5 + +RGB_B RGB_2_6 + +RGB_B RGB_2_7 + +RGB_B RGB_2_8 + +RGB_B RGB_2_9 + +RGB_B RGB_2_A + +RGB_B RGB_2_B + +RGB_B RGB_2_C + +RGB_B RGB_2_D + +RGB_B RGB_2_E + +RGB_B RGB_2_F + + +GSCAL RGB_2_0 + +GSCAL RGB_2_1 + +GSCAL RGB_2_2 + +GSCAL RGB_2_3 + +GSCAL RGB_2_4 + +GSCAL RGB_2_5 + +GSCAL RGB_2_6 + +GSCAL RGB_2_7 + +GSCAL RGB_2_8 + +GSCAL RGB_2_9 + +GSCAL RGB_2_A + +GSCAL RGB_2_B + +GSCAL RGB_2_C + +GSCAL RGB_2_D + +GSCAL RGB_2_E + +GSCAL RGB_2_F + +; Set 3 + +m65_colorset_3: + + +RGB_R RGB_3_0 + +RGB_R RGB_3_1 + +RGB_R RGB_3_2 + +RGB_R RGB_3_3 + +RGB_R RGB_3_4 + +RGB_R RGB_3_5 + +RGB_R RGB_3_6 + +RGB_R RGB_3_7 + +RGB_R RGB_3_8 + +RGB_R RGB_3_9 + +RGB_R RGB_3_A + +RGB_R RGB_3_B + +RGB_R RGB_3_C + +RGB_R RGB_3_D + +RGB_R RGB_3_E + +RGB_R RGB_3_F + + +RGB_G RGB_3_0 + +RGB_G RGB_3_1 + +RGB_G RGB_3_2 + +RGB_G RGB_3_3 + +RGB_G RGB_3_4 + +RGB_G RGB_3_5 + +RGB_G RGB_3_6 + +RGB_G RGB_3_7 + +RGB_G RGB_3_8 + +RGB_G RGB_3_9 + +RGB_G RGB_3_A + +RGB_G RGB_3_B + +RGB_G RGB_3_C + +RGB_G RGB_3_D + +RGB_G RGB_3_E + +RGB_G RGB_3_F + + +RGB_B RGB_3_0 + +RGB_B RGB_3_1 + +RGB_B RGB_3_2 + +RGB_B RGB_3_3 + +RGB_B RGB_3_4 + +RGB_B RGB_3_5 + +RGB_B RGB_3_6 + +RGB_B RGB_3_7 + +RGB_B RGB_3_8 + +RGB_B RGB_3_9 + +RGB_B RGB_3_A + +RGB_B RGB_3_B + +RGB_B RGB_3_C + +RGB_B RGB_3_D + +RGB_B RGB_3_E + +RGB_B RGB_3_F + + +GSCAL RGB_3_0 + +GSCAL RGB_3_1 + +GSCAL RGB_3_2 + +GSCAL RGB_3_3 + +GSCAL RGB_3_4 + +GSCAL RGB_3_5 + +GSCAL RGB_3_6 + +GSCAL RGB_3_7 + +GSCAL RGB_3_8 + +GSCAL RGB_3_9 + +GSCAL RGB_3_A + +GSCAL RGB_3_B + +GSCAL RGB_3_C + +GSCAL RGB_3_D + +GSCAL RGB_3_E + +GSCAL RGB_3_F + +; Set 4 + +m65_colorset_4: + + +RGB_R RGB_4_0 + +RGB_R RGB_4_1 + +RGB_R RGB_4_2 + +RGB_R RGB_4_3 + +RGB_R RGB_4_4 + +RGB_R RGB_4_5 + +RGB_R RGB_4_6 + +RGB_R RGB_4_7 + +RGB_R RGB_4_8 + +RGB_R RGB_4_9 + +RGB_R RGB_4_A + +RGB_R RGB_4_B + +RGB_R RGB_4_C + +RGB_R RGB_4_D + +RGB_R RGB_4_E + +RGB_R RGB_4_F + + +RGB_G RGB_4_0 + +RGB_G RGB_4_1 + +RGB_G RGB_4_2 + +RGB_G RGB_4_3 + +RGB_G RGB_4_4 + +RGB_G RGB_4_5 + +RGB_G RGB_4_6 + +RGB_G RGB_4_7 + +RGB_G RGB_4_8 + +RGB_G RGB_4_9 + +RGB_G RGB_4_A + +RGB_G RGB_4_B + +RGB_G RGB_4_C + +RGB_G RGB_4_D + +RGB_G RGB_4_E + +RGB_G RGB_4_F + + +RGB_B RGB_4_0 + +RGB_B RGB_4_1 + +RGB_B RGB_4_2 + +RGB_B RGB_4_3 + +RGB_B RGB_4_4 + +RGB_B RGB_4_5 + +RGB_B RGB_4_6 + +RGB_B RGB_4_7 + +RGB_B RGB_4_8 + +RGB_B RGB_4_9 + +RGB_B RGB_4_A + +RGB_B RGB_4_B + +RGB_B RGB_4_C + +RGB_B RGB_4_D + +RGB_B RGB_4_E + +RGB_B RGB_4_F + + +GSCAL RGB_4_0 + +GSCAL RGB_4_1 + +GSCAL RGB_4_2 + +GSCAL RGB_4_3 + +GSCAL RGB_4_4 + +GSCAL RGB_4_5 + +GSCAL RGB_4_6 + +GSCAL RGB_4_7 + +GSCAL RGB_4_8 + +GSCAL RGB_4_9 + +GSCAL RGB_4_A + +GSCAL RGB_4_B + +GSCAL RGB_4_C + +GSCAL RGB_4_D + +GSCAL RGB_4_E + +GSCAL RGB_4_F + +; Set 5 + +m65_colorset_5: + + +RGB_R RGB_5_0 + +RGB_R RGB_5_1 + +RGB_R RGB_5_2 + +RGB_R RGB_5_3 + +RGB_R RGB_5_4 + +RGB_R RGB_5_5 + +RGB_R RGB_5_6 + +RGB_R RGB_5_7 + +RGB_R RGB_5_8 + +RGB_R RGB_5_9 + +RGB_R RGB_5_A + +RGB_R RGB_5_B + +RGB_R RGB_5_C + +RGB_R RGB_5_D + +RGB_R RGB_5_E + +RGB_R RGB_5_F + + +RGB_G RGB_5_0 + +RGB_G RGB_5_1 + +RGB_G RGB_5_2 + +RGB_G RGB_5_3 + +RGB_G RGB_5_4 + +RGB_G RGB_5_5 + +RGB_G RGB_5_6 + +RGB_G RGB_5_7 + +RGB_G RGB_5_8 + +RGB_G RGB_5_9 + +RGB_G RGB_5_A + +RGB_G RGB_5_B + +RGB_G RGB_5_C + +RGB_G RGB_5_D + +RGB_G RGB_5_E + +RGB_G RGB_5_F + + +RGB_B RGB_5_0 + +RGB_B RGB_5_1 + +RGB_B RGB_5_2 + +RGB_B RGB_5_3 + +RGB_B RGB_5_4 + +RGB_B RGB_5_5 + +RGB_B RGB_5_6 + +RGB_B RGB_5_7 + +RGB_B RGB_5_8 + +RGB_B RGB_5_9 + +RGB_B RGB_5_A + +RGB_B RGB_5_B + +RGB_B RGB_5_C + +RGB_B RGB_5_D + +RGB_B RGB_5_E + +RGB_B RGB_5_F + + +GSCAL RGB_5_0 + +GSCAL RGB_5_1 + +GSCAL RGB_5_2 + +GSCAL RGB_5_3 + +GSCAL RGB_5_4 + +GSCAL RGB_5_5 + +GSCAL RGB_5_6 + +GSCAL RGB_5_7 + +GSCAL RGB_5_8 + +GSCAL RGB_5_9 + +GSCAL RGB_5_A + +GSCAL RGB_5_B + +GSCAL RGB_5_C + +GSCAL RGB_5_D + +GSCAL RGB_5_E + +GSCAL RGB_5_F diff --git a/src/kernal/board_m65/mega65_modeset.s b/src/kernal/board_m65/mega65_modeset.s index 8495b111..f7d5a637 100644 --- a/src/kernal/board_m65/mega65_modeset.s +++ b/src/kernal/board_m65/mega65_modeset.s @@ -67,7 +67,7 @@ m65_mode65: jsr vicii_init jsr viciv_init - jsr m65_reset_palette + jsr m65_colorset_reset ; Initialize various memory structures diff --git a/src/kernal/board_m65/mega65_reset_palette.s b/src/kernal/board_m65/mega65_reset_palette.s deleted file mode 100644 index 4ad9f0df..00000000 --- a/src/kernal/board_m65/mega65_reset_palette.s +++ /dev/null @@ -1,244 +0,0 @@ -;; #LAYOUT# M65 KERNAL_1 #TAKE -;; #LAYOUT# * * #IGNORE - - - -!if (CONFIG_VIC_PALETTE = 0) { !set CONFIG_VIC_PALETTE = 4 } ; override palette to default value - -!if (CONFIG_VIC_PALETTE = 1) { - - ; Original C65 palette, taken from C65 manual - - ; RRGGBB - !set RGB_0 = $000000 ; black - !set RGB_1 = $FFFFFF ; white - !set RGB_2 = $FF0000 ; red - !set RGB_3 = $00FFFF ; cyan - !set RGB_4 = $FF00FF ; purple / magenta - !set RGB_5 = $00FF00 ; green - !set RGB_6 = $0000FF ; blue - !set RGB_7 = $FFFF00 ; yellow - !set RGB_8 = $FF6600 ; orange - !set RGB_9 = $AA4400 ; brown - !set RGB_A = $FF7777 ; light red / pink - !set RGB_B = $555555 ; dark grey - !set RGB_C = $888888 ; medium grey - !set RGB_D = $99FF99 ; light green - !set RGB_E = $9999FF ; light blue - !set RGB_F = $BBBBBB ; light gray - -} else if (CONFIG_VIC_PALETTE = 2) { - - ; A Colodore palette, values taken from VICE emulator - ; Based on http://www.colodore.com/ - - ; RRGGBB - !set RGB_0 = $000000 ; black - !set RGB_1 = $FFFFFF ; white - !set RGB_2 = $96282E ; red - !set RGB_3 = $5BD6CE ; cyan - !set RGB_4 = $9F2DAD ; purple / magenta - !set RGB_5 = $41B936 ; green - !set RGB_6 = $2724C4 ; blue - !set RGB_7 = $EFF347 ; yellow - !set RGB_8 = $9F4815 ; orange - !set RGB_9 = $5E3500 ; brown - !set RGB_A = $DA5F66 ; light red / pink - !set RGB_B = $474747 ; dark grey - !set RGB_C = $787878 ; medium grey - !set RGB_D = $91FF84 ; light green - !set RGB_E = $6864FF ; light blue - !set RGB_F = $AEAEAE ; light gray - -} else if (CONFIG_VIC_PALETTE = 3) { - - ; A VICE emulator palette - - ; RRGGBB - !set RGB_0 = $000000 ; black - !set RGB_1 = $FDFEFC ; white - !set RGB_2 = $BE1A24 ; red - !set RGB_3 = $30E6C6 ; cyan - !set RGB_4 = $B41AE2 ; purple / magenta - !set RGB_5 = $1FD21E ; green - !set RGB_6 = $211BAE ; blue - !set RGB_7 = $DFF60A ; yellow - !set RGB_8 = $B84104 ; orange - !set RGB_9 = $6A3304 ; brown - !set RGB_A = $FE4A57 ; light red / pink - !set RGB_B = $424540 ; dark grey - !set RGB_C = $70746F ; medium grey - !set RGB_D = $59FE59 ; light green - !set RGB_E = $5F53FE ; light blue - !set RGB_F = $A4A7A2 ; light gray - -} else if (CONFIG_VIC_PALETTE = 4) { - - ; A Frodo palette, values taken from VICE emulator - - ; RRGGBB - !set RGB_0 = $000000 ; black - !set RGB_1 = $FDFEFC ; white - !set RGB_2 = $BE1A24 ; red - !set RGB_3 = $30E6C6 ; cyan - !set RGB_4 = $B41AE2 ; purple / magenta - !set RGB_5 = $1FD21E ; green - !set RGB_6 = $211BAE ; blue - !set RGB_7 = $DFF60A ; yellow - !set RGB_8 = $B84104 ; orange - !set RGB_9 = $6A3304 ; brown - !set RGB_A = $FE4A57 ; light red / pink - !set RGB_B = $424540 ; dark grey - !set RGB_C = $70746F ; medium grey - !set RGB_D = $59FE59 ; light green - !set RGB_E = $5F53FE ; light blue - !set RGB_F = $A4A7A2 ; light gray - - -} else if (CONFIG_VIC_PALETTE = 5) { - - ; A Deekay palette, values taken from VICE emulator - - - ; RRGGBB - !set RGB_0 = $000000 ; black - !set RGB_1 = $FFFFFF ; white - !set RGB_2 = $882000 ; red - !set RGB_3 = $68D0A8 ; cyan - !set RGB_4 = $A838A0 ; purple / magenta - !set RGB_5 = $50B818 ; green - !set RGB_6 = $181090 ; blue - !set RGB_7 = $F0E858 ; yellow - !set RGB_8 = $A04800 ; orange - !set RGB_9 = $472B1B ; brown - !set RGB_A = $C87870 ; light red / pink - !set RGB_B = $484848 ; dark grey - !set RGB_C = $808080 ; medium grey - !set RGB_D = $98FF98 ; light green - !set RGB_E = $5090D0 ; light blue - !set RGB_F = $B8B8B8 ; light gray - -} else { !error "Unknown palette ID" } - - - -m65_reset_palette: - - ; Enable RAM palette - - lda VIC_CTRLA - ora #$04 - sta VIC_CTRLA - - - ; XXX loop instead - - lda #%11000000 - sta VIC_PALSEL - jsr m65_reset_palette_selected - - lda #%10000000 - sta VIC_PALSEL - jsr m65_reset_palette_selected - - lda #%01000000 - sta VIC_PALSEL - jsr m65_reset_palette_selected - - lda #%00000000 - sta VIC_PALSEL - jsr m65_reset_palette_selected - - rts - -m65_reset_palette_selected: - - ; First clear the entire palette - - lda #$00 - ldx #$00 -@1: - sta PALETTE_R, x - sta PALETTE_G, x - sta PALETTE_B, x - - inx - bne @1 - - ; Now set default colors - - ldx #$0F -@2: - lda m65_COL_R,x - sta $D100, x - lda m65_COL_G,x - sta $D200, x - lda m65_COL_B,x - sta $D300, x - dex - bpl @2 - - rts - -; Macros to convert colors to C65/M65 palette - -!macro COL_R .x { !byte ((((^.x & $0F) * $10) + ((^.x & $F0) / $10)) & %11101111) } -!macro COL_G .x { !byte (((>.x & $0F) * $10) + ((>.x & $F0) / $10)) } -!macro COL_B .x { !byte (((<.x & $0F) * $10) + ((<.x & $F0) / $10)) } - -m65_COL_R: - - +COL_R RGB_0 - +COL_R RGB_1 - +COL_R RGB_2 - +COL_R RGB_3 - +COL_R RGB_4 - +COL_R RGB_5 - +COL_R RGB_6 - +COL_R RGB_7 - +COL_R RGB_8 - +COL_R RGB_9 - +COL_R RGB_A - +COL_R RGB_B - +COL_R RGB_C - +COL_R RGB_D - +COL_R RGB_E - +COL_R RGB_F - -m65_COL_G: - - +COL_G RGB_0 - +COL_G RGB_1 - +COL_G RGB_2 - +COL_G RGB_3 - +COL_G RGB_4 - +COL_G RGB_5 - +COL_G RGB_6 - +COL_G RGB_7 - +COL_G RGB_8 - +COL_G RGB_9 - +COL_G RGB_A - +COL_G RGB_B - +COL_G RGB_C - +COL_G RGB_D - +COL_G RGB_E - +COL_G RGB_F - -m65_COL_B: - - +COL_B RGB_0 - +COL_B RGB_1 - +COL_B RGB_2 - +COL_B RGB_3 - +COL_B RGB_4 - +COL_B RGB_5 - +COL_B RGB_6 - +COL_B RGB_7 - +COL_B RGB_8 - +COL_B RGB_9 - +COL_B RGB_A - +COL_B RGB_B - +COL_B RGB_C - +COL_B RGB_D - +COL_B RGB_E - +COL_B RGB_F diff --git a/src/kernal/jumptable_m65/mega65__jumptable.s b/src/kernal/jumptable_m65/mega65__jumptable.s index c54021bd..cf50d1e8 100644 --- a/src/kernal/jumptable_m65/mega65__jumptable.s +++ b/src/kernal/jumptable_m65/mega65__jumptable.s @@ -34,4 +34,4 @@ M65_JSETWIN_N: M65_JSETWIN_Y: jsr M65_SETWIN_Y -; XXX add M65_HOME +; XXX add M65_HOME, m65_colorset diff --git a/tools/generate_strings.cc b/tools/generate_strings.cc index 113a2bf6..dc9cc2e1 100644 --- a/tools/generate_strings.cc +++ b/tools/generate_strings.cc @@ -203,6 +203,7 @@ const StringEntryList GLOBAL_Keywords_04 = { ListType::KEYWORDS, "keywords_04", { false, false, true, false, false, "K04_02", "MONITOR", }, // Amos Professional Manual, Command Index { false, false, true, false, false, "K04_03", "BOOTCPM", }, // Not present in CBM BASIC dialects, Open ROMs specific { false, false, true, false, false, "K04_04", "JOYCRSR", }, // Not present in CBM BASIC dialects, Open ROMs specific + { false, false, true, false, false, "K04_05", "COLORSET", }, // Not present in CBM BASIC dialects, Open ROMs specific } }; From 15ef8704e3f6c0bd972923c062dddd7b073d69fe Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 26 Dec 2020 22:15:11 +0100 Subject: [PATCH 077/257] palette handling improvements --- src/kernal/board_m65/4000.mega65_vectable_kernal_1.s | 4 +++- src/kernal/board_m65/mega65_colorset.s | 4 ++++ src/kernal/board_m65/mega65_modeset.s | 1 - src/kernal/board_m65/mega65_reset_part.s | 3 +++ 4 files changed, 10 insertions(+), 2 deletions(-) diff --git a/src/kernal/board_m65/4000.mega65_vectable_kernal_1.s b/src/kernal/board_m65/4000.mega65_vectable_kernal_1.s index ec3a1fb8..1034196f 100644 --- a/src/kernal/board_m65/4000.mega65_vectable_kernal_1.s +++ b/src/kernal/board_m65/4000.mega65_vectable_kernal_1.s @@ -27,7 +27,8 @@ !addr VK1__M65_CLRWIN = $4000 + 2 * 13 !addr VK1__m65_screen_upd_txtrow_off = $4000 + 2 * 14 !addr VK1__m65_shadow_BZP = $4000 + 2 * 15 - !addr VK1__m65_colorset = $4000 + 2 * 16 + !addr VK1__m65_colorset_reset = $4000 + 2 * 16 + !addr VK1__m65_colorset = $4000 + 2 * 17 } else { @@ -63,5 +64,6 @@ !word M65_CLRWIN !word m65_screen_upd_txtrow_off !word m65_shadow_BZP + !word m65_colorset_reset !word m65_colorset } diff --git a/src/kernal/board_m65/mega65_colorset.s b/src/kernal/board_m65/mega65_colorset.s index 640096ca..2723f8f6 100644 --- a/src/kernal/board_m65/mega65_colorset.s +++ b/src/kernal/board_m65/mega65_colorset.s @@ -16,6 +16,10 @@ m65_colorset: m65_colorset_reset: + ; Make sure VIC-IV is unlocked + + jsr viciv_unhide + ; Enable RAM palette lda VIC_CTRLA diff --git a/src/kernal/board_m65/mega65_modeset.s b/src/kernal/board_m65/mega65_modeset.s index f7d5a637..c02eb04a 100644 --- a/src/kernal/board_m65/mega65_modeset.s +++ b/src/kernal/board_m65/mega65_modeset.s @@ -67,7 +67,6 @@ m65_mode65: jsr vicii_init jsr viciv_init - jsr m65_colorset_reset ; Initialize various memory structures diff --git a/src/kernal/board_m65/mega65_reset_part.s b/src/kernal/board_m65/mega65_reset_part.s index a687df09..abc943a2 100644 --- a/src/kernal/board_m65/mega65_reset_part.s +++ b/src/kernal/board_m65/mega65_reset_part.s @@ -6,7 +6,10 @@ m65_reset_part: + jsr map_KERNAL_1 + jsr (VK1__m65_colorset_reset) jsr map_NORMAL ; we want normal memory mapping + jsr viciv_shutdown ; by default we do not want the VIC-IV jsr M65_MODEGET From 15af5033e4ff14ce84b0c4a1e74277a6482e125e Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 26 Dec 2020 22:28:14 +0100 Subject: [PATCH 078/257] added 1 more color palette --- src/,,config_mega65.s | 2 +- src/kernal/board_m65/mega65_colorset.s | 3 +- src/kernal/board_m65/mega65_colorset_assets.s | 131 +++++++++++++++--- 3 files changed, 114 insertions(+), 22 deletions(-) diff --git a/src/,,config_mega65.s b/src/,,config_mega65.s index ae76fe61..dbf5f316 100644 --- a/src/,,config_mega65.s +++ b/src/,,config_mega65.s @@ -77,7 +77,7 @@ ; --- Screen editor ;; #CONFIG# EDIT_STOPQUOTE YES -;; #CONFIG# VIC_PALETTE 0 ; 0 = default; 1 = C65, 2 = Frodo, 3 = VICE, 4 = Colodore, 5 = Deekay +;; #CONFIG# VIC_PALETTE 0 ; 0 = default; 1 = C65, 2 = Frodo, 3 = VICE, 4 = Colodore, 5 = community, 6 = Deekay ; --- Software features diff --git a/src/kernal/board_m65/mega65_colorset.s b/src/kernal/board_m65/mega65_colorset.s index 2723f8f6..ce07c219 100644 --- a/src/kernal/board_m65/mega65_colorset.s +++ b/src/kernal/board_m65/mega65_colorset.s @@ -59,7 +59,7 @@ m65_colorset: ; entry point for BASIC; .A - palette, where bit 7 selects greysca asl php - cmp #($06 * 2) + cmp #($07 * 2) bcs m65_colorset_error ; Prepare pointer to palette @@ -183,4 +183,5 @@ m65_colorset_presets: !word m65_colorset_3 !word m65_colorset_4 !word m65_colorset_5 + !word m65_colorset_6 } diff --git a/src/kernal/board_m65/mega65_colorset_assets.s b/src/kernal/board_m65/mega65_colorset_assets.s index d1001ed7..69c001e1 100644 --- a/src/kernal/board_m65/mega65_colorset_assets.s +++ b/src/kernal/board_m65/mega65_colorset_assets.s @@ -4,7 +4,7 @@ ; #1 - original C65 palette, data taken from C65 manual -; RRGGBB +; RRGGBB !set RGB_1_0 = $000000 ; black !set RGB_1_1 = $FFFFFF ; white !set RGB_1_2 = $FF0000 ; red @@ -24,7 +24,7 @@ ; #2 - a Frodo palette, values taken from VICE emulator -; RRGGBB +; RRGGBB !set RGB_2_0 = $000000 ; black !set RGB_2_1 = $FFFFFF ; white !set RGB_2_2 = $CC0000 ; red @@ -44,7 +44,7 @@ ; #3 - a VICE emulator palette -; RRGGBB +; RRGGBB !set RGB_3_0 = $000000 ; black !set RGB_3_1 = $FDFEFC ; white !set RGB_3_2 = $BE1A24 ; red @@ -64,7 +64,7 @@ ; #4 - a Colodore palette, values taken from VICE emulator, based on http://www.colodore.com/ -; RRGGBB +; RRGGBB !set RGB_4_0 = $000000 ; black !set RGB_4_1 = $FFFFFF ; white !set RGB_4_2 = $96282E ; red @@ -82,26 +82,45 @@ !set RGB_4_E = $6864FF ; light blue !set RGB_4_F = $AEAEAE ; light gray -; #5 - a Deekay palette, values taken from VICE emulator +; #5 - a community palette, values taken from VICE emulator, based on https://p1x3l.net/36/c64-community-colors-theor/ -; RRGGBB +; RRGGBB !set RGB_5_0 = $000000 ; black !set RGB_5_1 = $FFFFFF ; white -!set RGB_5_2 = $882000 ; red -!set RGB_5_3 = $68D0A8 ; cyan -!set RGB_5_4 = $A838A0 ; purple / magenta -!set RGB_5_5 = $50B818 ; green -!set RGB_5_6 = $181090 ; blue -!set RGB_5_7 = $F0E858 ; yellow -!set RGB_5_8 = $A04800 ; orange -!set RGB_5_9 = $472B1B ; brown -!set RGB_5_A = $C87870 ; light red / pink -!set RGB_5_B = $484848 ; dark grey -!set RGB_5_C = $808080 ; medium grey -!set RGB_5_D = $98FF98 ; light green -!set RGB_5_E = $5090D0 ; light blue -!set RGB_5_F = $B8B8B8 ; light gray +!set RGB_5_2 = $AF2A29 ; red +!set RGB_5_3 = $62D8CC ; cyan +!set RGB_5_4 = $B03FB6 ; purple / magenta +!set RGB_5_5 = $4AC64A ; green +!set RGB_5_6 = $3739C4 ; blue +!set RGB_5_7 = $E4ED4E ; yellow +!set RGB_5_8 = $B6591C ; orange +!set RGB_5_9 = $683808 ; brown +!set RGB_5_A = $EA746C ; light red / pink +!set RGB_5_B = $4D4D4D ; dark grey +!set RGB_5_C = $848484 ; medium grey +!set RGB_5_D = $A6FA9E ; light green +!set RGB_5_E = $707CE6 ; light blue +!set RGB_5_F = $B6B6B5 ; light gray +; #6 - a Deekay palette, values taken from VICE emulator + +; RRGGBB +!set RGB_6_0 = $000000 ; black +!set RGB_6_1 = $FFFFFF ; white +!set RGB_6_2 = $882000 ; red +!set RGB_6_3 = $68D0A8 ; cyan +!set RGB_6_4 = $A838A0 ; purple / magenta +!set RGB_6_5 = $50B818 ; green +!set RGB_6_6 = $181090 ; blue +!set RGB_6_7 = $F0E858 ; yellow +!set RGB_6_8 = $A04800 ; orange +!set RGB_6_9 = $472B1B ; brown +!set RGB_6_A = $C87870 ; light red / pink +!set RGB_6_B = $484848 ; dark grey +!set RGB_6_C = $808080 ; medium grey +!set RGB_6_D = $98FF98 ; light green +!set RGB_6_E = $5090D0 ; light blue +!set RGB_6_F = $B8B8B8 ; light gray ; Macros to convert colors to C65/M65 palette / greyscale palette (CCIR 601 conversion) @@ -474,3 +493,75 @@ m65_colorset_5: +GSCAL RGB_5_D +GSCAL RGB_5_E +GSCAL RGB_5_F + +; Set 6 + +m65_colorset_6: + + +RGB_R RGB_6_0 + +RGB_R RGB_6_1 + +RGB_R RGB_6_2 + +RGB_R RGB_6_3 + +RGB_R RGB_6_4 + +RGB_R RGB_6_5 + +RGB_R RGB_6_6 + +RGB_R RGB_6_7 + +RGB_R RGB_6_8 + +RGB_R RGB_6_9 + +RGB_R RGB_6_A + +RGB_R RGB_6_B + +RGB_R RGB_6_C + +RGB_R RGB_6_D + +RGB_R RGB_6_E + +RGB_R RGB_6_F + + +RGB_G RGB_6_0 + +RGB_G RGB_6_1 + +RGB_G RGB_6_2 + +RGB_G RGB_6_3 + +RGB_G RGB_6_4 + +RGB_G RGB_6_5 + +RGB_G RGB_6_6 + +RGB_G RGB_6_7 + +RGB_G RGB_6_8 + +RGB_G RGB_6_9 + +RGB_G RGB_6_A + +RGB_G RGB_6_B + +RGB_G RGB_6_C + +RGB_G RGB_6_D + +RGB_G RGB_6_E + +RGB_G RGB_6_F + + +RGB_B RGB_6_0 + +RGB_B RGB_6_1 + +RGB_B RGB_6_2 + +RGB_B RGB_6_3 + +RGB_B RGB_6_4 + +RGB_B RGB_6_5 + +RGB_B RGB_6_6 + +RGB_B RGB_6_7 + +RGB_B RGB_6_8 + +RGB_B RGB_6_9 + +RGB_B RGB_6_A + +RGB_B RGB_6_B + +RGB_B RGB_6_C + +RGB_B RGB_6_D + +RGB_B RGB_6_E + +RGB_B RGB_6_F + + +GSCAL RGB_6_0 + +GSCAL RGB_6_1 + +GSCAL RGB_6_2 + +GSCAL RGB_6_3 + +GSCAL RGB_6_4 + +GSCAL RGB_6_5 + +GSCAL RGB_6_6 + +GSCAL RGB_6_7 + +GSCAL RGB_6_8 + +GSCAL RGB_6_9 + +GSCAL RGB_6_A + +GSCAL RGB_6_B + +GSCAL RGB_6_C + +GSCAL RGB_6_D + +GSCAL RGB_6_E + +GSCAL RGB_6_F From d453c6fd1debe6c055534b663cb07ff2923c76e1 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 27 Dec 2020 18:59:23 +0100 Subject: [PATCH 079/257] another monitor integration bugfix --- src/mon_m65/mon_get_addr_to_lac.s | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mon_m65/mon_get_addr_to_lac.s b/src/mon_m65/mon_get_addr_to_lac.s index 0ddaa110..cf1084a1 100644 --- a/src/mon_m65/mon_get_addr_to_lac.s +++ b/src/mon_m65/mon_get_addr_to_lac.s @@ -1,6 +1,6 @@ -Get_Addr_To_LAC: ; XXX !!! seems to work correctly for hex only +Get_Addr_To_LAC: ; XXX !!! seems to work incorrectly for decimal phx phy @@ -25,6 +25,7 @@ Get_Addr_To_LAC: ; XXX !!! seems to work correctly for hex only dey bpl @loop_prefix iny ; Y = 0 + dec Buf_Index @valid_prefix: From ffbd593256fa303439e87cd8dc6b4e573236a779 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 27 Dec 2020 19:55:47 +0100 Subject: [PATCH 080/257] monitor integration - more work on memory dump --- src/mon_m65/bsmon.s | 60 ----------------- src/mon_m65/{mon_imports.s => imports.s} | 0 src/mon_m65/mon_command_memory.s | 65 +++++++++++++++++++ ..._to_lac.s => mon_helper_get_addr_to_lac.s} | 0 4 files changed, 65 insertions(+), 60 deletions(-) rename src/mon_m65/{mon_imports.s => imports.s} (100%) create mode 100644 src/mon_m65/mon_command_memory.s rename src/mon_m65/{mon_get_addr_to_lac.s => mon_helper_get_addr_to_lac.s} (100%) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 5234d254..ec73f38c 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -399,64 +399,6 @@ Fetch: AND #$ff RTS -; ********* -Mon_Memory: -; ********* - - lda #$00 - sta Adr_Mode ; by default use C64-style addressing - - jsr Get_Addr_To_LAC ; get 1st parameter (start address) - +beq Mon_Error - jsr LAC_To_LPC ; Long_PC = start address - - jsr Get_Addr_To_LAC ; get 2nd parameter (end address) - bne @got_end_address - jsr LPC_Plus_Page_To_LAC ; set default end address by start plus one page - -@got_end_address: - - jsr LAC_Minus_LPC ; Long_CT = range - +bcc Mon_Error ; error if negative range - -@loop: - - jsr Print_CR ; XXX for debug only - lda Long_CT+3 - jsr Print_Hex - lda Long_CT+2 - jsr Print_Hex - lda Long_CT+1 - jsr Print_Hex - lda Long_CT+0 - jsr Print_Hex - - jsr Dump_Row - - jsr Print_CR ; XXX for debug only - lda Long_CT+3 - jsr Print_Hex - lda Long_CT+2 - jsr Print_Hex - lda Long_CT+1 - jsr Print_Hex - lda Long_CT+0 - jsr Print_Hex - jsr Print_CR - - jsr STOP - beq @exit - - - ; !!! loop till end reached - - - - - -@exit: - - jmp Main ; ********* @@ -623,8 +565,6 @@ Dump_4_Chars: ; XXX to be adapted Dump_Row: ; ******* - JSR Set_MODE_80 - PHZ JSR Print_CR LDA #'>' diff --git a/src/mon_m65/mon_imports.s b/src/mon_m65/imports.s similarity index 100% rename from src/mon_m65/mon_imports.s rename to src/mon_m65/imports.s diff --git a/src/mon_m65/mon_command_memory.s b/src/mon_m65/mon_command_memory.s new file mode 100644 index 00000000..2e460cbe --- /dev/null +++ b/src/mon_m65/mon_command_memory.s @@ -0,0 +1,65 @@ + +Mon_Memory: + + jsr Set_MODE_80 + lda #$00 + sta Adr_Mode ; by default use C64-style addressing + + jsr Get_Addr_To_LAC ; get 1st parameter (start address) + +beq Mon_Error + jsr LAC_To_LPC ; Long_PC = start address + + jsr Get_Addr_To_LAC ; get 2nd parameter (end address) + bne @calcdiff + + lda #$10 ; by default display 16 rows + sta Long_CT+0 + lda #$00 + sta Long_CT+1 + sta Long_CT+2 + sta Long_CT+3 + + bra @loop + +@calcdiff: + jsr LAC_Minus_LPC ; Long_CT = range + +bcc Mon_Error ; error if negative range + + ldx #$04 ; for 80 character mode - 16 (2^4) bytes/line + bbr7 MODE_80,@shift + dex ; for 40 character mode - 8 (2^3) bytes/line + +@shift: + clc + ror Long_CT+3 + ror Long_CT+2 + ror Long_CT+1 + ror Long_CT+0 + + dex + bne @shift ; at the ned of loop Long_CT contains number of rows to show minus 1 + +@loop: + + jsr Dump_Row + jsr STOP + beq @exit ; end if STOP pressed + + sec ; XXX consider moving this to separate subroutine + lda Long_CT+0 + sbc #$01 + sta Long_CT+0 + lda Long_CT+1 + sbc #$00 + sta Long_CT+1 + lda Long_CT+2 + sbc #$00 + sta Long_CT+2 + lda Long_CT+3 + sbc #$00 + sta Long_CT+3 + bcs @loop + +@exit: + + jmp Main diff --git a/src/mon_m65/mon_get_addr_to_lac.s b/src/mon_m65/mon_helper_get_addr_to_lac.s similarity index 100% rename from src/mon_m65/mon_get_addr_to_lac.s rename to src/mon_m65/mon_helper_get_addr_to_lac.s From a19f6f6619d2ec0a2797816e3031a4923440b778 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 27 Dec 2020 21:16:23 +0100 Subject: [PATCH 081/257] implemented first escape sequences --- .../screen_m65/mega65_chrout_screen_escmode.s | 42 ++++++++++++++++--- .../screen_m65/mega65_screen_tables_misc.s | 4 +- 2 files changed, 38 insertions(+), 8 deletions(-) diff --git a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s b/src/kernal/screen_m65/mega65_chrout_screen_escmode.s index bedbcc91..e93f8eeb 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_escmode.s @@ -9,13 +9,47 @@ m65_chrout_screen_escmode: lda #$00 sta M65_ESCMODE - ; XXX + ; Select subroutine -m65_chrout_screen_escmode_end: + txa + ; XXX cmp #$BD ; SHIFT + '@' + ; XXX beq m65_chrout_esc_AT + sec + sbc #$30 ; '0' + cmp #$2E + bcs m65_chrout_esc_done + + ; XXX add workaround for SHIFT+key + + asl + tax + jmp (m65_chrout_screen_jumptable_escape, x) + +m65_chrout_esc_J: ; move cursor to the beginning of the line + + lda #$00 + sta M65__TXTCOL + bra m65_chrout_esc_done + +m65_chrout_esc_O: ; cancel quote, reverse, underline, flash, etc + + lda COLOR + and #$0F + sta COLOR + + lda #$00 + sta QTSW + sta INSRT + sta RVS + + ; FALLTROUGH + +m65_chrout_esc_done: jmp m65_chrout_screen_done + ; XXX: implement screen routines below: m65_chrout_esc_0: @@ -58,8 +92,6 @@ m65_chrout_esc_H: +nop m65_chrout_esc_I: +nop -m65_chrout_esc_J: - +nop m65_chrout_esc_K: +nop m65_chrout_esc_L: @@ -68,8 +100,6 @@ m65_chrout_esc_M: +nop m65_chrout_esc_N: +nop -m65_chrout_esc_O: - +nop m65_chrout_esc_P: +nop m65_chrout_esc_Q: diff --git a/src/kernal/screen_m65/mega65_screen_tables_misc.s b/src/kernal/screen_m65/mega65_screen_tables_misc.s index 98f7de36..b3b3412a 100644 --- a/src/kernal/screen_m65/mega65_screen_tables_misc.s +++ b/src/kernal/screen_m65/mega65_screen_tables_misc.s @@ -123,8 +123,8 @@ m65_chrout_screen_jumptable_escape: !word m65_chrout_esc_7 !word m65_chrout_esc_8 !word m65_chrout_esc_9 - !word m65_chrout_screen_done ; ':' - !word m65_chrout_screen_done ; ';' + !word m65_chrout_esc_LBR ; ':' + !word m65_chrout_esc_RBR ; ';' !word m65_chrout_screen_done ; '<' !word m65_chrout_screen_done ; '=' !word m65_chrout_screen_done ; '>' From 3c87029cd4153d81fbed9a7799041f9aa0247f8f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 27 Dec 2020 22:36:31 +0100 Subject: [PATCH 082/257] implemented ESC-K and ESC-X --- .../mega65_chrout_screen_control_1.s | 5 +- .../screen_m65/mega65_chrout_screen_escmode.s | 48 ++++++++++++++----- src/kernal/screen_m65/mega65_clrscr.s | 2 +- src/kernal/screen_m65/mega65_clrwin.s | 3 +- src/kernal/screen_m65/mega65_screen_helpers.s | 9 ++++ 5 files changed, 49 insertions(+), 18 deletions(-) diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_1.s b/src/kernal/screen_m65/mega65_chrout_screen_control_1.s index 4a3b62db..dddeb1f9 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control_1.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_1.s @@ -37,10 +37,7 @@ m65_chrout_screen_RETURN: ; RETURN clears quote and insert modes, it also clears reverse flag - lda #$00 - sta QTSW - sta INSRT - sta RVS + jsr m65_screen_clear_special_modes ; Move cursor to the beginning of the next line diff --git a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s b/src/kernal/screen_m65/mega65_chrout_screen_escmode.s index e93f8eeb..3baf87b2 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_escmode.s @@ -31,16 +31,33 @@ m65_chrout_esc_J: ; move cursor to the beginning of the line sta M65__TXTCOL bra m65_chrout_esc_done +m65_chrout_esc_K: ; move cursor after the text within the line XXX update for window mode + + phz + ldx M65_SCRMODE + lda m65_scrtab_txtwidth,x + sta M65__TXTCOL + dec + taz +@1: + lda [M65_LPNT_SCR], z + cmp #$20 ; 'SPACE' + bne @2 + dec M65__TXTCOL + dez + bpl @1 +@2: + plz + lda M65__TXTCOL + cmp m65_scrtab_txtwidth,x + bne m65_chrout_esc_done + dec M65__TXTCOL + bra m65_chrout_esc_done + m65_chrout_esc_O: ; cancel quote, reverse, underline, flash, etc - lda COLOR - and #$0F - sta COLOR - - lda #$00 - sta QTSW - sta INSRT - sta RVS + jsr m65_screen_clear_colorattr + jsr m65_screen_clear_special_modes ; FALLTROUGH @@ -48,6 +65,17 @@ m65_chrout_esc_done: jmp m65_chrout_screen_done +m65_chrout_esc_X: ; cycle through available screen modes + + lda M65_SCRMODE + dec + bpl @1 + lda #$02 +@1: + jsr M65_SCRMODESET + jsr M65_CLRSCR + bra m65_chrout_esc_done + ; XXX: implement screen routines below: @@ -92,8 +120,6 @@ m65_chrout_esc_H: +nop m65_chrout_esc_I: +nop -m65_chrout_esc_K: - +nop m65_chrout_esc_L: +nop m65_chrout_esc_M: @@ -116,8 +142,6 @@ m65_chrout_esc_V: +nop m65_chrout_esc_W: +nop -m65_chrout_esc_X: - +nop m65_chrout_esc_Y: +nop m65_chrout_esc_Z: diff --git a/src/kernal/screen_m65/mega65_clrscr.s b/src/kernal/screen_m65/mega65_clrscr.s index 72d28b9f..03da1239 100644 --- a/src/kernal/screen_m65/mega65_clrscr.s +++ b/src/kernal/screen_m65/mega65_clrscr.s @@ -2,7 +2,7 @@ ;; #LAYOUT# * * #IGNORE -M65_CLRSCR: +M65_CLRSCR: ; XXX consider integrating with M65_SCRMODESET ; Clear additional attributes from the color code diff --git a/src/kernal/screen_m65/mega65_clrwin.s b/src/kernal/screen_m65/mega65_clrwin.s index 4323fa05..6c64b188 100644 --- a/src/kernal/screen_m65/mega65_clrwin.s +++ b/src/kernal/screen_m65/mega65_clrwin.s @@ -7,9 +7,10 @@ M65_CLRWIN: - ; Clear additional attributes from the color code + ; Clear additional attributes from the color code, quote mode, etc. jsr m65_screen_clear_colorattr + jsr m65_screen_clear_special_modes ; Check if windowed mode; if not, go to M65_CLRSCR diff --git a/src/kernal/screen_m65/mega65_screen_helpers.s b/src/kernal/screen_m65/mega65_screen_helpers.s index 5baad989..65db8b5f 100644 --- a/src/kernal/screen_m65/mega65_screen_helpers.s +++ b/src/kernal/screen_m65/mega65_screen_helpers.s @@ -10,6 +10,15 @@ m65_screen_clear_colorattr: rts +m65_screen_clear_special_modes: ; XXX consider integrating with 'm65_screen_clear_colorattr' + + lda #$00 + sta QTSW + sta INSRT + sta RVS + + rts + m65_screen_upd_txtrow_off: From a70cd521f08728924a2ed35711c2329a015e0558 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 27 Dec 2020 23:07:29 +0100 Subject: [PATCH 083/257] workaround for shifted escape sequences --- .../screen_m65/mega65_chrout_screen_escmode.s | 47 +++++++++---------- .../screen_m65/mega65_screen_tables_misc.s | 16 ------- 2 files changed, 21 insertions(+), 42 deletions(-) diff --git a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s b/src/kernal/screen_m65/mega65_chrout_screen_escmode.s index 3baf87b2..8d8a8e0c 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_escmode.s @@ -12,15 +12,30 @@ m65_chrout_screen_escmode: ; Select subroutine txa - ; XXX cmp #$BD ; SHIFT + '@' - ; XXX beq m65_chrout_esc_AT sec - sbc #$30 ; '0' - cmp #$2E - bcs m65_chrout_esc_done + sbc #$40 ; '@' + cmp #$1E + bcc @1 - ; XXX add workaround for SHIFT+key + ; Check for shifted characters + sec + sbc #$20 + beq m65_chrout_esc_done ; $60 - character not supported here + cmp #$1B + bcc @1 + + + ; Check for fgew special shifted characters + cpx #$3A ; colon + beq m65_chrout_esc_LBR + cpx #$3B ; semicolon + beq m65_chrout_esc_RBR + cpx #$DB + beq m65_chrout_esc_AT + + bra m65_chrout_esc_done +@1: asl tax jmp (m65_chrout_screen_jumptable_escape, x) @@ -80,26 +95,6 @@ m65_chrout_esc_X: ; cycle through available screen modes ; XXX: implement screen routines below: -m65_chrout_esc_0: - +nop -m65_chrout_esc_1: - +nop -m65_chrout_esc_2: - +nop -m65_chrout_esc_3: - +nop -m65_chrout_esc_4: - +nop -m65_chrout_esc_5: - +nop -m65_chrout_esc_6: - +nop -m65_chrout_esc_7: - +nop -m65_chrout_esc_8: - +nop -m65_chrout_esc_9: - +nop m65_chrout_esc_AT: +nop m65_chrout_esc_A: diff --git a/src/kernal/screen_m65/mega65_screen_tables_misc.s b/src/kernal/screen_m65/mega65_screen_tables_misc.s index b3b3412a..7fa50574 100644 --- a/src/kernal/screen_m65/mega65_screen_tables_misc.s +++ b/src/kernal/screen_m65/mega65_screen_tables_misc.s @@ -113,22 +113,6 @@ m65_chrout_screen_jumptable: m65_chrout_screen_jumptable_escape: - !word m65_chrout_esc_0 - !word m65_chrout_esc_1 - !word m65_chrout_esc_2 - !word m65_chrout_esc_3 - !word m65_chrout_esc_4 - !word m65_chrout_esc_5 - !word m65_chrout_esc_6 - !word m65_chrout_esc_7 - !word m65_chrout_esc_8 - !word m65_chrout_esc_9 - !word m65_chrout_esc_LBR ; ':' - !word m65_chrout_esc_RBR ; ';' - !word m65_chrout_screen_done ; '<' - !word m65_chrout_screen_done ; '=' - !word m65_chrout_screen_done ; '>' - !word m65_chrout_screen_done ; '?' !word m65_chrout_esc_AT !word m65_chrout_esc_A !word m65_chrout_esc_B From c9484fc7efa6c72b8c89b4d99b281dd386cff7ab Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 28 Dec 2020 15:24:14 +0100 Subject: [PATCH 084/257] more escape sequences implemented --- src/kernal/board_m65/mega65_colorset.s | 21 ++++- src/kernal/board_m65/mega65_colorset_assets.s | 20 +++++ .../screen_m65/mega65_chrout_screen_escmode.s | 76 ++++++++++++++----- 3 files changed, 95 insertions(+), 22 deletions(-) diff --git a/src/kernal/board_m65/mega65_colorset.s b/src/kernal/board_m65/mega65_colorset.s index ce07c219..29e886d4 100644 --- a/src/kernal/board_m65/mega65_colorset.s +++ b/src/kernal/board_m65/mega65_colorset.s @@ -88,16 +88,22 @@ m65_colorset_color: @2: lda (PTR1), y sta PALETTE_R, y + jsr m65_colorset_get_bold + sta PALETTE_R + $10, y jsr m65_colorset_PTR1_inc_16 lda (PTR1), y sta PALETTE_G, y + jsr m65_colorset_get_bold + sta PALETTE_G + $10, y jsr m65_colorset_PTR1_inc_16 lda (PTR1), y sta PALETTE_B, y + jsr m65_colorset_get_bold + sta PALETTE_B + $10, y jsr m65_colorset_PTR1_dec_32 @@ -134,11 +140,15 @@ m65_colorset_greyscale: ldy #$0F @2: lda (PTR1), y - sta PALETTE_R, y sta PALETTE_G, y sta PALETTE_B, y + jsr m65_colorset_get_bold + sta PALETTE_R + $10, y + sta PALETTE_G + $10, y + sta PALETTE_B + $10, y + dey bpl @2 @@ -170,6 +180,15 @@ m65_colorset_PTR1_dec_32: @1: rts +m65_colorset_get_bold: + + phy + lda m65_colorset_bold_tab, y + tay + lda (PTR1), y + ply + + rts m65_colorset_selection: diff --git a/src/kernal/board_m65/mega65_colorset_assets.s b/src/kernal/board_m65/mega65_colorset_assets.s index 69c001e1..149257f2 100644 --- a/src/kernal/board_m65/mega65_colorset_assets.s +++ b/src/kernal/board_m65/mega65_colorset_assets.s @@ -2,6 +2,26 @@ ;; #LAYOUT# * * #IGNORE +m65_colorset_bold_tab: ; color redirection table for bold attribute + + !byte $0B ; black -> dark grey + !byte $0A ; white -> light red + !byte $0A ; red -> light red + !byte $07 ; cyan -> yellow + !byte $0A ; purple -> light red + !byte $0D ; green -> light green + !byte $0E ; blue -> light blue + !byte $0A ; yellow -> light red + !byte $07 ; orange -> yellow + !byte $08 ; brown -> orange + !byte $07 ; light red -> yellow + !byte $0C ; dark grey -> medium grey + !byte $0F ; medium grey -> light grey + !byte $07 ; light green -> yellow + !byte $03 ; ligh blue -> cyan + !byte $01 ; light grey -> white + + ; #1 - original C65 palette, data taken from C65 manual ; RRGGBB diff --git a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s b/src/kernal/screen_m65/mega65_chrout_screen_escmode.s index 8d8a8e0c..21b7ff8a 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_escmode.s @@ -13,7 +13,7 @@ m65_chrout_screen_escmode: txa sec - sbc #$40 ; '@' + sbc #$40 ; '@' cmp #$1E bcc @1 @@ -21,20 +21,20 @@ m65_chrout_screen_escmode: sec sbc #$20 - beq m65_chrout_esc_done ; $60 - character not supported here + beq m65_chrout_esc_done_1 ; $60 - character not supported here cmp #$1B bcc @1 ; Check for fgew special shifted characters - cpx #$3A ; colon - beq m65_chrout_esc_LBR - cpx #$3B ; semicolon - beq m65_chrout_esc_RBR + cpx #$3A ; colon + +beq m65_chrout_esc_LBR + cpx #$3B ; semicolon + +beq m65_chrout_esc_RBR cpx #$DB - beq m65_chrout_esc_AT + +beq m65_chrout_esc_AT - bra m65_chrout_esc_done + bra m65_chrout_esc_done_1 @1: asl tax @@ -44,7 +44,7 @@ m65_chrout_esc_J: ; move cursor to the beginning of the line lda #$00 sta M65__TXTCOL - bra m65_chrout_esc_done + bra m65_chrout_esc_done_1 m65_chrout_esc_K: ; move cursor after the text within the line XXX update for window mode @@ -65,9 +65,9 @@ m65_chrout_esc_K: ; move cursor after the text within the line XXX update plz lda M65__TXTCOL cmp m65_scrtab_txtwidth,x - bne m65_chrout_esc_done + bne m65_chrout_esc_done_1 dec M65__TXTCOL - bra m65_chrout_esc_done + bra m65_chrout_esc_done_1 m65_chrout_esc_O: ; cancel quote, reverse, underline, flash, etc @@ -76,7 +76,7 @@ m65_chrout_esc_O: ; cancel quote, reverse, underline, flash, etc ; FALLTROUGH -m65_chrout_esc_done: +m65_chrout_esc_done_1: jmp m65_chrout_screen_done @@ -89,7 +89,49 @@ m65_chrout_esc_X: ; cycle through available screen modes @1: jsr M65_SCRMODESET jsr M65_CLRSCR - bra m65_chrout_esc_done + bra m65_chrout_esc_done_1 + +m65_chrout_esc_S: ; set 'bold' attribute + + lda COLOR + ora #%01000000 + + ; FALLTROUGH + +m65_chrout_esc_COLOR_done: + + sta COLOR + bra m65_chrout_esc_done_1 + +m65_chrout_esc_U: ; unset 'bold' attribute + + lda COLOR + and #%10111111 + bra m65_chrout_esc_COLOR_done + +m65_chrout_esc_N: ; normal screen colors + + lda #CONFIG_COLOR_BG + sta VIC_EXTCOL + sta VIC_BGCOL0 + lda COLOR + and #$F0 + ora #CONFIG_COLOR_TXT + bra m65_chrout_esc_COLOR_done + +m65_chrout_esc_R: ; 'reversed' screen colors + + lda #$0B + sta VIC_EXTCOL + lda #$0F + sta VIC_BGCOL0 + lda COLOR + and #$F0 + bra m65_chrout_esc_COLOR_done + + + + @@ -119,20 +161,12 @@ m65_chrout_esc_L: +nop m65_chrout_esc_M: +nop -m65_chrout_esc_N: - +nop m65_chrout_esc_P: +nop m65_chrout_esc_Q: +nop -m65_chrout_esc_R: - +nop -m65_chrout_esc_S: - +nop m65_chrout_esc_T: +nop -m65_chrout_esc_U: - +nop m65_chrout_esc_V: +nop m65_chrout_esc_W: From 7285d76fe92f8808fd213c760fcd90e382f52aca Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 28 Dec 2020 17:15:26 +0100 Subject: [PATCH 085/257] some more Z80 instructions --- src/zvm_m65/z80_instr_io.s | 2 +- src/zvm_m65/z80_instr_math_8bit.s | 415 ++++++++++++++++++++++++++- src/zvm_m65/z80_instr_rotate_shift.s | 210 +++++++++++++- src/zvm_m65/z80_tables.s | 35 +-- src/zvm_m65/zvm_core.s | 132 +-------- tools/generate_z80_tables.cc | 62 ++++ 6 files changed, 681 insertions(+), 175 deletions(-) diff --git a/src/zvm_m65/z80_instr_io.s b/src/zvm_m65/z80_instr_io.s index b47beb0b..95ba655d 100644 --- a/src/zvm_m65/z80_instr_io.s +++ b/src/zvm_m65/z80_instr_io.s @@ -23,7 +23,7 @@ Z80_instr_DB: ; sta .REGn tax lda REG_F - and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_PF - Z80_NF) + and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_PF - Z80_NF - Z80_XF - Z80_YF) ora z80_ftable_IN_OR_XOR, x sta REG_F jmp ZVM_next diff --git a/src/zvm_m65/z80_instr_math_8bit.s b/src/zvm_m65/z80_instr_math_8bit.s index b0ee1343..112a79d8 100644 --- a/src/zvm_m65/z80_instr_math_8bit.s +++ b/src/zvm_m65/z80_instr_math_8bit.s @@ -3,15 +3,406 @@ ; Z80 arithmetic instructions, 8 bit ; -; XXX put ADD instructions here -; XXX put SUB instructions here -; XXX put SBC instructions here +; XXX possible optimizations in this fie: special version for ADD/SUB/CP with self, falltrough optimizations in SUB, ADD, CP + +!macro Z80_ADD_n { + jsr (VEC_fetch_value) + bra Z80_common_add +} + +!macro Z80_ADC_n { + jsr (VEC_fetch_value) + bbs0 REG_F,Z80_common_adc + jmp Z80_common_add +} + +!macro Z80_ADD_REGn .REGn { + lda .REGn + bra Z80_common_add +} + +!macro Z80_ADC_REGn .REGn { + lda .REGn + bbs0 REG_F,Z80_common_adc + jmp Z80_common_add +} + +!macro Z80_ADD_VIA_HL { + jsr (VEC_fetch_via_HL) + bra Z80_common_add +} + +!macro Z80_ADC_VIA_HL { + jsr (VEC_fetch_via_HL) + bbs0 REG_F,Z80_common_adc + jmp Z80_common_add +} + +!macro Z80_ADD_VIA_IX_d { + jsr (VEC_fetch_via_IX_d) + bra Z80_common_add +} + +!macro Z80_ADC_VIA_IX_d { + jsr (VEC_fetch_via_IX_d) + bbs0 REG_F,Z80_common_adc + jmp Z80_common_add +} + +!macro Z80_ADD_VIA_IY_d { + jsr (VEC_fetch_via_IY_d) + bra Z80_common_add +} + +!macro Z80_ADC_VIA_IY_d { + jsr (VEC_fetch_via_IY_d) + bbs0 REG_F,Z80_common_adc + jmp Z80_common_add +} + +Z80_instr_C6: +Z80_ADD_n ; ADD A,n +Z80_instr_80: +Z80_ADD_REGn REG_B ; ADD A,B +Z80_instr_81: +Z80_ADD_REGn REG_C ; ADD A,C +Z80_instr_82: +Z80_ADD_REGn REG_D ; ADD A,D +Z80_instr_83: +Z80_ADD_REGn REG_E ; ADD A,E +Z80_instr_84: +Z80_ADD_REGn REG_H ; ADD A,H +Z80_instr_85: +Z80_ADD_REGn REG_L ; ADD A,L +Z80_instr_87: +Z80_ADD_REGn REG_A ; ADD A,A +Z80_illeg_DD_84: +Z80_ADD_REGn REG_IXH ; ADD A,IXH +Z80_illeg_DD_85: +Z80_ADD_REGn REG_IXL ; ADD A,IXL +Z80_illeg_FD_84: +Z80_ADD_REGn REG_IYH ; ADD A,IYH +Z80_illeg_FD_85: +Z80_ADD_REGn REG_IYL ; ADD A,IYL +Z80_instr_86: +Z80_ADD_VIA_HL ; ADD A,(HL) +Z80_instr_DD_86: +Z80_ADD_VIA_IX_d ; ADD A,(IX+d) +Z80_instr_FD_86: +Z80_ADD_VIA_IY_d ; ADD A,(IY+d) + +Z80_common_add: + + sta REG_TMP1 + and #$0F ; calculate half-carry flag + sta REG_TMP2 + lda REG_A + and #$0F + clc + adc REG_TMP2 + and #$F0 + beq @1 + lda #Z80_HF +@1: + sta REG_F ; now REG_F has HF set properly, everything else cleared + lda REG_TMP1 + clc + adc REG_A + sta REG_A + tax + lda REG_F + ora z80_ftable_ADD_ADC, x + sta REG_F + bvs @V1: +@V0: + bcs @VxC1 +@V0C0: + jmp ZVM_next +@VxC1: + +Z80_PUT_1_CF + jmp ZVM_next +@V1: + +Z80_PUT_1_VF + bcs @VxC1 +@V1C0: + jmp ZVM_next + +Z80_instr_CE: +Z80_ADC_n ; ADC A,n +Z80_instr_88: +Z80_ADC_REGn REG_B ; ADC A,B +Z80_instr_89: +Z80_ADC_REGn REG_C ; ADC A,C +Z80_instr_8A: +Z80_ADC_REGn REG_D ; ADC A,D +Z80_instr_8B: +Z80_ADC_REGn REG_E ; ADC A,E +Z80_instr_8C: +Z80_ADC_REGn REG_H ; ADC A,H +Z80_instr_8D: +Z80_ADC_REGn REG_L ; ADC A,L +Z80_instr_8F: +Z80_ADC_REGn REG_A ; ADC A,A +Z80_illeg_DD_8C: +Z80_ADC_REGn REG_IXH ; ADC A,IXH +Z80_illeg_DD_8D: +Z80_ADC_REGn REG_IXL ; ADC A,IXL +Z80_illeg_FD_8C: +Z80_ADC_REGn REG_IYH ; ADC A,IYH +Z80_illeg_FD_8D: +Z80_ADC_REGn REG_IYL ; ADC A,IYL +Z80_instr_8E: +Z80_ADC_VIA_HL ; ADC A,(HL) +Z80_instr_DD_8E: +Z80_ADC_VIA_IX_d ; ADC A,(IX+d) +Z80_instr_FD_8E: +Z80_ADC_VIA_IY_d ; ADC A,(IY+d) + +Z80_common_adc: + + sta REG_TMP1 + and #$0F ; calculate half-carry flag + sta REG_TMP2 + lda REG_A + and #$0F + sec + adc REG_TMP2 + and #$F0 + beq @1 + lda #Z80_HF +@1: + sta REG_F ; now REG_F has HF set properly, everything else cleared + lda REG_TMP1 + sec + adc REG_A + sta REG_A + tax + lda REG_F + ora z80_ftable_ADD_ADC, x + sta REG_F + bvs @V1: +@V0: + bcs @VxC1 +@V0C0: + jmp ZVM_next +@VxC1: + +Z80_PUT_1_CF + jmp ZVM_next +@V1: + +Z80_PUT_1_VF + bcs @VxC1 +@V1C0: + jmp ZVM_next + +!macro Z80_SUB_n { + jsr (VEC_fetch_value) + bra Z80_common_sub +} + +!macro Z80_SBC_n { + jsr (VEC_fetch_value) + bbs0 REG_F,Z80_common_sbc + jmp Z80_common_sub +} + +!macro Z80_SUB_REGn .REGn { + lda .REGn + bra Z80_common_sub +} + +!macro Z80_SBC_REGn .REGn { + lda .REGn + bbs0 REG_F,Z80_common_sbc + jmp Z80_common_sub +} + +!macro Z80_SUB_VIA_HL { + jsr (VEC_fetch_via_HL) + bra Z80_common_sub +} + +!macro Z80_SBC_VIA_HL { + jsr (VEC_fetch_via_HL) + bbs0 REG_F,Z80_common_sbc + jmp Z80_common_sub +} + +!macro Z80_SUB_VIA_IX_d { + jsr (VEC_fetch_via_IX_d) + bra Z80_common_sub +} + +!macro Z80_SBC_VIA_IX_d { + jsr (VEC_fetch_via_IX_d) + bbs0 REG_F,Z80_common_sbc + jmp Z80_common_sub +} + +!macro Z80_SUB_VIA_IY_d { + jsr (VEC_fetch_via_IY_d) + bra Z80_common_sub +} + +!macro Z80_SBC_VIA_IY_d { + jsr (VEC_fetch_via_IY_d) + bbs0 REG_F,Z80_common_sbc + jmp Z80_common_sub +} + +Z80_instr_D6: +Z80_SUB_n ; SUB A,n +Z80_instr_90: +Z80_SUB_REGn REG_B ; SUB A,B +Z80_instr_91: +Z80_SUB_REGn REG_C ; SUB A,C +Z80_instr_92: +Z80_SUB_REGn REG_D ; SUB A,D +Z80_instr_93: +Z80_SUB_REGn REG_E ; SUB A,E +Z80_instr_94: +Z80_SUB_REGn REG_H ; SUB A,H +Z80_instr_95: +Z80_SUB_REGn REG_L ; SUB A,L +Z80_instr_97: +Z80_SUB_REGn REG_A ; SUB A,A +Z80_illeg_DD_94: +Z80_SUB_REGn REG_IXH ; SUB A,IXH +Z80_illeg_DD_95: +Z80_SUB_REGn REG_IXL ; SUB A,IXL +Z80_illeg_FD_94: +Z80_SUB_REGn REG_IYH ; SUB A,IYH +Z80_illeg_FD_95: +Z80_SUB_REGn REG_IYL ; SUB A,IYL +Z80_instr_96: +Z80_SUB_VIA_HL ; SUB A,(HL) +Z80_instr_DD_96: +Z80_SUB_VIA_IX_d ; SUB A,(IX+d) +Z80_instr_FD_96: +Z80_SUB_VIA_IY_d ; SUB A,(IY+d) + +Z80_common_sub: + + sta REG_TMP1 + and #$0F ; calculate half-carry flag + sta REG_TMP2 + lda REG_A + and #$0F + sec + sbc REG_TMP2 + and #$F0 + beq @1 + lda #Z80_HF +@1: + sta REG_F ; now REG_F has HF set properly, everything else cleared + lda REG_TMP1 + sec + sbc REG_A + sta REG_A + tax + lda REG_F + ora z80_ftable_SUB_SBC, x + sta REG_F + bvs @V1: +@V0: + bcc @VxC1 +@V0C0: + jmp ZVM_next +@VxC1: + +Z80_PUT_1_CF + jmp ZVM_next +@V1: + +Z80_PUT_1_VF + bcc @VxC1 +@V1C0: + jmp ZVM_next + +Z80_instr_DE: +Z80_SBC_n ; SBC A,n +Z80_instr_98: +Z80_SBC_REGn REG_B ; SBC A,B +Z80_instr_99: +Z80_SBC_REGn REG_C ; SBC A,C +Z80_instr_9A: +Z80_SBC_REGn REG_D ; SBC A,D +Z80_instr_9B: +Z80_SBC_REGn REG_E ; SBC A,E +Z80_instr_9C: +Z80_SBC_REGn REG_H ; SBC A,H +Z80_instr_9D: +Z80_SBC_REGn REG_L ; SBC A,L +Z80_instr_9F: +Z80_SBC_REGn REG_A ; SBC A,A +Z80_illeg_DD_9C: +Z80_SBC_REGn REG_IXH ; SBC A,IXH +Z80_illeg_DD_9D: +Z80_SBC_REGn REG_IXL ; SBC A,IXL +Z80_illeg_FD_9C: +Z80_SBC_REGn REG_IYH ; SBC A,IYH +Z80_illeg_FD_9D: +Z80_SBC_REGn REG_IYL ; SBC A,IYL +Z80_instr_9E: +Z80_SBC_VIA_HL ; SBC A,(HL) +Z80_instr_DD_9E: +Z80_SBC_VIA_IX_d ; SBC A,(IX+d) +Z80_instr_FD_9E: +Z80_SBC_VIA_IY_d ; SBC A,(IY+d) + +Z80_common_sbc: + + sta REG_TMP1 + and #$0F ; calculate half-carry flag + sta REG_TMP2 + lda REG_A + and #$0F + clc + sbc REG_TMP2 + and #$F0 + beq @1 + lda #Z80_HF +@1: + sta REG_F ; now REG_F has HF set properly, everything else cleared + lda REG_TMP1 + clc + sbc REG_A + sta REG_A + tax + lda REG_F + ora z80_ftable_SUB_SBC, x + sta REG_F + bvs @V1: +@V0: + bcc @VxC1 +@V0C0: + jmp ZVM_next +@VxC1: + +Z80_PUT_1_CF + jmp ZVM_next +@V1: + +Z80_PUT_1_VF + bcc @VxC1 +@V1C0: + jmp ZVM_next + +!macro Z80_CP_n { + jsr (VEC_fetch_value) + bra Z80_common_cp +} + +!macro Z80_CP_REGn .REGn { + lda .REGn + bra Z80_common_cp +} + +!macro Z80_CP_VIA_HL { + jsr (VEC_fetch_via_HL) + bra Z80_common_cp +} + +!macro Z80_CP_VIA_IX_d { + jsr (VEC_fetch_via_IX_d) + bra Z80_common_cp +} + +!macro Z80_CP_VIA_IY_d { + jsr (VEC_fetch_via_IY_d) + bra Z80_common_cp +} + +Z80_instr_FE: +Z80_CP_n ; CP n +Z80_instr_B8: +Z80_CP_REGn REG_B ; CP B +Z80_instr_B9: +Z80_CP_REGn REG_C ; CP C +Z80_instr_BA: +Z80_CP_REGn REG_D ; CP D +Z80_instr_BB: +Z80_CP_REGn REG_E ; CP E +Z80_instr_BC: +Z80_CP_REGn REG_H ; CP H +Z80_instr_BD: +Z80_CP_REGn REG_L ; CP L +Z80_instr_BF: +Z80_CP_REGn REG_A ; CP A +Z80_illeg_DD_BC: +Z80_CP_REGn REG_IXH ; CP IXH +Z80_illeg_DD_BD: +Z80_CP_REGn REG_IXL ; CP IXL +Z80_illeg_FD_BC: +Z80_CP_REGn REG_IYH ; CP IYH +Z80_illeg_FD_BD: +Z80_CP_REGn REG_IYL ; CP IYL +Z80_instr_BE: +Z80_CP_VIA_HL ; CP (HL) +Z80_instr_DD_BE: +Z80_CP_VIA_IX_d ; CP (IX+d) +Z80_instr_FD_BE: +Z80_CP_VIA_IY_d ; CP (IY+d) + +Z80_common_cp: + + sta REG_TMP1 + and #$0F ; calculate half-carry flag + sta REG_TMP2 + lda REG_A + and #$0F + sec + sbc REG_TMP2 + and #$F0 + beq @1 + lda #Z80_HF +@1: + sta REG_F ; now REG_F has HF set properly, everything else cleared + lda REG_TMP1 + sec + sbc REG_A + tax + and #%00101000 + ora z80_ftable_CP, x + sta REG_F + bvs @V1: +@V0: + bcc @VxC1 +@V0C0: + jmp ZVM_next +@VxC1: + +Z80_PUT_1_CF + jmp ZVM_next +@V1: + +Z80_PUT_1_VF + bcc @VxC1 +@V1C0: + jmp ZVM_next + !macro Z80_AND_common_int { - lda REG_F - and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_PF - Z80_NF - Z80_CF) - ora z80_ftable_AND, x + lda z80_ftable_AND, x sta REG_F jmp ZVM_next } @@ -71,9 +462,7 @@ Z80_instr_DD_A6: +Z80_AND_VIA_IX_d ; Z80_instr_FD_A6: +Z80_AND_VIA_IY_d ; AND (IY+d) !macro Z80_OR_XOR_common_int { - lda REG_F - and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_PF - Z80_NF - Z80_CF) - ora z80_ftable_IN_OR_XOR, x + lda z80_ftable_IN_OR_XOR, x sta REG_F jmp ZVM_next } @@ -148,9 +537,7 @@ Z80_instr_FD_B6: +Z80_OR_VIA_IY_d ; !macro Z80_XOR_SELF { lda #$00 sta REG_A - lda REG_F - and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_PF - Z80_NF - Z80_CF) - ora z80_ftable_IN_OR_XOR + lda z80_ftable_IN_OR_XOR sta REG_F jmp ZVM_next } @@ -218,7 +605,7 @@ Z80_instr_3C: ; Z80_common_INC: lda REG_F - and #(0xFF - Z80_SF - Z80_ZF - Z80_HF - Z80_VF - Z80_NF) + and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_VF - Z80_NF) ora z80_ftable_INC, x sta REG_F jmp ZVM_next @@ -274,7 +661,7 @@ Z80_instr_3D: ; Z80_common_DEC: lda REG_F - and #(0xFF - Z80_SF - Z80_ZF - Z80_HF - Z80_VF - Z80_NF) + and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_VF - Z80_NF) ora z80_ftable_DEC, x sta REG_F jmp ZVM_next diff --git a/src/zvm_m65/z80_instr_rotate_shift.s b/src/zvm_m65/z80_instr_rotate_shift.s index 8db3c5af..e75efea2 100644 --- a/src/zvm_m65/z80_instr_rotate_shift.s +++ b/src/zvm_m65/z80_instr_rotate_shift.s @@ -7,10 +7,14 @@ Z80_instr_07: ; RLCA lda REG_F - and #($FF - Z80_HF - Z80_NF - Z80_CF) + and #($FF - Z80_HF - Z80_NF - Z80_CF - Z80_XF - Z80_YF) sta REG_F asl REG_A + lda REG_A + and #%00101000 + ora REG_F + sta REG_F +bcc ZVM_next inc REG_A +Z80_PUT_1_CF @@ -19,7 +23,7 @@ Z80_instr_07: ; RLCA Z80_instr_17: ; RLA lda REG_F - and #($FF - Z80_HF - Z80_NF - Z80_CF) + and #($FF - Z80_HF - Z80_NF - Z80_CF - Z80_XF - Z80_YF) sta REG_F clc @@ -27,6 +31,10 @@ Z80_instr_17: ; RLA sec @1: rol REG_A + lda REG_A + and #%00101000 + ora REG_F + sta REG_F +bcc ZVM_next +Z80_PUT_1_CF jmp ZVM_next @@ -34,11 +42,15 @@ Z80_instr_17: ; RLA Z80_instr_0F: ; RRCA lda REG_F - and #($FF - Z80_HF - Z80_NF - Z80_CF) + and #($FF - Z80_HF - Z80_NF - Z80_CF - Z80_XF - Z80_YF) sta REG_F clc ror REG_A + lda REG_A + and #%00101000 + ora REG_F + sta REG_F +bcc ZVM_next smb7 REG_A +Z80_PUT_1_CF @@ -47,7 +59,7 @@ Z80_instr_0F: ; RRCA Z80_instr_1F: ; RRA lda REG_F - and #($FF - Z80_HF - Z80_NF - Z80_CF) + and #($FF - Z80_HF - Z80_NF - Z80_CF - Z80_XF - Z80_YF) sta REG_F clc @@ -55,7 +67,197 @@ Z80_instr_1F: ; RRA sec @1: ror REG_A + lda REG_A + and #%00101000 + ora REG_F + sta REG_F +bcc ZVM_next +Z80_PUT_1_CF jmp ZVM_next + +!macro Z80_RLC_REGn .REGn { + + clc + bbr7 .REGn, @1 + sec +@1: + rol .REGn + + ldx .REGn + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +Z80_instr_CB_00: +Z80_RLC_REGn REG_B ; RLC B +Z80_instr_CB_01: +Z80_RLC_REGn REG_C ; RLC C +Z80_instr_CB_02: +Z80_RLC_REGn REG_D ; RLC D +Z80_instr_CB_03: +Z80_RLC_REGn REG_E ; RLC E +Z80_instr_CB_04: +Z80_RLC_REGn REG_H ; RLC H +Z80_instr_CB_05: +Z80_RLC_REGn REG_L ; RLC L +Z80_instr_CB_07: +Z80_RLC_REGn REG_A ; RLC A + +!macro Z80_RRC_REGn .REGn { + + clc + bbr0 .REGn, @1 + sec +@1: + ror .REGn + + ldx .REGn + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +Z80_instr_CB_08: +Z80_RRC_REGn REG_B ; RRC B +Z80_instr_CB_09: +Z80_RRC_REGn REG_C ; RRC C +Z80_instr_CB_0A: +Z80_RRC_REGn REG_D ; RRC D +Z80_instr_CB_0B: +Z80_RRC_REGn REG_E ; RRC E +Z80_instr_CB_0C: +Z80_RRC_REGn REG_H ; RRC H +Z80_instr_CB_0D: +Z80_RRC_REGn REG_L ; RRC L +Z80_instr_CB_0F: +Z80_RRC_REGn REG_A ; RRC A + +!macro Z80_RL_REGn .REGn { + + clc + bbr0 REG_F, @1 + sec +@1: + rol .REGn + + ldx .REGn + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +Z80_instr_CB_10: +Z80_RL_REGn REG_B ; RL B +Z80_instr_CB_11: +Z80_RL_REGn REG_C ; RL C +Z80_instr_CB_12: +Z80_RL_REGn REG_D ; RL D +Z80_instr_CB_13: +Z80_RL_REGn REG_E ; RL E +Z80_instr_CB_14: +Z80_RL_REGn REG_H ; RL H +Z80_instr_CB_15: +Z80_RL_REGn REG_L ; RL L +Z80_instr_CB_17: +Z80_RL_REGn REG_A ; RL A + +!macro Z80_RR_REGn .REGn { + + clc + bbr0 REG_F, @1 + sec +@1: + ror .REGn + + ldx .REGn + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +Z80_instr_CB_18: +Z80_RR_REGn REG_B ; RR B +Z80_instr_CB_19: +Z80_RR_REGn REG_C ; RR C +Z80_instr_CB_1A: +Z80_RR_REGn REG_D ; RR D +Z80_instr_CB_1B: +Z80_RR_REGn REG_E ; RR E +Z80_instr_CB_1C: +Z80_RR_REGn REG_H ; RR H +Z80_instr_CB_1D: +Z80_RR_REGn REG_L ; RR L +Z80_instr_CB_1F: +Z80_RR_REGn REG_A ; RR A + +; XXX SLA/SLL (and possibly rotations) can be made slightly faster with dedicated tables (omit carry flag calculation) + +!macro Z80_SLA_REGn .REGn { + + asl .REGn + + ldx .REGn + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +Z80_instr_CB_20: +Z80_SLA_REGn REG_B ; SLA B +Z80_instr_CB_21: +Z80_SLA_REGn REG_C ; SLA C +Z80_instr_CB_22: +Z80_SLA_REGn REG_D ; SLA D +Z80_instr_CB_23: +Z80_SLA_REGn REG_E ; SLA E +Z80_instr_CB_24: +Z80_SLA_REGn REG_H ; SLA H +Z80_instr_CB_25: +Z80_SLA_REGn REG_L ; SLA L +Z80_instr_CB_27: +Z80_SLA_REGn REG_A ; SLA A + +!macro Z80_SLL_REGn .REGn { + + sec + rol .REGn + + ldx .REGn + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +Z80_illeg_CB_30: +Z80_SLL_REGn REG_B ; SLL B +Z80_illeg_CB_31: +Z80_SLL_REGn REG_C ; SLL C +Z80_illeg_CB_32: +Z80_SLL_REGn REG_D ; SLL D +Z80_illeg_CB_33: +Z80_SLL_REGn REG_E ; SLL E +Z80_illeg_CB_34: +Z80_SLL_REGn REG_H ; SLL H +Z80_illeg_CB_35: +Z80_SLL_REGn REG_L ; SLL L +Z80_illeg_CB_37: +Z80_SLL_REGn REG_A ; SLL A + +!macro Z80_SRL_REGn .REGn { + + clc + ror .REGn + + ldx .REGn + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +Z80_instr_CB_38: +Z80_SRL_REGn REG_B ; SRL B +Z80_instr_CB_39: +Z80_SRL_REGn REG_C ; SRL C +Z80_instr_CB_3A: +Z80_SRL_REGn REG_D ; SRL D +Z80_instr_CB_3B: +Z80_SRL_REGn REG_E ; SRL E +Z80_instr_CB_3C: +Z80_SRL_REGn REG_H ; SRL H +Z80_instr_CB_3D: +Z80_SRL_REGn REG_L ; SRL L +Z80_instr_CB_3F: +Z80_SRL_REGn REG_A ; SRL A + +!macro Z80_SRA_REGn .REGn { + + clc + bbr7 .REGn, @1 + sec +@1: + ror .REGn + + ldx .REGn + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +Z80_instr_CB_28: +Z80_SRA_REGn REG_B; SRA B +Z80_instr_CB_29: +Z80_SRA_REGn REG_C; SRA C +Z80_instr_CB_2A: +Z80_SRA_REGn REG_D; SRA D +Z80_instr_CB_2B: +Z80_SRA_REGn REG_E; SRA E +Z80_instr_CB_2C: +Z80_SRA_REGn REG_H; SRA H +Z80_instr_CB_2D: +Z80_SRA_REGn REG_L; SRA L +Z80_instr_CB_2F: +Z80_SRA_REGn REG_A; SRA A + + diff --git a/src/zvm_m65/z80_tables.s b/src/zvm_m65/z80_tables.s index a43d6d54..76b6127b 100644 --- a/src/zvm_m65/z80_tables.s +++ b/src/zvm_m65/z80_tables.s @@ -5,98 +5,83 @@ ; z80_ftable_parity: -; ; +PUT_Z80_FTABLE_PARITY - z80_otable_displacement: - +PUT_Z80_OTABLE_DISPLACEMENT z80_ftable_INC: - +PUT_Z80_FTABLE_INC z80_ftable_DEC: - +PUT_Z80_FTABLE_DEC z80_ftable_AND: - +PUT_Z80_FTABLE_AND -z80_ftable_IN_OR_XOR: - +z80_ftable_IN_OR_XOR: ; XXX rename to include shift/rotate +PUT_Z80_FTABLE_IN_OR_XOR z80_ftable_NEG: - +PUT_Z80_FTABLE_NEG +z80_ftable_ADD_ADC: + +PUT_Z80_FTABLE_ADD_ADC + +z80_ftable_SUB_SBC: + +PUT_Z80_FTABLE_SUB_SBC + +z80_ftable_CP: + +PUT_Z80_FTABLE_CP + ; ; That horrific DAA instruction ; z80_otable_DAA_N0C0H0: - +PUT_Z80_OTABLE_DAA_N0C0H0 z80_otable_DAA_N0C0H1: - +PUT_Z80_OTABLE_DAA_N0C0H1 z80_otable_DAA_N0C1H0: - +PUT_Z80_OTABLE_DAA_N0C1H0 z80_otable_DAA_N0C1H1: - +PUT_Z80_OTABLE_DAA_N0C1H1 z80_otable_DAA_N1C0H0: - +PUT_Z80_OTABLE_DAA_N1C0H0 z80_otable_DAA_N1C0H1: - +PUT_Z80_OTABLE_DAA_N1C0H1 z80_otable_DAA_N1C1H0: - +PUT_Z80_OTABLE_DAA_N1C1H0 z80_otable_DAA_N1C1H1: - +PUT_Z80_OTABLE_DAA_N1C1H1 z80_ftable_DAA_N0C0H0: - +PUT_Z80_FTABLE_DAA_N0C0H0 z80_ftable_DAA_N0C0H1: - +PUT_Z80_FTABLE_DAA_N0C0H1 z80_ftable_DAA_N0C1H0: - +PUT_Z80_FTABLE_DAA_N0C1H0 z80_ftable_DAA_N0C1H1: - +PUT_Z80_FTABLE_DAA_N0C1H1 z80_ftable_DAA_N1C0H0: - +PUT_Z80_FTABLE_DAA_N1C0H0 z80_ftable_DAA_N1C0H1: - +PUT_Z80_FTABLE_DAA_N1C0H1 z80_ftable_DAA_N1C1H0: - +PUT_Z80_FTABLE_DAA_N1C1H0 z80_ftable_DAA_N1C1H1: - +PUT_Z80_FTABLE_DAA_N1C1H1 diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 499d677d..eea2a1c5 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -122,6 +122,7 @@ Z80_instr_FD: +ZVM_DISPATCH Z80_vectab_FD_0, Z80_vectab_FD_1 ; + ; ; Not implemented yet - XXX implement them! ; @@ -135,120 +136,21 @@ Z80_instr_22: ; LD (nn),HL Z80_instr_29: ; ADD HL,HL Z80_instr_2A: ; LD HL,(nn) Z80_instr_39: ; ADD HL,SP -Z80_instr_80: ; ADD A,B -Z80_instr_81: ; ADD A,C -Z80_instr_82: ; ADD A,D -Z80_instr_83: ; ADD A,E -Z80_instr_84: ; ADD A,H -Z80_instr_85: ; ADD A,L -Z80_instr_86: ; ADD A,(HL) -Z80_instr_87: ; ADD A,A -Z80_instr_88: ; ADC A,B -Z80_instr_89: ; ADC A,C -Z80_instr_8A: ; ADC A,D -Z80_instr_8B: ; ADC A,E -Z80_instr_8C: ; ADC A,H -Z80_instr_8D: ; ADC A,L -Z80_instr_8E: ; ADC A,(HL) -Z80_instr_8F: ; ADC A,A -Z80_instr_90: ; SUB B -Z80_instr_91: ; SUB C -Z80_instr_92: ; SUB D -Z80_instr_93: ; SUB E -Z80_instr_94: ; SUB H -Z80_instr_95: ; SUB L -Z80_instr_96: ; SUB (HL) -Z80_instr_97: ; SUB A -Z80_instr_98: ; SBC B -Z80_instr_99: ; SBC C -Z80_instr_9A: ; SBC D -Z80_instr_9B: ; SBC E -Z80_instr_9C: ; SBC H -Z80_instr_9D: ; SBC L -Z80_instr_9E: ; SBC (HL) -Z80_instr_9F: ; SBC A -Z80_instr_B8: ; CP B -Z80_instr_B9: ; CP C -Z80_instr_BA: ; CP D -Z80_instr_BB: ; CP E -Z80_instr_BC: ; CP H -Z80_instr_BD: ; CP L -Z80_instr_BE: ; CP (HL) -Z80_instr_BF: ; CP A -Z80_instr_C6: ; ADD A,n -Z80_instr_CE: ; ADC A,n -Z80_instr_D6: ; SUB n -Z80_instr_DE: ; SBC A,n Z80_instr_E3: ; EX (SP),HL Z80_instr_F9: ; LD SP,HL -Z80_instr_FE: ; CP n -Z80_instr_CB_00: ; RLC B -Z80_instr_CB_01: ; RLC C -Z80_instr_CB_02: ; RLC D -Z80_instr_CB_03: ; RLC E -Z80_instr_CB_04: ; RLC H -Z80_instr_CB_05: ; RLC L Z80_instr_CB_06: ; RLC (HL) -Z80_instr_CB_07: ; RLC A -Z80_instr_CB_08: ; RRC B -Z80_instr_CB_09: ; RRC C -Z80_instr_CB_0A: ; RRC D -Z80_instr_CB_0B: ; RRC E -Z80_instr_CB_0C: ; RRC H -Z80_instr_CB_0D: ; RRC L Z80_instr_CB_0E: ; RRC (HL) -Z80_instr_CB_0F: ; RRC A -Z80_instr_CB_10: ; RL B -Z80_instr_CB_11: ; RL C -Z80_instr_CB_12: ; RL D -Z80_instr_CB_13: ; RL E -Z80_instr_CB_14: ; RL H -Z80_instr_CB_15: ; RL L Z80_instr_CB_16: ; RL (HL) -Z80_instr_CB_17: ; RL A -Z80_instr_CB_18: ; RR B -Z80_instr_CB_19: ; RR C -Z80_instr_CB_1A: ; RR D -Z80_instr_CB_1B: ; RR E -Z80_instr_CB_1C: ; RR H -Z80_instr_CB_1D: ; RR L Z80_instr_CB_1E: ; RR (HL) -Z80_instr_CB_1F: ; RR A -Z80_instr_CB_20: ; SLA B -Z80_instr_CB_21: ; SLA C -Z80_instr_CB_22: ; SLA D -Z80_instr_CB_23: ; SLA E -Z80_instr_CB_24: ; SLA H -Z80_instr_CB_25: ; SLA L Z80_instr_CB_26: ; SLA (HL) -Z80_instr_CB_27: ; SLA A -Z80_instr_CB_28: ; SRA B -Z80_instr_CB_29: ; SRA C -Z80_instr_CB_2A: ; SRA D -Z80_instr_CB_2B: ; SRA E -Z80_instr_CB_2C: ; SRA H -Z80_instr_CB_2D: ; SRA L Z80_instr_CB_2E: ; SRA (HL) -Z80_instr_CB_2F: ; SRA A -Z80_instr_CB_38: ; SRL B -Z80_instr_CB_39: ; SRL C -Z80_instr_CB_3A: ; SRL D -Z80_instr_CB_3B: ; SRL E -Z80_instr_CB_3C: ; SRL H -Z80_instr_CB_3D: ; SRL L Z80_instr_CB_3E: ; SRL (HL) -Z80_instr_CB_3F: ; SRL A Z80_instr_DD_09: ; ADD IX,BC Z80_instr_DD_19: ; ADD IX,DE Z80_instr_DD_22: ; LD (nn),IX Z80_instr_DD_29: ; ADD IX,IX Z80_instr_DD_2A: ; LD IX,(nn) Z80_instr_DD_39: ; ADD IX,SP -Z80_instr_DD_86: ; ADD A,(IX+d) -Z80_instr_DD_8E: ; ADC A,(IX+d) -Z80_instr_DD_96: ; SUB (IX+d) -Z80_instr_DD_9E: ; SBC (IX+d) -Z80_instr_DD_BE: ; CP (IX+d) Z80_instr_DD_E3: ; EX (SP),IX Z80_instr_DD_F9: ; LD SP,IX Z80_instr_ED_42: ; SBC HL,BC @@ -289,11 +191,6 @@ Z80_instr_FD_22: ; LD (nn),IY Z80_instr_FD_29: ; ADD IY,IY Z80_instr_FD_2A: ; LD IY,(nn) Z80_instr_FD_39: ; ADD IY,SP -Z80_instr_FD_86: ; ADD A,(IY+d) -Z80_instr_FD_8E: ; ADC A,(IY+d) -Z80_instr_FD_96: ; SUB (IY+d) -Z80_instr_FD_9E: ; SBC (IY+d) -Z80_instr_FD_BE: ; CP (IY+d) Z80_instr_FD_E3: ; EX (SP),IY Z80_instr_FD_F9: ; LD SP,IY Z80_instr_xDCB_06: ; RLC (IXY+d) @@ -303,38 +200,11 @@ Z80_instr_xDCB_1E: ; RR (IXY+d) Z80_instr_xDCB_26: ; SLA (IXY+d) Z80_instr_xDCB_2E: ; SRA (IXY+d) Z80_instr_xDCB_3E: ; SRL (IXY+d) -Z80_illeg_CB_30: ; SLL B -Z80_illeg_CB_31: ; SLL C -Z80_illeg_CB_32: ; SLL D -Z80_illeg_CB_33: ; SLL E -Z80_illeg_CB_34: ; SLL H -Z80_illeg_CB_35: ; SLL L Z80_illeg_CB_36: ; SLL (HL) -Z80_illeg_CB_37: ; SLL A Z80_illeg_ED_70: ; IN F,(C) Z80_illeg_ED_71: ; OUT (C),0 Z80_illeg_ED_63: ; LD (nn),HL Z80_illeg_ED_6B: ; LD HL,(nn) -Z80_illeg_DD_84: ; ADD A,IXH -Z80_illeg_DD_85: ; ADD A,IXL -Z80_illeg_DD_8C: ; ADC A,IXH -Z80_illeg_DD_8D: ; ADC A,IXL -Z80_illeg_DD_94: ; SUB A,IXH -Z80_illeg_DD_95: ; SUB A,IXL -Z80_illeg_DD_9C: ; SBC A,IXH -Z80_illeg_DD_9D: ; SBC A,IXL -Z80_illeg_DD_BC: ; CP IXH -Z80_illeg_DD_BD: ; CP IXL -Z80_illeg_FD_84: ; ADD A,IYH -Z80_illeg_FD_85: ; ADD A,IYL -Z80_illeg_FD_8C: ; ADC A,IYH -Z80_illeg_FD_8D: ; ADC A,IYL -Z80_illeg_FD_94: ; SUB A,IYH -Z80_illeg_FD_95: ; SUB A,IYL -Z80_illeg_FD_9C: ; SBC A,IYH -Z80_illeg_FD_9D: ; SBC A,IYL -Z80_illeg_FD_BC: ; CP IYH -Z80_illeg_FD_BD: ; CP IYL Z80_illeg_xDCB_00: ; RLC (IXY+d),B Z80_illeg_xDCB_01: ; RLC (IXY+d),C Z80_illeg_xDCB_02: ; RLC (IXY+d),D diff --git a/tools/generate_z80_tables.cc b/tools/generate_z80_tables.cc index c98c7ce9..34e4fd8f 100644 --- a/tools/generate_z80_tables.cc +++ b/tools/generate_z80_tables.cc @@ -186,6 +186,8 @@ std::string generateAndTable(void) uint8_t flags = Z80_HF | GLOBAL_Parity[idx]; if (idx >= 0x80) flags |= Z80_SF; // for negative result if (idx == 0) flags |= Z80_ZF; // for result equal 0 + if (idx & 0x08) flags |= Z80_XF; // 3rd bit of the result + if (idx & 0x20) flags |= Z80_YF; // 5th bit of the result outStr << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << int(flags) << "\n"; } @@ -203,6 +205,63 @@ std::string generateInOrXorTable(void) uint8_t flags = GLOBAL_Parity[idx]; if (idx >= 0x80) flags |= Z80_SF; // for negative result if (idx == 0) flags |= Z80_ZF; // for result equal 0 + if (idx & 0x08) flags |= Z80_XF; // 3rd bit of the result + if (idx & 0x20) flags |= Z80_YF; // 5th bit of the result + + outStr << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << int(flags) << "\n"; + } + + return outStr.str() + "}\n\n\n"; +} + +std::string generateAddAdcTable(void) +{ + std::stringstream outStr; + outStr << "!macro PUT_Z80_FTABLE_ADD_ADC {\n"; + + for (uint16_t idx = 0; idx < 0x100; idx++) + { + uint8_t flags = 0; + if (idx >= 0x80) flags |= Z80_SF; // for negative result + if (idx == 0) flags |= Z80_ZF; // for result equal 0 + if (idx & 0x08) flags |= Z80_XF; // 3rd bit of the result + if (idx & 0x20) flags |= Z80_YF; // 5th bit of the result + + outStr << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << int(flags) << "\n"; + } + + return outStr.str() + "}\n\n\n"; +} + +std::string generateSubSbcTable(void) +{ + std::stringstream outStr; + outStr << "!macro PUT_Z80_FTABLE_SUB_SBC {\n"; + + for (uint16_t idx = 0; idx < 0x100; idx++) + { + uint8_t flags = Z80_NF; + if (idx >= 0x80) flags |= Z80_SF; // for negative result + if (idx == 0) flags |= Z80_ZF; // for result equal 0 + if (idx & 0x08) flags |= Z80_XF; // 3rd bit of the result + if (idx & 0x20) flags |= Z80_YF; // 5th bit of the result + + outStr << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << int(flags) << "\n"; + } + + return outStr.str() + "}\n\n\n"; +} + +std::string generateCpTable(void) +{ + std::stringstream outStr; + outStr << "!macro PUT_Z80_FTABLE_CP {\n"; + + for (uint16_t idx = 0; idx < 0x100; idx++) + { + uint8_t flags = Z80_NF; + if (idx >= 0x80) flags |= Z80_SF; // for negative result + if (idx == 0) flags |= Z80_ZF; // for result equal 0 outStr << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << int(flags) << "\n"; } @@ -353,6 +412,9 @@ void writeTables() outFile << generateDecTable(); outFile << generateAndTable(); outFile << generateInOrXorTable(); + outFile << generateAddAdcTable(); + outFile << generateSubSbcTable(); + outFile << generateCpTable(); outFile << generateNegTable(); outFile << generateDaaTables(); From beeb228cd475131e341a2b73702ad676e618a803 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 28 Dec 2020 17:29:11 +0100 Subject: [PATCH 086/257] color usage tweaks --- src/kernal/board_m65/mega65_colorset_assets.s | 2 +- src/mon_m65/bsmon.s | 52 +++++++++---------- 2 files changed, 27 insertions(+), 27 deletions(-) diff --git a/src/kernal/board_m65/mega65_colorset_assets.s b/src/kernal/board_m65/mega65_colorset_assets.s index 149257f2..5c2a6b27 100644 --- a/src/kernal/board_m65/mega65_colorset_assets.s +++ b/src/kernal/board_m65/mega65_colorset_assets.s @@ -4,7 +4,7 @@ m65_colorset_bold_tab: ; color redirection table for bold attribute - !byte $0B ; black -> dark grey + !byte $02 ; black -> red !byte $0A ; white -> light red !byte $0A ; red -> light red !byte $07 ; cyan -> yellow diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index ec73f38c..c79fb808 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -158,7 +158,7 @@ Print_Commands: ; ************* JSR PRIMM - !pet KEY_RETURN,KEY_YELLOW,KEY_RVS_ON," commands: " + !pet KEY_RETURN,KEY_RVS_ON," commands: " ; *********** Command_Char: @@ -177,7 +177,7 @@ Cons_Prefix: Load_Save_Verify: ; *************** - !pet "lsv ",KEY_WHITE,KEY_RETURN,0 + !pet "lsv ",KEY_RETURN,0 RTS ; ********* @@ -2709,30 +2709,30 @@ Mon_Help: JSR PRIMM !pet KEY_RETURN, KEY_RETURN - !pet KEY_LT_RED,"a",KEY_WHITE,"ssemble - a address mnemonic operand",KEY_RETURN - !pet KEY_LT_RED,"b",KEY_WHITE,"itmaps - b [from [to]]",KEY_RETURN - !pet KEY_LT_RED,"c",KEY_WHITE,"ompare - c from to with",KEY_RETURN - !pet KEY_LT_RED,"d",KEY_WHITE,"isassemble - d [from [to]]",KEY_RETURN - !pet KEY_LT_RED,"f",KEY_WHITE,"ill - f from to fillbyte",KEY_RETURN - !pet KEY_LT_RED,"g",KEY_WHITE,"o - g [address]",KEY_RETURN - !pet KEY_LT_RED,"h",KEY_WHITE,"unt - h from to (string or bytes)",KEY_RETURN - !pet KEY_LT_RED,"j",KEY_WHITE,"sr - j address",KEY_RETURN - !pet KEY_LT_RED,"l",KEY_WHITE,"oad - l filename [uniy [address]]",KEY_RETURN - !pet KEY_LT_RED,"m",KEY_WHITE,"emory - m [from [to]]",KEY_RETURN - !pet KEY_LT_RED,"r",KEY_WHITE,"egisters - r",KEY_RETURN - !pet KEY_LT_RED,"s",KEY_WHITE,"ave - s filename unit from to",KEY_RETURN - !pet KEY_LT_RED,"t",KEY_WHITE,"ransfer - t from to target",KEY_RETURN - !pet KEY_LT_RED,"v",KEY_WHITE,"erify - v filename [unit [address]]",KEY_RETURN - !pet "e",KEY_LT_RED,"x",KEY_WHITE,"it - x",KEY_RETURN - !pet KEY_LT_RED,".",KEY_WHITE," - . address mnemonic operand",KEY_RETURN - !pet KEY_LT_RED,">",KEY_WHITE," - > address byte sequence",KEY_RETURN - !pet KEY_LT_RED,";",KEY_WHITE," - ; register contents",KEY_RETURN - !pet KEY_LT_RED,"@",KEY_WHITE,"dos - @ [dos command]",KEY_RETURN - !pet KEY_LT_RED,"$",KEY_WHITE," - hexadecimal number (default)",KEY_RETURN - !pet KEY_LT_RED,"+",KEY_WHITE," - decimal number",KEY_RETURN - !pet KEY_LT_RED,"&",KEY_WHITE," - octal number",KEY_RETURN - !pet KEY_LT_RED,"%",KEY_WHITE," - binary number",KEY_RETURN - !pet KEY_LT_RED,"?",KEY_WHITE,"help - ?",KEY_RETURN + !pet KEY_ESC,'s',"a",KEY_ESC,'u',"ssemble - a address mnemonic operand",KEY_RETURN + !pet KEY_ESC,'s',"b",KEY_ESC,'u',"itmaps - b [from [to]]",KEY_RETURN + !pet KEY_ESC,'s',"c",KEY_ESC,'u',"ompare - c from to with",KEY_RETURN + !pet KEY_ESC,'s',"d",KEY_ESC,'u',"isassemble - d [from [to]]",KEY_RETURN + !pet KEY_ESC,'s',"f",KEY_ESC,'u',"ill - f from to fillbyte",KEY_RETURN + !pet KEY_ESC,'s',"g",KEY_ESC,'u',"o - g [address]",KEY_RETURN + !pet KEY_ESC,'s',"h",KEY_ESC,'u',"unt - h from to (string or bytes)",KEY_RETURN + !pet KEY_ESC,'s',"j",KEY_ESC,'u',"sr - j address",KEY_RETURN + !pet KEY_ESC,'s',"l",KEY_ESC,'u',"oad - l filename [uniy [address]]",KEY_RETURN + !pet KEY_ESC,'s',"m",KEY_ESC,'u',"emory - m [from [to]]",KEY_RETURN + !pet KEY_ESC,'s',"r",KEY_ESC,'u',"egisters - r",KEY_RETURN + !pet KEY_ESC,'s',"s",KEY_ESC,'u',"ave - s filename unit from to",KEY_RETURN + !pet KEY_ESC,'s',"t",KEY_ESC,'u',"ransfer - t from to target",KEY_RETURN + !pet KEY_ESC,'s',"v",KEY_ESC,'u',"erify - v filename [unit [address]]",KEY_RETURN + !pet "e",KEY_ESC,'s',"x",KEY_ESC,'u',"it - x",KEY_RETURN + !pet KEY_ESC,'s',".",KEY_ESC,'u'," - . address mnemonic operand",KEY_RETURN + !pet KEY_ESC,'s',">",KEY_ESC,'u'," - > address byte sequence",KEY_RETURN + !pet KEY_ESC,'s',";",KEY_ESC,'u'," - ; register contents",KEY_RETURN + !pet KEY_ESC,'s',"@",KEY_ESC,'u',"dos - @ [dos command]",KEY_RETURN + !pet KEY_ESC,'s',"$",KEY_ESC,'u'," - hexadecimal number (default)",KEY_RETURN + !pet KEY_ESC,'s',"+",KEY_ESC,'u'," - decimal number",KEY_RETURN + !pet KEY_ESC,'s',"&",KEY_ESC,'u'," - octal number",KEY_RETURN + !pet KEY_ESC,'s',"%",KEY_ESC,'u'," - binary number",KEY_RETURN + !pet KEY_ESC,'s',"?",KEY_ESC,'u',"help - ?",KEY_RETURN !pet 0 JMP Main From 1913697cd3c17a87509de10edd679dff3664172d Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 28 Dec 2020 18:27:18 +0100 Subject: [PATCH 087/257] more MEGA65 screen editor features --- src/aliases/,aliases_petscii_codes.s | 2 +- .../screen_m65/mega65_chrout_screen_control.s | 4 - .../mega65_chrout_screen_control_2.s | 21 ++++- .../screen_m65/mega65_chrout_screen_escmode.s | 88 +++++++++++++------ 4 files changed, 82 insertions(+), 33 deletions(-) diff --git a/src/aliases/,aliases_petscii_codes.s b/src/aliases/,aliases_petscii_codes.s index 6ea92426..199d3f53 100644 --- a/src/aliases/,aliases_petscii_codes.s +++ b/src/aliases/,aliases_petscii_codes.s @@ -56,7 +56,7 @@ !set KEY_TAB_SET_CLR = $18 ; XXX add to M65 matrix !set KEY_UNDERLINE_ON = $02 ; XXX add to M65 matrix !set KEY_UNDERLINE_OFF = $82 ; XXX add to M65 matrix - !set KEY_FLASHING_ON = $0F ; XXX add to M65 matrix + !set KEY_FLASHING_ON = $0F !set KEY_FLASHING_OFF = $8F ; XXX add to M65 matrix } diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control.s b/src/kernal/screen_m65/mega65_chrout_screen_control.s index 07b9d196..fd6e930a 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control.s @@ -83,10 +83,6 @@ m65_chrout_screen_UNDERLINE_ON: +nop m65_chrout_screen_UNDERLINE_OFF: +nop -m65_chrout_screen_FLASHING_ON: - +nop -m65_chrout_screen_FLASHING_OFF: - +nop m65_chrout_screen_TAB_SET_CLR: +nop m65_chrout_screen_BELL: diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_2.s b/src/kernal/screen_m65/mega65_chrout_screen_control_2.s index f0d235f2..97fdfb00 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control_2.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_2.s @@ -10,6 +10,25 @@ m65_chrout_screen_ESC: sta M65_ESCMODE bra m65_chrout_screen_ctrl2_end +; Flashing support + +m65_chrout_screen_FLASHING_ON: + + lda COLOR + ora #%00010000 + bra m65_chrout_screen_FLASHING_common + +m65_chrout_screen_FLASHING_OFF: ; XXX how to trigger it? + + lda COLOR + and #%11101111 + + ; FALLTROUGH + +m65_chrout_screen_FLASHING_common: + + sta COLOR + bra m65_chrout_screen_ctrl2_end ; 'REVERSE' mode support @@ -149,8 +168,6 @@ m65_chrout_screen_INS_winmode: bra m65_chrout_screen_ctrl2_end - - m65_chrout_screen_INS_copy: dez diff --git a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s b/src/kernal/screen_m65/mega65_chrout_screen_escmode.s index 21b7ff8a..b97b3e1b 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_escmode.s @@ -40,7 +40,20 @@ m65_chrout_screen_escmode: tax jmp (m65_chrout_screen_jumptable_escape, x) -m65_chrout_esc_J: ; move cursor to the beginning of the line +m65_chrout_esc_LBR: ; set monochrome display + + lda #$80 + +skip_2_bytes_trash_nvz + + ; FALLTROUGH + +m65_chrout_esc_RBR: ; set color display + + lda #$00 + jsr m65_colorset + bra m65_chrout_esc_done_1 + +m65_chrout_esc_J: ; move cursor to the beginning of the line XXX update for window mode lda #$00 sta M65__TXTCOL @@ -80,6 +93,36 @@ m65_chrout_esc_done_1: jmp m65_chrout_screen_done +m65_chrout_esc_P: ; erase everything from start of the line to cursor XXX update for window mode + + phz + ldz #$FF + lda #$20 +@1: + inz + sta [M65_LPNT_SCR], z + cpz M65__TXTCOL + bne @1 + + plz + bra m65_chrout_esc_done_1 + +m65_chrout_esc_Q: ; erase everything from cursor till the end of line XXX update for window mode + + phz + ldx M65_SCRMODE + lda m65_scrtab_txtwidth,x + taz + lda #$20 +@1: + dez + sta [M65_LPNT_SCR], z + cpz M65__TXTCOL + bne @1 + + plz + bra m65_chrout_esc_done_1 + m65_chrout_esc_X: ; cycle through available screen modes lda M65_SCRMODE @@ -137,47 +180,40 @@ m65_chrout_esc_R: ; 'reversed' screen colors ; XXX: implement screen routines below: -m65_chrout_esc_AT: +m65_chrout_esc_AT: ; clears everything from cursor till end of the screen +nop -m65_chrout_esc_A: +m65_chrout_esc_A: ; enable auto-insert mode +nop -m65_chrout_esc_B: +m65_chrout_esc_B: ; set bottom-right window position +nop -m65_chrout_esc_C: +m65_chrout_esc_C: ; disable auto-insert mode +nop -m65_chrout_esc_D: +m65_chrout_esc_D: ; delete current line, move content up +nop -m65_chrout_esc_E: +m65_chrout_esc_E: ; disable cursor flashing +nop -m65_chrout_esc_F: +m65_chrout_esc_F: ; enable cursor flashing +nop -m65_chrout_esc_G: +m65_chrout_esc_G: ; enable bell +nop -m65_chrout_esc_H: +m65_chrout_esc_H: ; disable bell +nop -m65_chrout_esc_I: +m65_chrout_esc_I: ; insert empty line, move content down +nop -m65_chrout_esc_L: +m65_chrout_esc_L: ; enable screen scrolling +nop -m65_chrout_esc_M: +m65_chrout_esc_M: ; disable screen scrolling, wrap-around mode +nop -m65_chrout_esc_P: +m65_chrout_esc_T: ; set top-left window position +nop -m65_chrout_esc_Q: +m65_chrout_esc_V: ; scroll screen up one line +nop -m65_chrout_esc_T: +m65_chrout_esc_W: ; scroll screen down one line +nop -m65_chrout_esc_V: +m65_chrout_esc_Y: ; set default TAB stops +nop -m65_chrout_esc_W: - +nop -m65_chrout_esc_Y: - +nop -m65_chrout_esc_Z: - +nop -m65_chrout_esc_LBR: - +nop -m65_chrout_esc_RBR: +m65_chrout_esc_Z: ; clear all the TAB stops +nop + jmp m65_chrout_screen_done From 0d05ac1f4410ff2b862b6a5457e45cd970071a0f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 28 Dec 2020 21:38:36 +0100 Subject: [PATCH 088/257] more MEGA65 screen editor work, bell works now --- src/aliases/,aliases_petscii_codes.s | 8 +- src/aliases/,aliases_ram_lowmem_m65.s | 5 +- .../screen_m65/mega65_chrout_screen_control.s | 6 -- .../mega65_chrout_screen_control_1.s | 3 +- .../mega65_chrout_screen_control_2.s | 80 ++++++++++++++++++- .../screen_m65/mega65_chrout_screen_escmode.s | 21 +++-- 6 files changed, 98 insertions(+), 25 deletions(-) diff --git a/src/aliases/,aliases_petscii_codes.s b/src/aliases/,aliases_petscii_codes.s index 199d3f53..e9e9c714 100644 --- a/src/aliases/,aliases_petscii_codes.s +++ b/src/aliases/,aliases_petscii_codes.s @@ -54,10 +54,10 @@ !set KEY_TAB = $09 !set KEY_LINE_FEED = $0A ; XXX add to M65 matrix !set KEY_TAB_SET_CLR = $18 ; XXX add to M65 matrix - !set KEY_UNDERLINE_ON = $02 ; XXX add to M65 matrix - !set KEY_UNDERLINE_OFF = $82 ; XXX add to M65 matrix - !set KEY_FLASHING_ON = $0F - !set KEY_FLASHING_OFF = $8F ; XXX add to M65 matrix + !set KEY_UNDERLINE_ON = $02 ; CTRL+G + !set KEY_UNDERLINE_OFF = $82 + !set KEY_FLASHING_ON = $0F ; CTRL+O + !set KEY_FLASHING_OFF = $8F } diff --git a/src/aliases/,aliases_ram_lowmem_m65.s b/src/aliases/,aliases_ram_lowmem_m65.s index 127bd28b..15aeacd2 100644 --- a/src/aliases/,aliases_ram_lowmem_m65.s +++ b/src/aliases/,aliases_ram_lowmem_m65.s @@ -59,8 +59,9 @@ !addr M65_KB_PRESSED = $5A0 ; $5A0-$5A2 keys pressed, used during scanning keyboard !addr M65_KB_PRESSED_OLD = $5A3 ; $5A3-$5A5 keys pressed during previous scan !addr M65_KB_PRESSED_NEW = $5A6 ; $5A6-$5A8 set of M65_KB_PRESSED minus M65_KB_PRESSED_OLD - !addr M65_JOYCRSR = $5A9 ; joystick to be used for cursor movement - ; $5AA-$5EB -- UNUSED -- + !addr M65_BELLDSBL = $5A9 ; flag - if set, disable the bell + !addr M65_JOYCRSR = $5AA ; joystick to be used for cursor movement + ; $5AB-$5EB -- UNUSED -- !addr M65_DMAGIC_LIST = $5F1 ; $5EF-$5FF reserved for DMAgic list, 15 bytes (modulo bytes are not needed) !addr M65_RS232_INBUF = $600 ; $600-$6FF -- reserved for RS-232 input buffer -- !addr M65_RS232_OUTBUF = $700 ; $700-$7FF -- reserved for RS-232 output buffer -- diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control.s b/src/kernal/screen_m65/mega65_chrout_screen_control.s index fd6e930a..7633891b 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control.s @@ -79,12 +79,6 @@ m65_chrout_screen_TAB: +nop m65_chrout_screen_LINE_FEED: +nop -m65_chrout_screen_UNDERLINE_ON: - +nop -m65_chrout_screen_UNDERLINE_OFF: - +nop m65_chrout_screen_TAB_SET_CLR: - +nop -m65_chrout_screen_BELL: jmp m65_chrout_screen_done diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_1.s b/src/kernal/screen_m65/mega65_chrout_screen_control_1.s index dddeb1f9..ce3ef430 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control_1.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_1.s @@ -35,9 +35,10 @@ m65_chrout_screen_CRSR_UP: m65_chrout_screen_RETURN: - ; RETURN clears quote and insert modes, it also clears reverse flag + ; RETURN clears quote and insert modes, reverse flag, etc. jsr m65_screen_clear_special_modes + jsr m65_screen_clear_colorattr ; Move cursor to the beginning of the next line diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_2.s b/src/kernal/screen_m65/mega65_chrout_screen_control_2.s index 97fdfb00..40e12247 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control_2.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_2.s @@ -10,22 +10,34 @@ m65_chrout_screen_ESC: sta M65_ESCMODE bra m65_chrout_screen_ctrl2_end -; Flashing support +; Flashing and underline support + +m65_chrout_screen_UNDERLINE_ON: + + lda COLOR + ora #%10000000 + bra m65_chrout_screen_FLAUND_common + +m65_chrout_screen_UNDERLINE_OFF: + + lda COLOR + and #%01111111 + bra m65_chrout_screen_FLAUND_common m65_chrout_screen_FLASHING_ON: lda COLOR ora #%00010000 - bra m65_chrout_screen_FLASHING_common + bra m65_chrout_screen_FLAUND_common -m65_chrout_screen_FLASHING_OFF: ; XXX how to trigger it? +m65_chrout_screen_FLASHING_OFF: lda COLOR and #%11101111 ; FALLTROUGH -m65_chrout_screen_FLASHING_common: +m65_chrout_screen_FLAUND_common: sta COLOR bra m65_chrout_screen_ctrl2_end @@ -179,3 +191,63 @@ m65_chrout_screen_INS_copy: bne m65_chrout_screen_INS_copy rts + +; Bell (jingle) + +m65_chrout_screen_BELL: + + lda M65_BELLDSBL + bmi m65_chrout_screen_BELL_done + + ; Play bell on both left&right secondary SIDs - first reset the SIDs + + ldx #$1F + lda #$00 +@1: + sta __SID_BASE + $20,x + sta __SID_BASE + $60,x + dex + bpl @1 + + lda #$0A ; volume + sta SID_SIGVOL + $20 + sta SID_SIGVOL + $60 + + lda #$23 ; channel 1 - attack/decay + sta SID_ATDCY1 + $20 + sta SID_ATDCY1 + $60 + + lda #$52 ; channel 1 - sustain/release + sta SID_SUREL1 + $20 + sta SID_SUREL1 + $60 + + lda #$1E ; channel 1 - frequency (HI) + sta SID_FREHI1 + $20 + sta SID_FREHI1 + $60 + + lda #$00 ; channel 1 - frequency (LO) + sta SID_FRELO1 + $20 + sta SID_FRELO1 + $60 + + lda #$11 ; channel 1 - waveform + sta SID_VCREG1 + $20 + sta SID_VCREG1 + $60 + + ldx #$0E ; wait loop +@2: + phx + ldx #$FF + jsr wait_x_bars + plx + dex + bne @2 + + lda #$10 ; stop the jingle + sta SID_VCREG1 + $20 + sta SID_VCREG1 + $60 + + ; FALLTROUGH + +m65_chrout_screen_BELL_done: + + jmp m65_chrout_screen_done diff --git a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s b/src/kernal/screen_m65/mega65_chrout_screen_escmode.s index b97b3e1b..018ca11a 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_escmode.s @@ -40,6 +40,19 @@ m65_chrout_screen_escmode: tax jmp (m65_chrout_screen_jumptable_escape, x) +m65_chrout_esc_G: ; enable bell + + lda #$00 + +skip_2_bytes_trash_nvz + + ; FALLTROUGH + +m65_chrout_esc_H: ; disable bell + + lda #$FF + sta M65_BELLDSBL + bra m65_chrout_esc_done_1 + m65_chrout_esc_LBR: ; set monochrome display lda #$80 @@ -174,10 +187,6 @@ m65_chrout_esc_R: ; 'reversed' screen colors - - - - ; XXX: implement screen routines below: m65_chrout_esc_AT: ; clears everything from cursor till end of the screen @@ -194,10 +203,6 @@ m65_chrout_esc_E: ; disable cursor flashing +nop m65_chrout_esc_F: ; enable cursor flashing +nop -m65_chrout_esc_G: ; enable bell - +nop -m65_chrout_esc_H: ; disable bell - +nop m65_chrout_esc_I: ; insert empty line, move content down +nop m65_chrout_esc_L: ; enable screen scrolling From f3fa863985a0e3e1500f95f47b19dd6a8bf1492a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 28 Dec 2020 22:23:40 +0100 Subject: [PATCH 089/257] small editor improvement --- src/kernal/screen_m65/mega65_chrout_screen_control.s | 2 -- src/kernal/screen_m65/mega65_screen_tables_misc.s | 10 +++++----- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control.s b/src/kernal/screen_m65/mega65_chrout_screen_control.s index 7633891b..28a1542b 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control.s @@ -77,8 +77,6 @@ m65_chrout_try_color_loop: m65_chrout_screen_TAB: +nop -m65_chrout_screen_LINE_FEED: - +nop m65_chrout_screen_TAB_SET_CLR: jmp m65_chrout_screen_done diff --git a/src/kernal/screen_m65/mega65_screen_tables_misc.s b/src/kernal/screen_m65/mega65_screen_tables_misc.s index 7fa50574..e9b41a82 100644 --- a/src/kernal/screen_m65/mega65_screen_tables_misc.s +++ b/src/kernal/screen_m65/mega65_screen_tables_misc.s @@ -97,7 +97,7 @@ m65_chrout_screen_jumptable: !word m65_chrout_screen_CRSR_DOWN !word m65_chrout_screen_CRSR_UP !word m65_chrout_screen_TAB - !word m65_chrout_screen_LINE_FEED + !word m65_chrout_screen_CRSR_DOWN ; Line Feed !word m65_chrout_screen_UNDERLINE_ON !word m65_chrout_screen_UNDERLINE_OFF !word m65_chrout_screen_FLASHING_ON @@ -113,7 +113,7 @@ m65_chrout_screen_jumptable: m65_chrout_screen_jumptable_escape: - !word m65_chrout_esc_AT + !word m65_chrout_esc_AT ; '@' !word m65_chrout_esc_A !word m65_chrout_esc_B !word m65_chrout_esc_C @@ -140,6 +140,6 @@ m65_chrout_screen_jumptable_escape: !word m65_chrout_esc_X !word m65_chrout_esc_Y !word m65_chrout_esc_Z - !word m65_chrout_esc_LBR - !word m65_chrout_screen_done ; pound symbol - !word m65_chrout_esc_RBR + !word m65_chrout_esc_LBR ; left square bracket + !word m65_chrout_screen_done ; pound symbol + !word m65_chrout_esc_RBR ; right square bracket From f5641953abe7cdfda59559dc9c0fa5d960e19884 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 28 Dec 2020 22:41:59 +0100 Subject: [PATCH 090/257] screen editor cleanup --- .../screen_m65/mega65_chrout_screen_control.s | 11 --- .../mega65_chrout_screen_control_2.s | 60 --------------- .../mega65_chrout_screen_control_bell.s | 74 +++++++++++++++++++ ...=> mega65_chrout_screen_control_escmode.s} | 21 +----- .../mega65_chrout_screen_control_tab.s | 15 ++++ 5 files changed, 90 insertions(+), 91 deletions(-) create mode 100644 src/kernal/screen_m65/mega65_chrout_screen_control_bell.s rename src/kernal/screen_m65/{mega65_chrout_screen_escmode.s => mega65_chrout_screen_control_escmode.s} (91%) create mode 100644 src/kernal/screen_m65/mega65_chrout_screen_control_tab.s diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control.s b/src/kernal/screen_m65/mega65_chrout_screen_control.s index 28a1542b..48037810 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control.s @@ -69,14 +69,3 @@ m65_chrout_try_color_loop: ; Unknown code, or key not requiring any handling jmp m65_chrout_screen_done - - - - -; XXX: implement screen routines below: - -m65_chrout_screen_TAB: - +nop -m65_chrout_screen_TAB_SET_CLR: - - jmp m65_chrout_screen_done diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_2.s b/src/kernal/screen_m65/mega65_chrout_screen_control_2.s index 40e12247..96cb91b3 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control_2.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_2.s @@ -191,63 +191,3 @@ m65_chrout_screen_INS_copy: bne m65_chrout_screen_INS_copy rts - -; Bell (jingle) - -m65_chrout_screen_BELL: - - lda M65_BELLDSBL - bmi m65_chrout_screen_BELL_done - - ; Play bell on both left&right secondary SIDs - first reset the SIDs - - ldx #$1F - lda #$00 -@1: - sta __SID_BASE + $20,x - sta __SID_BASE + $60,x - dex - bpl @1 - - lda #$0A ; volume - sta SID_SIGVOL + $20 - sta SID_SIGVOL + $60 - - lda #$23 ; channel 1 - attack/decay - sta SID_ATDCY1 + $20 - sta SID_ATDCY1 + $60 - - lda #$52 ; channel 1 - sustain/release - sta SID_SUREL1 + $20 - sta SID_SUREL1 + $60 - - lda #$1E ; channel 1 - frequency (HI) - sta SID_FREHI1 + $20 - sta SID_FREHI1 + $60 - - lda #$00 ; channel 1 - frequency (LO) - sta SID_FRELO1 + $20 - sta SID_FRELO1 + $60 - - lda #$11 ; channel 1 - waveform - sta SID_VCREG1 + $20 - sta SID_VCREG1 + $60 - - ldx #$0E ; wait loop -@2: - phx - ldx #$FF - jsr wait_x_bars - plx - dex - bne @2 - - lda #$10 ; stop the jingle - sta SID_VCREG1 + $20 - sta SID_VCREG1 + $60 - - ; FALLTROUGH - -m65_chrout_screen_BELL_done: - - jmp m65_chrout_screen_done diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_bell.s b/src/kernal/screen_m65/mega65_chrout_screen_control_bell.s new file mode 100644 index 00000000..c4e5eedd --- /dev/null +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_bell.s @@ -0,0 +1,74 @@ +;; #LAYOUT# M65 KERNAL_1 #TAKE +;; #LAYOUT# * * #IGNORE + + +m65_chrout_screen_BELL: ; play bell (jingle) + + lda M65_BELLDSBL + bmi m65_chrout_screen_BELL_done + + ; Play bell on both left&right secondary SIDs - first reset the SIDs + + ldx #$1F + lda #$00 +@1: + sta __SID_BASE + $20,x + sta __SID_BASE + $60,x + dex + bpl @1 + + lda #$0A ; volume + sta SID_SIGVOL + $20 + sta SID_SIGVOL + $60 + + lda #$23 ; channel 1 - attack/decay + sta SID_ATDCY1 + $20 + sta SID_ATDCY1 + $60 + + lda #$52 ; channel 1 - sustain/release + sta SID_SUREL1 + $20 + sta SID_SUREL1 + $60 + + lda #$1E ; channel 1 - frequency (HI) + sta SID_FREHI1 + $20 + sta SID_FREHI1 + $60 + + lda #$00 ; channel 1 - frequency (LO) + sta SID_FRELO1 + $20 + sta SID_FRELO1 + $60 + + lda #$11 ; channel 1 - waveform + sta SID_VCREG1 + $20 + sta SID_VCREG1 + $60 + + ldx #$0E ; wait loop +@2: + phx + ldx #$FF + jsr wait_x_bars + plx + dex + bne @2 + + lda #$10 ; stop the jingle + sta SID_VCREG1 + $20 + sta SID_VCREG1 + $60 + + ; FALLTROUGH + +m65_chrout_screen_BELL_done: + + jmp m65_chrout_screen_done + +m65_chrout_esc_G: ; enable bell + + lda #$00 + +skip_2_bytes_trash_nvz + + ; FALLTROUGH + +m65_chrout_esc_H: ; disable bell + + lda #$FF + sta M65_BELLDSBL + bra m65_chrout_screen_BELL_done diff --git a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s b/src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s similarity index 91% rename from src/kernal/screen_m65/mega65_chrout_screen_escmode.s rename to src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s index 018ca11a..24a14d1a 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_escmode.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s @@ -25,8 +25,7 @@ m65_chrout_screen_escmode: cmp #$1B bcc @1 - - ; Check for fgew special shifted characters + ; Check for few special shifted characters cpx #$3A ; colon +beq m65_chrout_esc_LBR cpx #$3B ; semicolon @@ -40,19 +39,6 @@ m65_chrout_screen_escmode: tax jmp (m65_chrout_screen_jumptable_escape, x) -m65_chrout_esc_G: ; enable bell - - lda #$00 - +skip_2_bytes_trash_nvz - - ; FALLTROUGH - -m65_chrout_esc_H: ; disable bell - - lda #$FF - sta M65_BELLDSBL - bra m65_chrout_esc_done_1 - m65_chrout_esc_LBR: ; set monochrome display lda #$80 @@ -215,10 +201,5 @@ m65_chrout_esc_V: ; scroll screen up one line +nop m65_chrout_esc_W: ; scroll screen down one line +nop -m65_chrout_esc_Y: ; set default TAB stops - +nop -m65_chrout_esc_Z: ; clear all the TAB stops - +nop - jmp m65_chrout_screen_done diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_tab.s b/src/kernal/screen_m65/mega65_chrout_screen_control_tab.s new file mode 100644 index 00000000..d9d881ee --- /dev/null +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_tab.s @@ -0,0 +1,15 @@ +;; #LAYOUT# M65 KERNAL_1 #TAKE +;; #LAYOUT# * * #IGNORE + + +; XXX: implement screen routines below: + +m65_chrout_esc_Y: ; set default TAB stops + +nop +m65_chrout_esc_Z: ; clear all the TAB stops + +nop +m65_chrout_screen_TAB: + +nop +m65_chrout_screen_TAB_SET_CLR: + + jmp m65_chrout_screen_done From b1131e219ff6b6cbb41918cf2dde84b19eeefd24 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 29 Dec 2020 00:20:27 +0100 Subject: [PATCH 091/257] jingle changes --- .../mega65_chrout_screen_control_bell.s | 113 +++++++++++------- 1 file changed, 70 insertions(+), 43 deletions(-) diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_bell.s b/src/kernal/screen_m65/mega65_chrout_screen_control_bell.s index c4e5eedd..9921ffe2 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control_bell.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_bell.s @@ -2,6 +2,8 @@ ;; #LAYOUT# * * #IGNORE +; XXX invent something pleasant to hear, afterwards size-optimize the code + m65_chrout_screen_BELL: ; play bell (jingle) lda M65_BELLDSBL @@ -9,6 +11,73 @@ m65_chrout_screen_BELL: ; play bell (jingle) ; Play bell on both left&right secondary SIDs - first reset the SIDs + jsr m65_chrout_screen_BELL_clear + + lda #$0A ; volume + sta SID_SIGVOL + $20 + sta SID_SIGVOL + $60 + + ldx #$04 ; wait loop, to prevent popping sound + jsr m65_chrout_screen_BELL_wait + + lda #$23 ; channel 1 - attack/decay + sta SID_ATDCY1 + $20 + sta SID_ATDCY1 + $60 + + lda #$91 ; channel 1 - sustain/release + sta SID_SUREL1 + $20 + sta SID_SUREL1 + $60 + + lda #$1D ; channel 1 - frequency (HI) + sta SID_FREHI1 + $20 + sta SID_FREHI1 + $60 + lda #$42 ; channel 3 - frequency (HI) + sta SID_FREHI3 + $20 + sta SID_FREHI3 + $60 + + lda #$00 ; channel 1 - frequency (LO) + sta SID_FRELO1 + $20 + sta SID_FRELO1 + $60 + lda #$00 ; channel 3 - frequency (LO) + sta SID_FRELO3 + $20 + sta SID_FRELO3 + $60 + + lda #$10 ; channel 3 - waveform (triangle) + sta SID_VCREG3 + $20 + sta SID_VCREG3 + $60 + + lda #$17 ; channel 1 - waveform (triangle), synchronized, modulated + sta SID_VCREG1 + $20 + sta SID_VCREG1 + $60 + + ldx #$0F ; wait loop + jsr m65_chrout_screen_BELL_wait + + lda #$14 ; stop the jingle + sta SID_VCREG1 + $20 + sta SID_VCREG1 + $60 + + ldx #$04 ; wait loop + jsr m65_chrout_screen_BELL_wait + + ; FALLTROUGH + +m65_chrout_screen_BELL_done: + + jmp m65_chrout_screen_done + +m65_chrout_screen_BELL_wait: ; XXX this can probably be deduplicated + + phx + ldx #$FF + jsr wait_x_bars + plx + dex + bne m65_chrout_screen_BELL_wait + rts + +m65_chrout_screen_BELL_clear: + ldx #$1F lda #$00 @1: @@ -16,49 +85,7 @@ m65_chrout_screen_BELL: ; play bell (jingle) sta __SID_BASE + $60,x dex bpl @1 - - lda #$0A ; volume - sta SID_SIGVOL + $20 - sta SID_SIGVOL + $60 - - lda #$23 ; channel 1 - attack/decay - sta SID_ATDCY1 + $20 - sta SID_ATDCY1 + $60 - - lda #$52 ; channel 1 - sustain/release - sta SID_SUREL1 + $20 - sta SID_SUREL1 + $60 - - lda #$1E ; channel 1 - frequency (HI) - sta SID_FREHI1 + $20 - sta SID_FREHI1 + $60 - - lda #$00 ; channel 1 - frequency (LO) - sta SID_FRELO1 + $20 - sta SID_FRELO1 + $60 - - lda #$11 ; channel 1 - waveform - sta SID_VCREG1 + $20 - sta SID_VCREG1 + $60 - - ldx #$0E ; wait loop -@2: - phx - ldx #$FF - jsr wait_x_bars - plx - dex - bne @2 - - lda #$10 ; stop the jingle - sta SID_VCREG1 + $20 - sta SID_VCREG1 + $60 - - ; FALLTROUGH - -m65_chrout_screen_BELL_done: - - jmp m65_chrout_screen_done + rts m65_chrout_esc_G: ; enable bell From eab6efbe07add5d5790f47d1956ce8251e33c243 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 29 Dec 2020 15:16:51 +0100 Subject: [PATCH 092/257] jingle sound is sane now --- .../mega65_chrout_screen_control_bell.s | 51 +++++++------------ 1 file changed, 19 insertions(+), 32 deletions(-) diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_bell.s b/src/kernal/screen_m65/mega65_chrout_screen_control_bell.s index 9921ffe2..2fc24ba8 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control_bell.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_bell.s @@ -2,8 +2,6 @@ ;; #LAYOUT# * * #IGNORE -; XXX invent something pleasant to hear, afterwards size-optimize the code - m65_chrout_screen_BELL: ; play bell (jingle) lda M65_BELLDSBL @@ -11,7 +9,15 @@ m65_chrout_screen_BELL: ; play bell (jingle) ; Play bell on both left&right secondary SIDs - first reset the SIDs - jsr m65_chrout_screen_BELL_clear + ldx #$1F + lda #$00 +@1: + sta __SID_BASE + $20,x + sta __SID_BASE + $60,x + dex + bpl @1 + + ; Set jingle parameters lda #$0A ; volume sta SID_SIGVOL + $20 @@ -20,44 +26,36 @@ m65_chrout_screen_BELL: ; play bell (jingle) ldx #$04 ; wait loop, to prevent popping sound jsr m65_chrout_screen_BELL_wait - lda #$23 ; channel 1 - attack/decay + lda #$1D ; channel 1 - attack/decay sta SID_ATDCY1 + $20 sta SID_ATDCY1 + $60 - lda #$91 ; channel 1 - sustain/release + lda #$06 ; channel 1 - sustain/release sta SID_SUREL1 + $20 sta SID_SUREL1 + $60 - lda #$1D ; channel 1 - frequency (HI) + lda #$21 ; channel 1 - frequency (HI) sta SID_FREHI1 + $20 sta SID_FREHI1 + $60 - lda #$42 ; channel 3 - frequency (HI) - sta SID_FREHI3 + $20 - sta SID_FREHI3 + $60 lda #$00 ; channel 1 - frequency (LO) sta SID_FRELO1 + $20 sta SID_FRELO1 + $60 - lda #$00 ; channel 3 - frequency (LO) - sta SID_FRELO3 + $20 - sta SID_FRELO3 + $60 - lda #$10 ; channel 3 - waveform (triangle) - sta SID_VCREG3 + $20 - sta SID_VCREG3 + $60 + ; Play jingle - lda #$17 ; channel 1 - waveform (triangle), synchronized, modulated + lda #$11 ; channel 1 - waveform (triangle) sta SID_VCREG1 + $20 sta SID_VCREG1 + $60 - ldx #$0F ; wait loop + ldx #$08 ; wait loop jsr m65_chrout_screen_BELL_wait - - lda #$14 ; stop the jingle + + lda #$10 sta SID_VCREG1 + $20 sta SID_VCREG1 + $60 - ldx #$04 ; wait loop + ldx #$04 ; wait loop before clear, to prevent popping sound jsr m65_chrout_screen_BELL_wait ; FALLTROUGH @@ -66,7 +64,7 @@ m65_chrout_screen_BELL_done: jmp m65_chrout_screen_done -m65_chrout_screen_BELL_wait: ; XXX this can probably be deduplicated +m65_chrout_screen_BELL_wait: ; XXX this can probably be deduplicated phx ldx #$FF @@ -76,17 +74,6 @@ m65_chrout_screen_BELL_wait: ; XXX this can probably be deduplicated bne m65_chrout_screen_BELL_wait rts -m65_chrout_screen_BELL_clear: - - ldx #$1F - lda #$00 -@1: - sta __SID_BASE + $20,x - sta __SID_BASE + $60,x - dex - bpl @1 - rts - m65_chrout_esc_G: ; enable bell lda #$00 From f7acce62b32cc44efbfd396df47b10ee07ab4088 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 29 Dec 2020 23:02:12 +0100 Subject: [PATCH 093/257] more Z80 work --- src/zvm_m65/,aliases_zvm.s | 123 ++++----- src/zvm_m65/z80_instr_bit_sizeopt.s | 392 ++++++++++++++++++++++++++++ src/zvm_m65/z80_instr_block.s | 67 +++++ src/zvm_m65/z80_instr_exchange.s | 15 ++ src/zvm_m65/z80_instr_load_16bit.s | 46 +++- src/zvm_m65/z80_table_gen.s | 2 + src/zvm_m65/zvm_core.s | 173 ++---------- 7 files changed, 608 insertions(+), 210 deletions(-) create mode 100644 src/zvm_m65/z80_table_gen.s diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index be9415f5..4a46ba74 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -1,72 +1,73 @@ -!addr REG_AF = $02 ; 16-bit combined register -!addr REG_F = REG_AF+0 ; 8-bit flag register -!addr REG_A = REG_AF+1 ; 8-bit accumulator -!addr REG_BC = $04 -!addr REG_C = REG_BC+0 -!addr REG_B = REG_BC+1 -!addr REG_DE = $06 -!addr REG_E = REG_DE+0 -!addr REG_D = REG_DE+1 -!addr REG_HL = $08 -!addr REG_L = REG_HL+0 -!addr REG_H = REG_HL+1 +!addr REG_AF = $02 ; 16-bit combined register +!addr REG_F = REG_AF+0 ; 8-bit flag register +!addr REG_A = REG_AF+1 ; 8-bit accumulator +!addr REG_BC = $04 +!addr REG_C = REG_BC+0 +!addr REG_B = REG_BC+1 +!addr REG_DE = $06 +!addr REG_E = REG_DE+0 +!addr REG_D = REG_DE+1 +!addr REG_HL = $08 +!addr REG_L = REG_HL+0 +!addr REG_H = REG_HL+1 -!addr REG_F_SH = $0A ; shadow registers -!addr REG_A_SH = $0B -!addr REG_C_SH = $0C -!addr REG_B_SH = $0D -!addr REG_E_SH = $0E -!addr REG_D_SH = $0F -!addr REG_L_SH = $10 -!addr REG_H_SH = $11 +!addr REG_F_SH = $0A ; shadow registers +!addr REG_A_SH = $0B +!addr REG_C_SH = $0C +!addr REG_B_SH = $0D +!addr REG_E_SH = $0E +!addr REG_D_SH = $0F +!addr REG_L_SH = $10 +!addr REG_H_SH = $11 -!addr REG_IX = $12 ; 16-bit index register -!addr REG_IXL = $12 -!addr REG_IXH = $13 -!addr REG_IY = $14 ; 16-bit index register -!addr REG_IYL = $14 -!addr REG_IYH = $15 -!addr REG_SP = $16 ; 16-bit stack pointer -!addr REG_PC = $18 ; 16-bit program counter +!addr REG_IX = $12 ; 16-bit index register +!addr REG_IXL = $12 +!addr REG_IXH = $13 +!addr REG_IY = $14 ; 16-bit index register +!addr REG_IYL = $14 +!addr REG_IYH = $15 +!addr REG_SP = $16 ; 16-bit stack pointer +!addr REG_PC = $18 ; 16-bit program counter -!addr REG_I = $1A ; 8-bit interrupt vector base -!addr REG_R06 = $1B ; refresh counter, bits 0-6 (bit 7 is garbage) -!addr REG_R7 = $1C ; refresh counter, bit 7 (bits 0-6 are garbage) +!addr REG_I = $1A ; 8-bit interrupt vector base +!addr REG_R06 = $1B ; refresh counter, bits 0-6 (bit 7 is garbage) +!addr REG_R7 = $1C ; refresh counter, bit 7 (bits 0-6 are garbage) -!addr PTR_IXY_d = $1D ; 16-bit calculated address IX+d / IY+d XXX - important!!! -!addr PTR_DATA = $1F ; data source address XXX - important!!! +!addr PTR_IXY_d = $1D ; 16-bit calculated address IX+d / IY+d XXX - important!!! +!addr PTR_DATA = $1F ; data source address XXX - important!!! + +!addr REG_IFF1 = $23 ; interrupt flip-flop flag 1 +!addr REG_IFF2 = $24 ; interrupt flip-flop flag 2 + +!addr REG_TMP1 = $25 ; emulation-specific temporary storage +!addr REG_TMP2 = $26 +!addr ADDR_IO = $27 ; 16-bit address for fetching/storing the IO -!addr REG_IFF1 = $23 ; interrupt flip-flop flag 1 -!addr REG_IFF2 = $24 ; interrupt flip-flop flag 2 - -!addr REG_TMP1 = $25 ; emulation-specific temporary storage -!addr REG_TMP2 = $26 -!addr ADDR_IO = $27 ; 16-bit address for fetching/storing the IO - - -!addr VEC_MOVE_fetch = $30 ; vector to byte fetch routine, for BIOS routine MOVE -!addr VEC_MOVE_store = $32 ; vector to byte store routine, for BIOS routine MOVE -!addr VEC_DISKIO_store = $34 ; vector to byte store routine, for BIOS disk I/O operations - -!addr VEC_fetch_value = $60 -!addr VEC_fetch_stack = $62 -!addr VEC_store_stack = $64 -!addr VEC_fetch_via_BC = $66 ; XXX add routines -!addr VEC_store_via_BC = $68 ; XXX add routines -!addr VEC_fetch_via_DE = $6A ; XXX add routines -!addr VEC_store_via_DE = $6C ; XXX add routines -!addr VEC_fetch_via_HL = $6E -!addr VEC_store_via_HL = $70 -!addr VEC_fetch_via_IX_d = $72 -!addr VEC_fetch_via_IY_d = $74 -!addr VEC_store_via_IX_d = $76 -!addr VEC_store_via_IY_d = $78 -!addr VEC_fetch_via_nn = $7A -!addr VEC_store_via_nn = $7C - +!addr VEC_MOVE_fetch = $30 ; vector to byte fetch routine, for BIOS routine MOVE +!addr VEC_MOVE_store = $32 ; vector to byte store routine, for BIOS routine MOVE +!addr VEC_DISKIO_store = $34 ; vector to byte store routine, for BIOS disk I/O operations +!addr VEC_fetch_value = $50 +!addr VEC_fetch_stack = $52 +!addr VEC_store_stack = $54 +!addr VEC_fetch_via_BC = $56 ; XXX add routines +!addr VEC_store_via_BC = $58 ; XXX add routines +!addr VEC_fetch_via_DE = $5A ; XXX add routines +!addr VEC_store_via_DE = $5C ; XXX add routines +!addr VEC_fetch_via_HL = $5E +!addr VEC_store_via_HL = $60 +!addr VEC_fetch_via_IX_d = $62 +!addr VEC_fetch_via_IY_d = $64 +!addr VEC_store_via_IX_d = $66 +!addr VEC_store_via_IY_d = $68 +!addr VEC_fetch_via_nn = $6A +!addr VEC_store_via_nn = $6C +!addr VEC_fetch_via_plus1 = $6E ; XXX add routines +!addr VEC_store_via_plus1 = $70 ; XXX add routines XXX jump to next directly? +!addr VEC_xchng_stack_lo = $72 ; XXX add routines +!addr VEC_xchng_stack_hi = $74 ; XXX add routines ; Masks for Z80 flag (F) register diff --git a/src/zvm_m65/z80_instr_bit_sizeopt.s b/src/zvm_m65/z80_instr_bit_sizeopt.s index 5d1027bd..706a7c62 100644 --- a/src/zvm_m65/z80_instr_bit_sizeopt.s +++ b/src/zvm_m65/z80_instr_bit_sizeopt.s @@ -3,3 +3,395 @@ ; Z80 bit set/reset/test instructions - these illegals are size optimized ; + +!macro Z80_RES0_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + and #%11111110 + sta .REGn + bra Z80_common_res_0123 +} + +!macro Z80_RES1_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + and #%11111101 + sta .REGn + bra Z80_common_res_0123 +} + +!macro Z80_RES2_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + and #%11111011 + sta .REGn + bra Z80_common_res_0123 +} + +!macro Z80_RES3_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + and #%11110111 + sta .REGn + bra Z80_common_res_0123 +} + +!macro Z80_RES4_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + and #%11101111 + sta .REGn + bra Z80_common_res_4567 +} + +!macro Z80_RES5_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + and #%11011111 + sta .REGn + bra Z80_common_res_4567 +} + +!macro Z80_RES6_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + and #%10111111 + sta .REGn + bra Z80_common_res_4567 +} + +!macro Z80_RES7_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + and #%01111111 + sta .REGn + bra Z80_common_res_4567 +} + +Z80_illeg_xDCB_80: +Z80_RES0_VIA_IXY_d_REGn REG_B ; RES 0,(IXY+d),B +Z80_illeg_xDCB_81: +Z80_RES0_VIA_IXY_d_REGn REG_C ; RES 0,(IXY+d),C +Z80_illeg_xDCB_82: +Z80_RES0_VIA_IXY_d_REGn REG_D ; RES 0,(IXY+d),D +Z80_illeg_xDCB_83: +Z80_RES0_VIA_IXY_d_REGn REG_E ; RES 0,(IXY+d),E +Z80_illeg_xDCB_84: +Z80_RES0_VIA_IXY_d_REGn REG_H ; RES 0,(IXY+d),H +Z80_illeg_xDCB_85: +Z80_RES0_VIA_IXY_d_REGn REG_L ; RES 0,(IXY+d),L + +Z80_illeg_xDCB_88: +Z80_RES1_VIA_IXY_d_REGn REG_B ; RES 1,(IXY+d),B +Z80_illeg_xDCB_89: +Z80_RES1_VIA_IXY_d_REGn REG_C ; RES 1,(IXY+d),C +Z80_illeg_xDCB_8A: +Z80_RES1_VIA_IXY_d_REGn REG_D ; RES 1,(IXY+d),D +Z80_illeg_xDCB_8B: +Z80_RES1_VIA_IXY_d_REGn REG_E ; RES 1,(IXY+d),E +Z80_illeg_xDCB_8C: +Z80_RES1_VIA_IXY_d_REGn REG_H ; RES 1,(IXY+d),H +Z80_illeg_xDCB_8D: +Z80_RES1_VIA_IXY_d_REGn REG_L ; RES 1,(IXY+d),L + + lda [PTR_IXY_d],z + and #%11111101 + sta REG_L + + ; FALLTROUGH + +Z80_common_res_0123: + + sta [PTR_IXY_d],z + jmp ZVM_next + +Z80_illeg_xDCB_90: +Z80_RES2_VIA_IXY_d_REGn REG_B ; RES 2,(IXY+d),B +Z80_illeg_xDCB_91: +Z80_RES2_VIA_IXY_d_REGn REG_C ; RES 2,(IXY+d),C +Z80_illeg_xDCB_92: +Z80_RES2_VIA_IXY_d_REGn REG_D ; RES 2,(IXY+d),D +Z80_illeg_xDCB_93: +Z80_RES2_VIA_IXY_d_REGn REG_E ; RES 2,(IXY+d),E +Z80_illeg_xDCB_94: +Z80_RES2_VIA_IXY_d_REGn REG_H ; RES 2,(IXY+d),H +Z80_illeg_xDCB_95: +Z80_RES2_VIA_IXY_d_REGn REG_L ; RES 2,(IXY+d),L + +Z80_illeg_xDCB_98: +Z80_RES3_VIA_IXY_d_REGn REG_B ; RES 3,(IXY+d),B +Z80_illeg_xDCB_99: +Z80_RES3_VIA_IXY_d_REGn REG_C ; RES 3,(IXY+d),C +Z80_illeg_xDCB_9A: +Z80_RES3_VIA_IXY_d_REGn REG_D ; RES 3,(IXY+d),D +Z80_illeg_xDCB_9B: +Z80_RES3_VIA_IXY_d_REGn REG_E ; RES 3,(IXY+d),E +Z80_illeg_xDCB_9C: +Z80_RES3_VIA_IXY_d_REGn REG_H ; RES 3,(IXY+d),H +Z80_illeg_xDCB_9D: +Z80_RES3_VIA_IXY_d_REGn REG_L ; RES 3,(IXY+d),L + +Z80_illeg_xDCB_A0: +Z80_RES4_VIA_IXY_d_REGn REG_B ; RES 4,(IXY+d),B +Z80_illeg_xDCB_A1: +Z80_RES4_VIA_IXY_d_REGn REG_C ; RES 4,(IXY+d),C +Z80_illeg_xDCB_A2: +Z80_RES4_VIA_IXY_d_REGn REG_D ; RES 4,(IXY+d),D +Z80_illeg_xDCB_A3: +Z80_RES4_VIA_IXY_d_REGn REG_E ; RES 4,(IXY+d),E +Z80_illeg_xDCB_A4: +Z80_RES4_VIA_IXY_d_REGn REG_H ; RES 4,(IXY+d),H +Z80_illeg_xDCB_A5: +Z80_RES4_VIA_IXY_d_REGn REG_L ; RES 4,(IXY+d),L + +Z80_illeg_xDCB_A8: +Z80_RES5_VIA_IXY_d_REGn REG_B ; RES 5,(IXY+d),B +Z80_illeg_xDCB_A9: +Z80_RES5_VIA_IXY_d_REGn REG_C ; RES 5,(IXY+d),C +Z80_illeg_xDCB_AA: +Z80_RES5_VIA_IXY_d_REGn REG_D ; RES 5,(IXY+d),D +Z80_illeg_xDCB_AB: +Z80_RES5_VIA_IXY_d_REGn REG_E ; RES 5,(IXY+d),E +Z80_illeg_xDCB_AC: +Z80_RES5_VIA_IXY_d_REGn REG_H ; RES 5,(IXY+d),H +Z80_illeg_xDCB_AD: +Z80_RES5_VIA_IXY_d_REGn REG_L ; RES 5,(IXY+d),L + + lda [PTR_IXY_d],z + and #%11011111 + sta REG_L + + ; FALLTROUGH + +Z80_common_res_4567: + + sta [PTR_IXY_d],z + jmp ZVM_next + +Z80_illeg_xDCB_B0: +Z80_RES6_VIA_IXY_d_REGn REG_B ; RES 6,(IXY+d),B +Z80_illeg_xDCB_B1: +Z80_RES6_VIA_IXY_d_REGn REG_C ; RES 6,(IXY+d),C +Z80_illeg_xDCB_B2: +Z80_RES6_VIA_IXY_d_REGn REG_D ; RES 6,(IXY+d),D +Z80_illeg_xDCB_B3: +Z80_RES6_VIA_IXY_d_REGn REG_E ; RES 6,(IXY+d),E +Z80_illeg_xDCB_B4: +Z80_RES6_VIA_IXY_d_REGn REG_H ; RES 6,(IXY+d),H +Z80_illeg_xDCB_B5: +Z80_RES6_VIA_IXY_d_REGn REG_L ; RES 6,(IXY+d),L + +Z80_illeg_xDCB_B8: +Z80_RES7_VIA_IXY_d_REGn REG_B ; RES 7,(IXY+d),B +Z80_illeg_xDCB_B9: +Z80_RES7_VIA_IXY_d_REGn REG_C ; RES 7,(IXY+d),C +Z80_illeg_xDCB_BA: +Z80_RES7_VIA_IXY_d_REGn REG_D ; RES 7,(IXY+d),D +Z80_illeg_xDCB_BB: +Z80_RES7_VIA_IXY_d_REGn REG_E ; RES 7,(IXY+d),E +Z80_illeg_xDCB_BC: +Z80_RES7_VIA_IXY_d_REGn REG_H ; RES 7,(IXY+d),H +Z80_illeg_xDCB_BD: +Z80_RES7_VIA_IXY_d_REGn REG_L ; RES 7,(IXY+d),L + +!macro Z80_SET0_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + ora #%00000001 + sta .REGn + bra Z80_common_set_0123 +} + +!macro Z80_SET1_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + ora #%00000010 + sta .REGn + bra Z80_common_set_0123 +} + +!macro Z80_SET2_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + ora #%00000100 + sta .REGn + bra Z80_common_set_0123 +} + +!macro Z80_SET3_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + ora #%00001000 + sta .REGn + bra Z80_common_set_0123 +} + +!macro Z80_SET4_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + ora #%00010000 + sta .REGn + bra Z80_common_set_4567 +} + +!macro Z80_SET5_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + ora #%00100000 + sta .REGn + bra Z80_common_set_4567 +} + +!macro Z80_SET6_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + ora #%01000000 + sta .REGn + bra Z80_common_set_4567 +} + +!macro Z80_SET7_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d],z + ora #%10000000 + sta .REGn + bra Z80_common_set_4567 +} + +Z80_illeg_xDCB_C0: +Z80_SET0_VIA_IXY_d_REGn REG_B ; SET 0,(IXY+d),B +Z80_illeg_xDCB_C1: +Z80_SET0_VIA_IXY_d_REGn REG_C ; SET 0,(IXY+d),C +Z80_illeg_xDCB_C2: +Z80_SET0_VIA_IXY_d_REGn REG_D ; SET 0,(IXY+d),D +Z80_illeg_xDCB_C3: +Z80_SET0_VIA_IXY_d_REGn REG_E ; SET 0,(IXY+d),E +Z80_illeg_xDCB_C4: +Z80_SET0_VIA_IXY_d_REGn REG_H ; SET 0,(IXY+d),H +Z80_illeg_xDCB_C5: +Z80_SET0_VIA_IXY_d_REGn REG_L ; SET 0,(IXY+d),L + +Z80_illeg_xDCB_C8: +Z80_SET1_VIA_IXY_d_REGn REG_B ; SET 1,(IXY+d),B +Z80_illeg_xDCB_C9: +Z80_SET1_VIA_IXY_d_REGn REG_C ; SET 1,(IXY+d),C +Z80_illeg_xDCB_CA: +Z80_SET1_VIA_IXY_d_REGn REG_D ; SET 1,(IXY+d),D +Z80_illeg_xDCB_CB: +Z80_SET1_VIA_IXY_d_REGn REG_E ; SET 1,(IXY+d),E +Z80_illeg_xDCB_CC: +Z80_SET1_VIA_IXY_d_REGn REG_H ; SET 1,(IXY+d),H +Z80_illeg_xDCB_CD: ; SET 1,(IXY+d),L + + lda [PTR_IXY_d],z + ora #%00000010 + sta REG_L + + ; FALLTROUGH + +Z80_common_set_0123: + + sta [PTR_IXY_d],z + jmp ZVM_next + +Z80_illeg_xDCB_D0: +Z80_SET2_VIA_IXY_d_REGn REG_B ; SET 2,(IXY+d),B +Z80_illeg_xDCB_D1: +Z80_SET2_VIA_IXY_d_REGn REG_C ; SET 2,(IXY+d),C +Z80_illeg_xDCB_D2: +Z80_SET2_VIA_IXY_d_REGn REG_D ; SET 2,(IXY+d),D +Z80_illeg_xDCB_D3: +Z80_SET2_VIA_IXY_d_REGn REG_E ; SET 2,(IXY+d),E +Z80_illeg_xDCB_D4: +Z80_SET2_VIA_IXY_d_REGn REG_H ; SET 2,(IXY+d),H +Z80_illeg_xDCB_D5: +Z80_SET2_VIA_IXY_d_REGn REG_L ; SET 2,(IXY+d),L + +Z80_illeg_xDCB_D8: +Z80_SET3_VIA_IXY_d_REGn REG_B ; SET 3,(IXY+d),B +Z80_illeg_xDCB_D9: +Z80_SET3_VIA_IXY_d_REGn REG_C ; SET 3,(IXY+d),C +Z80_illeg_xDCB_DA: +Z80_SET3_VIA_IXY_d_REGn REG_D ; SET 3,(IXY+d),D +Z80_illeg_xDCB_DB: +Z80_SET3_VIA_IXY_d_REGn REG_E ; SET 3,(IXY+d),E +Z80_illeg_xDCB_DC: +Z80_SET3_VIA_IXY_d_REGn REG_H ; SET 3,(IXY+d),H +Z80_illeg_xDCB_DD: +Z80_SET3_VIA_IXY_d_REGn REG_L ; SET 3,(IXY+d),L + +Z80_illeg_xDCB_E0: +Z80_SET4_VIA_IXY_d_REGn REG_B ; SET 4,(IXY+d),B +Z80_illeg_xDCB_E1: +Z80_SET4_VIA_IXY_d_REGn REG_C ; SET 4,(IXY+d),C +Z80_illeg_xDCB_E2: +Z80_SET4_VIA_IXY_d_REGn REG_D ; SET 4,(IXY+d),D +Z80_illeg_xDCB_E3: +Z80_SET4_VIA_IXY_d_REGn REG_E ; SET 4,(IXY+d),E +Z80_illeg_xDCB_E4: +Z80_SET4_VIA_IXY_d_REGn REG_H ; SET 4,(IXY+d),H +Z80_illeg_xDCB_E5: +Z80_SET4_VIA_IXY_d_REGn REG_L ; SET 4,(IXY+d),L + +Z80_illeg_xDCB_E8: +Z80_SET5_VIA_IXY_d_REGn REG_B ; SET 5,(IXY+d),B +Z80_illeg_xDCB_E9: +Z80_SET5_VIA_IXY_d_REGn REG_C ; SET 5,(IXY+d),C +Z80_illeg_xDCB_EA: +Z80_SET5_VIA_IXY_d_REGn REG_D ; SET 5,(IXY+d),D +Z80_illeg_xDCB_EB: +Z80_SET5_VIA_IXY_d_REGn REG_E ; SET 5,(IXY+d),E +Z80_illeg_xDCB_EC: +Z80_SET5_VIA_IXY_d_REGn REG_H ; SET 5,(IXY+d),H +Z80_illeg_xDCB_ED: ; SET 5,(IXY+d),L + + lda [PTR_IXY_d],z + ora #%00100000 + sta REG_L + + ; FALLTROUGH + +Z80_common_set_4567: + + sta [PTR_IXY_d],z + jmp ZVM_next + +Z80_illeg_xDCB_F0: +Z80_SET6_VIA_IXY_d_REGn REG_B ; SET 6,(IXY+d),B +Z80_illeg_xDCB_F1: +Z80_SET6_VIA_IXY_d_REGn REG_C ; SET 6,(IXY+d),C +Z80_illeg_xDCB_F2: +Z80_SET6_VIA_IXY_d_REGn REG_D ; SET 6,(IXY+d),D +Z80_illeg_xDCB_F3: +Z80_SET6_VIA_IXY_d_REGn REG_E ; SET 6,(IXY+d),E +Z80_illeg_xDCB_F4: +Z80_SET6_VIA_IXY_d_REGn REG_H ; SET 6,(IXY+d),H +Z80_illeg_xDCB_F5: +Z80_SET6_VIA_IXY_d_REGn REG_L ; SET 6,(IXY+d),L + +Z80_illeg_xDCB_F8: +Z80_SET7_VIA_IXY_d_REGn REG_B ; SET 7,(IXY+d),B +Z80_illeg_xDCB_F9: +Z80_SET7_VIA_IXY_d_REGn REG_C ; SET 7,(IXY+d),C +Z80_illeg_xDCB_FA: +Z80_SET7_VIA_IXY_d_REGn REG_D ; SET 7,(IXY+d),D +Z80_illeg_xDCB_FB: +Z80_SET7_VIA_IXY_d_REGn REG_E ; SET 7,(IXY+d),E +Z80_illeg_xDCB_FC: +Z80_SET7_VIA_IXY_d_REGn REG_H ; SET 7,(IXY+d),H +Z80_illeg_xDCB_FD: +Z80_SET7_VIA_IXY_d_REGn REG_L ; SET 7,(IXY+d),L + + + +; XXX turn code below into macros, rework remaining ones to use same concept + + +Z80_illeg_xDCB_87: ; RES 0,(IXY+d),A + + lda [PTR_IXY_d],z + and #%11111110 + bra Z80_common_setres_A + +Z80_illeg_xDCB_8F: ; RES 1,(IXY+d),A + + lda [PTR_IXY_d],z + and #%11111101 + bra Z80_common_setres_A + +Z80_illeg_xDCB_97: ; RES 2,(IXY+d),A + + lda [PTR_IXY_d],z + and #%11111011 + bra Z80_common_setres_A + +Z80_illeg_xDCB_9F: ; RES 3,(IXY+d),A + + lda [PTR_IXY_d],z + and #%11110111 + bra Z80_common_setres_A + +Z80_illeg_xDCB_A7: ; RES 4,(IXY+d),A + + lda [PTR_IXY_d],z + and #%11101111 + bra Z80_common_setres_A + +Z80_illeg_xDCB_AF: ; RES 5,(IXY+d),A + + lda [PTR_IXY_d],z + and #%11011111 + bra Z80_common_setres_A + +Z80_illeg_xDCB_B7: ; RES 6,(IXY+d),A + + lda [PTR_IXY_d],z + and #%10111111 + bra Z80_common_setres_A + +Z80_illeg_xDCB_BF: ; RES 7,(IXY+d),A + + lda [PTR_IXY_d],z + and #%01111111 + bra Z80_common_setres_A + +Z80_illeg_xDCB_C7: ; SET 0,(IXY+d),A + + lda [PTR_IXY_d],z + ora #%00000001 + bra Z80_common_setres_A + +Z80_illeg_xDCB_CF: ; SET 1,(IXY+d),A + + lda [PTR_IXY_d],z + ora #%00000010 + bra Z80_common_setres_A + +Z80_illeg_xDCB_D7: ; SET 2,(IXY+d),A + + lda [PTR_IXY_d],z + ora #%00000100 + bra Z80_common_setres_A + +Z80_illeg_xDCB_DF: ; SET 3,(IXY+d),A + + lda [PTR_IXY_d],z + ora #%00001000 + bra Z80_common_setres_A + +Z80_illeg_xDCB_E7: ; SET 4,(IXY+d),A + + lda [PTR_IXY_d],z + ora #%00010000 + bra Z80_common_setres_A + +Z80_illeg_xDCB_EF: ; SET 5,(IXY+d),A + + lda [PTR_IXY_d],z + ora #%00100000 + bra Z80_common_setres_A + +Z80_illeg_xDCB_F7: ; SET 6,(IXY+d),A + + lda [PTR_IXY_d],z + ora #%01000000 + bra Z80_common_setres_A + +Z80_illeg_xDCB_FF: ; SET 7,(IXY+d),A + + lda [PTR_IXY_d],z + ora #%10000000 + + ; FALLTROUGH + +Z80_common_setres_A: + + sta REG_A + sta [PTR_IXY_d],z + jmp ZVM_next diff --git a/src/zvm_m65/z80_instr_block.s b/src/zvm_m65/z80_instr_block.s index 49c835dd..a0e3274e 100644 --- a/src/zvm_m65/z80_instr_block.s +++ b/src/zvm_m65/z80_instr_block.s @@ -2,3 +2,70 @@ ; ; Z80 block processing and search instructions ; + + +Z80_instr_ED_A0: ; LDI + + lda REG_F + and #($FF - Z80_HF - Z80_PF - Z80_NF) + sta REG_F + + jsr (VEC_fetch_via_HL) + jsr (VEC_store_via_DE) + + inw REG_HL + inw REG_DE + + dew REG_BC + +beq ZVM_next + +Z80_PUT_1_VF + jmp ZVM_next + +Z80_instr_ED_B0: ; LDIR + + lda REG_F + and #($FF - Z80_HF - Z80_PF - Z80_NF) + sta REG_F +@1: + jsr (VEC_fetch_via_HL) + jsr (VEC_store_via_DE) + + inw REG_HL + inw REG_DE + + dew REG_BC + bne @1 + jmp ZVM_next + +Z80_instr_ED_A8: ; LDD + + lda REG_F + and #($FF - Z80_HF - Z80_PF - Z80_NF) + sta REG_F + + jsr (VEC_fetch_via_HL) + jsr (VEC_store_via_DE) + + dew REG_HL + dew REG_DE + + dew REG_BC + +beq ZVM_next + +Z80_PUT_1_VF + jmp ZVM_next + +Z80_instr_ED_B8: ; LDDR + + lda REG_F + and #($FF - Z80_HF - Z80_PF - Z80_NF) + sta REG_F +@1: + jsr (VEC_fetch_via_HL) + jsr (VEC_store_via_DE) + + dew REG_HL + dew REG_DE + + dew REG_BC + bne @1 + jmp ZVM_next diff --git a/src/zvm_m65/z80_instr_exchange.s b/src/zvm_m65/z80_instr_exchange.s index ac3b149f..0893f413 100644 --- a/src/zvm_m65/z80_instr_exchange.s +++ b/src/zvm_m65/z80_instr_exchange.s @@ -65,3 +65,18 @@ Z80_instr_D9: ; EXX stx REG_L_SH jmp ZVM_next + +!macro Z80_EX_VIA_SP_REGnn .REGnn { + lda .REGnn+0 + jsr (VEC_xchng_stack_lo) + sta .REGnn+0 + lda .REGnn+1 + jsr (VEC_xchng_stack_hi) + sta .REGnn+1 + + jmp ZVM_next +} + +Z80_instr_E3: +Z80_EX_VIA_SP_REGnn REG_HL ; EX (SP),HL +Z80_instr_DD_E3: +Z80_EX_VIA_SP_REGnn REG_IX ; EX (SP),IX +Z80_instr_FD_E3: +Z80_EX_VIA_SP_REGnn REG_IY ; EX (SP),IY diff --git a/src/zvm_m65/z80_instr_load_16bit.s b/src/zvm_m65/z80_instr_load_16bit.s index fa41e3e8..c01e673f 100644 --- a/src/zvm_m65/z80_instr_load_16bit.s +++ b/src/zvm_m65/z80_instr_load_16bit.s @@ -19,6 +19,50 @@ Z80_instr_31: +Z80_LD_REGnn_nn REG_SP ; Z80_instr_DD_21: +Z80_LD_REGnn_nn REG_IX ; LD IX,nn Z80_instr_FD_21: +Z80_LD_REGnn_nn REG_IY ; LD IY,nn +!macro Z80_LD_REGnn_REGnn .REGnn1, .REGnn2 { + lda .REGnn2+0 + sta .REGnn1+0 + jsr .REGnn2+1 + sta .REGnn1+1 + jmp ZVM_next +} + +Z80_instr_F9: +Z80_LD_REGnn_REGnn REG_SP, REG_HL ; LD SP,HL +Z80_instr_DD_F9: +Z80_LD_REGnn_REGnn REG_SP, REG_IX ; LD SP,IX +Z80_instr_FD_F9: +Z80_LD_REGnn_REGnn REG_SP, REG_IY ; LD SP,IY + +!macro Z80_LD_VIA_nn_REGnn .REGnn { + lda .REGnn+0 + jsr (VEC_store_via_nn) + lda .REGnn+1 + jsr (VEC_store_via_plus1) + jmp ZVM_next +} + +Z80_illeg_ED_63: ; LD (nn),HL +Z80_instr_22: +Z80_LD_VIA_nn_REGnn REG_HL ; LD (nn),HL +Z80_instr_ED_43: +Z80_LD_VIA_nn_REGnn REG_BC ; LD (nn),BC +Z80_instr_ED_53: +Z80_LD_VIA_nn_REGnn REG_DE ; LD (nn),DE +Z80_instr_DD_22: +Z80_LD_VIA_nn_REGnn REG_IX ; LD (nn),IX +Z80_instr_FD_22: +Z80_LD_VIA_nn_REGnn REG_IY ; LD (nn),IY +Z80_instr_ED_73: +Z80_LD_VIA_nn_REGnn REG_SP ; LD (nn),SP + +!macro Z80_LD_REGnn_VIA_nn .REGnn { + jsr (VEC_fetch_via_nn) + sta .REGnn+0 + jsr (VEC_fetch_via_plus1) + sta .REGnn+1 + jmp ZVM_next +} + +Z80_illeg_ED_6B: ; LD HL,(nn) +Z80_instr_2A: +Z80_LD_REGnn_VIA_nn REG_HL ; LD HL,(nn) +Z80_instr_ED_4B: +Z80_LD_REGnn_VIA_nn REG_BC ; LD BC,(nn) +Z80_instr_ED_5B: +Z80_LD_REGnn_VIA_nn REG_DE ; LD DE,(nn) +Z80_instr_DD_2A: +Z80_LD_REGnn_VIA_nn REG_IX ; LD IX,(nn) +Z80_instr_FD_2A: +Z80_LD_REGnn_VIA_nn REG_IY ; LD IY,(nn) +Z80_instr_ED_7B: +Z80_LD_REGnn_VIA_nn REG_SP ; LD SP,(nn) + !macro Z80_PUSH_REGnn .REGnn { lda .REGnn+1 jsr (VEC_store_stack) @@ -47,4 +91,4 @@ Z80_instr_D1: +Z80_POP_REGnn REG_DE ; Z80_instr_E1: +Z80_POP_REGnn REG_HL ; POP HL Z80_instr_F1: +Z80_POP_REGnn REG_AF ; POP AF Z80_instr_DD_E1: +Z80_POP_REGnn REG_IX ; POP IX -Z80_instr_FD_E1: +Z80_POP_REGnn REG_IY ; POP IY \ No newline at end of file +Z80_instr_FD_E1: +Z80_POP_REGnn REG_IY ; POP IY diff --git a/src/zvm_m65/z80_table_gen.s b/src/zvm_m65/z80_table_gen.s new file mode 100644 index 00000000..deecff15 --- /dev/null +++ b/src/zvm_m65/z80_table_gen.s @@ -0,0 +1,2 @@ + +; XXX: move ALL table generation here, for some tables (DAA) use floor/ceiling RAM diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index eea2a1c5..e6712f6c 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -80,7 +80,18 @@ ZVM_store_next: ; unsupported illegal instructions Z80_unsupported: - ; XXX add a separate handler for illegal instructions + ; XXX add a separate handler to warn about illegal instructions + + ; block I/O transfer - not implemented for now XXX implement them +Z80_instr_ED_A2: ; INI +Z80_instr_ED_B2: ; INIR +Z80_instr_ED_AA: ; IND +Z80_instr_ED_BA: ; INDR +Z80_instr_ED_A3: ; OUTI +Z80_instr_ED_B3: ; OTIR +Z80_instr_ED_AB: ; OUTD +Z80_instr_ED_BB: ; OTDR + ; XXX add a separate handler to warn about them ; LD instructions with no effect Z80_instr_40: ; LD B,B Z80_instr_49: ; LD C,C @@ -93,7 +104,7 @@ Z80_illeg_DD_64: ; Z80_illeg_DD_6D: ; LD IXL,IXL Z80_illeg_FD_64: ; LD IYH,IYH Z80_illeg_FD_6D: ; LD IYL,IYL - ; For interrupts (emulation not needed for CP/M) + ; Instructions needed only for interrupts (emulation not needed for CP/M) Z80_instr_ED_46: ; IM 0 Z80_illeg_ED_4E: ; IM 0 Z80_illeg_ED_66: ; IM 0 @@ -102,12 +113,13 @@ Z80_instr_ED_56: ; Z80_illeg_ED_76: ; IM 1 Z80_instr_ED_5E: ; IM 2 Z80_illeg_ED_7E: ; IM 2 - ; Real NOP + ; NOP Z80_instr_00: ; NOP Z80_illeg_ED_77: ; NOP Z80_illeg_ED_7F: ; NOP - ; Dispatch via jumptable + ; Fetch and execute the next instruction ZVM_next: +ZVM_DISPATCH Z80_vectab_0, Z80_vectab_1 + ; Dispatch via jumptable Z80_instr_CB: +ZVM_DISPATCH Z80_vectab_CB_0, Z80_vectab_CB_1 ; #CB Z80_instr_DD: +ZVM_DISPATCH Z80_vectab_DD_0, Z80_vectab_DD_1 ; #DD Z80_instr_ED: +ZVM_DISPATCH Z80_vectab_ED_0, Z80_vectab_ED_1 ; #ED @@ -116,6 +128,14 @@ Z80_instr_FD: +ZVM_DISPATCH Z80_vectab_FD_0, Z80_vectab_FD_1 ; +; XXX addition and subtraction are slow; pre-calculate data/flag tables in the extended 8MB RAM +; XXX use TRB/TSB instead of LDA + AND/ORA + STA when applicable + + + + + + @@ -132,12 +152,8 @@ Z80_instr_DD_CB: ; #DDCB Z80_instr_FD_CB: ; #FDCB Z80_instr_09: ; ADD HL,BC Z80_instr_19: ; ADD HL,DE -Z80_instr_22: ; LD (nn),HL Z80_instr_29: ; ADD HL,HL -Z80_instr_2A: ; LD HL,(nn) Z80_instr_39: ; ADD HL,SP -Z80_instr_E3: ; EX (SP),HL -Z80_instr_F9: ; LD SP,HL Z80_instr_CB_06: ; RLC (HL) Z80_instr_CB_0E: ; RRC (HL) Z80_instr_CB_16: ; RL (HL) @@ -147,52 +163,26 @@ Z80_instr_CB_2E: ; SRA (HL) Z80_instr_CB_3E: ; SRL (HL) Z80_instr_DD_09: ; ADD IX,BC Z80_instr_DD_19: ; ADD IX,DE -Z80_instr_DD_22: ; LD (nn),IX Z80_instr_DD_29: ; ADD IX,IX -Z80_instr_DD_2A: ; LD IX,(nn) Z80_instr_DD_39: ; ADD IX,SP -Z80_instr_DD_E3: ; EX (SP),IX -Z80_instr_DD_F9: ; LD SP,IX Z80_instr_ED_42: ; SBC HL,BC -Z80_instr_ED_43: ; LD (nn),BC Z80_instr_ED_4A: ; ADC HL,BC -Z80_instr_ED_4B: ; LD BC,(nn) Z80_instr_ED_52: ; SBC HL,DE -Z80_instr_ED_53: ; LD (nn),DE Z80_instr_ED_5A: ; ADC HL,DE -Z80_instr_ED_5B: ; LD DE,(nn) Z80_instr_ED_62: ; SBC HL,HL Z80_instr_ED_67: ; RRD Z80_instr_ED_6A: ; ADC HL,HL Z80_instr_ED_6F: ; RLD Z80_instr_ED_72: ; SBC HL,SP -Z80_instr_ED_73: ; LD (nn),SP Z80_instr_ED_7A: ; ADC HL,SP -Z80_instr_ED_7B: ; LD SP,(nn) -Z80_instr_ED_A0: ; LDI Z80_instr_ED_A1: ; CPI -Z80_instr_ED_A2: ; INI -Z80_instr_ED_A3: ; OUTI -Z80_instr_ED_A8: ; LDD Z80_instr_ED_A9: ; CPD -Z80_instr_ED_AA: ; IND -Z80_instr_ED_AB: ; OUTD -Z80_instr_ED_B0: ; LDIR Z80_instr_ED_B1: ; CPIR -Z80_instr_ED_B2: ; INIR -Z80_instr_ED_B3: ; OTIR -Z80_instr_ED_B8: ; LDDR Z80_instr_ED_B9: ; CPDR -Z80_instr_ED_BA: ; INDR -Z80_instr_ED_BB: ; OTDR Z80_instr_FD_09: ; ADD IY,BC Z80_instr_FD_19: ; ADD IY,DE -Z80_instr_FD_22: ; LD (nn),IY Z80_instr_FD_29: ; ADD IY,IY -Z80_instr_FD_2A: ; LD IY,(nn) Z80_instr_FD_39: ; ADD IY,SP -Z80_instr_FD_E3: ; EX (SP),IY -Z80_instr_FD_F9: ; LD SP,IY Z80_instr_xDCB_06: ; RLC (IXY+d) Z80_instr_xDCB_0E: ; RRC (IXY+d) Z80_instr_xDCB_16: ; RL (IXY+d) @@ -203,8 +193,6 @@ Z80_instr_xDCB_3E: ; SRL (IXY+d) Z80_illeg_CB_36: ; SLL (HL) Z80_illeg_ED_70: ; IN F,(C) Z80_illeg_ED_71: ; OUT (C),0 -Z80_illeg_ED_63: ; LD (nn),HL -Z80_illeg_ED_6B: ; LD HL,(nn) Z80_illeg_xDCB_00: ; RLC (IXY+d),B Z80_illeg_xDCB_01: ; RLC (IXY+d),C Z80_illeg_xDCB_02: ; RLC (IXY+d),D @@ -262,118 +250,7 @@ Z80_illeg_xDCB_3B: ; SLR (IXY+d),E Z80_illeg_xDCB_3C: ; SLR (IXY+d),H Z80_illeg_xDCB_3D: ; SLR (IXY+d),L Z80_illeg_xDCB_3F: ; SLR (IXY+d),A -Z80_illeg_xDCB_80: ; RES 0,(IXY+d),B -Z80_illeg_xDCB_81: ; RES 0,(IXY+d),C -Z80_illeg_xDCB_82: ; RES 0,(IXY+d),D -Z80_illeg_xDCB_83: ; RES 0,(IXY+d),E -Z80_illeg_xDCB_84: ; RES 0,(IXY+d),H -Z80_illeg_xDCB_85: ; RES 0,(IXY+d),L -Z80_illeg_xDCB_87: ; RES 0,(IXY+d),A -Z80_illeg_xDCB_88: ; RES 1,(IXY+d),B -Z80_illeg_xDCB_89: ; RES 1,(IXY+d),C -Z80_illeg_xDCB_8A: ; RES 1,(IXY+d),D -Z80_illeg_xDCB_8B: ; RES 1,(IXY+d),E -Z80_illeg_xDCB_8C: ; RES 1,(IXY+d),H -Z80_illeg_xDCB_8D: ; RES 1,(IXY+d),L -Z80_illeg_xDCB_8F: ; RES 1,(IXY+d),A -Z80_illeg_xDCB_90: ; RES 2,(IXY+d),B -Z80_illeg_xDCB_91: ; RES 2,(IXY+d),C -Z80_illeg_xDCB_92: ; RES 2,(IXY+d),D -Z80_illeg_xDCB_93: ; RES 2,(IXY+d),E -Z80_illeg_xDCB_94: ; RES 2,(IXY+d),H -Z80_illeg_xDCB_95: ; RES 2,(IXY+d),L -Z80_illeg_xDCB_97: ; RES 2,(IXY+d),A -Z80_illeg_xDCB_98: ; RES 3,(IXY+d),B -Z80_illeg_xDCB_99: ; RES 3,(IXY+d),C -Z80_illeg_xDCB_9A: ; RES 3,(IXY+d),D -Z80_illeg_xDCB_9B: ; RES 3,(IXY+d),E -Z80_illeg_xDCB_9C: ; RES 3,(IXY+d),H -Z80_illeg_xDCB_9D: ; RES 3,(IXY+d),L -Z80_illeg_xDCB_9F: ; RES 3,(IXY+d),A -Z80_illeg_xDCB_A0: ; RES 4,(IXY+d),B -Z80_illeg_xDCB_A1: ; RES 4,(IXY+d),C -Z80_illeg_xDCB_A2: ; RES 4,(IXY+d),D -Z80_illeg_xDCB_A3: ; RES 4,(IXY+d),E -Z80_illeg_xDCB_A4: ; RES 4,(IXY+d),H -Z80_illeg_xDCB_A5: ; RES 4,(IXY+d),L -Z80_illeg_xDCB_A7: ; RES 4,(IXY+d),A -Z80_illeg_xDCB_A8: ; RES 5,(IXY+d),B -Z80_illeg_xDCB_A9: ; RES 5,(IXY+d),C -Z80_illeg_xDCB_AA: ; RES 5,(IXY+d),D -Z80_illeg_xDCB_AB: ; RES 5,(IXY+d),E -Z80_illeg_xDCB_AC: ; RES 5,(IXY+d),H -Z80_illeg_xDCB_AD: ; RES 5,(IXY+d),L -Z80_illeg_xDCB_AF: ; RES 5,(IXY+d),A -Z80_illeg_xDCB_B0: ; RES 6,(IXY+d),B -Z80_illeg_xDCB_B1: ; RES 6,(IXY+d),C -Z80_illeg_xDCB_B2: ; RES 6,(IXY+d),D -Z80_illeg_xDCB_B3: ; RES 6,(IXY+d),E -Z80_illeg_xDCB_B4: ; RES 6,(IXY+d),H -Z80_illeg_xDCB_B5: ; RES 6,(IXY+d),L -Z80_illeg_xDCB_B7: ; RES 6,(IXY+d),A -Z80_illeg_xDCB_B8: ; RES 7,(IXY+d),B -Z80_illeg_xDCB_B9: ; RES 7,(IXY+d),C -Z80_illeg_xDCB_BA: ; RES 7,(IXY+d),D -Z80_illeg_xDCB_BB: ; RES 7,(IXY+d),E -Z80_illeg_xDCB_BC: ; RES 7,(IXY+d),H -Z80_illeg_xDCB_BD: ; RES 7,(IXY+d),L -Z80_illeg_xDCB_BF: ; RES 7,(IXY+d),A -Z80_illeg_xDCB_C0: ; SET 0,(IXY+d),B -Z80_illeg_xDCB_C1: ; SET 0,(IXY+d),C -Z80_illeg_xDCB_C2: ; SET 0,(IXY+d),D -Z80_illeg_xDCB_C3: ; SET 0,(IXY+d),E -Z80_illeg_xDCB_C4: ; SET 0,(IXY+d),H -Z80_illeg_xDCB_C5: ; SET 0,(IXY+d),L -Z80_illeg_xDCB_C7: ; SET 0,(IXY+d),A -Z80_illeg_xDCB_C8: ; SET 1,(IXY+d),B -Z80_illeg_xDCB_C9: ; SET 1,(IXY+d),C -Z80_illeg_xDCB_CA: ; SET 1,(IXY+d),D -Z80_illeg_xDCB_CB: ; SET 1,(IXY+d),E -Z80_illeg_xDCB_CC: ; SET 1,(IXY+d),H -Z80_illeg_xDCB_CD: ; SET 1,(IXY+d),L -Z80_illeg_xDCB_CF: ; SET 1,(IXY+d),A -Z80_illeg_xDCB_D0: ; SET 2,(IXY+d),B -Z80_illeg_xDCB_D1: ; SET 2,(IXY+d),C -Z80_illeg_xDCB_D2: ; SET 2,(IXY+d),D -Z80_illeg_xDCB_D3: ; SET 2,(IXY+d),E -Z80_illeg_xDCB_D4: ; SET 2,(IXY+d),H -Z80_illeg_xDCB_D5: ; SET 2,(IXY+d),L -Z80_illeg_xDCB_D7: ; SET 2,(IXY+d),A -Z80_illeg_xDCB_D8: ; SET 3,(IXY+d),B -Z80_illeg_xDCB_D9: ; SET 3,(IXY+d),C -Z80_illeg_xDCB_DA: ; SET 3,(IXY+d),D -Z80_illeg_xDCB_DB: ; SET 3,(IXY+d),E -Z80_illeg_xDCB_DC: ; SET 3,(IXY+d),H -Z80_illeg_xDCB_DD: ; SET 3,(IXY+d),L -Z80_illeg_xDCB_DF: ; SET 3,(IXY+d),A -Z80_illeg_xDCB_E0: ; SET 4,(IXY+d),B -Z80_illeg_xDCB_E1: ; SET 4,(IXY+d),C -Z80_illeg_xDCB_E2: ; SET 4,(IXY+d),D -Z80_illeg_xDCB_E3: ; SET 4,(IXY+d),E -Z80_illeg_xDCB_E4: ; SET 4,(IXY+d),H -Z80_illeg_xDCB_E5: ; SET 4,(IXY+d),L -Z80_illeg_xDCB_E7: ; SET 4,(IXY+d),A -Z80_illeg_xDCB_E8: ; SET 5,(IXY+d),B -Z80_illeg_xDCB_E9: ; SET 5,(IXY+d),C -Z80_illeg_xDCB_EA: ; SET 5,(IXY+d),D -Z80_illeg_xDCB_EB: ; SET 5,(IXY+d),E -Z80_illeg_xDCB_EC: ; SET 5,(IXY+d),H -Z80_illeg_xDCB_ED: ; SET 5,(IXY+d),L -Z80_illeg_xDCB_EF: ; SET 5,(IXY+d),A -Z80_illeg_xDCB_F0: ; SET 6,(IXY+d),B -Z80_illeg_xDCB_F1: ; SET 6,(IXY+d),C -Z80_illeg_xDCB_F2: ; SET 6,(IXY+d),D -Z80_illeg_xDCB_F3: ; SET 6,(IXY+d),E -Z80_illeg_xDCB_F4: ; SET 6,(IXY+d),H -Z80_illeg_xDCB_F5: ; SET 6,(IXY+d),L -Z80_illeg_xDCB_F7: ; SET 6,(IXY+d),A -Z80_illeg_xDCB_F8: ; SET 7,(IXY+d),B -Z80_illeg_xDCB_F9: ; SET 7,(IXY+d),C -Z80_illeg_xDCB_FA: ; SET 7,(IXY+d),D -Z80_illeg_xDCB_FB: ; SET 7,(IXY+d),E -Z80_illeg_xDCB_FC: ; SET 7,(IXY+d),H -Z80_illeg_xDCB_FD: ; SET 7,(IXY+d),L -Z80_illeg_xDCB_FF: ; SET 7,(IXY+d),A + jmp ZVM_next ; XXX provide implementation From 3054a44e7c6f3ba4087aec8cc727d07dc80b5a9e Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 29 Dec 2020 23:32:39 +0100 Subject: [PATCH 094/257] screen editor color handling fix --- .../mega65_chrout_screen_control_escmode.s | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s b/src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s index 24a14d1a..b2763de0 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s @@ -96,10 +96,17 @@ m65_chrout_esc_P: ; erase everything from start of the line to cursor XXX u phz ldz #$FF - lda #$20 @1: inz + ; XXX common part - deduplicate, find other places + lda #$20 sta [M65_LPNT_SCR], z + jsr m65_helper_scrlpnt_color + lda COLOR + and #$0F + sta [M65_LPNT_SCR], z + jsr m65_helper_scrlpnt_to_screen + ; XXX end common part cpz M65__TXTCOL bne @1 @@ -112,10 +119,17 @@ m65_chrout_esc_Q: ; erase everything from cursor till the end of line XXX u ldx M65_SCRMODE lda m65_scrtab_txtwidth,x taz - lda #$20 @1: dez + ; XXX common part - deduplicate, find other places + lda #$20 sta [M65_LPNT_SCR], z + jsr m65_helper_scrlpnt_color + lda COLOR + and #$0F + sta [M65_LPNT_SCR], z + jsr m65_helper_scrlpnt_to_screen + ; XXX end common part cpz M65__TXTCOL bne @1 From 76f25a36e29e59a06540332fa6ad8fca58d5f6e1 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 30 Dec 2020 18:08:31 +0100 Subject: [PATCH 095/257] more work on Z80 support --- src/zvm_m65/,aliases_zvm.s | 170 +++++++++++------ src/zvm_m65/z80_instr_bit.s | 1 - src/zvm_m65/z80_instr_call_return.s | 4 +- src/zvm_m65/z80_instr_io.s | 4 +- src/zvm_m65/z80_instr_jump.s | 6 +- src/zvm_m65/z80_instr_load_16bit.s | 4 +- src/zvm_m65/z80_instr_load_8bit.s | 4 +- src/zvm_m65/z80_instr_math_16bit.s | 273 ++++++++++++++++++++++----- src/zvm_m65/z80_instr_math_8bit.s | 16 +- src/zvm_m65/z80_instr_rotate_shift.s | 222 +++++++++++++++++++++- src/zvm_m65/z80_table_gen.s | 55 +++++- src/zvm_m65/z80_tables.s | 3 + src/zvm_m65/zvm_banking.s | 97 ++++++---- src/zvm_m65/zvm_bios.s | 2 + src/zvm_m65/zvm_core.s | 83 +++++--- tools/generate_z80_tables.cc | 20 ++ 16 files changed, 763 insertions(+), 201 deletions(-) diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index 4a46ba74..cc497eb9 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -1,73 +1,116 @@ -!addr REG_AF = $02 ; 16-bit combined register -!addr REG_F = REG_AF+0 ; 8-bit flag register -!addr REG_A = REG_AF+1 ; 8-bit accumulator -!addr REG_BC = $04 -!addr REG_C = REG_BC+0 -!addr REG_B = REG_BC+1 -!addr REG_DE = $06 -!addr REG_E = REG_DE+0 -!addr REG_D = REG_DE+1 -!addr REG_HL = $08 -!addr REG_L = REG_HL+0 -!addr REG_H = REG_HL+1 +; +; Z80 CPU state/emulation data +; -!addr REG_F_SH = $0A ; shadow registers -!addr REG_A_SH = $0B -!addr REG_C_SH = $0C -!addr REG_B_SH = $0D -!addr REG_E_SH = $0E -!addr REG_D_SH = $0F -!addr REG_L_SH = $10 -!addr REG_H_SH = $11 +!addr z80_cpustate__start = $02 -!addr REG_IX = $12 ; 16-bit index register -!addr REG_IXL = $12 -!addr REG_IXH = $13 -!addr REG_IY = $14 ; 16-bit index register -!addr REG_IYL = $14 -!addr REG_IYH = $15 -!addr REG_SP = $16 ; 16-bit stack pointer -!addr REG_PC = $18 ; 16-bit program counter +!addr REG_AF = $02 ; 2 bytes - combined register +!addr REG_F = REG_AF+0 ; - flag register +!addr REG_A = REG_AF+1 ; - accumulator -!addr REG_I = $1A ; 8-bit interrupt vector base -!addr REG_R06 = $1B ; refresh counter, bits 0-6 (bit 7 is garbage) -!addr REG_R7 = $1C ; refresh counter, bit 7 (bits 0-6 are garbage) +!addr REG_BC = $04 ; 2 bytes - combined register +!addr REG_C = REG_BC+0 +!addr REG_B = REG_BC+1 +!addr REG_BC_EXT1 = $06 ; 2 bytes - helper for faster access via BC in bank 1 -!addr PTR_IXY_d = $1D ; 16-bit calculated address IX+d / IY+d XXX - important!!! -!addr PTR_DATA = $1F ; data source address XXX - important!!! +!addr REG_DE = $08 ; 2 bytes - combined register +!addr REG_E = REG_DE+0 +!addr REG_D = REG_DE+1 +!addr REG_DE_EXT1 = $0A ; 2 bytes - helper for faster access via DE in bank 1 -!addr REG_IFF1 = $23 ; interrupt flip-flop flag 1 -!addr REG_IFF2 = $24 ; interrupt flip-flop flag 2 +!addr REG_HL = $0C ; 2 bytes - combined register +!addr REG_L = REG_HL+0 +!addr REG_H = REG_HL+1 +!addr REG_HL_EXT1 = $0E ; 2 bytes - helper for faster access via HL in bank 1 -!addr REG_TMP1 = $25 ; emulation-specific temporary storage -!addr REG_TMP2 = $26 -!addr ADDR_IO = $27 ; 16-bit address for fetching/storing the IO +!addr REG_SHADOW = $10 ; 8 bytes - shadow registers +!addr REG_F_SH = REG_SHADOW+0 +!addr REG_A_SH = REG_SHADOW+1 +!addr REG_C_SH = REG_SHADOW+2 +!addr REG_B_SH = REG_SHADOW+3 +!addr REG_E_SH = REG_SHADOW+4 +!addr REG_D_SH = REG_SHADOW+5 +!addr REG_L_SH = REG_SHADOW+6 +!addr REG_H_SH = REG_SHADOW+7 +!addr REG_SP = $18 ; 2 bytes - stack pointer +!addr REG_SP_EXT1 = $1A ; 2 bytes - helper for faster access via SP in bank 1 +!addr REG_PC = $1C ; 2 bytes - sprogram counter +!addr REG_PC_EXT1 = $1E ; 2 bytes - helper for faster access via PC in bank 1 -!addr VEC_MOVE_fetch = $30 ; vector to byte fetch routine, for BIOS routine MOVE -!addr VEC_MOVE_store = $32 ; vector to byte store routine, for BIOS routine MOVE -!addr VEC_DISKIO_store = $34 ; vector to byte store routine, for BIOS disk I/O operations +!addr REG_IX = $20 ; 2 bytes - index register +!addr REG_IXL = REG_IX+0 +!addr REG_IXH = REG_IX+1 +!addr REG_IY = $22 ; 2 bytes - index register +!addr REG_IYL = REG_IY+0 +!addr REG_IYH = REG_IY+1 -!addr VEC_fetch_value = $50 -!addr VEC_fetch_stack = $52 -!addr VEC_store_stack = $54 -!addr VEC_fetch_via_BC = $56 ; XXX add routines -!addr VEC_store_via_BC = $58 ; XXX add routines -!addr VEC_fetch_via_DE = $5A ; XXX add routines -!addr VEC_store_via_DE = $5C ; XXX add routines -!addr VEC_fetch_via_HL = $5E -!addr VEC_store_via_HL = $60 -!addr VEC_fetch_via_IX_d = $62 -!addr VEC_fetch_via_IY_d = $64 -!addr VEC_store_via_IX_d = $66 -!addr VEC_store_via_IY_d = $68 -!addr VEC_fetch_via_nn = $6A -!addr VEC_store_via_nn = $6C -!addr VEC_fetch_via_plus1 = $6E ; XXX add routines -!addr VEC_store_via_plus1 = $70 ; XXX add routines XXX jump to next directly? -!addr VEC_xchng_stack_lo = $72 ; XXX add routines -!addr VEC_xchng_stack_hi = $74 ; XXX add routines +!addr REG_IFF1 = $24 ; 1 byte - interrupt flip-flop flag 1 +!addr REG_IFF2 = $25 ; 1 byte - interrupt flip-flop flag 2 +!addr REG_R06 = $26 ; 1 byte - refresh counter, bits 0-6 (bit 7 is garbage) +!addr REG_R7 = $27 ; 1 byte - refresh counter, bit 7 (bits 0-6 are garbage) +!addr REG_I = $28 ; 1 byte - interrupt vector base + +!addr z80_cpustate__end = $28 + +!addr BANK_ID = $29 ; 1 byte - currently selected bank + +; +; BIOS vectors +; + +!addr VEC_MOVE_fetch = $2A ; 2 bytes - vector to byte fetch routine, for BIOS routine MOVE +!addr VEC_MOVE_store = $2C ; 2 bytes - vector to byte store routine, for BIOS routine MOVE +!addr VEC_DISKIO_store = $2E ; 2 bytes - vector to byte store routine, for BIOS disk I/O operations + +; +; Z80 emulation temporary area +; + +!addr PTR_IXY_d = $30 ; 4 bytes - calculated address IX+d / IY+d XXX - review usage !!! +!addr PTR_IXY_d_EXT1 = PTR_IXY_d+2 +!addr PTR_DATA = $34 ; 4 bytes - calculated data source address XXX - review usage !!! also check functions using ZVM_store_next +!addr PTR_DATA_EXT1 = PTR_DATA+2 +!addr ADDR_IO = $38 ; 4 bytes - address for fetching/storing the IO + +!addr REG_TMP1 = $3C ; 1 byte - emulation-specific temporary storage +!addr REG_TMP2 = $3D ; 1 byte - emulation-specific temporary storage + +; $3E ; 2 bytes - reserved + +; +; Memory banking vectors +; + +!addr zvm_bankvectors__start = $40 + +!addr VEC_fetch_via_PC_inc = $40 ; fetch to .A from (PC), increment PC afterwards XXX consider providing dual-byte retrieval + +; XXX implement routines for vectors below + +!addr VEC_fetch_stack = $42 +!addr VEC_store_stack = $44 +!addr VEC_fetch_via_BC = $46 +!addr VEC_store_via_BC = $48 +!addr VEC_fetch_via_DE = $4A +!addr VEC_store_via_DE = $4C +!addr VEC_fetch_via_HL = $4E +!addr VEC_store_via_HL = $50 +!addr VEC_fetch_via_IX_d = $52 +!addr VEC_fetch_via_IY_d = $54 +!addr VEC_store_via_IX_d = $56 +!addr VEC_store_via_IY_d = $58 +!addr VEC_fetch_via_nn = $5A +!addr VEC_store_via_nn = $5C +!addr VEC_fetch_via_plus1 = $5E +!addr VEC_store_via_plus1 = $60 ; XXX jump to next directly? +!addr VEC_xchng_stack_lo = $62 +!addr VEC_xchng_stack_hi = $64 + +; +; Constant/macros definitions +; ; Masks for Z80 flag (F) register @@ -101,3 +144,10 @@ !macro Z80_PUT_0_NF { rmb1 REG_F } !macro Z80_PUT_1_CF { smb0 REG_F } !macro Z80_PUT_0_CF { rmb0 REG_F } + +; +; Helper tables for CPU emulation, downwards from $2000 +; + +!addr z80_atable_mi_bank0 = $1FF0 ; table for bank 0 memory address conversion +!addr z80_atable_hi_bank0 = $1FE0 ; table for bank 0 memory address conversion diff --git a/src/zvm_m65/z80_instr_bit.s b/src/zvm_m65/z80_instr_bit.s index 050acc05..bec34ddd 100644 --- a/src/zvm_m65/z80_instr_bit.s +++ b/src/zvm_m65/z80_instr_bit.s @@ -3,7 +3,6 @@ ; Z80 bit set/reset/test instructions ; - ; bits 0, 1, 4, 6 Z80_instr_CB_40: ; BIT 0,B diff --git a/src/zvm_m65/z80_instr_call_return.s b/src/zvm_m65/z80_instr_call_return.s index 15ef8033..63f3c836 100644 --- a/src/zvm_m65/z80_instr_call_return.s +++ b/src/zvm_m65/z80_instr_call_return.s @@ -6,9 +6,9 @@ Z80_instr_CD: ; CALL nn - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) pha - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) pha lda REG_PC+1 diff --git a/src/zvm_m65/z80_instr_io.s b/src/zvm_m65/z80_instr_io.s index 95ba655d..b587659a 100644 --- a/src/zvm_m65/z80_instr_io.s +++ b/src/zvm_m65/z80_instr_io.s @@ -6,7 +6,7 @@ Z80_instr_DB: ; IN A,(n) - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) sta ADDR_IO+0 lda REG_A sta ADDR_IO+1 @@ -39,7 +39,7 @@ Z80_instr_ED_78: +Z80_IN_REGn REG_A ; Z80_instr_D3: ; OUT (n),A - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) sta ADDR_IO+0 lda REG_A sta ADDR_IO+1 diff --git a/src/zvm_m65/z80_instr_jump.s b/src/zvm_m65/z80_instr_jump.s index 9d3b611d..f6e6f009 100644 --- a/src/zvm_m65/z80_instr_jump.s +++ b/src/zvm_m65/z80_instr_jump.s @@ -6,9 +6,9 @@ Z80_instr_C3: ; JP nn - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) sta REG_PC+0 - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) sta REG_PC+1 jmp ZVM_next @@ -102,7 +102,7 @@ Z80_instr_18: ; JR e @1: rmb7 REG_PC+0 @2: - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) tax lda z80_otable_displacement,x clc diff --git a/src/zvm_m65/z80_instr_load_16bit.s b/src/zvm_m65/z80_instr_load_16bit.s index c01e673f..d4560f11 100644 --- a/src/zvm_m65/z80_instr_load_16bit.s +++ b/src/zvm_m65/z80_instr_load_16bit.s @@ -5,9 +5,9 @@ !macro Z80_LD_REGnn_nn .REGnn { - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) sta .REGnn+0 - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) sta .REGnn+1 jmp ZVM_next } diff --git a/src/zvm_m65/z80_instr_load_8bit.s b/src/zvm_m65/z80_instr_load_8bit.s index 1258b049..90e640d4 100644 --- a/src/zvm_m65/z80_instr_load_8bit.s +++ b/src/zvm_m65/z80_instr_load_8bit.s @@ -110,7 +110,7 @@ Z80_illeg_FD_6C: +Z80_LD_REGn_REGn REG_IYL, REG_IYH ; Z80_illeg_FD_6F: +Z80_LD_REGn_REGn REG_IYL, REG_A ; LD IYL,A !macro Z80_LD_REGn_n .REGn { - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) sta .REGn jmp ZVM_next } @@ -250,7 +250,7 @@ Z80_instr_FD_77: +Z80_LD_VIA_IY_d_REG_n REG_A ; Z80_instr_36: ; LD (HL),n - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) jsr (VEC_store_via_HL) jmp ZVM_next diff --git a/src/zvm_m65/z80_instr_math_16bit.s b/src/zvm_m65/z80_instr_math_16bit.s index 337f6167..ea28c8eb 100644 --- a/src/zvm_m65/z80_instr_math_16bit.s +++ b/src/zvm_m65/z80_instr_math_16bit.s @@ -4,62 +4,243 @@ ; -Z80_instr_03: ; INC BC - - inw REG_BC +!macro Z80_INC_REGnn .REGnn { + inw .REGnn jmp ZVM_next +} -Z80_instr_13: ; INC DE - - inw REG_DE +!macro Z80_DEC_REGnn .REGnn { + dew .REGnn jmp ZVM_next +} -Z80_instr_23: ; INC HL +Z80_instr_03: +Z80_INC_REGnn REG_BC ; INC BC +Z80_instr_13: +Z80_INC_REGnn REG_DE ; INC DE +Z80_instr_23: +Z80_INC_REGnn REG_HL ; INC HL +Z80_instr_33: +Z80_INC_REGnn REG_SP ; INC SP +Z80_instr_DD_23: +Z80_INC_REGnn REG_IX ; INC IX +Z80_instr_FD_23: +Z80_INC_REGnn REG_IY ; INC IY - inw REG_HL +Z80_instr_0B: +Z80_DEC_REGnn REG_BC ; DEC BC +Z80_instr_1B: +Z80_DEC_REGnn REG_DE ; DEC DE +Z80_instr_2B: +Z80_DEC_REGnn REG_HL ; DEC HL +Z80_instr_3B: +Z80_DEC_REGnn REG_SP ; DEC SP +Z80_instr_DD_2B: +Z80_DEC_REGnn REG_IX ; DEC IX +Z80_instr_FD_2B: +Z80_DEC_REGnn REG_IY ; DEC IY + +!macro Z80_ADD_REGnn_REGnn .REGnn1, .REGnn2 { ; XXX size-optimize this - extract common parts + + lda REG_F + and #($FF - Z80_HF - Z80_YF - Z80_XF - Z80_NF - Z80_CF) + sta REG_F + + ; Handle low bytes + + clc + lda .REGnn1+0 + adc .REGnn2+0 + sta .REGnn1+0 + + ; Handle HF flag + + php + clc + lda .REGnn1+1 + and #$0F + sta REG_TMP1 + lda .REGnn2+1 + and #$0F + adc REG_TMP1 + and #$F0 + beq @1 + +Z80_PUT_1_HF +@1: + plp + + ; Handle high bytes + + lda .REGnn1+1 + adc .REGnn2+1 + sta .REGnn1+1 + + ; Handle XF/YF flags + + and #%00101000 + ora REG_F + sta REG_F + + ; Handle CF flag + + +bcc ZVM_next + +Z80_PUT_1_CF jmp ZVM_next +} -Z80_instr_33: ; INC SP +Z80_instr_09: +Z80_ADD_REGnn_REGnn REG_HL, REG_BC ; ADD HL,BC +Z80_instr_19: +Z80_ADD_REGnn_REGnn REG_HL, REG_DE ; ADD HL,DE +Z80_instr_29: +Z80_ADD_REGnn_REGnn REG_HL, REG_HL ; ADD HL,HL +Z80_instr_39: +Z80_ADD_REGnn_REGnn REG_HL, REG_SP ; ADD HL,SP - inw REG_SP +Z80_instr_DD_09: +Z80_ADD_REGnn_REGnn REG_IX, REG_BC ; ADD IX,BC +Z80_instr_DD_19: +Z80_ADD_REGnn_REGnn REG_IX, REG_DE ; ADD IX,DE +Z80_instr_DD_29: +Z80_ADD_REGnn_REGnn REG_IX, REG_IX ; ADD IX,IX +Z80_instr_DD_39: +Z80_ADD_REGnn_REGnn REG_IX, REG_SP ; ADD IX,SP + +Z80_instr_FD_09: +Z80_ADD_REGnn_REGnn REG_IY, REG_BC ; ADD IY,BC +Z80_instr_FD_19: +Z80_ADD_REGnn_REGnn REG_IY, REG_DE ; ADD IY,DE +Z80_instr_FD_29: +Z80_ADD_REGnn_REGnn REG_IY, REG_IY ; ADD IY,IY +Z80_instr_FD_39: +Z80_ADD_REGnn_REGnn REG_IY, REG_SP ; ADD IY,SP + +!macro Z80_ADC_HL_REGnn .REGnn { ; XXX size-optimize this - extract common parts + + ; Clear flags + + stz REG_F + + ; Handle low bytes + + clc + bbr0 REG_F, @1 + sec +@1: + lda REG_HL+0 + adc .REGnn+0 + sta REG_HL+0 + + ; Handle HF flag + + php + clc + bbr0 REG_F, @2 + sec +@2: + lda REG_HL+1 + and #$0F + sta REG_TMP1 + lda .REGnn+1 + and #$0F + adc REG_TMP1 + and #$F0 + beq @3 + +Z80_PUT_1_HF +@3: + plp + + ; Handle high bytes + + lda REG_HL+1 + adc .REGnn+1 + sta REG_HL+1 + + ; Handle SF flag + + bne @4 + +Z80_PUT_1_SF +@4: + ; Handle XF/YF flags + + and #%00101000 + ora REG_F + sta REG_F + + ; Handle CF flag + + bcc @5 + +Z80_PUT_1_CF +@5: + ; Handle VF flag + + bvc @6 + +Z80_PUT_1_VF +@6 + ; Handle ZF flag + + lda REG_HL+0 + ora REG_HL+1 + +beq ZVM_next + +Z80_PUT_1_ZF jmp ZVM_next +} -Z80_instr_DD_23: ; INC IX +Z80_instr_ED_4A: +Z80_ADC_HL_REGnn REG_BC ; ADC HL,BC +Z80_instr_ED_5A: +Z80_ADC_HL_REGnn REG_DE ; ADC HL,DE +Z80_instr_ED_6A: +Z80_ADC_HL_REGnn REG_HL ; ADC HL,HL +Z80_instr_ED_7A: +Z80_ADC_HL_REGnn REG_SP ; ADC HL,SP - inw REG_IX +!macro Z80_SBC_HL_REGnn .REGnn { ; XXX size-optimize this - extract common parts + + ; Clear flags, set NF + + lda #Z80_NF + sta REG_F + + ; Handle low bytes + + clc + bbs0 REG_F, @1 + sec +@1: + lda REG_HL+0 + adc .REGnn+0 + sta REG_HL+0 + + ; Handle HF flag + + php + clc + bbs0 REG_F, @2 + sec +@2: + lda REG_HL+1 + and #$0F + sta REG_TMP1 + lda .REGnn+1 + and #$0F + sbc REG_TMP1 + and #$F0 + beq @3 + +Z80_PUT_1_HF +@3: + plp + + ; Handle high bytes + + lda REG_HL+1 + sbc .REGnn+1 + sta REG_HL+1 + + ; Handle SF flag + + bne @4 + +Z80_PUT_1_SF +@4: + ; Handle XF/YF flags + + and #%00101000 + ora REG_F + sta REG_F + + ; Handle CF flag + + bcs @5 + +Z80_PUT_1_CF +@5: + + ; Handle VF flag + + bvc @6 + +Z80_PUT_1_VF +@6 + ; Handle ZF flag + + lda REG_HL+0 + ora REG_HL+1 + +beq ZVM_next + +Z80_PUT_1_ZF jmp ZVM_next +} -Z80_instr_FD_23: ; INC IY - - inw REG_IY - jmp ZVM_next - -Z80_instr_0B: ; DEC BC - - dew REG_BC - jmp ZVM_next - -Z80_instr_1B: ; DEC DE - - dew REG_DE - jmp ZVM_next - -Z80_instr_2B: ; DEC HL - - dew REG_HL - jmp ZVM_next - -Z80_instr_3B: ; DEC SP - - dew REG_SP - jmp ZVM_next - -Z80_instr_DD_2B: ; DEC IX - - dew REG_IX - jmp ZVM_next - -Z80_instr_FD_2B: ; DEC IY - - dew REG_IY - jmp ZVM_next +Z80_instr_ED_42: +Z80_SBC_HL_REGnn REG_BC; SBC HL,BC +Z80_instr_ED_52: +Z80_SBC_HL_REGnn REG_DE; SBC HL,DE +Z80_instr_ED_62: +Z80_SBC_HL_REGnn REG_HL; SBC HL,HL +Z80_instr_ED_72: +Z80_SBC_HL_REGnn REG_SP; SBC HL,SP diff --git a/src/zvm_m65/z80_instr_math_8bit.s b/src/zvm_m65/z80_instr_math_8bit.s index 112a79d8..66b3cd4c 100644 --- a/src/zvm_m65/z80_instr_math_8bit.s +++ b/src/zvm_m65/z80_instr_math_8bit.s @@ -8,12 +8,12 @@ !macro Z80_ADD_n { - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) bra Z80_common_add } !macro Z80_ADC_n { - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) bbs0 REG_F,Z80_common_adc jmp Z80_common_add } @@ -167,12 +167,12 @@ Z80_common_adc: jmp ZVM_next !macro Z80_SUB_n { - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) bra Z80_common_sub } !macro Z80_SBC_n { - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) bbs0 REG_F,Z80_common_sbc jmp Z80_common_sub } @@ -326,7 +326,7 @@ Z80_common_sbc: jmp ZVM_next !macro Z80_CP_n { - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) bra Z80_common_cp } @@ -431,7 +431,7 @@ Z80_common_cp: } !macro Z80_AND_n { - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) +Z80_AND_common } @@ -491,7 +491,7 @@ Z80_instr_FD_A6: +Z80_AND_VIA_IY_d ; } !macro Z80_OR_n { - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) +Z80_OR_common } @@ -548,7 +548,7 @@ Z80_instr_FD_B6: +Z80_OR_VIA_IY_d ; } !macro Z80_XOR_n { - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) +Z80_XOR_common } diff --git a/src/zvm_m65/z80_instr_rotate_shift.s b/src/zvm_m65/z80_instr_rotate_shift.s index e75efea2..bd5f5843 100644 --- a/src/zvm_m65/z80_instr_rotate_shift.s +++ b/src/zvm_m65/z80_instr_rotate_shift.s @@ -3,6 +3,85 @@ ; Z80 rotate/shift instructions ; +; XXX for RRD/RLD generate tables in extended RAM + + +Z80_instr_ED_67: ; RRD + + jsr (VEC_fetch_via_HL) + sta REG_TMP1 + + lda REG_A + tax + and #$F0 + sta REG_A + txa + + ror + ror REG_TMP1 + ror + ror REG_TMP1 + ror + ror REG_TMP1 + ror + ror REG_TMP1 + ror + + clc + ror + asr + asr + asr + + ora REG_A + sta REG_A + + tax + lda REG_F + and #Z80_CF + ora z80_ftable_RRD_RLD,x + sta REG_F + + lda REG_TMP1 + jmp ZVM_store_next + +Z80_instr_ED_6F: ; RLD + + jsr (VEC_fetch_via_HL) + sta REG_TMP1 + + lda REG_A + tax + and #$F0 + sta REG_A + txa + + asl + asl + asl + asl + + asl + rol REG_TMP1 + rol + rol REG_TMP1 + rol + rol REG_TMP1 + rol + rol REG_TMP1 + rol + + ora REG_A + sta REG_A + + tax + lda REG_F + and #Z80_CF + ora z80_ftable_RRD_RLD,x + sta REG_F + + lda REG_TMP1 + jmp ZVM_store_next Z80_instr_07: ; RLCA @@ -92,6 +171,25 @@ Z80_instr_1F: ; RRA jmp ZVM_next } +!macro Z80_RLC_VIA_HL { + + jsr (VEC_fetch_via_HL) + + tax + rol + txa + + rol + sta [PTR_DATA],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + Z80_instr_CB_00: +Z80_RLC_REGn REG_B ; RLC B Z80_instr_CB_01: +Z80_RLC_REGn REG_C ; RLC C Z80_instr_CB_02: +Z80_RLC_REGn REG_D ; RLC D @@ -99,6 +197,7 @@ Z80_instr_CB_03: +Z80_RLC_REGn REG_E ; Z80_instr_CB_04: +Z80_RLC_REGn REG_H ; RLC H Z80_instr_CB_05: +Z80_RLC_REGn REG_L ; RLC L Z80_instr_CB_07: +Z80_RLC_REGn REG_A ; RLC A +Z80_instr_CB_06: +Z80_RLC_VIA_HL ; RLC (HL) !macro Z80_RRC_REGn .REGn { @@ -116,6 +215,25 @@ Z80_instr_CB_07: +Z80_RLC_REGn REG_A ; jmp ZVM_next } +!macro Z80_RRC_VIA_HL { + + jsr (VEC_fetch_via_HL) + + tax + ror + txa + + ror + sta [PTR_DATA],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + Z80_instr_CB_08: +Z80_RRC_REGn REG_B ; RRC B Z80_instr_CB_09: +Z80_RRC_REGn REG_C ; RRC C Z80_instr_CB_0A: +Z80_RRC_REGn REG_D ; RRC D @@ -123,6 +241,7 @@ Z80_instr_CB_0B: +Z80_RRC_REGn REG_E ; Z80_instr_CB_0C: +Z80_RRC_REGn REG_H ; RRC H Z80_instr_CB_0D: +Z80_RRC_REGn REG_L ; RRC L Z80_instr_CB_0F: +Z80_RRC_REGn REG_A ; RRC A +Z80_instr_CB_0E: +Z80_RRC_VIA_HL ; RRC (HL) !macro Z80_RL_REGn .REGn { @@ -140,6 +259,25 @@ Z80_instr_CB_0F: +Z80_RRC_REGn REG_A ; jmp ZVM_next } +!macro Z80_RL_VIA_HL { + + jsr (VEC_fetch_via_HL) + + clc + bbr0 REG_F, @1 + sec +@1: + rol + sta [PTR_DATA],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + Z80_instr_CB_10: +Z80_RL_REGn REG_B ; RL B Z80_instr_CB_11: +Z80_RL_REGn REG_C ; RL C Z80_instr_CB_12: +Z80_RL_REGn REG_D ; RL D @@ -147,6 +285,7 @@ Z80_instr_CB_13: +Z80_RL_REGn REG_E ; Z80_instr_CB_14: +Z80_RL_REGn REG_H ; RL H Z80_instr_CB_15: +Z80_RL_REGn REG_L ; RL L Z80_instr_CB_17: +Z80_RL_REGn REG_A ; RL A +Z80_instr_CB_16: +Z80_RL_VIA_HL ; RL (HL) !macro Z80_RR_REGn .REGn { @@ -164,6 +303,25 @@ Z80_instr_CB_17: +Z80_RL_REGn REG_A ; jmp ZVM_next } +!macro Z80_RR_VIA_HL { + + jsr (VEC_fetch_via_HL) + + clc + bbr0 REG_F, @1 + sec +@1: + ror + sta [PTR_DATA],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + Z80_instr_CB_18: +Z80_RR_REGn REG_B ; RR B Z80_instr_CB_19: +Z80_RR_REGn REG_C ; RR C Z80_instr_CB_1A: +Z80_RR_REGn REG_D ; RR D @@ -171,6 +329,7 @@ Z80_instr_CB_1B: +Z80_RR_REGn REG_E ; Z80_instr_CB_1C: +Z80_RR_REGn REG_H ; RR H Z80_instr_CB_1D: +Z80_RR_REGn REG_L ; RR L Z80_instr_CB_1F: +Z80_RR_REGn REG_A ; RR A +Z80_instr_CB_1E: +Z80_RR_VIA_HL ; RR (HL) ; XXX SLA/SLL (and possibly rotations) can be made slightly faster with dedicated tables (omit carry flag calculation) @@ -186,6 +345,20 @@ Z80_instr_CB_1F: +Z80_RR_REGn REG_A ; jmp ZVM_next } +!macro Z80_SLA_VIA { + + jsr (VEC_fetch_via_HL) + asl + sta [PTR_DATA],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + Z80_instr_CB_20: +Z80_SLA_REGn REG_B ; SLA B Z80_instr_CB_21: +Z80_SLA_REGn REG_C ; SLA C Z80_instr_CB_22: +Z80_SLA_REGn REG_D ; SLA D @@ -193,6 +366,7 @@ Z80_instr_CB_23: +Z80_SLA_REGn REG_E ; Z80_instr_CB_24: +Z80_SLA_REGn REG_H ; SLA H Z80_instr_CB_25: +Z80_SLA_REGn REG_L ; SLA L Z80_instr_CB_27: +Z80_SLA_REGn REG_A ; SLA A +Z80_instr_CB_26: +Z80_SLA_VIA ; SLA (HL) !macro Z80_SLL_REGn .REGn { @@ -228,6 +402,21 @@ Z80_illeg_CB_37: +Z80_SLL_REGn REG_A ; jmp ZVM_next } +!macro Z80_SRL_VIA_HL { + + jsr (VEC_fetch_via_HL) + clc + ror + sta [PTR_DATA],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + Z80_instr_CB_38: +Z80_SRL_REGn REG_B ; SRL B Z80_instr_CB_39: +Z80_SRL_REGn REG_C ; SRL C Z80_instr_CB_3A: +Z80_SRL_REGn REG_D ; SRL D @@ -235,6 +424,7 @@ Z80_instr_CB_3B: +Z80_SRL_REGn REG_E ; Z80_instr_CB_3C: +Z80_SRL_REGn REG_H ; SRL H Z80_instr_CB_3D: +Z80_SRL_REGn REG_L ; SRL L Z80_instr_CB_3F: +Z80_SRL_REGn REG_A ; SRL A +Z80_instr_CB_3E: +Z80_SRL_VIA_HL ; SRL (HL) !macro Z80_SRA_REGn .REGn { @@ -252,12 +442,30 @@ Z80_instr_CB_3F: +Z80_SRL_REGn REG_A ; jmp ZVM_next } -Z80_instr_CB_28: +Z80_SRA_REGn REG_B; SRA B -Z80_instr_CB_29: +Z80_SRA_REGn REG_C; SRA C -Z80_instr_CB_2A: +Z80_SRA_REGn REG_D; SRA D -Z80_instr_CB_2B: +Z80_SRA_REGn REG_E; SRA E -Z80_instr_CB_2C: +Z80_SRA_REGn REG_H; SRA H -Z80_instr_CB_2D: +Z80_SRA_REGn REG_L; SRA L -Z80_instr_CB_2F: +Z80_SRA_REGn REG_A; SRA A +!macro Z80_SRA_VIA_HL { + jsr (VEC_fetch_via_HL) + + tax + ror + txa + + ror + sta [PTR_DATA],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} +Z80_instr_CB_28: +Z80_SRA_REGn REG_B ; SRA B +Z80_instr_CB_29: +Z80_SRA_REGn REG_C ; SRA C +Z80_instr_CB_2A: +Z80_SRA_REGn REG_D ; SRA D +Z80_instr_CB_2B: +Z80_SRA_REGn REG_E ; SRA E +Z80_instr_CB_2C: +Z80_SRA_REGn REG_H ; SRA H +Z80_instr_CB_2D: +Z80_SRA_REGn REG_L ; SRA L +Z80_instr_CB_2F: +Z80_SRA_REGn REG_A ; SRA A +Z80_instr_CB_2E: +Z80_SRA_VIA_HL ; SRA (HL) diff --git a/src/zvm_m65/z80_table_gen.s b/src/zvm_m65/z80_table_gen.s index deecff15..c807372c 100644 --- a/src/zvm_m65/z80_table_gen.s +++ b/src/zvm_m65/z80_table_gen.s @@ -1,2 +1,55 @@ -; XXX: move ALL table generation here, for some tables (DAA) use floor/ceiling RAM +; +; Z80 emulator - precalculated data generator +; + +z80_table_gen: + + jsr PRIMM + !pet $0D, "Generating CPU tables... " + !byte 0 + + ; + ; Generating: z80_atable_mi_bank0, z80_atable_hi_bank0 + ; Dependencies: NONE + ; + + ldx #$00 + +@loop_atable_bank0: + + cpx #$E0 + bcs @common_addr + + ; Memory area $0000-$DFFF - maps to $02000-$0FFFF - 56KB + + lda #$04 + sta z80_atable_hi_bank0, x + txa + clc + adc #$20 + sta z80_atable_mi_bank0, x + +@common_addr: + + ; Memory area $E000-$FFFF - maps to $4E000-$4FFFF - 8KB + + lda #$04 + sta z80_atable_hi_bank0, x + txa + sta z80_atable_mi_bank0, x + + inx + bne @loop_atable_bank0 + + ; XXX add more tables here + + ; + ; The END + ; + + jsr PRIMM + !pet "done", $0D, $0D + !byte 0 + + rts diff --git a/src/zvm_m65/z80_tables.s b/src/zvm_m65/z80_tables.s index 76b6127b..b0169eba 100644 --- a/src/zvm_m65/z80_tables.s +++ b/src/zvm_m65/z80_tables.s @@ -34,6 +34,9 @@ z80_ftable_SUB_SBC: z80_ftable_CP: +PUT_Z80_FTABLE_CP +z80_ftable_RRD_RLD: + +PUT_Z80_FTABLE_RRD_RLD + ; ; That horrific DAA instruction ; diff --git a/src/zvm_m65/zvm_banking.s b/src/zvm_m65/zvm_banking.s index 3403d769..4d8bfcab 100644 --- a/src/zvm_m65/zvm_banking.s +++ b/src/zvm_m65/zvm_banking.s @@ -4,18 +4,79 @@ ; +ZVM_bank0_vectab: + + !word ZVM_bank0_fetch_via_PC_inc + ; XXX add remaining routines here + +ZVM_bank1_vectab: + + !word ZVM_bank1_fetch_via_PC_inc + ; XXX add remaining routines here + +; +; Bank switching routines +; + ZVM_set_bank_0: + lda #$00 + sta BANK_ID + ; XXX use DMAgic to switch banks (vectors on zeropage) rts ZVM_set_bank_1: + lda #$01 + sta BANK_ID + ; XXX use DMAgic to switch banks (vectors on zeropage) + lda #$04 ; all the Z80 bank 1 memory is located in $0004:$xxxx + sta PTR_DATA+2 + sta PTR_IXY_d+2 + rts +; +; Memory access routines +; + +ZVM_bank0_fetch_via_PC_inc: + + lda REG_PC+0 + sta PTR_DATA+0 + ldy REG_PC+1 + lda z80_atable_mi_bank0,y + sta PTR_DATA+1 + lda z80_atable_hi_bank0,y + sta PTR_DATA+1 + + lda [PTR_DATA], z + + inw REG_PC + rts + +ZVM_bank1_fetch_via_PC_inc: + + lda [REG_PC], z + + inw REG_PC + rts + + + + + + + + +; XXX cleanup code below + + + ZVM_fetch_IO: ; XXX fetch addresses via ADDR_IO - but which ones are safe? Should we have a whitelist? @@ -27,39 +88,3 @@ ZVM_store_IO: ; XXX again, we should have a whitelist of addresses rts - - - -ZVM_fetch_opcode_bank_0: - - ; XXX implement, should return byte in .A - -ZVM_fetch_opcode_bank_1: - - ; XXX implement, should return byte in .A - -ZVM_fetch_value_bank_0: -ZVM_fetch_value_bank_1: -ZVM_fetch_stack_bank_0: -ZVM_fetch_stack_bank_1: -ZVM_fetch_via_HL_bank_0: -ZVM_fetch_via_HL_bank_1: -ZVM_fetch_via_IX_d_bank_0: -ZVM_fetch_via_IX_d_bank_1: -ZVM_fetch_via_IY_d_bank_0: -ZVM_fetch_via_IY_d_bank_1: -ZVM_fetch_via_nn_bank_0: -ZVM_fetch_via_nn_bank_1: -ZVM_store_stack_bank_0: -ZVM_store_stack_bank_1: -ZVM_store_via_HL_bank_0: -ZVM_store_via_HL_bank_1: -ZVM_store_via_IX_d_bank_0: -ZVM_store_via_IX_d_bank_1: -ZVM_store_via_IY_d_bank_0: -ZVM_store_via_IY_d_bank_1: -ZVM_store_via_nn_bank_0: -ZVM_store_via_nn_bank_1: - - ; XXX - rts \ No newline at end of file diff --git a/src/zvm_m65/zvm_bios.s b/src/zvm_m65/zvm_bios.s index c8d73d83..b11d375b 100644 --- a/src/zvm_m65/zvm_bios.s +++ b/src/zvm_m65/zvm_bios.s @@ -74,6 +74,8 @@ zvm_BIOS_00_BOOT: ; Cold start lda TIME+2 ; give a little initial randomness to register R sta REG_R06 + ; XXX restore all *_EXT1 values + ; XXX load CPM3.SYS ; FALLTROUGH diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index e6712f6c..784c1ab9 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -48,6 +48,19 @@ ZVM_entry: !byte $0D,$0D !byte 0 + ; Initialize constants XXX consider moving this to a dedicated reset CPU routine + + lda #$00 ; all the Z80 memory is located below $0100:$0000 + sta PTR_DATA+3 + sta PTR_IXY_d+3 + + ; Generate CPU tables + + jsr z80_table_gen + + + + ; XXX code is not ready to progress further jsr PRIMM @@ -55,7 +68,7 @@ ZVM_entry: !pet "* Implementation not finished yet - system HALTED *" !byte 0 @1 - bra @1 + bra @1 jmp zvm_BIOS_00_BOOT @@ -69,7 +82,7 @@ ZVM_store_next: ; Fetch and execute next opcode - jsr (VEC_fetch_value) + jsr (VEC_fetch_via_PC_inc) asl tax bcs @1 @@ -130,6 +143,43 @@ Z80_instr_FD: +ZVM_DISPATCH Z80_vectab_FD_0, Z80_vectab_FD_1 ; ; XXX addition and subtraction are slow; pre-calculate data/flag tables in the extended 8MB RAM ; XXX use TRB/TSB instead of LDA + AND/ORA + STA when applicable +; XXX all dispatch routines shall have separate versions for bank 0/1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -150,39 +200,10 @@ Z80_instr_FD: +ZVM_DISPATCH Z80_vectab_FD_0, Z80_vectab_FD_1 ; Z80_instr_DD_CB: ; #DDCB Z80_instr_FD_CB: ; #FDCB -Z80_instr_09: ; ADD HL,BC -Z80_instr_19: ; ADD HL,DE -Z80_instr_29: ; ADD HL,HL -Z80_instr_39: ; ADD HL,SP -Z80_instr_CB_06: ; RLC (HL) -Z80_instr_CB_0E: ; RRC (HL) -Z80_instr_CB_16: ; RL (HL) -Z80_instr_CB_1E: ; RR (HL) -Z80_instr_CB_26: ; SLA (HL) -Z80_instr_CB_2E: ; SRA (HL) -Z80_instr_CB_3E: ; SRL (HL) -Z80_instr_DD_09: ; ADD IX,BC -Z80_instr_DD_19: ; ADD IX,DE -Z80_instr_DD_29: ; ADD IX,IX -Z80_instr_DD_39: ; ADD IX,SP -Z80_instr_ED_42: ; SBC HL,BC -Z80_instr_ED_4A: ; ADC HL,BC -Z80_instr_ED_52: ; SBC HL,DE -Z80_instr_ED_5A: ; ADC HL,DE -Z80_instr_ED_62: ; SBC HL,HL -Z80_instr_ED_67: ; RRD -Z80_instr_ED_6A: ; ADC HL,HL -Z80_instr_ED_6F: ; RLD -Z80_instr_ED_72: ; SBC HL,SP -Z80_instr_ED_7A: ; ADC HL,SP Z80_instr_ED_A1: ; CPI Z80_instr_ED_A9: ; CPD Z80_instr_ED_B1: ; CPIR Z80_instr_ED_B9: ; CPDR -Z80_instr_FD_09: ; ADD IY,BC -Z80_instr_FD_19: ; ADD IY,DE -Z80_instr_FD_29: ; ADD IY,IY -Z80_instr_FD_39: ; ADD IY,SP Z80_instr_xDCB_06: ; RLC (IXY+d) Z80_instr_xDCB_0E: ; RRC (IXY+d) Z80_instr_xDCB_16: ; RL (IXY+d) diff --git a/tools/generate_z80_tables.cc b/tools/generate_z80_tables.cc index 34e4fd8f..b84a53c9 100644 --- a/tools/generate_z80_tables.cc +++ b/tools/generate_z80_tables.cc @@ -257,11 +257,30 @@ std::string generateCpTable(void) std::stringstream outStr; outStr << "!macro PUT_Z80_FTABLE_CP {\n"; + for (uint16_t idx = 0; idx < 0x100; idx++) + { + uint8_t flags = GLOBAL_Parity[idx]; + if (idx >= 0x80) flags |= Z80_SF; // for negative result + if (idx == 0) flags |= Z80_ZF; // for result equal 0 + + outStr << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << int(flags) << "\n"; + } + + return outStr.str() + "}\n\n\n"; +} + +std::string generateRrdRldTable(void) +{ + std::stringstream outStr; + outStr << "!macro PUT_Z80_FTABLE_RRD_RLD {\n"; + for (uint16_t idx = 0; idx < 0x100; idx++) { uint8_t flags = Z80_NF; if (idx >= 0x80) flags |= Z80_SF; // for negative result if (idx == 0) flags |= Z80_ZF; // for result equal 0 + if (idx & 0x08) flags |= Z80_XF; // 3rd bit of the result + if (idx & 0x20) flags |= Z80_YF; // 5th bit of the result outStr << "\t!byte $" << std::hex << std::setw(2) << std::setfill('0') << int(flags) << "\n"; } @@ -415,6 +434,7 @@ void writeTables() outFile << generateAddAdcTable(); outFile << generateSubSbcTable(); outFile << generateCpTable(); + outFile << generateRrdRldTable(); outFile << generateNegTable(); outFile << generateDaaTables(); From cded5a0264e42dca5d2daf2d862c520ee361090b Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 30 Dec 2020 21:14:51 +0100 Subject: [PATCH 096/257] implemented solid cursor --- src/aliases/,aliases_ram_lowmem_m65.s | 7 ++++--- .../mega65_chrout_screen_control_escmode.s | 20 +++++++++++++++---- src/kernal/screen_m65/mega65_cursor_blink.s | 8 ++++++-- 3 files changed, 26 insertions(+), 9 deletions(-) diff --git a/src/aliases/,aliases_ram_lowmem_m65.s b/src/aliases/,aliases_ram_lowmem_m65.s index 15aeacd2..18235f66 100644 --- a/src/aliases/,aliases_ram_lowmem_m65.s +++ b/src/aliases/,aliases_ram_lowmem_m65.s @@ -59,9 +59,10 @@ !addr M65_KB_PRESSED = $5A0 ; $5A0-$5A2 keys pressed, used during scanning keyboard !addr M65_KB_PRESSED_OLD = $5A3 ; $5A3-$5A5 keys pressed during previous scan !addr M65_KB_PRESSED_NEW = $5A6 ; $5A6-$5A8 set of M65_KB_PRESSED minus M65_KB_PRESSED_OLD - !addr M65_BELLDSBL = $5A9 ; flag - if set, disable the bell - !addr M65_JOYCRSR = $5AA ; joystick to be used for cursor movement - ; $5AB-$5EB -- UNUSED -- + !addr M65_BELLDSBL = $5A9 ; flag - if set, disable the bell + !addr M65_SOLIDCRSR = $5AA ; flag - if set, cursor is solid (does not flash) + !addr M65_JOYCRSR = $5AB ; joystick to be used for cursor movement + ; $5AC-$5EB -- UNUSED -- !addr M65_DMAGIC_LIST = $5F1 ; $5EF-$5FF reserved for DMAgic list, 15 bytes (modulo bytes are not needed) !addr M65_RS232_INBUF = $600 ; $600-$6FF -- reserved for RS-232 input buffer -- !addr M65_RS232_OUTBUF = $700 ; $700-$7FF -- reserved for RS-232 output buffer -- diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s b/src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s index b2763de0..f885c808 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s @@ -185,6 +185,22 @@ m65_chrout_esc_R: ; 'reversed' screen colors and #$F0 bra m65_chrout_esc_COLOR_done +m65_chrout_esc_E: ; disable cursor flashing + + lda #$FF + +skip_2_bytes_trash_nvz + + ; FALLTROUGH + +m65_chrout_esc_F: ; enable cursor flashing + + lda #$00 + sta M65_SOLIDCRSR + + jmp m65_chrout_screen_done + + + ; XXX: implement screen routines below: @@ -199,10 +215,6 @@ m65_chrout_esc_C: ; disable auto-insert mode +nop m65_chrout_esc_D: ; delete current line, move content up +nop -m65_chrout_esc_E: ; disable cursor flashing - +nop -m65_chrout_esc_F: ; enable cursor flashing - +nop m65_chrout_esc_I: ; insert empty line, move content down +nop m65_chrout_esc_L: ; enable screen scrolling diff --git a/src/kernal/screen_m65/mega65_cursor_blink.s b/src/kernal/screen_m65/mega65_cursor_blink.s index c380301c..74bd61be 100644 --- a/src/kernal/screen_m65/mega65_cursor_blink.s +++ b/src/kernal/screen_m65/mega65_cursor_blink.s @@ -49,7 +49,7 @@ m65_cursor_blink: ; Check if cursor was visible or not, and toggle lda BLNON - bne m65_cursor_blink_undraw + bne m65_cursor_blink_check_undraw ; FALLTROUGH @@ -85,7 +85,11 @@ m65_cursor_blink_end: plz rts -m65_cursor_blink_undraw: +m65_cursor_blink_check_undraw: + + ; Check if cursor should blink at all + lda M65_SOLIDCRSR + bne m65_cursor_blink_timer_reset ; Cursor undraw - color lda GDCOL From 018ae9725b018c034ac68d6c40461aef801d2e51 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 30 Dec 2020 22:16:08 +0100 Subject: [PATCH 097/257] small code size optimization --- src/kernal/screen_m65/mega65_chrout_screen.s | 2 ++ .../mega65_chrout_screen_control_2.s | 2 +- .../mega65_chrout_screen_control_del.s | 12 ++--------- .../mega65_chrout_screen_control_escmode.s | 20 ++----------------- src/kernal/screen_m65/mega65_screen_helpers.s | 13 ++++++++++++ 5 files changed, 20 insertions(+), 29 deletions(-) diff --git a/src/kernal/screen_m65/mega65_chrout_screen.s b/src/kernal/screen_m65/mega65_chrout_screen.s index 805aeb92..1bac3b86 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen.s +++ b/src/kernal/screen_m65/mega65_chrout_screen.s @@ -272,6 +272,8 @@ m65_chrout_fix_scroll_up_scroll: phz + ; XXX try to shorten code by using m65_screen_put_space + jsr m65_helper_scrlpnt_color lda COLOR and #$0F diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_2.s b/src/kernal/screen_m65/mega65_chrout_screen_control_2.s index 96cb91b3..8ee46965 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control_2.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_2.s @@ -150,7 +150,7 @@ m65_chrout_screen_INS: jsr m65_chrout_screen_INS_copy - ; Store space in the current character cell + ; Store space in the current character cell XXX try to shorten code using m65_screen_put_space lda #$20 sta [M65_LPNT_SCR], z diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_del.s b/src/kernal/screen_m65/mega65_chrout_screen_control_del.s index b1baaaa9..37b40b66 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control_del.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_del.s @@ -72,20 +72,12 @@ m65_chrout_screen_DEL_1stcol: lda M65__TXTCOL beq @3 - ; Deleta character under cursor + ; Delete character under cursor phz - jsr m65_helper_scrlpnt_color ldz M65__TXTCOL - - lda COLOR - and #$0F - sta [M65_LPNT_SCR], z - - jsr m65_helper_scrlpnt_to_screen - lda #$20 - sta [M65_LPNT_SCR], z + jsr m65_screen_put_space plz diff --git a/src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s b/src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s index f885c808..2a3bc47e 100644 --- a/src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s +++ b/src/kernal/screen_m65/mega65_chrout_screen_control_escmode.s @@ -98,15 +98,7 @@ m65_chrout_esc_P: ; erase everything from start of the line to cursor XXX u ldz #$FF @1: inz - ; XXX common part - deduplicate, find other places - lda #$20 - sta [M65_LPNT_SCR], z - jsr m65_helper_scrlpnt_color - lda COLOR - and #$0F - sta [M65_LPNT_SCR], z - jsr m65_helper_scrlpnt_to_screen - ; XXX end common part + jsr m65_screen_put_space cpz M65__TXTCOL bne @1 @@ -121,15 +113,7 @@ m65_chrout_esc_Q: ; erase everything from cursor till the end of line XXX u taz @1: dez - ; XXX common part - deduplicate, find other places - lda #$20 - sta [M65_LPNT_SCR], z - jsr m65_helper_scrlpnt_color - lda COLOR - and #$0F - sta [M65_LPNT_SCR], z - jsr m65_helper_scrlpnt_to_screen - ; XXX end common part + jsr m65_screen_put_space cpz M65__TXTCOL bne @1 diff --git a/src/kernal/screen_m65/mega65_screen_helpers.s b/src/kernal/screen_m65/mega65_screen_helpers.s index 65db8b5f..a568815d 100644 --- a/src/kernal/screen_m65/mega65_screen_helpers.s +++ b/src/kernal/screen_m65/mega65_screen_helpers.s @@ -20,6 +20,19 @@ m65_screen_clear_special_modes: ; XXX consider integrating with 'm65_screen_clea rts +m65_screen_put_space: + + ; Puts space in current line, position .Z + + lda #$20 + sta [M65_LPNT_SCR], z + jsr m65_helper_scrlpnt_color + lda COLOR + and #$0F + sta [M65_LPNT_SCR], z + jmp m65_helper_scrlpnt_to_screen + + m65_screen_upd_txtrow_off: ldy M65__TXTROW From 9b538016f16de22a1899165782d7e34fcc503d93 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 30 Dec 2020 22:48:08 +0100 Subject: [PATCH 098/257] added simple memtest --- src/zvm_m65/zvm_core.s | 71 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 61 insertions(+), 10 deletions(-) diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 784c1ab9..8686a86b 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -5,10 +5,11 @@ ZVM_entry: - ; Reset stack pointer - this routine will never return + ; Reset stack pointer, set .Z to 0 - this routine will never return ldx #$FF txs + ldz #$00 ; Skip the IRQ processing, even if Kernal reenables it @@ -48,6 +49,10 @@ ZVM_entry: !byte $0D,$0D !byte 0 + ; Check if extended memory is present + + jsr ZVM_memtest + ; Initialize constants XXX consider moving this to a dedicated reset CPU routine lda #$00 ; all the Z80 memory is located below $0100:$0000 @@ -58,17 +63,10 @@ ZVM_entry: jsr z80_table_gen - - - ; XXX code is not ready to progress further - jsr PRIMM - !byte $0D - !pet "* Implementation not finished yet - system HALTED *" - !byte 0 -@1 - bra @1 + !pet $0D, "Implementation not finished yet.", 0 + jmp ZVM_halt jmp zvm_BIOS_00_BOOT @@ -275,3 +273,56 @@ Z80_illeg_xDCB_3F: ; SLR (IXY+d),A jmp ZVM_next ; XXX provide implementation + + +ZVM_memtest: + + ; Simple memory test + + lda #$00 + sta PTR_DATA+0 + sta PTR_DATA+1 + sta PTR_DATA+2 + lda #$08 + sta PTR_DATA+3 + + ldx #$F0 +@1: + ldy #$00 +@2: + lda PTR_DATA+2 + eor #%01111111 + sta PTR_DATA+2 + + stx PTR_DATA+0 + eor PTR_DATA+0 + sta PTR_DATA+0 + + sty PTR_DATA+1 + tya + + sta [PTR_DATA], z + lda [PTR_DATA], z + cmp PTR_DATA+1 + bne ZVM_halt_memtest_failed + + iny + bne @2 + inx + bne @1 + + rts + +ZVM_halt_memtest_failed: + + jsr PRIMM + !pet $0D, "ATTIC RAM failure.", 0 + + ; FALLTROUGH + +ZVM_halt: + + jsr PRIMM + !pet " * System HALTED *", 0 +@1: + bra @1 From 663bb3875e49179e1161c2b45e5e21c5f1926b01 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 31 Dec 2020 17:04:56 +0100 Subject: [PATCH 099/257] more Z80 work --- src/zvm_m65/z80_instr_io.s | 28 ++ src/zvm_m65/z80_instr_rotate_shift.s | 378 ++++++++++++++++++++++++++- src/zvm_m65/zvm_core.s | 76 +----- 3 files changed, 412 insertions(+), 70 deletions(-) diff --git a/src/zvm_m65/z80_instr_io.s b/src/zvm_m65/z80_instr_io.s index b587659a..d1ed76b2 100644 --- a/src/zvm_m65/z80_instr_io.s +++ b/src/zvm_m65/z80_instr_io.s @@ -3,6 +3,8 @@ ; Z80 input/output instructions ; +; XXX ZVM_store_IO should go to next instruction + Z80_instr_DB: ; IN A,(n) @@ -29,6 +31,20 @@ Z80_instr_DB: ; jmp ZVM_next } +!macro Z80_IN_NULL { + lda REG_C + sta ADDR_IO+0 + lda REG_B + sta ADDR_IO+1 + jsr ZVM_fetch_IO + tax + lda REG_F + and #($FF - Z80_SF - Z80_ZF - Z80_HF - Z80_PF - Z80_NF - Z80_XF - Z80_YF) + ora z80_ftable_IN_OR_XOR, x + sta REG_F + jmp ZVM_next +} + Z80_instr_ED_40: +Z80_IN_REGn REG_B ; IN B,(C) Z80_instr_ED_48: +Z80_IN_REGn REG_C ; IN C,(C) Z80_instr_ED_50: +Z80_IN_REGn REG_D ; IN D,(C) @@ -36,6 +52,7 @@ Z80_instr_ED_58: +Z80_IN_REGn REG_E ; Z80_instr_ED_60: +Z80_IN_REGn REG_H ; IN H,(C) Z80_instr_ED_68: +Z80_IN_REGn REG_L ; IN L,(C) Z80_instr_ED_78: +Z80_IN_REGn REG_A ; IN A,(C) +Z80_illeg_ED_70: +Z80_IN_NULL ; IN (C) Z80_instr_D3: ; OUT (n),A @@ -74,8 +91,19 @@ Z80_instr_ED_49: ; jmp ZVM_next } +!macro Z80_OUT_NULL { + lda REG_C + sta ADDR_IO+0 + lda REG_B + sta ADDR_IO+1 + lda #$00 + jsr ZVM_store_IO + jmp ZVM_next +} + Z80_instr_ED_51: +Z80_OUT_REGn REG_D ; OUT (C),D Z80_instr_ED_59: +Z80_OUT_REGn REG_E ; OUT (C),E Z80_instr_ED_61: +Z80_OUT_REGn REG_H ; OUT (C),H Z80_instr_ED_69: +Z80_OUT_REGn REG_L ; OUT (C),L Z80_instr_ED_79: +Z80_OUT_REGn REG_A ; OUT (C),A +Z80_illeg_ED_71: +Z80_OUT_NULL ; OUT (C),0 diff --git a/src/zvm_m65/z80_instr_rotate_shift.s b/src/zvm_m65/z80_instr_rotate_shift.s index bd5f5843..799df242 100644 --- a/src/zvm_m65/z80_instr_rotate_shift.s +++ b/src/zvm_m65/z80_instr_rotate_shift.s @@ -190,6 +190,45 @@ Z80_instr_1F: ; RRA jmp ZVM_next } +!macro Z80_RLC_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + + tax + rol + txa + + rol + sta [PTR_IXY_d],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +!macro Z80_RLC_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + + tax + rol + txa + + rol + sta [PTR_IXY_d],z + sta .REGn + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + Z80_instr_CB_00: +Z80_RLC_REGn REG_B ; RLC B Z80_instr_CB_01: +Z80_RLC_REGn REG_C ; RLC C Z80_instr_CB_02: +Z80_RLC_REGn REG_D ; RLC D @@ -198,6 +237,15 @@ Z80_instr_CB_04: +Z80_RLC_REGn REG_H ; Z80_instr_CB_05: +Z80_RLC_REGn REG_L ; RLC L Z80_instr_CB_07: +Z80_RLC_REGn REG_A ; RLC A Z80_instr_CB_06: +Z80_RLC_VIA_HL ; RLC (HL) +Z80_instr_xDCB_06: +Z80_RLC_VIA_IXY_d ; RLC (IXY+d) + +Z80_illeg_xDCB_00: +Z80_RLC_VIA_IXY_d_REGn REG_B ; RLC (IXY+d),B +Z80_illeg_xDCB_01: +Z80_RLC_VIA_IXY_d_REGn REG_C ; RLC (IXY+d),C +Z80_illeg_xDCB_02: +Z80_RLC_VIA_IXY_d_REGn REG_D ; RLC (IXY+d),D +Z80_illeg_xDCB_03: +Z80_RLC_VIA_IXY_d_REGn REG_E ; RLC (IXY+d),E +Z80_illeg_xDCB_04: +Z80_RLC_VIA_IXY_d_REGn REG_H ; RLC (IXY+d),H +Z80_illeg_xDCB_05: +Z80_RLC_VIA_IXY_d_REGn REG_L ; RLC (IXY+d),L +Z80_illeg_xDCB_07: +Z80_RLC_VIA_IXY_d_REGn REG_A ; RLC (IXY+d),A !macro Z80_RRC_REGn .REGn { @@ -234,6 +282,45 @@ Z80_instr_CB_06: +Z80_RLC_VIA_HL ; jmp ZVM_next } +!macro Z80_RRC_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + + tax + ror + txa + + ror + sta [PTR_IXY_d],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +!macro Z80_RRC_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + + tax + ror + txa + + ror + sta [PTR_IXY_d],z + sta .REGn + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + Z80_instr_CB_08: +Z80_RRC_REGn REG_B ; RRC B Z80_instr_CB_09: +Z80_RRC_REGn REG_C ; RRC C Z80_instr_CB_0A: +Z80_RRC_REGn REG_D ; RRC D @@ -242,6 +329,15 @@ Z80_instr_CB_0C: +Z80_RRC_REGn REG_H ; Z80_instr_CB_0D: +Z80_RRC_REGn REG_L ; RRC L Z80_instr_CB_0F: +Z80_RRC_REGn REG_A ; RRC A Z80_instr_CB_0E: +Z80_RRC_VIA_HL ; RRC (HL) +Z80_instr_xDCB_0E: +Z80_RRC_VIA_IXY_d ; RRC (IXY+d) + +Z80_illeg_xDCB_08: +Z80_RRC_VIA_IXY_d_REGn REG_B ; RRC (IXY+d),B +Z80_illeg_xDCB_09: +Z80_RRC_VIA_IXY_d_REGn REG_C ; RRC (IXY+d),C +Z80_illeg_xDCB_0A: +Z80_RRC_VIA_IXY_d_REGn REG_D ; RRC (IXY+d),D +Z80_illeg_xDCB_0B: +Z80_RRC_VIA_IXY_d_REGn REG_E ; RRC (IXY+d),E +Z80_illeg_xDCB_0C: +Z80_RRC_VIA_IXY_d_REGn REG_H ; RRC (IXY+d),H +Z80_illeg_xDCB_0D: +Z80_RRC_VIA_IXY_d_REGn REG_L ; RRC (IXY+d),L +Z80_illeg_xDCB_0F: +Z80_RRC_VIA_IXY_d_REGn REG_A ; RRC (IXY+d),A !macro Z80_RL_REGn .REGn { @@ -278,6 +374,45 @@ Z80_instr_CB_0E: +Z80_RRC_VIA_HL ; jmp ZVM_next } +!macro Z80_RL_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + + clc + bbr0 REG_F, @1 + sec +@1: + rol + sta [PTR_IXY_d],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +!macro Z80_RL_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + + clc + bbr0 REG_F, @1 + sec +@1: + rol + sta [PTR_IXY_d],z + sta .REGn + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + Z80_instr_CB_10: +Z80_RL_REGn REG_B ; RL B Z80_instr_CB_11: +Z80_RL_REGn REG_C ; RL C Z80_instr_CB_12: +Z80_RL_REGn REG_D ; RL D @@ -286,6 +421,15 @@ Z80_instr_CB_14: +Z80_RL_REGn REG_H ; Z80_instr_CB_15: +Z80_RL_REGn REG_L ; RL L Z80_instr_CB_17: +Z80_RL_REGn REG_A ; RL A Z80_instr_CB_16: +Z80_RL_VIA_HL ; RL (HL) +Z80_instr_xDCB_16: +Z80_RL_VIA_IXY_d ; RL (IXY+d) + +Z80_illeg_xDCB_10: +Z80_RL_VIA_IXY_d_REGn REG_B ; RL (IXY+d),B +Z80_illeg_xDCB_11: +Z80_RL_VIA_IXY_d_REGn REG_C ; RL (IXY+d),C +Z80_illeg_xDCB_12: +Z80_RL_VIA_IXY_d_REGn REG_D ; RL (IXY+d),D +Z80_illeg_xDCB_13: +Z80_RL_VIA_IXY_d_REGn REG_E ; RL (IXY+d),E +Z80_illeg_xDCB_14: +Z80_RL_VIA_IXY_d_REGn REG_H ; RL (IXY+d),H +Z80_illeg_xDCB_15: +Z80_RL_VIA_IXY_d_REGn REG_L ; RL (IXY+d),L +Z80_illeg_xDCB_17: +Z80_RL_VIA_IXY_d_REGn REG_A ; RL (IXY+d),A !macro Z80_RR_REGn .REGn { @@ -322,6 +466,45 @@ Z80_instr_CB_16: +Z80_RL_VIA_HL ; jmp ZVM_next } +!macro Z80_RR_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + + clc + bbr0 REG_F, @1 + sec +@1: + ror + sta [PTR_IXY_d],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +!macro Z80_RR_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + + clc + bbr0 REG_F, @1 + sec +@1: + ror + sta [PTR_IXY_d],z + sta .REGn + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + Z80_instr_CB_18: +Z80_RR_REGn REG_B ; RR B Z80_instr_CB_19: +Z80_RR_REGn REG_C ; RR C Z80_instr_CB_1A: +Z80_RR_REGn REG_D ; RR D @@ -330,6 +513,15 @@ Z80_instr_CB_1C: +Z80_RR_REGn REG_H ; Z80_instr_CB_1D: +Z80_RR_REGn REG_L ; RR L Z80_instr_CB_1F: +Z80_RR_REGn REG_A ; RR A Z80_instr_CB_1E: +Z80_RR_VIA_HL ; RR (HL) +Z80_instr_xDCB_1E: +Z80_RR_VIA_IXY_d ; RR (IXY+d) + +Z80_illeg_xDCB_18: +Z80_RR_VIA_IXY_d_REGn REG_B ; RR (IXY+d),B +Z80_illeg_xDCB_19: +Z80_RR_VIA_IXY_d_REGn REG_C ; RR (IXY+d),C +Z80_illeg_xDCB_1A: +Z80_RR_VIA_IXY_d_REGn REG_D ; RR (IXY+d),D +Z80_illeg_xDCB_1B: +Z80_RR_VIA_IXY_d_REGn REG_E ; RR (IXY+d),E +Z80_illeg_xDCB_1C: +Z80_RR_VIA_IXY_d_REGn REG_H ; RR (IXY+d),H +Z80_illeg_xDCB_1D: +Z80_RR_VIA_IXY_d_REGn REG_L ; RR (IXY+d),L +Z80_illeg_xDCB_1F: +Z80_RR_VIA_IXY_d_REGn REG_A ; RR (IXY+d),A ; XXX SLA/SLL (and possibly rotations) can be made slightly faster with dedicated tables (omit carry flag calculation) @@ -345,7 +537,7 @@ Z80_instr_CB_1E: +Z80_RR_VIA_HL ; jmp ZVM_next } -!macro Z80_SLA_VIA { +!macro Z80_SLA_VIA_HL { jsr (VEC_fetch_via_HL) asl @@ -359,6 +551,35 @@ Z80_instr_CB_1E: +Z80_RR_VIA_HL ; jmp ZVM_next } +!macro Z80_SLA_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + asl + sta [PTR_IXY_d],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +!macro Z80_SLA_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + asl + sta [PTR_IXY_d],z + sta .REGn + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + Z80_instr_CB_20: +Z80_SLA_REGn REG_B ; SLA B Z80_instr_CB_21: +Z80_SLA_REGn REG_C ; SLA C Z80_instr_CB_22: +Z80_SLA_REGn REG_D ; SLA D @@ -366,7 +587,16 @@ Z80_instr_CB_23: +Z80_SLA_REGn REG_E ; Z80_instr_CB_24: +Z80_SLA_REGn REG_H ; SLA H Z80_instr_CB_25: +Z80_SLA_REGn REG_L ; SLA L Z80_instr_CB_27: +Z80_SLA_REGn REG_A ; SLA A -Z80_instr_CB_26: +Z80_SLA_VIA ; SLA (HL) +Z80_instr_CB_26: +Z80_SLA_VIA_HL ; SLA (HL) +Z80_instr_xDCB_26: +Z80_SLA_VIA_IXY_d ; SLA (IXY+d) + +Z80_illeg_xDCB_20: +Z80_SLA_VIA_IXY_d_REGn REG_B ; SLA (IXY+d),B +Z80_illeg_xDCB_21: +Z80_SLA_VIA_IXY_d_REGn REG_C ; SLA (IXY+d),C +Z80_illeg_xDCB_22: +Z80_SLA_VIA_IXY_d_REGn REG_D ; SLA (IXY+d),D +Z80_illeg_xDCB_23: +Z80_SLA_VIA_IXY_d_REGn REG_E ; SLA (IXY+d),E +Z80_illeg_xDCB_24: +Z80_SLA_VIA_IXY_d_REGn REG_H ; SLA (IXY+d),H +Z80_illeg_xDCB_25: +Z80_SLA_VIA_IXY_d_REGn REG_L ; SLA (IXY+d),L +Z80_illeg_xDCB_27: +Z80_SLA_VIA_IXY_d_REGn REG_A ; SLA (IXY+d),A !macro Z80_SLL_REGn .REGn { @@ -381,6 +611,52 @@ Z80_instr_CB_26: +Z80_SLA_VIA ; jmp ZVM_next } +!macro Z80_SLL_VIA_HL { + + jsr (VEC_fetch_via_HL) + sec + rol + sta [PTR_DATA],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +!macro Z80_SLL_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + sec + rol + sta [PTR_IXY_d],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +!macro Z80_SLL_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + sec + rol + sta [PTR_IXY_d],z + sta .REGn + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + Z80_illeg_CB_30: +Z80_SLL_REGn REG_B ; SLL B Z80_illeg_CB_31: +Z80_SLL_REGn REG_C ; SLL C Z80_illeg_CB_32: +Z80_SLL_REGn REG_D ; SLL D @@ -388,6 +664,16 @@ Z80_illeg_CB_33: +Z80_SLL_REGn REG_E ; Z80_illeg_CB_34: +Z80_SLL_REGn REG_H ; SLL H Z80_illeg_CB_35: +Z80_SLL_REGn REG_L ; SLL L Z80_illeg_CB_37: +Z80_SLL_REGn REG_A ; SLL A +Z80_illeg_CB_36: +Z80_SLL_VIA_HL ; SLL (HL) +Z80_illeg_xDCB_36: +Z80_SLL_VIA_IXY_d ; SLL (IXY+d) + +Z80_illeg_xDCB_30: +Z80_SLL_VIA_IXY_d_REGn REG_B ; SLL (IXY+d),B +Z80_illeg_xDCB_31: +Z80_SLL_VIA_IXY_d_REGn REG_C ; SLL (IXY+d),C +Z80_illeg_xDCB_32: +Z80_SLL_VIA_IXY_d_REGn REG_D ; SLL (IXY+d),D +Z80_illeg_xDCB_33: +Z80_SLL_VIA_IXY_d_REGn REG_E ; SLL (IXY+d),E +Z80_illeg_xDCB_34: +Z80_SLL_VIA_IXY_d_REGn REG_H ; SLL (IXY+d),H +Z80_illeg_xDCB_35: +Z80_SLL_VIA_IXY_d_REGn REG_L ; SLL (IXY+d),L +Z80_illeg_xDCB_37: +Z80_SLL_VIA_IXY_d_REGn REG_A ; SLL (IXY+d),A !macro Z80_SRL_REGn .REGn { @@ -417,6 +703,37 @@ Z80_illeg_CB_37: +Z80_SLL_REGn REG_A ; jmp ZVM_next } +!macro Z80_SRL_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + clc + ror + sta [PTR_IXY_d],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +!macro Z80_SRL_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + clc + ror + sta [PTR_IXY_d],z + sta .REGn + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + Z80_instr_CB_38: +Z80_SRL_REGn REG_B ; SRL B Z80_instr_CB_39: +Z80_SRL_REGn REG_C ; SRL C Z80_instr_CB_3A: +Z80_SRL_REGn REG_D ; SRL D @@ -425,6 +742,15 @@ Z80_instr_CB_3C: +Z80_SRL_REGn REG_H ; Z80_instr_CB_3D: +Z80_SRL_REGn REG_L ; SRL L Z80_instr_CB_3F: +Z80_SRL_REGn REG_A ; SRL A Z80_instr_CB_3E: +Z80_SRL_VIA_HL ; SRL (HL) +Z80_instr_xDCB_3E: +Z80_SRL_VIA_IXY_d ; SRL (IXY+d) + +Z80_illeg_xDCB_38: +Z80_SRL_VIA_IXY_d_REGn REG_B ; SLR (IXY+d),B +Z80_illeg_xDCB_39: +Z80_SRL_VIA_IXY_d_REGn REG_C ; SLR (IXY+d),C +Z80_illeg_xDCB_3A: +Z80_SRL_VIA_IXY_d_REGn REG_D ; SLR (IXY+d),D +Z80_illeg_xDCB_3B: +Z80_SRL_VIA_IXY_d_REGn REG_E ; SLR (IXY+d),E +Z80_illeg_xDCB_3C: +Z80_SRL_VIA_IXY_d_REGn REG_H ; SLR (IXY+d),H +Z80_illeg_xDCB_3D: +Z80_SRL_VIA_IXY_d_REGn REG_L ; SLR (IXY+d),L +Z80_illeg_xDCB_3F: +Z80_SRL_VIA_IXY_d_REGn REG_A ; SLR (IXY+d),A !macro Z80_SRA_REGn .REGn { @@ -461,6 +787,45 @@ Z80_instr_CB_3E: +Z80_SRL_VIA_HL ; jmp ZVM_next } +!macro Z80_SRA_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + + tax + ror + txa + + ror + sta [PTR_IXY_d],z + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + +!macro Z80_SRA_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + + tax + ror + txa + + ror + sta [PTR_IXY_d],z + sta .REGn + + tax + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next +} + Z80_instr_CB_28: +Z80_SRA_REGn REG_B ; SRA B Z80_instr_CB_29: +Z80_SRA_REGn REG_C ; SRA C Z80_instr_CB_2A: +Z80_SRA_REGn REG_D ; SRA D @@ -469,3 +834,12 @@ Z80_instr_CB_2C: +Z80_SRA_REGn REG_H ; Z80_instr_CB_2D: +Z80_SRA_REGn REG_L ; SRA L Z80_instr_CB_2F: +Z80_SRA_REGn REG_A ; SRA A Z80_instr_CB_2E: +Z80_SRA_VIA_HL ; SRA (HL) +Z80_instr_xDCB_2E: +Z80_SRA_VIA_IXY_d ; SRA (IXY+d) + +Z80_illeg_xDCB_28: +Z80_SRA_VIA_IXY_d_REGn REG_B ; SRA (IXY+d),B +Z80_illeg_xDCB_29: +Z80_SRA_VIA_IXY_d_REGn REG_C ; SRA (IXY+d),C +Z80_illeg_xDCB_2A: +Z80_SRA_VIA_IXY_d_REGn REG_D ; SRA (IXY+d),D +Z80_illeg_xDCB_2B: +Z80_SRA_VIA_IXY_d_REGn REG_E ; SRA (IXY+d),E +Z80_illeg_xDCB_2C: +Z80_SRA_VIA_IXY_d_REGn REG_H ; SRA (IXY+d),H +Z80_illeg_xDCB_2D: +Z80_SRA_VIA_IXY_d_REGn REG_L ; SRA (IXY+d),L +Z80_illeg_xDCB_2F: +Z80_SRA_VIA_IXY_d_REGn REG_A ; SRA (IXY+d),A diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 8686a86b..87481d20 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -188,6 +188,8 @@ Z80_instr_FD: +ZVM_DISPATCH Z80_vectab_FD_0, Z80_vectab_FD_1 ; + + @@ -202,83 +204,21 @@ Z80_instr_ED_A1: ; CPI Z80_instr_ED_A9: ; CPD Z80_instr_ED_B1: ; CPIR Z80_instr_ED_B9: ; CPDR -Z80_instr_xDCB_06: ; RLC (IXY+d) -Z80_instr_xDCB_0E: ; RRC (IXY+d) -Z80_instr_xDCB_16: ; RL (IXY+d) -Z80_instr_xDCB_1E: ; RR (IXY+d) -Z80_instr_xDCB_26: ; SLA (IXY+d) -Z80_instr_xDCB_2E: ; SRA (IXY+d) -Z80_instr_xDCB_3E: ; SRL (IXY+d) -Z80_illeg_CB_36: ; SLL (HL) -Z80_illeg_ED_70: ; IN F,(C) -Z80_illeg_ED_71: ; OUT (C),0 -Z80_illeg_xDCB_00: ; RLC (IXY+d),B -Z80_illeg_xDCB_01: ; RLC (IXY+d),C -Z80_illeg_xDCB_02: ; RLC (IXY+d),D -Z80_illeg_xDCB_03: ; RLC (IXY+d),E -Z80_illeg_xDCB_04: ; RLC (IXY+d),H -Z80_illeg_xDCB_05: ; RLC (IXY+d),L -Z80_illeg_xDCB_07: ; RLC (IXY+d),A -Z80_illeg_xDCB_08: ; RRC (IXY+d),B -Z80_illeg_xDCB_09: ; RRC (IXY+d),C -Z80_illeg_xDCB_0A: ; RRC (IXY+d),D -Z80_illeg_xDCB_0B: ; RRC (IXY+d),E -Z80_illeg_xDCB_0C: ; RRC (IXY+d),H -Z80_illeg_xDCB_0D: ; RRC (IXY+d),L -Z80_illeg_xDCB_0F: ; RRC (IXY+d),A -Z80_illeg_xDCB_10: ; RL (IXY+d),B -Z80_illeg_xDCB_11: ; RL (IXY+d),C -Z80_illeg_xDCB_12: ; RL (IXY+d),D -Z80_illeg_xDCB_13: ; RL (IXY+d),E -Z80_illeg_xDCB_14: ; RL (IXY+d),H -Z80_illeg_xDCB_15: ; RL (IXY+d),L -Z80_illeg_xDCB_17: ; RL (IXY+d),A -Z80_illeg_xDCB_18: ; RR (IXY+d),B -Z80_illeg_xDCB_19: ; RR (IXY+d),C -Z80_illeg_xDCB_1A: ; RR (IXY+d),D -Z80_illeg_xDCB_1B: ; RR (IXY+d),E -Z80_illeg_xDCB_1C: ; RR (IXY+d),H -Z80_illeg_xDCB_1D: ; RR (IXY+d),L -Z80_illeg_xDCB_1F: ; RR (IXY+d),A -Z80_illeg_xDCB_20: ; SLA (IXY+d),B -Z80_illeg_xDCB_21: ; SLA (IXY+d),C -Z80_illeg_xDCB_22: ; SLA (IXY+d),D -Z80_illeg_xDCB_23: ; SLA (IXY+d),E -Z80_illeg_xDCB_24: ; SLA (IXY+d),H -Z80_illeg_xDCB_25: ; SLA (IXY+d),L -Z80_illeg_xDCB_27: ; SLA (IXY+d),A -Z80_illeg_xDCB_28: ; SRA (IXY+d),B -Z80_illeg_xDCB_29: ; SRA (IXY+d),C -Z80_illeg_xDCB_2A: ; SRA (IXY+d),D -Z80_illeg_xDCB_2B: ; SRA (IXY+d),E -Z80_illeg_xDCB_2C: ; SRA (IXY+d),H -Z80_illeg_xDCB_2D: ; SRA (IXY+d),L -Z80_illeg_xDCB_2F: ; SRA (IXY+d),A -Z80_illeg_xDCB_30: ; SLL (IXY+d),B -Z80_illeg_xDCB_31: ; SLL (IXY+d),C -Z80_illeg_xDCB_32: ; SLL (IXY+d),D -Z80_illeg_xDCB_33: ; SLL (IXY+d),E -Z80_illeg_xDCB_34: ; SLL (IXY+d),H -Z80_illeg_xDCB_35: ; SLL (IXY+d),L -Z80_illeg_xDCB_36: ; SLL (IXY+d) -Z80_illeg_xDCB_37: ; SLL (IXY+d),A -Z80_illeg_xDCB_38: ; SLR (IXY+d),B -Z80_illeg_xDCB_39: ; SLR (IXY+d),C -Z80_illeg_xDCB_3A: ; SLR (IXY+d),D -Z80_illeg_xDCB_3B: ; SLR (IXY+d),E -Z80_illeg_xDCB_3C: ; SLR (IXY+d),H -Z80_illeg_xDCB_3D: ; SLR (IXY+d),L -Z80_illeg_xDCB_3F: ; SLR (IXY+d),A + + jmp ZVM_next ; XXX provide implementation + + ZVM_memtest: ; Simple memory test - + ; XXX this test is temporary + lda #$00 sta PTR_DATA+0 sta PTR_DATA+1 From 10a0f0a1167267bf43f1d80731702983661fc28a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 31 Dec 2020 18:52:13 +0100 Subject: [PATCH 100/257] code size optimization --- src/aliases/,aliases_ram_over64K_m65.s | 7 +- src/zvm_m65/Z80_instr_shftrot_RL.s | 98 ++++ src/zvm_m65/Z80_instr_shftrot_RLC.s | 98 ++++ src/zvm_m65/Z80_instr_shftrot_RR.s | 98 ++++ src/zvm_m65/Z80_instr_shftrot_RRC.s | 98 ++++ src/zvm_m65/Z80_instr_shftrot_SLA.s | 79 +++ src/zvm_m65/Z80_instr_shftrot_SLL.s | 83 +++ src/zvm_m65/Z80_instr_shftrot_SRA.s | 98 ++++ src/zvm_m65/Z80_instr_shftrot_SRL.s | 83 +++ src/zvm_m65/z80_instr_rotate_shift.s | 692 +------------------------ 10 files changed, 739 insertions(+), 695 deletions(-) create mode 100644 src/zvm_m65/Z80_instr_shftrot_RL.s create mode 100644 src/zvm_m65/Z80_instr_shftrot_RLC.s create mode 100644 src/zvm_m65/Z80_instr_shftrot_RR.s create mode 100644 src/zvm_m65/Z80_instr_shftrot_RRC.s create mode 100644 src/zvm_m65/Z80_instr_shftrot_SLA.s create mode 100644 src/zvm_m65/Z80_instr_shftrot_SLL.s create mode 100644 src/zvm_m65/Z80_instr_shftrot_SRA.s create mode 100644 src/zvm_m65/Z80_instr_shftrot_SRL.s diff --git a/src/aliases/,aliases_ram_over64K_m65.s b/src/aliases/,aliases_ram_over64K_m65.s index 2c84851e..ad670542 100644 --- a/src/aliases/,aliases_ram_over64K_m65.s +++ b/src/aliases/,aliases_ram_over64K_m65.s @@ -26,8 +26,7 @@ !set MEMCONF_SHADOW_BZP_3 = $00 ; $1F800-$1FFFF (2KB) - color RAM mirror, not useable - ; $20000-$2FFFF (64KB) - ROM, the essential part - ; $30000-$4FFFF (64KB) - ROM, additions - ; $50000-$57FFF (32KB) - reserved for graphics screen + ; $20000-$4FFFF (64KB) - ROM, additions - ; $58000-... - extended BASIC variables, RAM disk, etc. + ; $50000-$57FFF (32KB) - reserved for graphics screen / Z80 memory bank 1 + ; $58000-... - native mode BASIC variables / Z80 memory bank 1 (up to $57FFF) diff --git a/src/zvm_m65/Z80_instr_shftrot_RL.s b/src/zvm_m65/Z80_instr_shftrot_RL.s new file mode 100644 index 00000000..1c0ce575 --- /dev/null +++ b/src/zvm_m65/Z80_instr_shftrot_RL.s @@ -0,0 +1,98 @@ + +; +; Z80 instruction implementation - RL +; + + +!macro Z80_RL_REGn .REGn { + + clc + bbr0 REG_F, @1 + sec +@1: + rol .REGn + + ldx .REGn + bra Z80_common_RL +} + +!macro Z80_RL_VIA_HL { + + jsr (VEC_fetch_via_HL) + + clc + bbr0 REG_F, @1 + sec +@1: + rol + + sta [PTR_DATA],z + bra Z80_common_RL_VIA +} + +!macro Z80_RL_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + + clc + bbr0 REG_F, @1 + sec +@1: + rol + + ; FALLTROUGH +} + +!macro Z80_RL_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + + clc + bbr0 REG_F, @1 + sec +@1: + rol + + sta .REGn + bra Z80_common_RL_VIA_IXY_d +} + +Z80_instr_CB_10: +Z80_RL_REGn REG_B ; RL B +Z80_instr_CB_11: +Z80_RL_REGn REG_C ; RL C +Z80_instr_CB_12: +Z80_RL_REGn REG_D ; RL D +Z80_instr_CB_13: +Z80_RL_REGn REG_E ; RL E +Z80_instr_CB_14: +Z80_RL_REGn REG_H ; RL H +Z80_instr_CB_15: +Z80_RL_REGn REG_L ; RL L +Z80_instr_CB_17: +Z80_RL_REGn REG_A ; RL A +Z80_instr_CB_16: +Z80_RL_VIA_HL ; RL (HL) +Z80_instr_xDCB_16: +Z80_RL_VIA_IXY_d ; RL (IXY+d) + + ; FALLTROUGH + +Z80_common_RL_VIA_IXY_d: + + sta [PTR_IXY_d],z + + ; FALLTROUGH + +Z80_common_RL_VIA: + + tax + + ; FALLTROUGH + +Z80_common_RL: + + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next + +Z80_illeg_xDCB_10: +Z80_RL_VIA_IXY_d_REGn REG_B ; RL (IXY+d),B +Z80_illeg_xDCB_11: +Z80_RL_VIA_IXY_d_REGn REG_C ; RL (IXY+d),C +Z80_illeg_xDCB_12: +Z80_RL_VIA_IXY_d_REGn REG_D ; RL (IXY+d),D +Z80_illeg_xDCB_13: +Z80_RL_VIA_IXY_d_REGn REG_E ; RL (IXY+d),E +Z80_illeg_xDCB_14: +Z80_RL_VIA_IXY_d_REGn REG_H ; RL (IXY+d),H +Z80_illeg_xDCB_15: +Z80_RL_VIA_IXY_d_REGn REG_L ; RL (IXY+d),L +Z80_illeg_xDCB_17: +Z80_RL_VIA_IXY_d_REGn REG_A ; RL (IXY+d),A diff --git a/src/zvm_m65/Z80_instr_shftrot_RLC.s b/src/zvm_m65/Z80_instr_shftrot_RLC.s new file mode 100644 index 00000000..daae23fe --- /dev/null +++ b/src/zvm_m65/Z80_instr_shftrot_RLC.s @@ -0,0 +1,98 @@ + +; +; Z80 instruction implementation - RLC +; + + +!macro Z80_RLC_REGn .REGn { + + clc + bbr7 .REGn, @1 + sec +@1: + rol .REGn + + ldx .REGn + bra Z80_common_RLC +} + +!macro Z80_RLC_VIA_HL { + + jsr (VEC_fetch_via_HL) + + tax + rol + txa + + rol + + sta [PTR_DATA],z + bra Z80_common_RLC_VIA +} + +!macro Z80_RLC_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + + tax + rol + txa + + rol + + ; FALLTROUGH +} + +!macro Z80_RLC_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + + tax + rol + txa + + rol + + sta .REGn + bra Z80_common_RLC_VIA_IXY_d +} + +Z80_instr_CB_00: +Z80_RLC_REGn REG_B ; RLC B +Z80_instr_CB_01: +Z80_RLC_REGn REG_C ; RLC C +Z80_instr_CB_02: +Z80_RLC_REGn REG_D ; RLC D +Z80_instr_CB_03: +Z80_RLC_REGn REG_E ; RLC E +Z80_instr_CB_04: +Z80_RLC_REGn REG_H ; RLC H +Z80_instr_CB_05: +Z80_RLC_REGn REG_L ; RLC L +Z80_instr_CB_07: +Z80_RLC_REGn REG_A ; RLC A +Z80_instr_CB_06: +Z80_RLC_VIA_HL ; RLC (HL) +Z80_instr_xDCB_06: +Z80_RLC_VIA_IXY_d ; RLC (IXY+d) + + ; FALLTROUGH + +Z80_common_RLC_VIA_IXY_d: + + sta [PTR_IXY_d],z + + ; FALLTROUGH + +Z80_common_RLC_VIA: + + tax + + ; FALLTROUGH + +Z80_common_RLC: + + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next + +Z80_illeg_xDCB_00: +Z80_RLC_VIA_IXY_d_REGn REG_B ; RLC (IXY+d),B +Z80_illeg_xDCB_01: +Z80_RLC_VIA_IXY_d_REGn REG_C ; RLC (IXY+d),C +Z80_illeg_xDCB_02: +Z80_RLC_VIA_IXY_d_REGn REG_D ; RLC (IXY+d),D +Z80_illeg_xDCB_03: +Z80_RLC_VIA_IXY_d_REGn REG_E ; RLC (IXY+d),E +Z80_illeg_xDCB_04: +Z80_RLC_VIA_IXY_d_REGn REG_H ; RLC (IXY+d),H +Z80_illeg_xDCB_05: +Z80_RLC_VIA_IXY_d_REGn REG_L ; RLC (IXY+d),L +Z80_illeg_xDCB_07: +Z80_RLC_VIA_IXY_d_REGn REG_A ; RLC (IXY+d),A diff --git a/src/zvm_m65/Z80_instr_shftrot_RR.s b/src/zvm_m65/Z80_instr_shftrot_RR.s new file mode 100644 index 00000000..4b22d3e5 --- /dev/null +++ b/src/zvm_m65/Z80_instr_shftrot_RR.s @@ -0,0 +1,98 @@ + +; +; Z80 instruction implementation - RR +; + + +!macro Z80_RR_REGn .REGn { + + clc + bbr0 REG_F, @1 + sec +@1: + ror .REGn + + ldx .REGn + bra Z80_common_RR +} + +!macro Z80_RR_VIA_HL { + + jsr (VEC_fetch_via_HL) + + clc + bbr0 REG_F, @1 + sec +@1: + ror + + sta [PTR_DATA],z + bra Z80_common_RR_VIA +} + +!macro Z80_RR_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + + clc + bbr0 REG_F, @1 + sec +@1: + ror + + ; FALLTROUGH +} + +!macro Z80_RR_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + + clc + bbr0 REG_F, @1 + sec +@1: + ror + + sta .REGn + bra Z80_common_RR_VIA_IXY_d +} + +Z80_instr_CB_18: +Z80_RR_REGn REG_B ; RR B +Z80_instr_CB_19: +Z80_RR_REGn REG_C ; RR C +Z80_instr_CB_1A: +Z80_RR_REGn REG_D ; RR D +Z80_instr_CB_1B: +Z80_RR_REGn REG_E ; RR E +Z80_instr_CB_1C: +Z80_RR_REGn REG_H ; RR H +Z80_instr_CB_1D: +Z80_RR_REGn REG_L ; RR L +Z80_instr_CB_1F: +Z80_RR_REGn REG_A ; RR A +Z80_instr_CB_1E: +Z80_RR_VIA_HL ; RR (HL) +Z80_instr_xDCB_1E: +Z80_RR_VIA_IXY_d ; RR (IXY+d) + + ; FALLTROUGH + +Z80_common_RR_VIA_IXY_d: + + sta [PTR_IXY_d],z + + ; FALLTROUGH + +Z80_common_RR_VIA: + + tax + + ; FALLTROUGH + +Z80_common_RR: + + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next + +Z80_illeg_xDCB_18: +Z80_RR_VIA_IXY_d_REGn REG_B ; RR (IXY+d),B +Z80_illeg_xDCB_19: +Z80_RR_VIA_IXY_d_REGn REG_C ; RR (IXY+d),C +Z80_illeg_xDCB_1A: +Z80_RR_VIA_IXY_d_REGn REG_D ; RR (IXY+d),D +Z80_illeg_xDCB_1B: +Z80_RR_VIA_IXY_d_REGn REG_E ; RR (IXY+d),E +Z80_illeg_xDCB_1C: +Z80_RR_VIA_IXY_d_REGn REG_H ; RR (IXY+d),H +Z80_illeg_xDCB_1D: +Z80_RR_VIA_IXY_d_REGn REG_L ; RR (IXY+d),L +Z80_illeg_xDCB_1F: +Z80_RR_VIA_IXY_d_REGn REG_A ; RR (IXY+d),A diff --git a/src/zvm_m65/Z80_instr_shftrot_RRC.s b/src/zvm_m65/Z80_instr_shftrot_RRC.s new file mode 100644 index 00000000..9a9cda3a --- /dev/null +++ b/src/zvm_m65/Z80_instr_shftrot_RRC.s @@ -0,0 +1,98 @@ + +; +; Z80 instruction implementation - RLC +; + + +!macro Z80_RRC_REGn .REGn { + + clc + bbr0 .REGn, @1 + sec +@1: + ror .REGn + + ldx .REGn + bra Z80_common_RRC +} + +!macro Z80_RRC_VIA_HL { + + jsr (VEC_fetch_via_HL) + + tax + ror + txa + + ror + + sta [PTR_DATA],z + bra Z80_common_RRC_VIA +} + +!macro Z80_RRC_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + + tax + ror + txa + + ror + + ; FALLTROUGH +} + +!macro Z80_RRC_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + + tax + ror + txa + + ror + + sta .REGn + bra Z80_common_RRC_VIA_IXY_d +} + +Z80_instr_CB_08: +Z80_RRC_REGn REG_B ; RRC B +Z80_instr_CB_09: +Z80_RRC_REGn REG_C ; RRC C +Z80_instr_CB_0A: +Z80_RRC_REGn REG_D ; RRC D +Z80_instr_CB_0B: +Z80_RRC_REGn REG_E ; RRC E +Z80_instr_CB_0C: +Z80_RRC_REGn REG_H ; RRC H +Z80_instr_CB_0D: +Z80_RRC_REGn REG_L ; RRC L +Z80_instr_CB_0F: +Z80_RRC_REGn REG_A ; RRC A +Z80_instr_CB_0E: +Z80_RRC_VIA_HL ; RRC (HL) +Z80_instr_xDCB_0E: +Z80_RRC_VIA_IXY_d ; RRC (IXY+d) + + ; FALLTROUGH + +Z80_common_RRC_VIA_IXY_d: + + sta [PTR_IXY_d],z + + ; FALLTROUGH + +Z80_common_RRC_VIA: + + tax + + ; FALLTROUGH + +Z80_common_RRC: + + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next + +Z80_illeg_xDCB_08: +Z80_RRC_VIA_IXY_d_REGn REG_B ; RRC (IXY+d),B +Z80_illeg_xDCB_09: +Z80_RRC_VIA_IXY_d_REGn REG_C ; RRC (IXY+d),C +Z80_illeg_xDCB_0A: +Z80_RRC_VIA_IXY_d_REGn REG_D ; RRC (IXY+d),D +Z80_illeg_xDCB_0B: +Z80_RRC_VIA_IXY_d_REGn REG_E ; RRC (IXY+d),E +Z80_illeg_xDCB_0C: +Z80_RRC_VIA_IXY_d_REGn REG_H ; RRC (IXY+d),H +Z80_illeg_xDCB_0D: +Z80_RRC_VIA_IXY_d_REGn REG_L ; RRC (IXY+d),L +Z80_illeg_xDCB_0F: +Z80_RRC_VIA_IXY_d_REGn REG_A ; RRC (IXY+d),A diff --git a/src/zvm_m65/Z80_instr_shftrot_SLA.s b/src/zvm_m65/Z80_instr_shftrot_SLA.s new file mode 100644 index 00000000..5e521374 --- /dev/null +++ b/src/zvm_m65/Z80_instr_shftrot_SLA.s @@ -0,0 +1,79 @@ + +; +; Z80 instruction implementation - SLA +; + + +!macro Z80_SLA_REGn .REGn { + + asl .REGn + + ldx .REGn + bra Z80_common_SLA +} + +!macro Z80_SLA_VIA_HL { + + jsr (VEC_fetch_via_HL) + asl + + sta [PTR_DATA],z + bra Z80_common_SLA_VIA +} + +!macro Z80_SLA_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + asl + + ; FALLTROUGH +} + +!macro Z80_SLA_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + asl + + sta .REGn + bra Z80_common_SLA_VIA_IXY_d +} + +Z80_instr_CB_20: +Z80_SLA_REGn REG_B ; SLA B +Z80_instr_CB_21: +Z80_SLA_REGn REG_C ; SLA C +Z80_instr_CB_22: +Z80_SLA_REGn REG_D ; SLA D +Z80_instr_CB_23: +Z80_SLA_REGn REG_E ; SLA E +Z80_instr_CB_24: +Z80_SLA_REGn REG_H ; SLA H +Z80_instr_CB_25: +Z80_SLA_REGn REG_L ; SLA L +Z80_instr_CB_27: +Z80_SLA_REGn REG_A ; SLA A +Z80_instr_CB_26: +Z80_SLA_VIA_HL ; SLA (HL) +Z80_instr_xDCB_26: +Z80_SLA_VIA_IXY_d ; SLA (IXY+d) + + ; FALLTROUGH + +Z80_common_SLA_VIA_IXY_d: + + sta [PTR_IXY_d],z + + ; FALLTROUGH + +Z80_common_SLA_VIA: + + tax + + ; FALLTROUGH + +Z80_common_SLA: + + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next + +Z80_illeg_xDCB_20: +Z80_SLA_VIA_IXY_d_REGn REG_B ; SLA (IXY+d),B +Z80_illeg_xDCB_21: +Z80_SLA_VIA_IXY_d_REGn REG_C ; SLA (IXY+d),C +Z80_illeg_xDCB_22: +Z80_SLA_VIA_IXY_d_REGn REG_D ; SLA (IXY+d),D +Z80_illeg_xDCB_23: +Z80_SLA_VIA_IXY_d_REGn REG_E ; SLA (IXY+d),E +Z80_illeg_xDCB_24: +Z80_SLA_VIA_IXY_d_REGn REG_H ; SLA (IXY+d),H +Z80_illeg_xDCB_25: +Z80_SLA_VIA_IXY_d_REGn REG_L ; SLA (IXY+d),L +Z80_illeg_xDCB_27: +Z80_SLA_VIA_IXY_d_REGn REG_A ; SLA (IXY+d),A diff --git a/src/zvm_m65/Z80_instr_shftrot_SLL.s b/src/zvm_m65/Z80_instr_shftrot_SLL.s new file mode 100644 index 00000000..e43ac29d --- /dev/null +++ b/src/zvm_m65/Z80_instr_shftrot_SLL.s @@ -0,0 +1,83 @@ + +; +; Z80 instruction implementation - SLL +; + + +!macro Z80_SLL_REGn .REGn { + + sec + rol .REGn + + ldx .REGn + bra Z80_common_SLL +} + +!macro Z80_SLL_VIA_HL { + + jsr (VEC_fetch_via_HL) + sec + rol + + sta [PTR_DATA],z + bra Z80_common_SLL_VIA +} + +!macro Z80_SLL_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + sec + rol + + ; FALLTROUGH +} + +!macro Z80_SLL_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + sec + rol + + sta .REGn + bra Z80_common_SLL_VIA_IXY_d +} + +Z80_illeg_CB_30: +Z80_SLL_REGn REG_B ; SLL B +Z80_illeg_CB_31: +Z80_SLL_REGn REG_C ; SLL C +Z80_illeg_CB_32: +Z80_SLL_REGn REG_D ; SLL D +Z80_illeg_CB_33: +Z80_SLL_REGn REG_E ; SLL E +Z80_illeg_CB_34: +Z80_SLL_REGn REG_H ; SLL H +Z80_illeg_CB_35: +Z80_SLL_REGn REG_L ; SLL L +Z80_illeg_CB_37: +Z80_SLL_REGn REG_A ; SLL A +Z80_illeg_CB_36: +Z80_SLL_VIA_HL ; SLL (HL) +Z80_illeg_xDCB_36: +Z80_SLL_VIA_IXY_d ; SLL (IXY+d) + + ; FALLTROUGH + +Z80_common_SLL_VIA_IXY_d: + + sta [PTR_IXY_d],z + + ; FALLTROUGH + +Z80_common_SLL_VIA: + + tax + + ; FALLTROUGH + +Z80_common_SLL: + + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next + +Z80_illeg_xDCB_30: +Z80_SLL_VIA_IXY_d_REGn REG_B ; SLL (IXY+d),B +Z80_illeg_xDCB_31: +Z80_SLL_VIA_IXY_d_REGn REG_C ; SLL (IXY+d),C +Z80_illeg_xDCB_32: +Z80_SLL_VIA_IXY_d_REGn REG_D ; SLL (IXY+d),D +Z80_illeg_xDCB_33: +Z80_SLL_VIA_IXY_d_REGn REG_E ; SLL (IXY+d),E +Z80_illeg_xDCB_34: +Z80_SLL_VIA_IXY_d_REGn REG_H ; SLL (IXY+d),H +Z80_illeg_xDCB_35: +Z80_SLL_VIA_IXY_d_REGn REG_L ; SLL (IXY+d),L +Z80_illeg_xDCB_37: +Z80_SLL_VIA_IXY_d_REGn REG_A ; SLL (IXY+d),A diff --git a/src/zvm_m65/Z80_instr_shftrot_SRA.s b/src/zvm_m65/Z80_instr_shftrot_SRA.s new file mode 100644 index 00000000..86656539 --- /dev/null +++ b/src/zvm_m65/Z80_instr_shftrot_SRA.s @@ -0,0 +1,98 @@ + +; +; Z80 instruction implementation - RLC +; + + +!macro Z80_SRA_REGn .REGn { + + clc + bbr7 .REGn, @1 + sec +@1: + ror .REGn + + ldx .REGn + bra Z80_common_SRA +} + +!macro Z80_SRA_VIA_HL { + + jsr (VEC_fetch_via_HL) + + tax + ror + txa + + ror + + sta [PTR_DATA],z + bra Z80_common_SRA_VIA +} + +!macro Z80_SRA_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + + tax + ror + txa + + ror + + ; FALLTROUGH +} + +!macro Z80_SRA_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + + tax + ror + txa + + ror + + sta .REGn + bra Z80_common_SRA_VIA_IXY_d +} + +Z80_instr_CB_28: +Z80_SRA_REGn REG_B ; SRA B +Z80_instr_CB_29: +Z80_SRA_REGn REG_C ; SRA C +Z80_instr_CB_2A: +Z80_SRA_REGn REG_D ; SRA D +Z80_instr_CB_2B: +Z80_SRA_REGn REG_E ; SRA E +Z80_instr_CB_2C: +Z80_SRA_REGn REG_H ; SRA H +Z80_instr_CB_2D: +Z80_SRA_REGn REG_L ; SRA L +Z80_instr_CB_2F: +Z80_SRA_REGn REG_A ; SRA A +Z80_instr_CB_2E: +Z80_SRA_VIA_HL ; SRA (HL) +Z80_instr_xDCB_2E: +Z80_SRA_VIA_IXY_d ; SRA (IXY+d) + + ; FALLTROUGH + +Z80_common_SRA_VIA_IXY_d: + + sta [PTR_IXY_d],z + + ; FALLTROUGH + +Z80_common_SRA_VIA: + + tax + + ; FALLTROUGH + +Z80_common_SRA: + + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next + +Z80_illeg_xDCB_28: +Z80_SRA_VIA_IXY_d_REGn REG_B ; SRA (IXY+d),B +Z80_illeg_xDCB_29: +Z80_SRA_VIA_IXY_d_REGn REG_C ; SRA (IXY+d),C +Z80_illeg_xDCB_2A: +Z80_SRA_VIA_IXY_d_REGn REG_D ; SRA (IXY+d),D +Z80_illeg_xDCB_2B: +Z80_SRA_VIA_IXY_d_REGn REG_E ; SRA (IXY+d),E +Z80_illeg_xDCB_2C: +Z80_SRA_VIA_IXY_d_REGn REG_H ; SRA (IXY+d),H +Z80_illeg_xDCB_2D: +Z80_SRA_VIA_IXY_d_REGn REG_L ; SRA (IXY+d),L +Z80_illeg_xDCB_2F: +Z80_SRA_VIA_IXY_d_REGn REG_A ; SRA (IXY+d),A diff --git a/src/zvm_m65/Z80_instr_shftrot_SRL.s b/src/zvm_m65/Z80_instr_shftrot_SRL.s new file mode 100644 index 00000000..ff9e415f --- /dev/null +++ b/src/zvm_m65/Z80_instr_shftrot_SRL.s @@ -0,0 +1,83 @@ + +; +; Z80 instruction implementation - SRL +; + + +!macro Z80_SRL_REGn .REGn { + + clc + ror .REGn + + ldx .REGn + bra Z80_common_SRL +} + +!macro Z80_SRL_VIA_HL { + + jsr (VEC_fetch_via_HL) + clc + ror + + sta [PTR_DATA],z + bra Z80_common_SRL_VIA +} + +!macro Z80_SRL_VIA_IXY_d { + + lda [PTR_IXY_d] ,z + clc + ror + + ; FALLTROUGH +} + +!macro Z80_SRL_VIA_IXY_d_REGn .REGn { + + lda [PTR_IXY_d] ,z + clc + ror + + sta .REGn + bra Z80_common_SRL_VIA_IXY_d +} + +Z80_instr_CB_38: +Z80_SRL_REGn REG_B ; SRL B +Z80_instr_CB_39: +Z80_SRL_REGn REG_C ; SRL C +Z80_instr_CB_3A: +Z80_SRL_REGn REG_D ; SRL D +Z80_instr_CB_3B: +Z80_SRL_REGn REG_E ; SRL E +Z80_instr_CB_3C: +Z80_SRL_REGn REG_H ; SRL H +Z80_instr_CB_3D: +Z80_SRL_REGn REG_L ; SRL L +Z80_instr_CB_3F: +Z80_SRL_REGn REG_A ; SRL A +Z80_instr_CB_3E: +Z80_SRL_VIA_HL ; SRL (HL) +Z80_instr_xDCB_3E: +Z80_SRL_VIA_IXY_d ; SRL (IXY+d) + + ; FALLTROUGH + +Z80_common_SRL_VIA_IXY_d: + + sta [PTR_IXY_d],z + + ; FALLTROUGH + +Z80_common_SRL_VIA: + + tax + + ; FALLTROUGH + +Z80_common_SRL: + + lda z80_ftable_IN_OR_XOR, x + sta REG_F + +bcc ZVM_next + +Z80_PUT_1_CF + jmp ZVM_next + +Z80_illeg_xDCB_38: +Z80_SRL_VIA_IXY_d_REGn REG_B ; SLR (IXY+d),B +Z80_illeg_xDCB_39: +Z80_SRL_VIA_IXY_d_REGn REG_C ; SLR (IXY+d),C +Z80_illeg_xDCB_3A: +Z80_SRL_VIA_IXY_d_REGn REG_D ; SLR (IXY+d),D +Z80_illeg_xDCB_3B: +Z80_SRL_VIA_IXY_d_REGn REG_E ; SLR (IXY+d),E +Z80_illeg_xDCB_3C: +Z80_SRL_VIA_IXY_d_REGn REG_H ; SLR (IXY+d),H +Z80_illeg_xDCB_3D: +Z80_SRL_VIA_IXY_d_REGn REG_L ; SLR (IXY+d),L +Z80_illeg_xDCB_3F: +Z80_SRL_VIA_IXY_d_REGn REG_A ; SLR (IXY+d),A diff --git a/src/zvm_m65/z80_instr_rotate_shift.s b/src/zvm_m65/z80_instr_rotate_shift.s index 799df242..cfb52447 100644 --- a/src/zvm_m65/z80_instr_rotate_shift.s +++ b/src/zvm_m65/z80_instr_rotate_shift.s @@ -3,7 +3,7 @@ ; Z80 rotate/shift instructions ; -; XXX for RRD/RLD generate tables in extended RAM +; XXX for RRD/RLD generate tables Z80_instr_ED_67: ; RRD @@ -153,693 +153,3 @@ Z80_instr_1F: ; RRA +bcc ZVM_next +Z80_PUT_1_CF jmp ZVM_next - - -!macro Z80_RLC_REGn .REGn { - - clc - bbr7 .REGn, @1 - sec -@1: - rol .REGn - - ldx .REGn - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_RLC_VIA_HL { - - jsr (VEC_fetch_via_HL) - - tax - rol - txa - - rol - sta [PTR_DATA],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_RLC_VIA_IXY_d { - - lda [PTR_IXY_d] ,z - - tax - rol - txa - - rol - sta [PTR_IXY_d],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_RLC_VIA_IXY_d_REGn .REGn { - - lda [PTR_IXY_d] ,z - - tax - rol - txa - - rol - sta [PTR_IXY_d],z - sta .REGn - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -Z80_instr_CB_00: +Z80_RLC_REGn REG_B ; RLC B -Z80_instr_CB_01: +Z80_RLC_REGn REG_C ; RLC C -Z80_instr_CB_02: +Z80_RLC_REGn REG_D ; RLC D -Z80_instr_CB_03: +Z80_RLC_REGn REG_E ; RLC E -Z80_instr_CB_04: +Z80_RLC_REGn REG_H ; RLC H -Z80_instr_CB_05: +Z80_RLC_REGn REG_L ; RLC L -Z80_instr_CB_07: +Z80_RLC_REGn REG_A ; RLC A -Z80_instr_CB_06: +Z80_RLC_VIA_HL ; RLC (HL) -Z80_instr_xDCB_06: +Z80_RLC_VIA_IXY_d ; RLC (IXY+d) - -Z80_illeg_xDCB_00: +Z80_RLC_VIA_IXY_d_REGn REG_B ; RLC (IXY+d),B -Z80_illeg_xDCB_01: +Z80_RLC_VIA_IXY_d_REGn REG_C ; RLC (IXY+d),C -Z80_illeg_xDCB_02: +Z80_RLC_VIA_IXY_d_REGn REG_D ; RLC (IXY+d),D -Z80_illeg_xDCB_03: +Z80_RLC_VIA_IXY_d_REGn REG_E ; RLC (IXY+d),E -Z80_illeg_xDCB_04: +Z80_RLC_VIA_IXY_d_REGn REG_H ; RLC (IXY+d),H -Z80_illeg_xDCB_05: +Z80_RLC_VIA_IXY_d_REGn REG_L ; RLC (IXY+d),L -Z80_illeg_xDCB_07: +Z80_RLC_VIA_IXY_d_REGn REG_A ; RLC (IXY+d),A - -!macro Z80_RRC_REGn .REGn { - - clc - bbr0 .REGn, @1 - sec -@1: - ror .REGn - - ldx .REGn - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_RRC_VIA_HL { - - jsr (VEC_fetch_via_HL) - - tax - ror - txa - - ror - sta [PTR_DATA],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_RRC_VIA_IXY_d { - - lda [PTR_IXY_d] ,z - - tax - ror - txa - - ror - sta [PTR_IXY_d],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_RRC_VIA_IXY_d_REGn .REGn { - - lda [PTR_IXY_d] ,z - - tax - ror - txa - - ror - sta [PTR_IXY_d],z - sta .REGn - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -Z80_instr_CB_08: +Z80_RRC_REGn REG_B ; RRC B -Z80_instr_CB_09: +Z80_RRC_REGn REG_C ; RRC C -Z80_instr_CB_0A: +Z80_RRC_REGn REG_D ; RRC D -Z80_instr_CB_0B: +Z80_RRC_REGn REG_E ; RRC E -Z80_instr_CB_0C: +Z80_RRC_REGn REG_H ; RRC H -Z80_instr_CB_0D: +Z80_RRC_REGn REG_L ; RRC L -Z80_instr_CB_0F: +Z80_RRC_REGn REG_A ; RRC A -Z80_instr_CB_0E: +Z80_RRC_VIA_HL ; RRC (HL) -Z80_instr_xDCB_0E: +Z80_RRC_VIA_IXY_d ; RRC (IXY+d) - -Z80_illeg_xDCB_08: +Z80_RRC_VIA_IXY_d_REGn REG_B ; RRC (IXY+d),B -Z80_illeg_xDCB_09: +Z80_RRC_VIA_IXY_d_REGn REG_C ; RRC (IXY+d),C -Z80_illeg_xDCB_0A: +Z80_RRC_VIA_IXY_d_REGn REG_D ; RRC (IXY+d),D -Z80_illeg_xDCB_0B: +Z80_RRC_VIA_IXY_d_REGn REG_E ; RRC (IXY+d),E -Z80_illeg_xDCB_0C: +Z80_RRC_VIA_IXY_d_REGn REG_H ; RRC (IXY+d),H -Z80_illeg_xDCB_0D: +Z80_RRC_VIA_IXY_d_REGn REG_L ; RRC (IXY+d),L -Z80_illeg_xDCB_0F: +Z80_RRC_VIA_IXY_d_REGn REG_A ; RRC (IXY+d),A - -!macro Z80_RL_REGn .REGn { - - clc - bbr0 REG_F, @1 - sec -@1: - rol .REGn - - ldx .REGn - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_RL_VIA_HL { - - jsr (VEC_fetch_via_HL) - - clc - bbr0 REG_F, @1 - sec -@1: - rol - sta [PTR_DATA],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_RL_VIA_IXY_d { - - lda [PTR_IXY_d] ,z - - clc - bbr0 REG_F, @1 - sec -@1: - rol - sta [PTR_IXY_d],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_RL_VIA_IXY_d_REGn .REGn { - - lda [PTR_IXY_d] ,z - - clc - bbr0 REG_F, @1 - sec -@1: - rol - sta [PTR_IXY_d],z - sta .REGn - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -Z80_instr_CB_10: +Z80_RL_REGn REG_B ; RL B -Z80_instr_CB_11: +Z80_RL_REGn REG_C ; RL C -Z80_instr_CB_12: +Z80_RL_REGn REG_D ; RL D -Z80_instr_CB_13: +Z80_RL_REGn REG_E ; RL E -Z80_instr_CB_14: +Z80_RL_REGn REG_H ; RL H -Z80_instr_CB_15: +Z80_RL_REGn REG_L ; RL L -Z80_instr_CB_17: +Z80_RL_REGn REG_A ; RL A -Z80_instr_CB_16: +Z80_RL_VIA_HL ; RL (HL) -Z80_instr_xDCB_16: +Z80_RL_VIA_IXY_d ; RL (IXY+d) - -Z80_illeg_xDCB_10: +Z80_RL_VIA_IXY_d_REGn REG_B ; RL (IXY+d),B -Z80_illeg_xDCB_11: +Z80_RL_VIA_IXY_d_REGn REG_C ; RL (IXY+d),C -Z80_illeg_xDCB_12: +Z80_RL_VIA_IXY_d_REGn REG_D ; RL (IXY+d),D -Z80_illeg_xDCB_13: +Z80_RL_VIA_IXY_d_REGn REG_E ; RL (IXY+d),E -Z80_illeg_xDCB_14: +Z80_RL_VIA_IXY_d_REGn REG_H ; RL (IXY+d),H -Z80_illeg_xDCB_15: +Z80_RL_VIA_IXY_d_REGn REG_L ; RL (IXY+d),L -Z80_illeg_xDCB_17: +Z80_RL_VIA_IXY_d_REGn REG_A ; RL (IXY+d),A - -!macro Z80_RR_REGn .REGn { - - clc - bbr0 REG_F, @1 - sec -@1: - ror .REGn - - ldx .REGn - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_RR_VIA_HL { - - jsr (VEC_fetch_via_HL) - - clc - bbr0 REG_F, @1 - sec -@1: - ror - sta [PTR_DATA],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_RR_VIA_IXY_d { - - lda [PTR_IXY_d] ,z - - clc - bbr0 REG_F, @1 - sec -@1: - ror - sta [PTR_IXY_d],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_RR_VIA_IXY_d_REGn .REGn { - - lda [PTR_IXY_d] ,z - - clc - bbr0 REG_F, @1 - sec -@1: - ror - sta [PTR_IXY_d],z - sta .REGn - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -Z80_instr_CB_18: +Z80_RR_REGn REG_B ; RR B -Z80_instr_CB_19: +Z80_RR_REGn REG_C ; RR C -Z80_instr_CB_1A: +Z80_RR_REGn REG_D ; RR D -Z80_instr_CB_1B: +Z80_RR_REGn REG_E ; RR E -Z80_instr_CB_1C: +Z80_RR_REGn REG_H ; RR H -Z80_instr_CB_1D: +Z80_RR_REGn REG_L ; RR L -Z80_instr_CB_1F: +Z80_RR_REGn REG_A ; RR A -Z80_instr_CB_1E: +Z80_RR_VIA_HL ; RR (HL) -Z80_instr_xDCB_1E: +Z80_RR_VIA_IXY_d ; RR (IXY+d) - -Z80_illeg_xDCB_18: +Z80_RR_VIA_IXY_d_REGn REG_B ; RR (IXY+d),B -Z80_illeg_xDCB_19: +Z80_RR_VIA_IXY_d_REGn REG_C ; RR (IXY+d),C -Z80_illeg_xDCB_1A: +Z80_RR_VIA_IXY_d_REGn REG_D ; RR (IXY+d),D -Z80_illeg_xDCB_1B: +Z80_RR_VIA_IXY_d_REGn REG_E ; RR (IXY+d),E -Z80_illeg_xDCB_1C: +Z80_RR_VIA_IXY_d_REGn REG_H ; RR (IXY+d),H -Z80_illeg_xDCB_1D: +Z80_RR_VIA_IXY_d_REGn REG_L ; RR (IXY+d),L -Z80_illeg_xDCB_1F: +Z80_RR_VIA_IXY_d_REGn REG_A ; RR (IXY+d),A - -; XXX SLA/SLL (and possibly rotations) can be made slightly faster with dedicated tables (omit carry flag calculation) - -!macro Z80_SLA_REGn .REGn { - - asl .REGn - - ldx .REGn - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_SLA_VIA_HL { - - jsr (VEC_fetch_via_HL) - asl - sta [PTR_DATA],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_SLA_VIA_IXY_d { - - lda [PTR_IXY_d] ,z - asl - sta [PTR_IXY_d],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_SLA_VIA_IXY_d_REGn .REGn { - - lda [PTR_IXY_d] ,z - asl - sta [PTR_IXY_d],z - sta .REGn - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -Z80_instr_CB_20: +Z80_SLA_REGn REG_B ; SLA B -Z80_instr_CB_21: +Z80_SLA_REGn REG_C ; SLA C -Z80_instr_CB_22: +Z80_SLA_REGn REG_D ; SLA D -Z80_instr_CB_23: +Z80_SLA_REGn REG_E ; SLA E -Z80_instr_CB_24: +Z80_SLA_REGn REG_H ; SLA H -Z80_instr_CB_25: +Z80_SLA_REGn REG_L ; SLA L -Z80_instr_CB_27: +Z80_SLA_REGn REG_A ; SLA A -Z80_instr_CB_26: +Z80_SLA_VIA_HL ; SLA (HL) -Z80_instr_xDCB_26: +Z80_SLA_VIA_IXY_d ; SLA (IXY+d) - -Z80_illeg_xDCB_20: +Z80_SLA_VIA_IXY_d_REGn REG_B ; SLA (IXY+d),B -Z80_illeg_xDCB_21: +Z80_SLA_VIA_IXY_d_REGn REG_C ; SLA (IXY+d),C -Z80_illeg_xDCB_22: +Z80_SLA_VIA_IXY_d_REGn REG_D ; SLA (IXY+d),D -Z80_illeg_xDCB_23: +Z80_SLA_VIA_IXY_d_REGn REG_E ; SLA (IXY+d),E -Z80_illeg_xDCB_24: +Z80_SLA_VIA_IXY_d_REGn REG_H ; SLA (IXY+d),H -Z80_illeg_xDCB_25: +Z80_SLA_VIA_IXY_d_REGn REG_L ; SLA (IXY+d),L -Z80_illeg_xDCB_27: +Z80_SLA_VIA_IXY_d_REGn REG_A ; SLA (IXY+d),A - -!macro Z80_SLL_REGn .REGn { - - sec - rol .REGn - - ldx .REGn - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_SLL_VIA_HL { - - jsr (VEC_fetch_via_HL) - sec - rol - sta [PTR_DATA],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_SLL_VIA_IXY_d { - - lda [PTR_IXY_d] ,z - sec - rol - sta [PTR_IXY_d],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_SLL_VIA_IXY_d_REGn .REGn { - - lda [PTR_IXY_d] ,z - sec - rol - sta [PTR_IXY_d],z - sta .REGn - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -Z80_illeg_CB_30: +Z80_SLL_REGn REG_B ; SLL B -Z80_illeg_CB_31: +Z80_SLL_REGn REG_C ; SLL C -Z80_illeg_CB_32: +Z80_SLL_REGn REG_D ; SLL D -Z80_illeg_CB_33: +Z80_SLL_REGn REG_E ; SLL E -Z80_illeg_CB_34: +Z80_SLL_REGn REG_H ; SLL H -Z80_illeg_CB_35: +Z80_SLL_REGn REG_L ; SLL L -Z80_illeg_CB_37: +Z80_SLL_REGn REG_A ; SLL A -Z80_illeg_CB_36: +Z80_SLL_VIA_HL ; SLL (HL) -Z80_illeg_xDCB_36: +Z80_SLL_VIA_IXY_d ; SLL (IXY+d) - -Z80_illeg_xDCB_30: +Z80_SLL_VIA_IXY_d_REGn REG_B ; SLL (IXY+d),B -Z80_illeg_xDCB_31: +Z80_SLL_VIA_IXY_d_REGn REG_C ; SLL (IXY+d),C -Z80_illeg_xDCB_32: +Z80_SLL_VIA_IXY_d_REGn REG_D ; SLL (IXY+d),D -Z80_illeg_xDCB_33: +Z80_SLL_VIA_IXY_d_REGn REG_E ; SLL (IXY+d),E -Z80_illeg_xDCB_34: +Z80_SLL_VIA_IXY_d_REGn REG_H ; SLL (IXY+d),H -Z80_illeg_xDCB_35: +Z80_SLL_VIA_IXY_d_REGn REG_L ; SLL (IXY+d),L -Z80_illeg_xDCB_37: +Z80_SLL_VIA_IXY_d_REGn REG_A ; SLL (IXY+d),A - -!macro Z80_SRL_REGn .REGn { - - clc - ror .REGn - - ldx .REGn - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_SRL_VIA_HL { - - jsr (VEC_fetch_via_HL) - clc - ror - sta [PTR_DATA],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_SRL_VIA_IXY_d { - - lda [PTR_IXY_d] ,z - clc - ror - sta [PTR_IXY_d],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_SRL_VIA_IXY_d_REGn .REGn { - - lda [PTR_IXY_d] ,z - clc - ror - sta [PTR_IXY_d],z - sta .REGn - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -Z80_instr_CB_38: +Z80_SRL_REGn REG_B ; SRL B -Z80_instr_CB_39: +Z80_SRL_REGn REG_C ; SRL C -Z80_instr_CB_3A: +Z80_SRL_REGn REG_D ; SRL D -Z80_instr_CB_3B: +Z80_SRL_REGn REG_E ; SRL E -Z80_instr_CB_3C: +Z80_SRL_REGn REG_H ; SRL H -Z80_instr_CB_3D: +Z80_SRL_REGn REG_L ; SRL L -Z80_instr_CB_3F: +Z80_SRL_REGn REG_A ; SRL A -Z80_instr_CB_3E: +Z80_SRL_VIA_HL ; SRL (HL) -Z80_instr_xDCB_3E: +Z80_SRL_VIA_IXY_d ; SRL (IXY+d) - -Z80_illeg_xDCB_38: +Z80_SRL_VIA_IXY_d_REGn REG_B ; SLR (IXY+d),B -Z80_illeg_xDCB_39: +Z80_SRL_VIA_IXY_d_REGn REG_C ; SLR (IXY+d),C -Z80_illeg_xDCB_3A: +Z80_SRL_VIA_IXY_d_REGn REG_D ; SLR (IXY+d),D -Z80_illeg_xDCB_3B: +Z80_SRL_VIA_IXY_d_REGn REG_E ; SLR (IXY+d),E -Z80_illeg_xDCB_3C: +Z80_SRL_VIA_IXY_d_REGn REG_H ; SLR (IXY+d),H -Z80_illeg_xDCB_3D: +Z80_SRL_VIA_IXY_d_REGn REG_L ; SLR (IXY+d),L -Z80_illeg_xDCB_3F: +Z80_SRL_VIA_IXY_d_REGn REG_A ; SLR (IXY+d),A - -!macro Z80_SRA_REGn .REGn { - - clc - bbr7 .REGn, @1 - sec -@1: - ror .REGn - - ldx .REGn - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_SRA_VIA_HL { - - jsr (VEC_fetch_via_HL) - - tax - ror - txa - - ror - sta [PTR_DATA],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_SRA_VIA_IXY_d { - - lda [PTR_IXY_d] ,z - - tax - ror - txa - - ror - sta [PTR_IXY_d],z - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -!macro Z80_SRA_VIA_IXY_d_REGn .REGn { - - lda [PTR_IXY_d] ,z - - tax - ror - txa - - ror - sta [PTR_IXY_d],z - sta .REGn - - tax - lda z80_ftable_IN_OR_XOR, x - sta REG_F - +bcc ZVM_next - +Z80_PUT_1_CF - jmp ZVM_next -} - -Z80_instr_CB_28: +Z80_SRA_REGn REG_B ; SRA B -Z80_instr_CB_29: +Z80_SRA_REGn REG_C ; SRA C -Z80_instr_CB_2A: +Z80_SRA_REGn REG_D ; SRA D -Z80_instr_CB_2B: +Z80_SRA_REGn REG_E ; SRA E -Z80_instr_CB_2C: +Z80_SRA_REGn REG_H ; SRA H -Z80_instr_CB_2D: +Z80_SRA_REGn REG_L ; SRA L -Z80_instr_CB_2F: +Z80_SRA_REGn REG_A ; SRA A -Z80_instr_CB_2E: +Z80_SRA_VIA_HL ; SRA (HL) -Z80_instr_xDCB_2E: +Z80_SRA_VIA_IXY_d ; SRA (IXY+d) - -Z80_illeg_xDCB_28: +Z80_SRA_VIA_IXY_d_REGn REG_B ; SRA (IXY+d),B -Z80_illeg_xDCB_29: +Z80_SRA_VIA_IXY_d_REGn REG_C ; SRA (IXY+d),C -Z80_illeg_xDCB_2A: +Z80_SRA_VIA_IXY_d_REGn REG_D ; SRA (IXY+d),D -Z80_illeg_xDCB_2B: +Z80_SRA_VIA_IXY_d_REGn REG_E ; SRA (IXY+d),E -Z80_illeg_xDCB_2C: +Z80_SRA_VIA_IXY_d_REGn REG_H ; SRA (IXY+d),H -Z80_illeg_xDCB_2D: +Z80_SRA_VIA_IXY_d_REGn REG_L ; SRA (IXY+d),L -Z80_illeg_xDCB_2F: +Z80_SRA_VIA_IXY_d_REGn REG_A ; SRA (IXY+d),A From d71ce2435765dd3b0b0b5ae36180c772bda8746f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 31 Dec 2020 19:49:38 +0100 Subject: [PATCH 101/257] Z80 cleanup --- src/zvm_m65/,aliases_zvm.s | 23 +++++++++-------- src/zvm_m65/Z80_instr_shftrot_RL.s | 2 +- src/zvm_m65/Z80_instr_shftrot_RLC.s | 2 +- src/zvm_m65/Z80_instr_shftrot_RR.s | 2 +- src/zvm_m65/Z80_instr_shftrot_RRC.s | 2 +- src/zvm_m65/Z80_instr_shftrot_SLA.s | 2 +- src/zvm_m65/Z80_instr_shftrot_SLL.s | 2 +- src/zvm_m65/Z80_instr_shftrot_SRA.s | 2 +- src/zvm_m65/Z80_instr_shftrot_SRL.s | 2 +- src/zvm_m65/z80_instr_bit.s | 32 +++++++++++------------ src/zvm_m65/z80_instr_math_8bit.s | 4 +-- src/zvm_m65/z80_instr_rotate_shift.s | 4 +-- src/zvm_m65/z80_reset.s | 38 ++++++++++++++++++++++++++++ src/zvm_m65/zvm_banking.s | 15 ++++++++--- src/zvm_m65/zvm_bios.s | 23 ++--------------- 15 files changed, 92 insertions(+), 63 deletions(-) create mode 100644 src/zvm_m65/z80_reset.s diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index cc497eb9..74a704cd 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -96,17 +96,18 @@ !addr VEC_fetch_via_DE = $4A !addr VEC_store_via_DE = $4C !addr VEC_fetch_via_HL = $4E -!addr VEC_store_via_HL = $50 -!addr VEC_fetch_via_IX_d = $52 -!addr VEC_fetch_via_IY_d = $54 -!addr VEC_store_via_IX_d = $56 -!addr VEC_store_via_IY_d = $58 -!addr VEC_fetch_via_nn = $5A -!addr VEC_store_via_nn = $5C -!addr VEC_fetch_via_plus1 = $5E -!addr VEC_store_via_plus1 = $60 ; XXX jump to next directly? -!addr VEC_xchng_stack_lo = $62 -!addr VEC_xchng_stack_hi = $64 +!addr VEC_fetch_via_HL_back = $50 ; forces PTR_DATA update +!addr VEC_store_via_HL = $52 +!addr VEC_fetch_via_IX_d = $54 +!addr VEC_fetch_via_IY_d = $56 +!addr VEC_store_via_IX_d = $58 +!addr VEC_store_via_IY_d = $5A +!addr VEC_fetch_via_nn = $5C +!addr VEC_store_via_nn = $5E +!addr VEC_fetch_via_plus1 = $60 +!addr VEC_store_via_plus1 = $62 ; XXX jump to next directly? +!addr VEC_xchng_stack_lo = $64 +!addr VEC_xchng_stack_hi = $68 ; ; Constant/macros definitions diff --git a/src/zvm_m65/Z80_instr_shftrot_RL.s b/src/zvm_m65/Z80_instr_shftrot_RL.s index 1c0ce575..fbad73fc 100644 --- a/src/zvm_m65/Z80_instr_shftrot_RL.s +++ b/src/zvm_m65/Z80_instr_shftrot_RL.s @@ -18,7 +18,7 @@ !macro Z80_RL_VIA_HL { - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) clc bbr0 REG_F, @1 diff --git a/src/zvm_m65/Z80_instr_shftrot_RLC.s b/src/zvm_m65/Z80_instr_shftrot_RLC.s index daae23fe..e49a94f4 100644 --- a/src/zvm_m65/Z80_instr_shftrot_RLC.s +++ b/src/zvm_m65/Z80_instr_shftrot_RLC.s @@ -18,7 +18,7 @@ !macro Z80_RLC_VIA_HL { - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) tax rol diff --git a/src/zvm_m65/Z80_instr_shftrot_RR.s b/src/zvm_m65/Z80_instr_shftrot_RR.s index 4b22d3e5..0255deca 100644 --- a/src/zvm_m65/Z80_instr_shftrot_RR.s +++ b/src/zvm_m65/Z80_instr_shftrot_RR.s @@ -18,7 +18,7 @@ !macro Z80_RR_VIA_HL { - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) clc bbr0 REG_F, @1 diff --git a/src/zvm_m65/Z80_instr_shftrot_RRC.s b/src/zvm_m65/Z80_instr_shftrot_RRC.s index 9a9cda3a..7fac5954 100644 --- a/src/zvm_m65/Z80_instr_shftrot_RRC.s +++ b/src/zvm_m65/Z80_instr_shftrot_RRC.s @@ -18,7 +18,7 @@ !macro Z80_RRC_VIA_HL { - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) tax ror diff --git a/src/zvm_m65/Z80_instr_shftrot_SLA.s b/src/zvm_m65/Z80_instr_shftrot_SLA.s index 5e521374..23bb6723 100644 --- a/src/zvm_m65/Z80_instr_shftrot_SLA.s +++ b/src/zvm_m65/Z80_instr_shftrot_SLA.s @@ -14,7 +14,7 @@ !macro Z80_SLA_VIA_HL { - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) asl sta [PTR_DATA],z diff --git a/src/zvm_m65/Z80_instr_shftrot_SLL.s b/src/zvm_m65/Z80_instr_shftrot_SLL.s index e43ac29d..f784220a 100644 --- a/src/zvm_m65/Z80_instr_shftrot_SLL.s +++ b/src/zvm_m65/Z80_instr_shftrot_SLL.s @@ -15,7 +15,7 @@ !macro Z80_SLL_VIA_HL { - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) sec rol diff --git a/src/zvm_m65/Z80_instr_shftrot_SRA.s b/src/zvm_m65/Z80_instr_shftrot_SRA.s index 86656539..1b8b3197 100644 --- a/src/zvm_m65/Z80_instr_shftrot_SRA.s +++ b/src/zvm_m65/Z80_instr_shftrot_SRA.s @@ -18,7 +18,7 @@ !macro Z80_SRA_VIA_HL { - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) tax ror diff --git a/src/zvm_m65/Z80_instr_shftrot_SRL.s b/src/zvm_m65/Z80_instr_shftrot_SRL.s index ff9e415f..4e6091ea 100644 --- a/src/zvm_m65/Z80_instr_shftrot_SRL.s +++ b/src/zvm_m65/Z80_instr_shftrot_SRL.s @@ -15,7 +15,7 @@ !macro Z80_SRL_VIA_HL { - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) clc ror diff --git a/src/zvm_m65/z80_instr_bit.s b/src/zvm_m65/z80_instr_bit.s index bec34ddd..4028b13f 100644 --- a/src/zvm_m65/z80_instr_bit.s +++ b/src/zvm_m65/z80_instr_bit.s @@ -872,49 +872,49 @@ Z80_instr_CB_FF: ; SET 7,A Z80_instr_CB_C6: ; SET 0,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) ora #%00000001 jmp ZVM_store_next Z80_instr_CB_CE: ; SET 1,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) ora #%00000010 jmp ZVM_store_next Z80_instr_CB_D6: ; SET 2,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) ora #%00000100 jmp ZVM_store_next Z80_instr_CB_DE: ; SET 3,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) ora #%00001000 jmp ZVM_store_next Z80_instr_CB_E6: ; SET 4,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) ora #%00010000 jmp ZVM_store_next Z80_instr_CB_EE: ; SET 5,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) ora #%00100000 jmp ZVM_store_next Z80_instr_CB_F6: ; SET 6,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) ora #%01000000 jmp ZVM_store_next Z80_instr_CB_FE: ; SET 7,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) ora #%10000000 jmp ZVM_store_next @@ -1256,49 +1256,49 @@ Z80_instr_CB_BF: ; RES 7,A Z80_instr_CB_86: ; RES 0,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) and #%11111110 jmp ZVM_store_next Z80_instr_CB_8E: ; RES 1,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) and #%11111101 jmp ZVM_store_next Z80_instr_CB_96: ; RES 2,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) and #%11111011 jmp ZVM_store_next Z80_instr_CB_9E: ; RES 3,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) and #%11110111 jmp ZVM_store_next Z80_instr_CB_A6: ; RES 4,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) and #%11101111 jmp ZVM_store_next Z80_instr_CB_AE: ; RES 5,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) and #%11011111 jmp ZVM_store_next Z80_instr_CB_B6: ; RES 6,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) and #%10111111 jmp ZVM_store_next Z80_instr_CB_BE: ; RES 7,(HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) and #%01111111 jmp ZVM_store_next diff --git a/src/zvm_m65/z80_instr_math_8bit.s b/src/zvm_m65/z80_instr_math_8bit.s index 66b3cd4c..d967cb5f 100644 --- a/src/zvm_m65/z80_instr_math_8bit.s +++ b/src/zvm_m65/z80_instr_math_8bit.s @@ -612,7 +612,7 @@ Z80_common_INC: Z80_instr_34: ; INC (HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) tax inc sta [PTR_DATA],z @@ -668,7 +668,7 @@ Z80_common_DEC: Z80_instr_35: ; DEC (HL) - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) tax dec sta [PTR_DATA],z diff --git a/src/zvm_m65/z80_instr_rotate_shift.s b/src/zvm_m65/z80_instr_rotate_shift.s index cfb52447..5ed5703d 100644 --- a/src/zvm_m65/z80_instr_rotate_shift.s +++ b/src/zvm_m65/z80_instr_rotate_shift.s @@ -8,7 +8,7 @@ Z80_instr_ED_67: ; RRD - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) sta REG_TMP1 lda REG_A @@ -47,7 +47,7 @@ Z80_instr_ED_67: ; RRD Z80_instr_ED_6F: ; RLD - jsr (VEC_fetch_via_HL) + jsr (VEC_fetch_via_HL_back) sta REG_TMP1 lda REG_A diff --git a/src/zvm_m65/z80_reset.s b/src/zvm_m65/z80_reset.s new file mode 100644 index 00000000..ac66a915 --- /dev/null +++ b/src/zvm_m65/z80_reset.s @@ -0,0 +1,38 @@ + +; +; Z80 CPU reset +; + + +Z80_reset: + + ; Reset registers and internal emulation data + + lda #$00 + tay +@1: + sta z80_cpustate__start, y + iny + cmp #(z80_cpustate__end - z80_cpustate__start + 1) + bne @1 + + dew REG_AF ; AF and SP have $FFFF value at start + dew REG_SP + + lda TIME+2 ; give a little initial randomness to register R + sta REG_R06 + + ; The engine requires all the Z80 visible memory to be present within the 1st 16MB, + ; so set the most significant buytes of 32-bit pointers to 0. + + stz REG_BC_EXT1+1 + stz REG_DE_EXT1+1 + stz REG_HL_EXT1+1 + stz REG_SP_EXT1+1 + stz REG_PC_EXT1+1 + stz PTR_IXY_d_EXT1+1 + stz PTR_DATA_EXT1+1 + + ; Default bank is 1 (the fastest, continuous memory) + + jmp ZVM_set_bank_1 diff --git a/src/zvm_m65/zvm_banking.s b/src/zvm_m65/zvm_banking.s index 4d8bfcab..54eaaa54 100644 --- a/src/zvm_m65/zvm_banking.s +++ b/src/zvm_m65/zvm_banking.s @@ -34,9 +34,18 @@ ZVM_set_bank_1: ; XXX use DMAgic to switch banks (vectors on zeropage) - lda #$04 ; all the Z80 bank 1 memory is located in $0004:$xxxx - sta PTR_DATA+2 - sta PTR_IXY_d+2 + ; Since all the Z80 bank 1 memory is located in $0005:$xxxx, + ; we can set some bytes in certain pointers for faster execution + + lda #$05 + + sta REG_BC_EXT1+0 + sta REG_DE_EXT1+0 + sta REG_HL_EXT1+0 + sta REG_SP_EXT1+0 + sta REG_PC_EXT1+0 + sta PTR_IXY_d_EXT1+0 + sta PTR_DATA_EXT1+0 rts diff --git a/src/zvm_m65/zvm_bios.s b/src/zvm_m65/zvm_bios.s index b11d375b..86d6b7f4 100644 --- a/src/zvm_m65/zvm_bios.s +++ b/src/zvm_m65/zvm_bios.s @@ -53,30 +53,11 @@ zvm_BIOS_00_BOOT: ; Cold start ; XXX !!! - ; XXX fetch RAM disk image + ; XXX fetch RAM disk image, CPM3.SYS, command interpreter ; XXX close all the files, reset I/O, set screen mode ; XXX clear memory - ; Reset registers and internal emulation data - - ldz #$00 ; .Z is required to be 0 all the time - lda #$00 - tay -@1: - sta REG_AF, y - iny - cmp #(REG_IFF2+1) - bne @1 - - dew REG_AF ; AF and SP have $FFFF value on start - dew REG_SP - - lda TIME+2 ; give a little initial randomness to register R - sta REG_R06 - - ; XXX restore all *_EXT1 values - - ; XXX load CPM3.SYS + jsr Z80_reset ; FALLTROUGH From 05c68cd79d25ce4802300c8d84c4ab11da7da85c Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 31 Dec 2020 23:07:33 +0100 Subject: [PATCH 102/257] more work on CP/M memory banking --- src/zvm_m65/,aliases_zvm.s | 12 +++---- src/zvm_m65/z80_reset.s | 16 ++++++++-- src/zvm_m65/z80_table_gen.s | 39 ++++++++++++++++++---- src/zvm_m65/zvm_banking.s | 64 +++++++++++++++++++++++++++++++------ 4 files changed, 105 insertions(+), 26 deletions(-) diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index 74a704cd..272c8a8d 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -69,9 +69,7 @@ ; !addr PTR_IXY_d = $30 ; 4 bytes - calculated address IX+d / IY+d XXX - review usage !!! -!addr PTR_IXY_d_EXT1 = PTR_IXY_d+2 !addr PTR_DATA = $34 ; 4 bytes - calculated data source address XXX - review usage !!! also check functions using ZVM_store_next -!addr PTR_DATA_EXT1 = PTR_DATA+2 !addr ADDR_IO = $38 ; 4 bytes - address for fetching/storing the IO !addr REG_TMP1 = $3C ; 1 byte - emulation-specific temporary storage @@ -80,17 +78,19 @@ ; $3E ; 2 bytes - reserved ; -; Memory banking vectors +; Memory banking vectors - every single routine destroys .Y in case of bank 0 ; +; XXX inline some of these routines - provide separate opcode implementations for various banks + !addr zvm_bankvectors__start = $40 -!addr VEC_fetch_via_PC_inc = $40 ; fetch to .A from (PC), increment PC afterwards XXX consider providing dual-byte retrieval +!addr VEC_fetch_via_PC_inc = $40 ; fetch to .A from (PC), increment PC afterwards +!addr VEC_fetch_stack = $42 ; fetch to .A - stack POP operation, destroys .X +!addr VEC_store_stack = $44 ; store .A - stack PUSH operation, destroys .X ; XXX implement routines for vectors below -!addr VEC_fetch_stack = $42 -!addr VEC_store_stack = $44 !addr VEC_fetch_via_BC = $46 !addr VEC_store_via_BC = $48 !addr VEC_fetch_via_DE = $4A diff --git a/src/zvm_m65/z80_reset.s b/src/zvm_m65/z80_reset.s index ac66a915..f6f0e355 100644 --- a/src/zvm_m65/z80_reset.s +++ b/src/zvm_m65/z80_reset.s @@ -23,15 +23,25 @@ Z80_reset: sta REG_R06 ; The engine requires all the Z80 visible memory to be present within the 1st 16MB, - ; so set the most significant buytes of 32-bit pointers to 0. + ; so set the most significant bytes of 32-bit pointers to 0. stz REG_BC_EXT1+1 stz REG_DE_EXT1+1 stz REG_HL_EXT1+1 stz REG_SP_EXT1+1 stz REG_PC_EXT1+1 - stz PTR_IXY_d_EXT1+1 - stz PTR_DATA_EXT1+1 + stz PTR_IXY_d+3 + stz PTR_DATA+3 + + ; Some pointers are useful for bank 0 only - we can set another byte there + + lda #$05 + + sta REG_BC_EXT1+0 + sta REG_DE_EXT1+0 + sta REG_HL_EXT1+0 + sta REG_SP_EXT1+0 + sta REG_PC_EXT1+0 ; Default bank is 1 (the fastest, continuous memory) diff --git a/src/zvm_m65/z80_table_gen.s b/src/zvm_m65/z80_table_gen.s index c807372c..3a39e8d0 100644 --- a/src/zvm_m65/z80_table_gen.s +++ b/src/zvm_m65/z80_table_gen.s @@ -12,36 +12,61 @@ z80_table_gen: ; ; Generating: z80_atable_mi_bank0, z80_atable_hi_bank0 ; Dependencies: NONE + ; Destroys: NONE ; ldx #$00 @loop_atable_bank0: - cpx #$E0 - bcs @common_addr + cpx #$C0 + bcs @addr_common - ; Memory area $0000-$DFFF - maps to $02000-$0FFFF - 56KB + ; Memory area $0000-$BFFF - maps somewhere to $0xxxx range - 48KB total - lda #$04 + lda #$00 sta z80_atable_hi_bank0, x + txa + cmp #$60 + bcc @addr_lo + +@addr_hi: + + ; Memory area $6000-$BFFF - maps to $0C000 - $0FFFF - 24 KB + clc + adc #$40 + +@addr_lo: + + ; Memory area $0000-$5FFF - maps to $02000 - $07FFF - 24 KB + adc #$20 sta z80_atable_mi_bank0, x -@common_addr: + bra @loop_atable_next + +@addr_common: - ; Memory area $E000-$FFFF - maps to $4E000-$4FFFF - 8KB + ; Memory area $C000-$FFFF - maps to $5C000-$5FFFF - 16KB - lda #$04 + lda #$05 sta z80_atable_hi_bank0, x txa sta z80_atable_mi_bank0, x +@loop_atable_next: + inx bne @loop_atable_bank0 + ; + ; Generating: XXX + ; Dependencies: NONE + ; Destroys: NONE + ; + ; XXX add more tables here ; diff --git a/src/zvm_m65/zvm_banking.s b/src/zvm_m65/zvm_banking.s index 54eaaa54..f0e37c29 100644 --- a/src/zvm_m65/zvm_banking.s +++ b/src/zvm_m65/zvm_banking.s @@ -7,11 +7,17 @@ ZVM_bank0_vectab: !word ZVM_bank0_fetch_via_PC_inc + !word ZVM_bank0_fetch_stack + !word ZVM_bank0_store_stack + ; XXX add remaining routines here ZVM_bank1_vectab: !word ZVM_bank1_fetch_via_PC_inc + !word ZVM_bank1_fetch_stack + !word ZVM_bank1_store_stack + ; XXX add remaining routines here ; @@ -39,13 +45,8 @@ ZVM_set_bank_1: lda #$05 - sta REG_BC_EXT1+0 - sta REG_DE_EXT1+0 - sta REG_HL_EXT1+0 - sta REG_SP_EXT1+0 - sta REG_PC_EXT1+0 - sta PTR_IXY_d_EXT1+0 - sta PTR_DATA_EXT1+0 + sta PTR_IXY_d+2 + sta PTR_DATA+2 rts @@ -61,21 +62,64 @@ ZVM_bank0_fetch_via_PC_inc: lda z80_atable_mi_bank0,y sta PTR_DATA+1 lda z80_atable_hi_bank0,y - sta PTR_DATA+1 + sta PTR_DATA+2 lda [PTR_DATA], z - inw REG_PC + rts ZVM_bank1_fetch_via_PC_inc: lda [REG_PC], z - inw REG_PC + rts +ZVM_bank0_fetch_stack: + ldx REG_SP+0 + stx PTR_DATA+0 + ldy REG_SP+1 + ldx z80_atable_mi_bank0,y + stx PTR_DATA+1 + ldx z80_atable_hi_bank0,y + stx PTR_DATA+2 + + lda [PTR_DATA], z + inw REG_SP + + rts + +ZVM_bank1_fetch_stack: + + lda [REG_SP], z + inw REG_SP + + rts + +ZVM_bank0_store_stack: + + dew REG_SP + + ldx REG_SP+0 + stx PTR_DATA+0 + ldy REG_SP+1 + ldx z80_atable_mi_bank0,y + stx PTR_DATA+1 + ldx z80_atable_hi_bank0,y + stx PTR_DATA+2 + + sta [PTR_DATA], z + + rts + +ZVM_bank1_store_stack: + + dew REG_SP + sta [REG_SP], z + + rts From 9e26e7e085665d936e2f1e3876db08110832260c Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 1 Jan 2021 01:38:39 +0100 Subject: [PATCH 103/257] more Z80 optimizations --- src/aliases/,aliases_ram_over64K_m65.s | 6 +-- src/zvm_m65/,aliases_zvm.s | 38 ++++++++------- src/zvm_m65/Z80_instr_shftrot_RL.s | 4 +- src/zvm_m65/Z80_instr_shftrot_RLC.s | 4 +- src/zvm_m65/Z80_instr_shftrot_RR.s | 4 +- src/zvm_m65/Z80_instr_shftrot_RRC.s | 4 +- src/zvm_m65/Z80_instr_shftrot_SLA.s | 4 +- src/zvm_m65/Z80_instr_shftrot_SLL.s | 4 +- src/zvm_m65/Z80_instr_shftrot_SRA.s | 4 +- src/zvm_m65/Z80_instr_shftrot_SRL.s | 4 +- src/zvm_m65/z80_instr_bit.s | 64 +++++++++++++------------- src/zvm_m65/z80_instr_math_8bit.s | 8 ++-- src/zvm_m65/z80_instr_rotate_shift.s | 8 ++-- src/zvm_m65/z80_reset.s | 20 ++------ src/zvm_m65/z80_table_gen.s | 46 ++++-------------- src/zvm_m65/zvm_banking.s | 44 +++++++----------- src/zvm_m65/zvm_core.s | 4 +- 17 files changed, 108 insertions(+), 162 deletions(-) diff --git a/src/aliases/,aliases_ram_over64K_m65.s b/src/aliases/,aliases_ram_over64K_m65.s index ad670542..313e78ba 100644 --- a/src/aliases/,aliases_ram_over64K_m65.s +++ b/src/aliases/,aliases_ram_over64K_m65.s @@ -26,7 +26,7 @@ !set MEMCONF_SHADOW_BZP_3 = $00 ; $1F800-$1FFFF (2KB) - color RAM mirror, not useable - ; $20000-$4FFFF (64KB) - ROM, additions + ; $20000-$3FFFF (64KB) - ROM, additions - ; $50000-$57FFF (32KB) - reserved for graphics screen / Z80 memory bank 1 - ; $58000-... - native mode BASIC variables / Z80 memory bank 1 (up to $57FFF) + ; $40000-$47FFF (32KB) - reserved for graphics screen / Z80 memory bank 0 ($40000-$4DFFF) + ; $48000-... - native mode BASIC variables / Z80 memory bank 1 ($50000-$5FFFF) diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index 272c8a8d..906527ba 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -12,17 +12,17 @@ !addr REG_BC = $04 ; 2 bytes - combined register !addr REG_C = REG_BC+0 !addr REG_B = REG_BC+1 -!addr REG_BC_EXT1 = $06 ; 2 bytes - helper for faster access via BC in bank 1 +!addr REG_BC_EXT = $06 ; 2 bytes - helper for faster access via BC in bank 1 !addr REG_DE = $08 ; 2 bytes - combined register !addr REG_E = REG_DE+0 !addr REG_D = REG_DE+1 -!addr REG_DE_EXT1 = $0A ; 2 bytes - helper for faster access via DE in bank 1 +!addr REG_DE_EXT = $0A ; 2 bytes - helper for faster access via DE in bank 1 !addr REG_HL = $0C ; 2 bytes - combined register !addr REG_L = REG_HL+0 !addr REG_H = REG_HL+1 -!addr REG_HL_EXT1 = $0E ; 2 bytes - helper for faster access via HL in bank 1 +!addr REG_HL_EXT = $0E ; 2 bytes - helper for faster access via HL in bank 1 !addr REG_SHADOW = $10 ; 8 bytes - shadow registers !addr REG_F_SH = REG_SHADOW+0 @@ -35,9 +35,9 @@ !addr REG_H_SH = REG_SHADOW+7 !addr REG_SP = $18 ; 2 bytes - stack pointer -!addr REG_SP_EXT1 = $1A ; 2 bytes - helper for faster access via SP in bank 1 +!addr REG_SP_EXT = $1A ; 2 bytes - helper for faster access via SP in bank 1 !addr REG_PC = $1C ; 2 bytes - sprogram counter -!addr REG_PC_EXT1 = $1E ; 2 bytes - helper for faster access via PC in bank 1 +!addr REG_PC_EXT = $1E ; 2 bytes - helper for faster access via PC in bank 1 !addr REG_IX = $20 ; 2 bytes - index register !addr REG_IXL = REG_IX+0 @@ -86,7 +86,7 @@ !addr zvm_bankvectors__start = $40 !addr VEC_fetch_via_PC_inc = $40 ; fetch to .A from (PC), increment PC afterwards -!addr VEC_fetch_stack = $42 ; fetch to .A - stack POP operation, destroys .X +!addr VEC_fetch_stack = $42 ; fetch to .A - stack POP operation !addr VEC_store_stack = $44 ; store .A - stack PUSH operation, destroys .X ; XXX implement routines for vectors below @@ -96,18 +96,17 @@ !addr VEC_fetch_via_DE = $4A !addr VEC_store_via_DE = $4C !addr VEC_fetch_via_HL = $4E -!addr VEC_fetch_via_HL_back = $50 ; forces PTR_DATA update -!addr VEC_store_via_HL = $52 -!addr VEC_fetch_via_IX_d = $54 -!addr VEC_fetch_via_IY_d = $56 -!addr VEC_store_via_IX_d = $58 -!addr VEC_store_via_IY_d = $5A -!addr VEC_fetch_via_nn = $5C -!addr VEC_store_via_nn = $5E -!addr VEC_fetch_via_plus1 = $60 -!addr VEC_store_via_plus1 = $62 ; XXX jump to next directly? -!addr VEC_xchng_stack_lo = $64 -!addr VEC_xchng_stack_hi = $68 +!addr VEC_store_via_HL = $50 +!addr VEC_fetch_via_IX_d = $52 +!addr VEC_fetch_via_IY_d = $54 +!addr VEC_store_via_IX_d = $56 +!addr VEC_store_via_IY_d = $58 +!addr VEC_fetch_via_nn = $5A +!addr VEC_store_via_nn = $5C +!addr VEC_fetch_via_plus1 = $5E +!addr VEC_store_via_plus1 = $60 ; XXX jump to next directly? +!addr VEC_xchng_stack_lo = $62 +!addr VEC_xchng_stack_hi = $64 ; ; Constant/macros definitions @@ -150,5 +149,4 @@ ; Helper tables for CPU emulation, downwards from $2000 ; -!addr z80_atable_mi_bank0 = $1FF0 ; table for bank 0 memory address conversion -!addr z80_atable_hi_bank0 = $1FE0 ; table for bank 0 memory address conversion +!addr z80_atable_bank0 = $1FE0 ; table for bank 0 memory address conversion diff --git a/src/zvm_m65/Z80_instr_shftrot_RL.s b/src/zvm_m65/Z80_instr_shftrot_RL.s index fbad73fc..d775f526 100644 --- a/src/zvm_m65/Z80_instr_shftrot_RL.s +++ b/src/zvm_m65/Z80_instr_shftrot_RL.s @@ -18,7 +18,7 @@ !macro Z80_RL_VIA_HL { - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) clc bbr0 REG_F, @1 @@ -26,7 +26,7 @@ @1: rol - sta [PTR_DATA],z + sta [REG_HL],z bra Z80_common_RL_VIA } diff --git a/src/zvm_m65/Z80_instr_shftrot_RLC.s b/src/zvm_m65/Z80_instr_shftrot_RLC.s index e49a94f4..dcc2f17e 100644 --- a/src/zvm_m65/Z80_instr_shftrot_RLC.s +++ b/src/zvm_m65/Z80_instr_shftrot_RLC.s @@ -18,7 +18,7 @@ !macro Z80_RLC_VIA_HL { - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) tax rol @@ -26,7 +26,7 @@ rol - sta [PTR_DATA],z + sta [REG_HL],z bra Z80_common_RLC_VIA } diff --git a/src/zvm_m65/Z80_instr_shftrot_RR.s b/src/zvm_m65/Z80_instr_shftrot_RR.s index 0255deca..03651ac4 100644 --- a/src/zvm_m65/Z80_instr_shftrot_RR.s +++ b/src/zvm_m65/Z80_instr_shftrot_RR.s @@ -18,7 +18,7 @@ !macro Z80_RR_VIA_HL { - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) clc bbr0 REG_F, @1 @@ -26,7 +26,7 @@ @1: ror - sta [PTR_DATA],z + sta [REG_HL],z bra Z80_common_RR_VIA } diff --git a/src/zvm_m65/Z80_instr_shftrot_RRC.s b/src/zvm_m65/Z80_instr_shftrot_RRC.s index 7fac5954..2c0373c1 100644 --- a/src/zvm_m65/Z80_instr_shftrot_RRC.s +++ b/src/zvm_m65/Z80_instr_shftrot_RRC.s @@ -18,7 +18,7 @@ !macro Z80_RRC_VIA_HL { - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) tax ror @@ -26,7 +26,7 @@ ror - sta [PTR_DATA],z + sta [REG_HL],z bra Z80_common_RRC_VIA } diff --git a/src/zvm_m65/Z80_instr_shftrot_SLA.s b/src/zvm_m65/Z80_instr_shftrot_SLA.s index 23bb6723..b0e6a624 100644 --- a/src/zvm_m65/Z80_instr_shftrot_SLA.s +++ b/src/zvm_m65/Z80_instr_shftrot_SLA.s @@ -14,10 +14,10 @@ !macro Z80_SLA_VIA_HL { - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) asl - sta [PTR_DATA],z + sta [REG_HL],z bra Z80_common_SLA_VIA } diff --git a/src/zvm_m65/Z80_instr_shftrot_SLL.s b/src/zvm_m65/Z80_instr_shftrot_SLL.s index f784220a..a93d9e78 100644 --- a/src/zvm_m65/Z80_instr_shftrot_SLL.s +++ b/src/zvm_m65/Z80_instr_shftrot_SLL.s @@ -15,11 +15,11 @@ !macro Z80_SLL_VIA_HL { - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) sec rol - sta [PTR_DATA],z + sta [REG_HL],z bra Z80_common_SLL_VIA } diff --git a/src/zvm_m65/Z80_instr_shftrot_SRA.s b/src/zvm_m65/Z80_instr_shftrot_SRA.s index 1b8b3197..a36781e7 100644 --- a/src/zvm_m65/Z80_instr_shftrot_SRA.s +++ b/src/zvm_m65/Z80_instr_shftrot_SRA.s @@ -18,7 +18,7 @@ !macro Z80_SRA_VIA_HL { - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) tax ror @@ -26,7 +26,7 @@ ror - sta [PTR_DATA],z + sta [REG_HL],z bra Z80_common_SRA_VIA } diff --git a/src/zvm_m65/Z80_instr_shftrot_SRL.s b/src/zvm_m65/Z80_instr_shftrot_SRL.s index 4e6091ea..514ea3c3 100644 --- a/src/zvm_m65/Z80_instr_shftrot_SRL.s +++ b/src/zvm_m65/Z80_instr_shftrot_SRL.s @@ -15,11 +15,11 @@ !macro Z80_SRL_VIA_HL { - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) clc ror - sta [PTR_DATA],z + sta [REG_HL],z bra Z80_common_SRL_VIA } diff --git a/src/zvm_m65/z80_instr_bit.s b/src/zvm_m65/z80_instr_bit.s index 4028b13f..5cdfb9b1 100644 --- a/src/zvm_m65/z80_instr_bit.s +++ b/src/zvm_m65/z80_instr_bit.s @@ -872,51 +872,51 @@ Z80_instr_CB_FF: ; SET 7,A Z80_instr_CB_C6: ; SET 0,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) ora #%00000001 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_CB_CE: ; SET 1,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) ora #%00000010 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_CB_D6: ; SET 2,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) ora #%00000100 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_CB_DE: ; SET 3,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) ora #%00001000 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_CB_E6: ; SET 4,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) ora #%00010000 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_CB_EE: ; SET 5,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) ora #%00100000 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_CB_F6: ; SET 6,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) ora #%01000000 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_CB_FE: ; SET 7,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) ora #%10000000 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_xDCB_C6: ; SET 0,(IXY+d) @@ -1256,51 +1256,51 @@ Z80_instr_CB_BF: ; RES 7,A Z80_instr_CB_86: ; RES 0,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) and #%11111110 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_CB_8E: ; RES 1,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) and #%11111101 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_CB_96: ; RES 2,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) and #%11111011 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_CB_9E: ; RES 3,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) and #%11110111 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_CB_A6: ; RES 4,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) and #%11101111 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_CB_AE: ; RES 5,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) and #%11011111 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_CB_B6: ; RES 6,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) and #%10111111 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_CB_BE: ; RES 7,(HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) and #%01111111 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_xDCB_86: ; RES 0,(IXY+d) diff --git a/src/zvm_m65/z80_instr_math_8bit.s b/src/zvm_m65/z80_instr_math_8bit.s index d967cb5f..aed06ac6 100644 --- a/src/zvm_m65/z80_instr_math_8bit.s +++ b/src/zvm_m65/z80_instr_math_8bit.s @@ -612,10 +612,10 @@ Z80_common_INC: Z80_instr_34: ; INC (HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) tax inc - sta [PTR_DATA],z + sta [REG_HL],z bra Z80_common_INC Z80_instr_DD_34: ; INC (IX+d) @@ -668,10 +668,10 @@ Z80_common_DEC: Z80_instr_35: ; DEC (HL) - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) tax dec - sta [PTR_DATA],z + sta [REG_HL],z bra Z80_common_DEC Z80_instr_DD_35: ; DEC (IX+d) diff --git a/src/zvm_m65/z80_instr_rotate_shift.s b/src/zvm_m65/z80_instr_rotate_shift.s index 5ed5703d..b38219c4 100644 --- a/src/zvm_m65/z80_instr_rotate_shift.s +++ b/src/zvm_m65/z80_instr_rotate_shift.s @@ -8,7 +8,7 @@ Z80_instr_ED_67: ; RRD - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) sta REG_TMP1 lda REG_A @@ -43,11 +43,11 @@ Z80_instr_ED_67: ; RRD sta REG_F lda REG_TMP1 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_ED_6F: ; RLD - jsr (VEC_fetch_via_HL_back) + jsr (VEC_fetch_via_HL) sta REG_TMP1 lda REG_A @@ -81,7 +81,7 @@ Z80_instr_ED_6F: ; RLD sta REG_F lda REG_TMP1 - jmp ZVM_store_next + jmp ZVM_store_via_HL_next Z80_instr_07: ; RLCA diff --git a/src/zvm_m65/z80_reset.s b/src/zvm_m65/z80_reset.s index f6f0e355..7a17c8fb 100644 --- a/src/zvm_m65/z80_reset.s +++ b/src/zvm_m65/z80_reset.s @@ -25,24 +25,14 @@ Z80_reset: ; The engine requires all the Z80 visible memory to be present within the 1st 16MB, ; so set the most significant bytes of 32-bit pointers to 0. - stz REG_BC_EXT1+1 - stz REG_DE_EXT1+1 - stz REG_HL_EXT1+1 - stz REG_SP_EXT1+1 - stz REG_PC_EXT1+1 + stz REG_BC_EXT+1 + stz REG_DE_EXT+1 + stz REG_HL_EXT+1 + stz REG_SP_EXT+1 + stz REG_PC_EXT+1 stz PTR_IXY_d+3 stz PTR_DATA+3 - ; Some pointers are useful for bank 0 only - we can set another byte there - - lda #$05 - - sta REG_BC_EXT1+0 - sta REG_DE_EXT1+0 - sta REG_HL_EXT1+0 - sta REG_SP_EXT1+0 - sta REG_PC_EXT1+0 - ; Default bank is 1 (the fastest, continuous memory) jmp ZVM_set_bank_1 diff --git a/src/zvm_m65/z80_table_gen.s b/src/zvm_m65/z80_table_gen.s index 3a39e8d0..989825ea 100644 --- a/src/zvm_m65/z80_table_gen.s +++ b/src/zvm_m65/z80_table_gen.s @@ -10,53 +10,23 @@ z80_table_gen: !byte 0 ; - ; Generating: z80_atable_mi_bank0, z80_atable_hi_bank0 + ; Generating: z80_atable_bank0 ; Dependencies: NONE ; Destroys: NONE ; ldx #$00 - + @loop_atable_bank0: - - cpx #$C0 - bcs @addr_common - - ; Memory area $0000-$BFFF - maps somewhere to $0xxxx range - 48KB total - lda #$00 - sta z80_atable_hi_bank0, x + lda #$04 ; $0000-$DFFF maps to $40000-$4DFFF (bank 0 RAM) + cpx #$E0 + bcc @loop_atable_bank0_gotit + inc ; $E000-$FFFF maps to $5E000-$5FFFF (common RAM) - txa - cmp #$60 - bcc @addr_lo +@loop_atable_bank0_gotit: -@addr_hi: - - ; Memory area $6000-$BFFF - maps to $0C000 - $0FFFF - 24 KB - - clc - adc #$40 - -@addr_lo: - - ; Memory area $0000-$5FFF - maps to $02000 - $07FFF - 24 KB - - adc #$20 - sta z80_atable_mi_bank0, x - - bra @loop_atable_next - -@addr_common: - - ; Memory area $C000-$FFFF - maps to $5C000-$5FFFF - 16KB - - lda #$05 - sta z80_atable_hi_bank0, x - txa - sta z80_atable_mi_bank0, x - -@loop_atable_next: + sta z80_atable_bank0, x inx bne @loop_atable_bank0 diff --git a/src/zvm_m65/zvm_banking.s b/src/zvm_m65/zvm_banking.s index f0e37c29..c6c90590 100644 --- a/src/zvm_m65/zvm_banking.s +++ b/src/zvm_m65/zvm_banking.s @@ -41,10 +41,16 @@ ZVM_set_bank_1: ; XXX use DMAgic to switch banks (vectors on zeropage) ; Since all the Z80 bank 1 memory is located in $0005:$xxxx, - ; we can set some bytes in certain pointers for faster execution + ; we can set bytes in certain pointers for faster execution lda #$05 + sta REG_BC_EXT + sta REG_DE_EXT + sta REG_HL_EXT + sta REG_SP_EXT + sta REG_PC_EXT + sta PTR_IXY_d+2 sta PTR_DATA+2 @@ -56,19 +62,12 @@ ZVM_set_bank_1: ZVM_bank0_fetch_via_PC_inc: - lda REG_PC+0 - sta PTR_DATA+0 ldy REG_PC+1 - lda z80_atable_mi_bank0,y - sta PTR_DATA+1 - lda z80_atable_hi_bank0,y - sta PTR_DATA+2 + lda z80_atable_bank0,y + sta REG_PC_EXT+0 + + ; FALLTROUGH - lda [PTR_DATA], z - inw REG_PC - - rts - ZVM_bank1_fetch_via_PC_inc: lda [REG_PC], z @@ -78,18 +77,11 @@ ZVM_bank1_fetch_via_PC_inc: ZVM_bank0_fetch_stack: - ldx REG_SP+0 - stx PTR_DATA+0 ldy REG_SP+1 - ldx z80_atable_mi_bank0,y - stx PTR_DATA+1 - ldx z80_atable_hi_bank0,y - stx PTR_DATA+2 + lda z80_atable_bank0,y + sta REG_PC_EXT - lda [PTR_DATA], z - inw REG_SP - - rts + ; FALLTROUGH ZVM_bank1_fetch_stack: @@ -102,13 +94,9 @@ ZVM_bank0_store_stack: dew REG_SP - ldx REG_SP+0 - stx PTR_DATA+0 ldy REG_SP+1 - ldx z80_atable_mi_bank0,y - stx PTR_DATA+1 - ldx z80_atable_hi_bank0,y - stx PTR_DATA+2 + ldx z80_atable_bank0,y + stx REG_SP_EXT sta [PTR_DATA], z diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index 87481d20..c9d6ef58 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -70,9 +70,9 @@ ZVM_entry: jmp zvm_BIOS_00_BOOT -ZVM_store_next: +ZVM_store_via_HL_next: - sta [PTR_DATA],z + sta [REG_HL],z ; FALLTROUGH From 55e43e44d21dc03c360e64c2d4eb5397de451980 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 1 Jan 2021 19:20:52 +0100 Subject: [PATCH 104/257] added ZMAC to the build script --- .gitmodules | 3 +++ 3rdparty/zmac | 1 + Makefile | 44 +++++++++++++++++++++++++++++++++++++++++--- 3 files changed, 45 insertions(+), 3 deletions(-) create mode 160000 3rdparty/zmac diff --git a/.gitmodules b/.gitmodules index c7ccf580..a7fa85bb 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,3 +1,6 @@ [submodule "3rdparty/acme"] path = 3rdparty/acme url = https://github.com/MEGA65/acme +[submodule "3rdparty/zmac"] + path = 3rdparty/zmac + url = https://github.com/FeralChild64/zmac diff --git a/3rdparty/zmac b/3rdparty/zmac new file mode 160000 index 00000000..f45fb243 --- /dev/null +++ b/3rdparty/zmac @@ -0,0 +1 @@ +Subproject commit f45fb2432176294d0ddcf12ae462d7500dc38997 diff --git a/Makefile b/Makefile index 1a01ffcd..2b1ba76d 100644 --- a/Makefile +++ b/Makefile @@ -153,6 +153,7 @@ TOOL_BUILD_SEGMENT = build/tools/build_segment TOOL_RELEASE = build/tools/release TOOL_SIMILARITY = build/tools/similarity TOOL_ASSEMBLER = build/tools/acme +TOOL_ASSEMBLER_Z80 = build/tools/zmac TOOLS_LIST = $(TOOL_GENERATE_CONSTANTS) \ $(TOOL_GENERATE_STRINGS) \ @@ -162,7 +163,8 @@ TOOLS_LIST = $(TOOL_GENERATE_CONSTANTS) \ $(TOOL_BUILD_SEGMENT) \ $(TOOL_RELEASE) \ $(TOOL_SIMILARITY) \ - $(TOOL_ASSEMBLER) + $(TOOL_ASSEMBLER) \ + $(TOOL_ASSEMBLER_Z80) # List of targets @@ -277,9 +279,9 @@ $(ROM_CBM_BASIC): # Rules - tools -$(DIR_ACME) $(SRC_ACME): +$(DIR_ACME) $(SRC_ACME) $(DIR_ZMAC) $(SRC_ZMAC): @echo - @echo Fetching ACME source code... + @echo Fetching 3rd party source code... @git submodule init @git submodule update @@ -864,3 +866,39 @@ testremote: build/kernal_custom.rom build/basic_custom.rom $(TARGET_CHR_PXL) bui testsimilarity: $(TOOL_SIMILARITY) $(DIR_GEN)/OUTx_x.BIN $(ROM_CBM_KERNAL) $(ROM_CBM_BASIC) $(TOOL_SIMILARITY) $(ROM_CBM_KERNAL) $(DIR_GEN)/OUTx_x.BIN $(TOOL_SIMILARITY) $(ROM_CBM_BASIC) $(DIR_GEN)/OUTx_x.BIN + +# +# Z80 and CP/M part +# + +.PHONY: cpm +cpm: $(TOOL_ASSEMBLER_Z80) + +DIR_ZMAC = 3rdparty/zmac/src +DIR_ZMAC_TMP = build/,tmp_zmac +HDR_ZMAC = $(filter-out $(wildcard $(DIR_ZMAC)/_*.h),$(wildcard $(DIR_ZMAC)/*.h)) +SRC_ZMAC = $(DIR_ZMAC)/mio.c $(DIR_ZMAC)/doc.c $(DIR_ZMAC)/zi80dis.cpp + +GEN_ZMAC_C = $(DIR_ZMAC_TMP)/zmac.c +GEN_ZMAC_H = $(DIR_ZMAC_TMP)/doc.inl + +$(DIR_ZMAC_TMP)/doc: $(SRC_ZMAC) + @mkdir -p $(DIR_ZMAC_TMP) + @$(CC) -Wall -DMK_DOC -o $@ $(DIR_ZMAC)/doc.c + +$(DIR_ZMAC_TMP)/doc.txt : $(DIR_ZMAC)/doc.txt + @mkdir -p $(DIR_ZMAC_TMP) + @cp -f $< $@ + +$(DIR_ZMAC_TMP)/doc.inl: $(DIR_ZMAC_TMP)/doc.txt $(DIR_ZMAC_TMP)/doc + @(cd $(DIR_ZMAC_TMP); ./doc > /dev/null) + +$(DIR_ZMAC_TMP)/zmac.c : $(SRC_ZMAC) $(DIR_ZMAC)/zmac.y + @mkdir -p $(DIR_ZMAC_TMP) + @bison -y $(DIR_ZMAC)/zmac.y -o $@ + +$(TOOL_ASSEMBLER_Z80): $(DIR_ZMAC) $(SRC_ZMAC) $(GEN_ZMAC_C) $(GEN_ZMAC_H) $(HDR_ZMAC) + @echo + @echo Compiling tool $@ ... + @mkdir -p build/tools + @$(CC) -o $(TOOL_ASSEMBLER_Z80) $(SRC_ZMAC) $(GEN_ZMAC_C) -lm -w -I$(DIR_ZMAC) -I$(DIR_ZMAC_TMP) From f67ebdc3c9c8f53b5e0054db6ed1cfc739c42bde Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 1 Jan 2021 19:39:01 +0100 Subject: [PATCH 105/257] small makefile fix --- Makefile | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/Makefile b/Makefile index 2b1ba76d..44b66a30 100644 --- a/Makefile +++ b/Makefile @@ -101,6 +101,16 @@ GEN_BASIC = build/,generated/,float_constants.s GEN_KERNAL = GEN_ZVM = build/,generated/,z80_tables.s +# Z80 part + +DIR_ZMAC = 3rdparty/zmac/src +DIR_ZMAC_TMP = build/,tmp_zmac +HDR_ZMAC = $(filter-out $(wildcard $(DIR_ZMAC)/_*.h),$(wildcard $(DIR_ZMAC)/*.h)) +SRC_ZMAC = $(DIR_ZMAC)/mio.c $(DIR_ZMAC)/doc.c $(DIR_ZMAC)/zi80dis.cpp + +GEN_ZMAC_C = $(DIR_ZMAC_TMP)/zmac.c +GEN_ZMAC_H = $(DIR_ZMAC_TMP)/doc.inl + # List of build directories DIR_CUS = build/target_custom @@ -868,20 +878,12 @@ testsimilarity: $(TOOL_SIMILARITY) $(DIR_GEN)/OUTx_x.BIN $(ROM_CBM_KERNAL) $(ROM $(TOOL_SIMILARITY) $(ROM_CBM_BASIC) $(DIR_GEN)/OUTx_x.BIN # -# Z80 and CP/M part +# Z80 part # .PHONY: cpm cpm: $(TOOL_ASSEMBLER_Z80) -DIR_ZMAC = 3rdparty/zmac/src -DIR_ZMAC_TMP = build/,tmp_zmac -HDR_ZMAC = $(filter-out $(wildcard $(DIR_ZMAC)/_*.h),$(wildcard $(DIR_ZMAC)/*.h)) -SRC_ZMAC = $(DIR_ZMAC)/mio.c $(DIR_ZMAC)/doc.c $(DIR_ZMAC)/zi80dis.cpp - -GEN_ZMAC_C = $(DIR_ZMAC_TMP)/zmac.c -GEN_ZMAC_H = $(DIR_ZMAC_TMP)/doc.inl - $(DIR_ZMAC_TMP)/doc: $(SRC_ZMAC) @mkdir -p $(DIR_ZMAC_TMP) @$(CC) -Wall -DMK_DOC -o $@ $(DIR_ZMAC)/doc.c From 899a0521fe77a610e4e72c28b36d1d492254e5b8 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 1 Jan 2021 19:42:19 +0100 Subject: [PATCH 106/257] copyright year update --- LICENSE | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/LICENSE b/LICENSE index f4def5c1..8ce246b0 100644 --- a/LICENSE +++ b/LICENSE @@ -3,7 +3,7 @@ The following copyright notices apply to the entirety of this package, including each source file, unless otherwise noted in each file or directory. Copyright Paul Gardner-Stephen, 2019. - Copyright Roman Standzikowski (FeralChild64), 2019-2020. + Copyright Roman Standzikowski (FeralChild64), 2019-2021. This program is free software: you can redistribute it and/or modify it under the terms of the GNU Lesser General Public License as published by From 72594681638f3c3ef376574439ee67c8b8d4cf2b Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 1 Jan 2021 22:00:45 +0100 Subject: [PATCH 107/257] ported BSMON bugfix from upstream --- src/mon_m65/mon_helper_get_addr_to_lac.s | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/src/mon_m65/mon_helper_get_addr_to_lac.s b/src/mon_m65/mon_helper_get_addr_to_lac.s index cf1084a1..899758b4 100644 --- a/src/mon_m65/mon_helper_get_addr_to_lac.s +++ b/src/mon_m65/mon_helper_get_addr_to_lac.s @@ -1,6 +1,6 @@ -Get_Addr_To_LAC: ; XXX !!! seems to work incorrectly for decimal +Get_Addr_To_LAC: phx phy @@ -13,7 +13,7 @@ Get_Addr_To_LAC: ; XXX !!! seems to work incorrectly for decimal sta Long_AC+3 jsr Get_Glyph ; get 1st. character - beq @exit + +beq @exit ldy #$03 ; here we allow '$', '+', '&', and '%' prefixes @@ -54,16 +54,21 @@ Get_Addr_To_LAC: ; XXX !!! seems to work incorrectly for decimal cpy #$01 bne @laba ; branch if not decimal - ldx #$03 ; decimal - push Long_AC * 2 - clc + ldx #$03 ; decimal - push Long_AC -@push2x: +@push_long_AC: lda Long_AC,X - rol pha dex - bpl @push2x + bpl @push_long_AC + + tsx ; double pushed value + asl STACK+1,X + rol STACK+2,X + rol STACK+3,X + rol STACK+4,X + +bcs Mon_Error ; branch if overflow @laba: From dc4edbb81cc7a8f4c7edb30a46443a90708ee971 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 2 Jan 2021 18:53:59 +0100 Subject: [PATCH 108/257] more work on monitor integration --- src/mon_m65/,aliases_mon.s | 4 +- src/mon_m65/bsmon.s | 14 ++--- src/mon_m65/mon_command_memory.s | 2 + src/mon_m65/mon_helper_get_addr_to_lac.s | 1 + src/mon_m65/mon_helper_memory.s | 78 ++++++++++++++++++++++++ 5 files changed, 90 insertions(+), 9 deletions(-) create mode 100644 src/mon_m65/mon_helper_memory.s diff --git a/src/mon_m65/,aliases_mon.s b/src/mon_m65/,aliases_mon.s index 7d444c08..c13403e3 100644 --- a/src/mon_m65/,aliases_mon.s +++ b/src/mon_m65/,aliases_mon.s @@ -61,7 +61,9 @@ !addr Disk_Sector = $32 ; logical sector 0 -> 255 !addr Disk_Status = $33 ; BCD value of status - ; $34-$3F - free space, unused for now + ; $34-$3B - free space, unused for now + +!addr Long_TMP = $3C ; temporary pointer, for fetching/storing memory content !addr Disk_Msg = $40 ; 40 bytes, disk status as text message ; XXX rework code to make it not needed !addr Mon_Data = $68 ; 40 bytes, buffer for hunt and filename diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index c79fb808..83085a87 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -529,9 +529,8 @@ Dump_4_Bytes: ; XXX to be adapted ; *********** JSR CHROUT ; colour -@loop BBS7 Long_PC+3,@banked ; trigger banked access - +NOP ; use LDA [Long_PC],Z -@banked LDA (Long_PC),Z +@loop + JSR Get_From_Memory JSR Print_Hex_Blank INZ TZA @@ -546,9 +545,8 @@ Dump_4_Chars: ; XXX to be adapted LDY #0 STY QTSW ; disable quote mode JSR CHROUT ; colour -@loop BBS7 Long_PC+3,@banked ; trigger banked access - +NOP ; use LDA [Long_PC],Z -@banked LDA (Long_PC),Z +@loop + JSR Get_From_Memory TAY AND #%01100000 BNE @laba @@ -589,9 +587,9 @@ Dump_Row: LDX #2 ; 4 blocks in 80 columns BBR7 MODE_80,@lchr DEX ; 2 blocks in 40 columns -@lchr LDA #KEY_LT_RED +@lchr LDA #KEY_LT_RED ; XXX replace color with bold attribute JSR Dump_4_Chars - LDA #KEY_WHITE + LDA #KEY_WHITE ; XXX replace color with bold attribute JSR Dump_4_Chars DEX BNE @lchr diff --git a/src/mon_m65/mon_command_memory.s b/src/mon_m65/mon_command_memory.s index 2e460cbe..11b688ec 100644 --- a/src/mon_m65/mon_command_memory.s +++ b/src/mon_m65/mon_command_memory.s @@ -1,4 +1,6 @@ +; Based on BSM (Bit Shifter's Monitor) + Mon_Memory: jsr Set_MODE_80 diff --git a/src/mon_m65/mon_helper_get_addr_to_lac.s b/src/mon_m65/mon_helper_get_addr_to_lac.s index 899758b4..a165f8db 100644 --- a/src/mon_m65/mon_helper_get_addr_to_lac.s +++ b/src/mon_m65/mon_helper_get_addr_to_lac.s @@ -1,4 +1,5 @@ +; Based on BSM (Bit Shifter's Monitor) Get_Addr_To_LAC: diff --git a/src/mon_m65/mon_helper_memory.s b/src/mon_m65/mon_helper_memory.s new file mode 100644 index 00000000..fa5e2d52 --- /dev/null +++ b/src/mon_m65/mon_helper_memory.s @@ -0,0 +1,78 @@ + +; Monitor helper code - read and write + +; XXX there is a bug somewhere with wrapping arounf $FFFF + +Get_From_Memory: + + phx + phy + phz + + ; Copy PC + .Z to TMP, set .Z to 0 + + clc + tza + adc Long_PC+0 + sta Long_TMP+0 + + ldx #$02 +@1: + lda Long_PC+1,x + adc #$00 + sta Long_TMP+1,x + dex + bpl @1 + + ldz #$00 + + ; Check addressing mode + + bbs7 Adr_Mode, @mode_flat + +@mode_64k: + + lda Long_TMP+1 + bne @read ; branch if no need to handle shadow memory (not zero page) + lda Long_TMP+0 + dec + dec + cmp #$8E + bcs @read ; branch if no need to handle shadow memory (0, 1, or above $8F) +@2: + sta Long_TMP+0 + bra @read_shadow + +@mode_flat: + + lda Long_TMP+3 + ora Long_TMP+2 + ora Long_TMP+1 + bne @read_flat + + lda Long_TMP+0 + dec + dec + cmp #$8E + bcs @read_flat + bra @2 + +@read_shadow: + + lda #MEMCONF_SHADOW_BZP_1 + sta Long_TMP+1 + lda #MEMCONF_SHADOW_BZP_2 + sta Long_TMP+2 + lda #MEMCONF_SHADOW_BZP_3 + sta Long_TMP+3 + +@read_flat: + +nop +@read: + lda (Long_TMP),Z + + plz + ply + plx + + rts From 690b2b832d15770178526665cb63da053a5aa67a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 2 Jan 2021 19:52:02 +0100 Subject: [PATCH 109/257] some cleanup, mainly Z80 related --- src/basic/wedge/wedge_dos.s | 2 +- src/zvm_m65/,aliases_zvm.s | 100 ++++++++++++++++--------- src/zvm_m65/Z80_instr_shftrot_RL.s | 4 +- src/zvm_m65/Z80_instr_shftrot_RLC.s | 4 +- src/zvm_m65/Z80_instr_shftrot_RR.s | 4 +- src/zvm_m65/Z80_instr_shftrot_RRC.s | 4 +- src/zvm_m65/Z80_instr_shftrot_SLA.s | 4 +- src/zvm_m65/Z80_instr_shftrot_SLL.s | 4 +- src/zvm_m65/Z80_instr_shftrot_SRA.s | 4 +- src/zvm_m65/Z80_instr_shftrot_SRL.s | 4 +- src/zvm_m65/z80_instr_bit.s | 48 ++++++------ src/zvm_m65/z80_instr_block.s | 16 ++-- src/zvm_m65/z80_instr_call_return.s | 24 +++--- src/zvm_m65/z80_instr_io.s | 4 +- src/zvm_m65/z80_instr_jump.s | 6 +- src/zvm_m65/z80_instr_load_16bit.s | 12 +-- src/zvm_m65/z80_instr_load_8bit.s | 18 ++--- src/zvm_m65/z80_instr_math_8bit.s | 40 +++++----- src/zvm_m65/z80_instr_rotate_shift.s | 4 +- src/zvm_m65/z80_table_gen.s | 24 +----- src/zvm_m65/zvm_banking.s | 105 ++------------------------- src/zvm_m65/zvm_core.s | 25 +++---- 22 files changed, 190 insertions(+), 270 deletions(-) diff --git a/src/basic/wedge/wedge_dos.s b/src/basic/wedge/wedge_dos.s index 2059c1d2..099c0393 100644 --- a/src/basic/wedge/wedge_dos.s +++ b/src/basic/wedge/wedge_dos.s @@ -34,7 +34,7 @@ wedge_dos: ; Close all the channels, so that wedge has full control jsr JCLALL - ; Set file parameters, channel 15 is a typical one for commands + ; Set file parameters, channel 15 is a typical one for commands jsr SELDEV ; sets .X register lda #$0F ldy #$0F diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index 906527ba..101510df 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -77,37 +77,6 @@ ; $3E ; 2 bytes - reserved -; -; Memory banking vectors - every single routine destroys .Y in case of bank 0 -; - -; XXX inline some of these routines - provide separate opcode implementations for various banks - -!addr zvm_bankvectors__start = $40 - -!addr VEC_fetch_via_PC_inc = $40 ; fetch to .A from (PC), increment PC afterwards -!addr VEC_fetch_stack = $42 ; fetch to .A - stack POP operation -!addr VEC_store_stack = $44 ; store .A - stack PUSH operation, destroys .X - -; XXX implement routines for vectors below - -!addr VEC_fetch_via_BC = $46 -!addr VEC_store_via_BC = $48 -!addr VEC_fetch_via_DE = $4A -!addr VEC_store_via_DE = $4C -!addr VEC_fetch_via_HL = $4E -!addr VEC_store_via_HL = $50 -!addr VEC_fetch_via_IX_d = $52 -!addr VEC_fetch_via_IY_d = $54 -!addr VEC_store_via_IX_d = $56 -!addr VEC_store_via_IY_d = $58 -!addr VEC_fetch_via_nn = $5A -!addr VEC_store_via_nn = $5C -!addr VEC_fetch_via_plus1 = $5E -!addr VEC_store_via_plus1 = $60 ; XXX jump to next directly? -!addr VEC_xchng_stack_lo = $62 -!addr VEC_xchng_stack_hi = $64 - ; ; Constant/macros definitions ; @@ -145,8 +114,73 @@ !macro Z80_PUT_1_CF { smb0 REG_F } !macro Z80_PUT_0_CF { rmb0 REG_F } + ; -; Helper tables for CPU emulation, downwards from $2000 +; Macros to abstract memory access ; -!addr z80_atable_bank0 = $1FE0 ; table for bank 0 memory address conversion +!macro Z80_FETCH_VIA_PC_INC { ; fetch to .A from (PC), increment PC afterwards + + lda [REG_PC], z + inw REG_PC +} + +!macro Z80_FETCH_STACK { ; fetch to .A - stack POP operation + + lda [REG_SP], z + inw REG_SP +} + +!macro Z80_STORE_STACK { ; store .A - stack PUSH operation + + dew REG_SP + sta [REG_SP], z +} + +!macro Z80_FETCH_VIA_BC { ; fetch to .A from (BC) + + lda [REG_BC], z +} + +!macro Z80_STORE_VIA_BC { ; store .A to (BC) + + sta [REG_BC], z +} + +!macro Z80_FETCH_VIA_DE { ; fetch to .A from (DE) + + lda [REG_DE], z +} + +!macro Z80_STORE_VIA_DE { ; store .A to (DE) + + sta [REG_DE], z +} + +!macro Z80_FETCH_VIA_HL { ; fetch to .A from (HL) + + lda [REG_HL], z +} + +!macro Z80_STORE_VIA_HL { ; store .A to (HL) + + sta [REG_HL], z +} + +!macro Z80_STORE_BACK_VIA_HL { ; store .A to (HL) when instruction already used Z80_FETCH_VIA_HL + + sta [REG_HL], z +} + +; XXX turn vectors below into macros + +!addr VEC_fetch_via_IX_d = $52 +!addr VEC_fetch_via_IY_d = $54 +!addr VEC_store_via_IX_d = $56 +!addr VEC_store_via_IY_d = $58 +!addr VEC_fetch_via_nn = $5A +!addr VEC_store_via_nn = $5C +!addr VEC_fetch_via_plus1 = $5E +!addr VEC_store_via_plus1 = $60 ; XXX jump to next directly? +!addr VEC_xchng_stack_lo = $62 +!addr VEC_xchng_stack_hi = $64 diff --git a/src/zvm_m65/Z80_instr_shftrot_RL.s b/src/zvm_m65/Z80_instr_shftrot_RL.s index d775f526..26522ad7 100644 --- a/src/zvm_m65/Z80_instr_shftrot_RL.s +++ b/src/zvm_m65/Z80_instr_shftrot_RL.s @@ -18,7 +18,7 @@ !macro Z80_RL_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL clc bbr0 REG_F, @1 @@ -26,7 +26,7 @@ @1: rol - sta [REG_HL],z + +Z80_STORE_BACK_VIA_HL bra Z80_common_RL_VIA } diff --git a/src/zvm_m65/Z80_instr_shftrot_RLC.s b/src/zvm_m65/Z80_instr_shftrot_RLC.s index dcc2f17e..28ac47bc 100644 --- a/src/zvm_m65/Z80_instr_shftrot_RLC.s +++ b/src/zvm_m65/Z80_instr_shftrot_RLC.s @@ -18,7 +18,7 @@ !macro Z80_RLC_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL tax rol @@ -26,7 +26,7 @@ rol - sta [REG_HL],z + +Z80_STORE_BACK_VIA_HL bra Z80_common_RLC_VIA } diff --git a/src/zvm_m65/Z80_instr_shftrot_RR.s b/src/zvm_m65/Z80_instr_shftrot_RR.s index 03651ac4..d2a8a033 100644 --- a/src/zvm_m65/Z80_instr_shftrot_RR.s +++ b/src/zvm_m65/Z80_instr_shftrot_RR.s @@ -18,7 +18,7 @@ !macro Z80_RR_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL clc bbr0 REG_F, @1 @@ -26,7 +26,7 @@ @1: ror - sta [REG_HL],z + +Z80_STORE_BACK_VIA_HL bra Z80_common_RR_VIA } diff --git a/src/zvm_m65/Z80_instr_shftrot_RRC.s b/src/zvm_m65/Z80_instr_shftrot_RRC.s index 2c0373c1..05bf84b1 100644 --- a/src/zvm_m65/Z80_instr_shftrot_RRC.s +++ b/src/zvm_m65/Z80_instr_shftrot_RRC.s @@ -18,7 +18,7 @@ !macro Z80_RRC_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL tax ror @@ -26,7 +26,7 @@ ror - sta [REG_HL],z + +Z80_STORE_BACK_VIA_HL bra Z80_common_RRC_VIA } diff --git a/src/zvm_m65/Z80_instr_shftrot_SLA.s b/src/zvm_m65/Z80_instr_shftrot_SLA.s index b0e6a624..5f8c136b 100644 --- a/src/zvm_m65/Z80_instr_shftrot_SLA.s +++ b/src/zvm_m65/Z80_instr_shftrot_SLA.s @@ -14,10 +14,10 @@ !macro Z80_SLA_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL asl - sta [REG_HL],z + +Z80_STORE_BACK_VIA_HL bra Z80_common_SLA_VIA } diff --git a/src/zvm_m65/Z80_instr_shftrot_SLL.s b/src/zvm_m65/Z80_instr_shftrot_SLL.s index a93d9e78..8be6b621 100644 --- a/src/zvm_m65/Z80_instr_shftrot_SLL.s +++ b/src/zvm_m65/Z80_instr_shftrot_SLL.s @@ -15,11 +15,11 @@ !macro Z80_SLL_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL sec rol - sta [REG_HL],z + +Z80_STORE_BACK_VIA_HL bra Z80_common_SLL_VIA } diff --git a/src/zvm_m65/Z80_instr_shftrot_SRA.s b/src/zvm_m65/Z80_instr_shftrot_SRA.s index a36781e7..5c0722d4 100644 --- a/src/zvm_m65/Z80_instr_shftrot_SRA.s +++ b/src/zvm_m65/Z80_instr_shftrot_SRA.s @@ -18,7 +18,7 @@ !macro Z80_SRA_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL tax ror @@ -26,7 +26,7 @@ ror - sta [REG_HL],z + +Z80_STORE_BACK_VIA_HL bra Z80_common_SRA_VIA } diff --git a/src/zvm_m65/Z80_instr_shftrot_SRL.s b/src/zvm_m65/Z80_instr_shftrot_SRL.s index 514ea3c3..12e748b4 100644 --- a/src/zvm_m65/Z80_instr_shftrot_SRL.s +++ b/src/zvm_m65/Z80_instr_shftrot_SRL.s @@ -15,11 +15,11 @@ !macro Z80_SRL_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL clc ror - sta [REG_HL],z + +Z80_STORE_BACK_VIA_HL bra Z80_common_SRL_VIA } diff --git a/src/zvm_m65/z80_instr_bit.s b/src/zvm_m65/z80_instr_bit.s index 5cdfb9b1..3c939fd4 100644 --- a/src/zvm_m65/z80_instr_bit.s +++ b/src/zvm_m65/z80_instr_bit.s @@ -360,56 +360,56 @@ Z80_common_bit7_1: Z80_instr_CB_46: ; BIT 0,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%00000001 bne Z80_common_bitHL_1 bra Z80_common_bitHL_0 Z80_instr_CB_4E: ; BIT 1,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%00000010 bne Z80_common_bitHL_1 bra Z80_common_bitHL_0 Z80_instr_CB_56: ; BIT 2,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%00000100 bne Z80_common_bitHL_1 bra Z80_common_bitHL_0 Z80_instr_CB_5E: ; BIT 3,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%00001000 bne Z80_common_bitHL_1 bra Z80_common_bitHL_0 Z80_instr_CB_66: ; BIT 4,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%00010000 bne Z80_common_bitHL_1 bra Z80_common_bitHL_0 Z80_instr_CB_6E: ; BIT 5,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%00100000 bne Z80_common_bitHL_1 bra Z80_common_bitHL_0 Z80_instr_CB_76: ; BIT 6,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%01000000 bne Z80_common_bitHL_1 bra Z80_common_bitHL_0 Z80_instr_CB_7E: ; BIT 7,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%10000000 beq Z80_common_bitHL_0 @@ -872,49 +872,49 @@ Z80_instr_CB_FF: ; SET 7,A Z80_instr_CB_C6: ; SET 0,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL ora #%00000001 jmp ZVM_store_via_HL_next Z80_instr_CB_CE: ; SET 1,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL ora #%00000010 jmp ZVM_store_via_HL_next Z80_instr_CB_D6: ; SET 2,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL ora #%00000100 jmp ZVM_store_via_HL_next Z80_instr_CB_DE: ; SET 3,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL ora #%00001000 jmp ZVM_store_via_HL_next Z80_instr_CB_E6: ; SET 4,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL ora #%00010000 jmp ZVM_store_via_HL_next Z80_instr_CB_EE: ; SET 5,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL ora #%00100000 jmp ZVM_store_via_HL_next Z80_instr_CB_F6: ; SET 6,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL ora #%01000000 jmp ZVM_store_via_HL_next Z80_instr_CB_FE: ; SET 7,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL ora #%10000000 jmp ZVM_store_via_HL_next @@ -1256,49 +1256,49 @@ Z80_instr_CB_BF: ; RES 7,A Z80_instr_CB_86: ; RES 0,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%11111110 jmp ZVM_store_via_HL_next Z80_instr_CB_8E: ; RES 1,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%11111101 jmp ZVM_store_via_HL_next Z80_instr_CB_96: ; RES 2,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%11111011 jmp ZVM_store_via_HL_next Z80_instr_CB_9E: ; RES 3,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%11110111 jmp ZVM_store_via_HL_next Z80_instr_CB_A6: ; RES 4,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%11101111 jmp ZVM_store_via_HL_next Z80_instr_CB_AE: ; RES 5,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%11011111 jmp ZVM_store_via_HL_next Z80_instr_CB_B6: ; RES 6,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%10111111 jmp ZVM_store_via_HL_next Z80_instr_CB_BE: ; RES 7,(HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL and #%01111111 jmp ZVM_store_via_HL_next diff --git a/src/zvm_m65/z80_instr_block.s b/src/zvm_m65/z80_instr_block.s index a0e3274e..49e2733f 100644 --- a/src/zvm_m65/z80_instr_block.s +++ b/src/zvm_m65/z80_instr_block.s @@ -10,8 +10,8 @@ Z80_instr_ED_A0: ; LDI and #($FF - Z80_HF - Z80_PF - Z80_NF) sta REG_F - jsr (VEC_fetch_via_HL) - jsr (VEC_store_via_DE) + +Z80_FETCH_VIA_HL + +Z80_STORE_VIA_DE inw REG_HL inw REG_DE @@ -27,8 +27,8 @@ Z80_instr_ED_B0: ; LDIR and #($FF - Z80_HF - Z80_PF - Z80_NF) sta REG_F @1: - jsr (VEC_fetch_via_HL) - jsr (VEC_store_via_DE) + +Z80_FETCH_VIA_HL + +Z80_STORE_VIA_DE inw REG_HL inw REG_DE @@ -43,8 +43,8 @@ Z80_instr_ED_A8: ; LDD and #($FF - Z80_HF - Z80_PF - Z80_NF) sta REG_F - jsr (VEC_fetch_via_HL) - jsr (VEC_store_via_DE) + +Z80_FETCH_VIA_HL + +Z80_STORE_VIA_DE dew REG_HL dew REG_DE @@ -60,8 +60,8 @@ Z80_instr_ED_B8: ; LDDR and #($FF - Z80_HF - Z80_PF - Z80_NF) sta REG_F @1: - jsr (VEC_fetch_via_HL) - jsr (VEC_store_via_DE) + +Z80_FETCH_VIA_HL + +Z80_STORE_VIA_DE dew REG_HL dew REG_DE diff --git a/src/zvm_m65/z80_instr_call_return.s b/src/zvm_m65/z80_instr_call_return.s index 63f3c836..620d22d8 100644 --- a/src/zvm_m65/z80_instr_call_return.s +++ b/src/zvm_m65/z80_instr_call_return.s @@ -6,19 +6,19 @@ Z80_instr_CD: ; CALL nn - jsr (VEC_fetch_via_PC_inc) - pha - jsr (VEC_fetch_via_PC_inc) - pha + +Z80_FETCH_VIA_PC_INC + tax + +Z80_FETCH_VIA_PC_INC + tay lda REG_PC+1 - jsr (VEC_store_stack) + +Z80_STORE_STACK lda REG_PC+0 - jsr (VEC_store_stack) + +Z80_STORE_STACK - pla + tya sta REG_PC+1 - pla + txa sta REG_PC+0 jmp ZVM_next @@ -92,9 +92,9 @@ Z80_illeg_ED_7D: ; RETN Z80_instr_ED_4D: ; RETTI Z80_instr_C9: ; RET - jsr (VEC_fetch_stack) + +Z80_FETCH_STACK sta REG_PC+0 - jsr (VEC_fetch_stack) + +Z80_FETCH_STACK sta REG_PC+1 jmp ZVM_next @@ -142,9 +142,9 @@ Z80_instr_F8: ; RET M !macro Z80_RST .P { lda REG_PC+1 - jsr (VEC_store_stack) + +Z80_STORE_STACK lda REG_PC+0 - jsr (VEC_store_stack) + +Z80_STORE_STACK lda #$00 sta REG_PC+1 lda #.P diff --git a/src/zvm_m65/z80_instr_io.s b/src/zvm_m65/z80_instr_io.s index d1ed76b2..eb407124 100644 --- a/src/zvm_m65/z80_instr_io.s +++ b/src/zvm_m65/z80_instr_io.s @@ -8,7 +8,7 @@ Z80_instr_DB: ; IN A,(n) - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC sta ADDR_IO+0 lda REG_A sta ADDR_IO+1 @@ -56,7 +56,7 @@ Z80_illeg_ED_70: +Z80_IN_NULL ; Z80_instr_D3: ; OUT (n),A - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC sta ADDR_IO+0 lda REG_A sta ADDR_IO+1 diff --git a/src/zvm_m65/z80_instr_jump.s b/src/zvm_m65/z80_instr_jump.s index f6e6f009..47729310 100644 --- a/src/zvm_m65/z80_instr_jump.s +++ b/src/zvm_m65/z80_instr_jump.s @@ -6,9 +6,9 @@ Z80_instr_C3: ; JP nn - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC sta REG_PC+0 - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC sta REG_PC+1 jmp ZVM_next @@ -102,7 +102,7 @@ Z80_instr_18: ; JR e @1: rmb7 REG_PC+0 @2: - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC tax lda z80_otable_displacement,x clc diff --git a/src/zvm_m65/z80_instr_load_16bit.s b/src/zvm_m65/z80_instr_load_16bit.s index d4560f11..e7fb9dbb 100644 --- a/src/zvm_m65/z80_instr_load_16bit.s +++ b/src/zvm_m65/z80_instr_load_16bit.s @@ -5,9 +5,9 @@ !macro Z80_LD_REGnn_nn .REGnn { - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC sta .REGnn+0 - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC sta .REGnn+1 jmp ZVM_next } @@ -65,9 +65,9 @@ Z80_instr_ED_7B: +Z80_LD_REGnn_VIA_nn REG_SP ; !macro Z80_PUSH_REGnn .REGnn { lda .REGnn+1 - jsr (VEC_store_stack) + +Z80_STORE_STACK lda .REGnn+0 - jsr (VEC_store_stack) + +Z80_STORE_STACK jmp ZVM_next } @@ -79,9 +79,9 @@ Z80_instr_DD_E5: +Z80_PUSH_REGnn REG_IX ; Z80_instr_FD_E5: +Z80_PUSH_REGnn REG_IY ; PUSH IY !macro Z80_POP_REGnn .REGnn { - jsr (VEC_fetch_stack) + +Z80_FETCH_STACK sta .REGnn+0 - jsr (VEC_fetch_stack) + +Z80_FETCH_STACK lda .REGnn+1 jmp ZVM_next } diff --git a/src/zvm_m65/z80_instr_load_8bit.s b/src/zvm_m65/z80_instr_load_8bit.s index 90e640d4..08c42fbc 100644 --- a/src/zvm_m65/z80_instr_load_8bit.s +++ b/src/zvm_m65/z80_instr_load_8bit.s @@ -110,7 +110,7 @@ Z80_illeg_FD_6C: +Z80_LD_REGn_REGn REG_IYL, REG_IYH ; Z80_illeg_FD_6F: +Z80_LD_REGn_REGn REG_IYL, REG_A ; LD IYL,A !macro Z80_LD_REGn_n .REGn { - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC sta .REGn jmp ZVM_next } @@ -129,7 +129,7 @@ Z80_illeg_FD_26: +Z80_LD_REGn_n REG_IYH ; Z80_illeg_FD_2E: +Z80_LD_REGn_n REG_IYL ; LD IYL,n !macro Z80_LD_REGn_VIA_HL .REGn { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL sta .REGn jmp ZVM_next } @@ -144,7 +144,7 @@ Z80_instr_7E: +Z80_LD_REGn_VIA_HL REG_A ; !macro Z80_LD_VIA_HL_REGn .REGn { lda .REGn - jsr (VEC_store_via_HL) + +Z80_STORE_VIA_HL jmp ZVM_next } @@ -159,24 +159,24 @@ Z80_instr_77: +Z80_LD_VIA_HL_REGn REG_A ; Z80_instr_02: ; LD (BC),A lda REG_A - jsr (VEC_store_via_BC) + +Z80_STORE_VIA_BC jmp ZVM_next Z80_instr_0A: ; LD A,(BC) - jsr (VEC_fetch_via_BC) + +Z80_FETCH_VIA_BC sta REG_A jmp ZVM_next Z80_instr_12: ; LD (DE),A lda REG_A - jsr (VEC_store_via_DE) + +Z80_STORE_VIA_DE jmp ZVM_next Z80_instr_1A: ; LD A,(DE) - jsr (VEC_fetch_via_DE) + +Z80_FETCH_VIA_DE sta REG_A jmp ZVM_next @@ -250,8 +250,8 @@ Z80_instr_FD_77: +Z80_LD_VIA_IY_d_REG_n REG_A ; Z80_instr_36: ; LD (HL),n - jsr (VEC_fetch_via_PC_inc) - jsr (VEC_store_via_HL) + +Z80_FETCH_VIA_PC_INC + +Z80_STORE_VIA_HL jmp ZVM_next Z80_instr_ED_57: ; LD A,I diff --git a/src/zvm_m65/z80_instr_math_8bit.s b/src/zvm_m65/z80_instr_math_8bit.s index aed06ac6..a7a11f09 100644 --- a/src/zvm_m65/z80_instr_math_8bit.s +++ b/src/zvm_m65/z80_instr_math_8bit.s @@ -8,12 +8,12 @@ !macro Z80_ADD_n { - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC bra Z80_common_add } !macro Z80_ADC_n { - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC bbs0 REG_F,Z80_common_adc jmp Z80_common_add } @@ -30,12 +30,12 @@ } !macro Z80_ADD_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL bra Z80_common_add } !macro Z80_ADC_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL bbs0 REG_F,Z80_common_adc jmp Z80_common_add } @@ -167,12 +167,12 @@ Z80_common_adc: jmp ZVM_next !macro Z80_SUB_n { - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC bra Z80_common_sub } !macro Z80_SBC_n { - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC bbs0 REG_F,Z80_common_sbc jmp Z80_common_sub } @@ -189,12 +189,12 @@ Z80_common_adc: } !macro Z80_SUB_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL bra Z80_common_sub } !macro Z80_SBC_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL bbs0 REG_F,Z80_common_sbc jmp Z80_common_sub } @@ -326,7 +326,7 @@ Z80_common_sbc: jmp ZVM_next !macro Z80_CP_n { - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC bra Z80_common_cp } @@ -336,7 +336,7 @@ Z80_common_sbc: } !macro Z80_CP_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL bra Z80_common_cp } @@ -426,12 +426,12 @@ Z80_common_cp: } !macro Z80_AND_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL +Z80_AND_common } !macro Z80_AND_n { - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC +Z80_AND_common } @@ -486,12 +486,12 @@ Z80_instr_FD_A6: +Z80_AND_VIA_IY_d ; } !macro Z80_OR_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL +Z80_OR_common } !macro Z80_OR_n { - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC +Z80_OR_common } @@ -543,12 +543,12 @@ Z80_instr_FD_B6: +Z80_OR_VIA_IY_d ; } !macro Z80_XOR_VIA_HL { - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL +Z80_XOR_common } !macro Z80_XOR_n { - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC +Z80_XOR_common } @@ -612,10 +612,10 @@ Z80_common_INC: Z80_instr_34: ; INC (HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL tax inc - sta [REG_HL],z + +Z80_STORE_BACK_VIA_HL bra Z80_common_INC Z80_instr_DD_34: ; INC (IX+d) @@ -668,10 +668,10 @@ Z80_common_DEC: Z80_instr_35: ; DEC (HL) - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL tax dec - sta [REG_HL],z + +Z80_STORE_BACK_VIA_HL bra Z80_common_DEC Z80_instr_DD_35: ; DEC (IX+d) diff --git a/src/zvm_m65/z80_instr_rotate_shift.s b/src/zvm_m65/z80_instr_rotate_shift.s index b38219c4..d1233f9a 100644 --- a/src/zvm_m65/z80_instr_rotate_shift.s +++ b/src/zvm_m65/z80_instr_rotate_shift.s @@ -8,7 +8,7 @@ Z80_instr_ED_67: ; RRD - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL sta REG_TMP1 lda REG_A @@ -47,7 +47,7 @@ Z80_instr_ED_67: ; RRD Z80_instr_ED_6F: ; RLD - jsr (VEC_fetch_via_HL) + +Z80_FETCH_VIA_HL sta REG_TMP1 lda REG_A diff --git a/src/zvm_m65/z80_table_gen.s b/src/zvm_m65/z80_table_gen.s index 989825ea..5bce535d 100644 --- a/src/zvm_m65/z80_table_gen.s +++ b/src/zvm_m65/z80_table_gen.s @@ -9,35 +9,13 @@ z80_table_gen: !pet $0D, "Generating CPU tables... " !byte 0 - ; - ; Generating: z80_atable_bank0 - ; Dependencies: NONE - ; Destroys: NONE - ; - - ldx #$00 - -@loop_atable_bank0: - - lda #$04 ; $0000-$DFFF maps to $40000-$4DFFF (bank 0 RAM) - cpx #$E0 - bcc @loop_atable_bank0_gotit - inc ; $E000-$FFFF maps to $5E000-$5FFFF (common RAM) - -@loop_atable_bank0_gotit: - - sta z80_atable_bank0, x - - inx - bne @loop_atable_bank0 - ; ; Generating: XXX ; Dependencies: NONE ; Destroys: NONE ; - ; XXX add more tables here + ; XXX add table generators ; ; The END diff --git a/src/zvm_m65/zvm_banking.s b/src/zvm_m65/zvm_banking.s index c6c90590..196b0738 100644 --- a/src/zvm_m65/zvm_banking.s +++ b/src/zvm_m65/zvm_banking.s @@ -3,23 +3,6 @@ ; Z80 Virtual Machine banking support ; - -ZVM_bank0_vectab: - - !word ZVM_bank0_fetch_via_PC_inc - !word ZVM_bank0_fetch_stack - !word ZVM_bank0_store_stack - - ; XXX add remaining routines here - -ZVM_bank1_vectab: - - !word ZVM_bank1_fetch_via_PC_inc - !word ZVM_bank1_fetch_stack - !word ZVM_bank1_store_stack - - ; XXX add remaining routines here - ; ; Bank switching routines ; @@ -29,22 +12,24 @@ ZVM_set_bank_0: lda #$00 sta BANK_ID - ; XXX use DMAgic to switch banks (vectors on zeropage) + ; XXX use DMAgic to copy common memory - rts + lda #$04 + bra ZVM_set_bank_common ZVM_set_bank_1: lda #$01 sta BANK_ID - ; XXX use DMAgic to switch banks (vectors on zeropage) - - ; Since all the Z80 bank 1 memory is located in $0005:$xxxx, - ; we can set bytes in certain pointers for faster execution + ; XXX use DMAgic to copy common memory lda #$05 + ; FALLTROUGH + +ZVM_set_bank_common: + sta REG_BC_EXT sta REG_DE_EXT sta REG_HL_EXT @@ -55,77 +40,3 @@ ZVM_set_bank_1: sta PTR_DATA+2 rts - -; -; Memory access routines -; - -ZVM_bank0_fetch_via_PC_inc: - - ldy REG_PC+1 - lda z80_atable_bank0,y - sta REG_PC_EXT+0 - - ; FALLTROUGH - -ZVM_bank1_fetch_via_PC_inc: - - lda [REG_PC], z - inw REG_PC - - rts - -ZVM_bank0_fetch_stack: - - ldy REG_SP+1 - lda z80_atable_bank0,y - sta REG_PC_EXT - - ; FALLTROUGH - -ZVM_bank1_fetch_stack: - - lda [REG_SP], z - inw REG_SP - - rts - -ZVM_bank0_store_stack: - - dew REG_SP - - ldy REG_SP+1 - ldx z80_atable_bank0,y - stx REG_SP_EXT - - sta [PTR_DATA], z - - rts - -ZVM_bank1_store_stack: - - dew REG_SP - sta [REG_SP], z - - rts - - - - - - -; XXX cleanup code below - - - -ZVM_fetch_IO: - - ; XXX fetch addresses via ADDR_IO - but which ones are safe? Should we have a whitelist? - lda #$00 - sta REG_A - rts - -ZVM_store_IO: - - ; XXX again, we should have a whitelist of addresses - rts diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/zvm_core.s index c9d6ef58..15827c2b 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/zvm_core.s @@ -72,7 +72,7 @@ ZVM_entry: ZVM_store_via_HL_next: - sta [REG_HL],z + +Z80_STORE_BACK_VIA_HL ; FALLTROUGH @@ -80,7 +80,7 @@ ZVM_store_via_HL_next: ; Fetch and execute next opcode - jsr (VEC_fetch_via_PC_inc) + +Z80_FETCH_VIA_PC_INC asl tax bcs @1 @@ -155,22 +155,19 @@ Z80_instr_FD: +ZVM_DISPATCH Z80_vectab_FD_0, Z80_vectab_FD_1 ; +; XXX cleanup code below +ZVM_fetch_IO: + ; XXX fetch addresses via ADDR_IO - but which ones are safe? Should we have a whitelist? + lda #$00 + sta REG_A + rts +ZVM_store_IO: - - - - - - - - - - - - + ; XXX again, we should have a whitelist of addresses + rts From c04f3bc1ffb4e7238d57e2b9ce9649a0db13a66b Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 2 Jan 2021 23:40:06 +0100 Subject: [PATCH 110/257] some more Z80 work --- src/zvm_m65/,aliases_zvm.s | 33 +-- src/zvm_m65/2000.zvm_vectable.s | 2 +- src/zvm_m65/{zvm_core.s => z80_dispatch.s} | 240 +++--------------- ...tr_shftrot_RL.s => z80_instr_shftrot_RL.s} | 0 ..._shftrot_RLC.s => z80_instr_shftrot_RLC.s} | 0 ...tr_shftrot_RR.s => z80_instr_shftrot_RR.s} | 0 ..._shftrot_RRC.s => z80_instr_shftrot_RRC.s} | 0 ..._shftrot_SLA.s => z80_instr_shftrot_SLA.s} | 0 ..._shftrot_SLL.s => z80_instr_shftrot_SLL.s} | 0 ..._shftrot_SRA.s => z80_instr_shftrot_SRA.s} | 0 ..._shftrot_SRL.s => z80_instr_shftrot_SRL.s} | 0 src/zvm_m65/zvm.s | 156 ++++++++++++ src/zvm_m65/zvm_io.s | 20 ++ 13 files changed, 232 insertions(+), 219 deletions(-) rename src/zvm_m65/{zvm_core.s => z80_dispatch.s} (51%) rename src/zvm_m65/{Z80_instr_shftrot_RL.s => z80_instr_shftrot_RL.s} (100%) rename src/zvm_m65/{Z80_instr_shftrot_RLC.s => z80_instr_shftrot_RLC.s} (100%) rename src/zvm_m65/{Z80_instr_shftrot_RR.s => z80_instr_shftrot_RR.s} (100%) rename src/zvm_m65/{Z80_instr_shftrot_RRC.s => z80_instr_shftrot_RRC.s} (100%) rename src/zvm_m65/{Z80_instr_shftrot_SLA.s => z80_instr_shftrot_SLA.s} (100%) rename src/zvm_m65/{Z80_instr_shftrot_SLL.s => z80_instr_shftrot_SLL.s} (100%) rename src/zvm_m65/{Z80_instr_shftrot_SRA.s => z80_instr_shftrot_SRA.s} (100%) rename src/zvm_m65/{Z80_instr_shftrot_SRL.s => z80_instr_shftrot_SRL.s} (100%) create mode 100644 src/zvm_m65/zvm.s create mode 100644 src/zvm_m65/zvm_io.s diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index 101510df..4cd0547b 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -52,30 +52,31 @@ !addr REG_R7 = $27 ; 1 byte - refresh counter, bit 7 (bits 0-6 are garbage) !addr REG_I = $28 ; 1 byte - interrupt vector base -!addr z80_cpustate__end = $28 +!addr BANK_ID = $29 ; 1 byte - currently selected memory bank -!addr BANK_ID = $29 ; 1 byte - currently selected bank - -; -; BIOS vectors -; - -!addr VEC_MOVE_fetch = $2A ; 2 bytes - vector to byte fetch routine, for BIOS routine MOVE -!addr VEC_MOVE_store = $2C ; 2 bytes - vector to byte store routine, for BIOS routine MOVE -!addr VEC_DISKIO_store = $2E ; 2 bytes - vector to byte store routine, for BIOS disk I/O operations +!addr z80_cpustate__end = $29 ; ; Z80 emulation temporary area ; -!addr PTR_IXY_d = $30 ; 4 bytes - calculated address IX+d / IY+d XXX - review usage !!! -!addr PTR_DATA = $34 ; 4 bytes - calculated data source address XXX - review usage !!! also check functions using ZVM_store_next -!addr ADDR_IO = $38 ; 4 bytes - address for fetching/storing the IO +!addr PTR_IXY_d = $2A ; 4 bytes - calculated address IX+d / IY+d +!addr PTR_DATA = $2E ; 4 bytes - calculated data source address +!addr ADDR_IO = $32 ; 2 bytes - address for fetching/storing the IO -!addr REG_TMP1 = $3C ; 1 byte - emulation-specific temporary storage -!addr REG_TMP2 = $3D ; 1 byte - emulation-specific temporary storage +!addr REG_TMP1 = $34 ; 1 byte - emulation-specific temporary storage +!addr REG_TMP2 = $35 ; 1 byte - emulation-specific temporary storage -; $3E ; 2 bytes - reserved +; $36 ; for now free till $3F (inclusive) + +; +; BIOS data +; + +!addr VEC_MOVE_fetch = $40 ; 2 bytes - vector to byte fetch routine, for BIOS routine MOVE +!addr VEC_MOVE_store = $42 ; 2 bytes - vector to byte store routine, for BIOS routine MOVE +!addr VEC_DISKIO_store = $44 ; 2 bytes - vector to byte store routine, for BIOS disk I/O operations + ; ; Constant/macros definitions diff --git a/src/zvm_m65/2000.zvm_vectable.s b/src/zvm_m65/2000.zvm_vectable.s index dffd5274..1c8e73aa 100644 --- a/src/zvm_m65/2000.zvm_vectable.s +++ b/src/zvm_m65/2000.zvm_vectable.s @@ -4,7 +4,7 @@ ; -!word ZVM_entry +!word ZVM ; entry point ; diff --git a/src/zvm_m65/zvm_core.s b/src/zvm_m65/z80_dispatch.s similarity index 51% rename from src/zvm_m65/zvm_core.s rename to src/zvm_m65/z80_dispatch.s index 15827c2b..ee6baebf 100644 --- a/src/zvm_m65/zvm_core.s +++ b/src/zvm_m65/z80_dispatch.s @@ -1,81 +1,8 @@ ; -; Z80 Virtual Machine core routines +; Z80 instruction dispatchers ; -ZVM_entry: - - ; Reset stack pointer, set .Z to 0 - this routine will never return - - ldx #$FF - txs - ldz #$00 - - ; Skip the IRQ processing, even if Kernal reenables it - - sei - lda #return_from_interrupt - sta CINV+1 - - ; Make sure $C000-$CFFF ROM is mapped-in, we keep our proxies there - ; Also make sure the palette is taken from RAM - - lda VIC_CTRLA - ora #%00100100 - sta VIC_CTRLA - - ; Setup colours to ressemble vintage green monitor from the 70s, print welcome message - - lda #$00 - sta VIC_EXTCOL - sta VIC_BGCOL0 - sta PALETTE_R+0 - sta PALETTE_G+0 - sta PALETTE_B+0 - - lda #$01 - sta PALETTE_R+5 - lda #$47 - sta PALETTE_G+5 - lda #$02 - sta PALETTE_B+5 - - jsr PRIMM - !byte KEY_GREEN, KEY_ESC, 'o', KEY_CLR, KEY_C65_SHIFT_ON, KEY_TXT, KEY_C65_SHIFT_OFF - !pet "Open ROMs MEGA65 BIOS for CP/M", $0D - !pet "Zilog Z80 to 45GS02 translator", $0D - !byte $0D,$0D - !byte 0 - - ; Check if extended memory is present - - jsr ZVM_memtest - - ; Initialize constants XXX consider moving this to a dedicated reset CPU routine - - lda #$00 ; all the Z80 memory is located below $0100:$0000 - sta PTR_DATA+3 - sta PTR_IXY_d+3 - - ; Generate CPU tables - - jsr z80_table_gen - - ; XXX code is not ready to progress further - jsr PRIMM - !pet $0D, "Implementation not finished yet.", 0 - jmp ZVM_halt - - jmp zvm_BIOS_00_BOOT - -ZVM_store_via_HL_next: - - +Z80_STORE_BACK_VIA_HL - - ; FALLTROUGH - !macro ZVM_DISPATCH .TAB_LO, .TAB_HI { ; Fetch and execute next opcode @@ -89,19 +16,25 @@ ZVM_store_via_HL_next: } +ZVM_store_via_HL_next: + + +Z80_STORE_BACK_VIA_HL + + ; FALLTROUGH + ; unsupported illegal instructions Z80_unsupported: ; XXX add a separate handler to warn about illegal instructions ; block I/O transfer - not implemented for now XXX implement them -Z80_instr_ED_A2: ; INI -Z80_instr_ED_B2: ; INIR -Z80_instr_ED_AA: ; IND -Z80_instr_ED_BA: ; INDR -Z80_instr_ED_A3: ; OUTI -Z80_instr_ED_B3: ; OTIR -Z80_instr_ED_AB: ; OUTD -Z80_instr_ED_BB: ; OTDR +Z80_instr_ED_A2: ; INI +Z80_instr_ED_B2: ; INIR +Z80_instr_ED_AA: ; IND +Z80_instr_ED_BA: ; INDR +Z80_instr_ED_A3: ; OUTI +Z80_instr_ED_B3: ; OTIR +Z80_instr_ED_AB: ; OUTD +Z80_instr_ED_BB: ; OTDR ; XXX add a separate handler to warn about them ; LD instructions with no effect Z80_instr_40: ; LD B,B @@ -137,129 +70,32 @@ Z80_instr_ED: +ZVM_DISPATCH Z80_vectab_ED_0, Z80_vectab_ED_1 ; Z80_instr_FD: +ZVM_DISPATCH Z80_vectab_FD_0, Z80_vectab_FD_1 ; #FD +!macro ZVM_DISPATCH_REG_IXY .REG_nn { + ; XXX is the displacement calculated correctly? -; XXX addition and subtraction are slow; pre-calculate data/flag tables in the extended 8MB RAM -; XXX use TRB/TSB instead of LDA + AND/ORA + STA when applicable -; XXX all dispatch routines shall have separate versions for bank 0/1 + ; Fetch value from IX/IY, subtract 128 - - - - - - - - - - - - -; XXX cleanup code below - -ZVM_fetch_IO: - - ; XXX fetch addresses via ADDR_IO - but which ones are safe? Should we have a whitelist? - lda #$00 - sta REG_A - rts - -ZVM_store_IO: - - ; XXX again, we should have a whitelist of addresses - rts - - - - - - - - - - - - - - - - - - - - - - -; -; Not implemented yet - XXX implement them! -; - - -Z80_instr_DD_CB: ; #DDCB -Z80_instr_FD_CB: ; #FDCB -Z80_instr_ED_A1: ; CPI -Z80_instr_ED_A9: ; CPD -Z80_instr_ED_B1: ; CPIR -Z80_instr_ED_B9: ; CPDR - - - - - jmp ZVM_next ; XXX provide implementation - - - - - -ZVM_memtest: - - ; Simple memory test - ; XXX this test is temporary - - lda #$00 - sta PTR_DATA+0 - sta PTR_DATA+1 - sta PTR_DATA+2 - lda #$08 - sta PTR_DATA+3 - - ldx #$F0 + lda .REG_nn+1 + sta PTR_IXY_d+1 + lda .REG_nn+0 + bmi @1 + dec PTR_IXY_d+1 @1: - ldy #$00 + eor #%10000000 + sta PTR_IXY_d+0 + + +Z80_FETCH_VIA_PC_INC + tax + lda z80_otable_displacement,x + clc + adc REG_PC+0 + sta REG_PC+0 + bcc @2 + inc REG_PC+1 @2: - lda PTR_DATA+2 - eor #%01111111 - sta PTR_DATA+2 + +ZVM_DISPATCH Z80_vectab_xDCB_0, Z80_vectab_xDCB_1 +} - stx PTR_DATA+0 - eor PTR_DATA+0 - sta PTR_DATA+0 - - sty PTR_DATA+1 - tya - - sta [PTR_DATA], z - lda [PTR_DATA], z - cmp PTR_DATA+1 - bne ZVM_halt_memtest_failed - - iny - bne @2 - inx - bne @1 - - rts - -ZVM_halt_memtest_failed: - - jsr PRIMM - !pet $0D, "ATTIC RAM failure.", 0 - - ; FALLTROUGH - -ZVM_halt: - - jsr PRIMM - !pet " * System HALTED *", 0 -@1: - bra @1 +Z80_instr_DD_CB: +ZVM_DISPATCH_REG_IXY REG_IX ; #DDCB +Z80_instr_FD_CB: +ZVM_DISPATCH_REG_IXY REG_IY ; #FDCB diff --git a/src/zvm_m65/Z80_instr_shftrot_RL.s b/src/zvm_m65/z80_instr_shftrot_RL.s similarity index 100% rename from src/zvm_m65/Z80_instr_shftrot_RL.s rename to src/zvm_m65/z80_instr_shftrot_RL.s diff --git a/src/zvm_m65/Z80_instr_shftrot_RLC.s b/src/zvm_m65/z80_instr_shftrot_RLC.s similarity index 100% rename from src/zvm_m65/Z80_instr_shftrot_RLC.s rename to src/zvm_m65/z80_instr_shftrot_RLC.s diff --git a/src/zvm_m65/Z80_instr_shftrot_RR.s b/src/zvm_m65/z80_instr_shftrot_RR.s similarity index 100% rename from src/zvm_m65/Z80_instr_shftrot_RR.s rename to src/zvm_m65/z80_instr_shftrot_RR.s diff --git a/src/zvm_m65/Z80_instr_shftrot_RRC.s b/src/zvm_m65/z80_instr_shftrot_RRC.s similarity index 100% rename from src/zvm_m65/Z80_instr_shftrot_RRC.s rename to src/zvm_m65/z80_instr_shftrot_RRC.s diff --git a/src/zvm_m65/Z80_instr_shftrot_SLA.s b/src/zvm_m65/z80_instr_shftrot_SLA.s similarity index 100% rename from src/zvm_m65/Z80_instr_shftrot_SLA.s rename to src/zvm_m65/z80_instr_shftrot_SLA.s diff --git a/src/zvm_m65/Z80_instr_shftrot_SLL.s b/src/zvm_m65/z80_instr_shftrot_SLL.s similarity index 100% rename from src/zvm_m65/Z80_instr_shftrot_SLL.s rename to src/zvm_m65/z80_instr_shftrot_SLL.s diff --git a/src/zvm_m65/Z80_instr_shftrot_SRA.s b/src/zvm_m65/z80_instr_shftrot_SRA.s similarity index 100% rename from src/zvm_m65/Z80_instr_shftrot_SRA.s rename to src/zvm_m65/z80_instr_shftrot_SRA.s diff --git a/src/zvm_m65/Z80_instr_shftrot_SRL.s b/src/zvm_m65/z80_instr_shftrot_SRL.s similarity index 100% rename from src/zvm_m65/Z80_instr_shftrot_SRL.s rename to src/zvm_m65/z80_instr_shftrot_SRL.s diff --git a/src/zvm_m65/zvm.s b/src/zvm_m65/zvm.s new file mode 100644 index 00000000..7afac815 --- /dev/null +++ b/src/zvm_m65/zvm.s @@ -0,0 +1,156 @@ + +; +; Z80 Virtual Machine core routines +; + +ZVM: ; entry point + + ; Reset stack pointer, set .Z to 0 - this routine will never return + + ldx #$FF + txs + ldz #$00 + + ; Skip the IRQ processing, even if Kernal reenables it + + sei + lda #return_from_interrupt + sta CINV+1 + + ; Make sure $C000-$CFFF ROM is mapped-in, we keep our proxies there + ; Also make sure the palette is taken from RAM + + lda VIC_CTRLA + ora #%00100100 + sta VIC_CTRLA + + ; Setup colours to ressemble vintage green monitor from the 70s, print welcome message + + lda #$00 + sta VIC_EXTCOL + sta VIC_BGCOL0 + sta PALETTE_R+0 + sta PALETTE_G+0 + sta PALETTE_B+0 + + lda #$01 + sta PALETTE_R+5 + lda #$47 + sta PALETTE_G+5 + lda #$02 + sta PALETTE_B+5 + + jsr PRIMM + !byte KEY_GREEN, KEY_ESC, 'o', KEY_CLR, KEY_C65_SHIFT_ON, KEY_TXT, KEY_C65_SHIFT_OFF + !pet "Open ROMs MEGA65 BIOS for CP/M", $0D + !pet "Zilog Z80 to 45GS02 translator", $0D + !byte $0D,$0D + !byte 0 + + ; Check if extended memory is present + + jsr ZVM_memtest + + ; Generate CPU tables + + jsr z80_table_gen + + ; XXX code is not ready to progress further + jsr PRIMM + !pet $0D, "Implementation not finished yet.", 0 + jmp ZVM_halt + + jmp zvm_BIOS_00_BOOT + + + + +; XXX addition and subtraction are slow; pre-calculate data/flag tables in the extended 8MB RAM +; XXX use TRB/TSB instead of LDA + AND/ORA + STA when applicable + + + + + + + + + + + + + + + + + +; +; Not implemented yet - XXX implement them! +; + + +Z80_instr_ED_A1: ; CPI +Z80_instr_ED_A9: ; CPD +Z80_instr_ED_B1: ; CPIR +Z80_instr_ED_B9: ; CPDR + + jmp ZVM_next ; XXX provide implementation + + + + + +ZVM_memtest: + + ; Simple memory test + ; XXX this test is temporary + + lda #$00 + sta PTR_DATA+0 + sta PTR_DATA+1 + sta PTR_DATA+2 + lda #$08 + sta PTR_DATA+3 + + ldx #$F0 +@1: + ldy #$00 +@2: + lda PTR_DATA+2 + eor #%01111111 + sta PTR_DATA+2 + + stx PTR_DATA+0 + eor PTR_DATA+0 + sta PTR_DATA+0 + + sty PTR_DATA+1 + tya + + sta [PTR_DATA], z + lda [PTR_DATA], z + cmp PTR_DATA+1 + bne ZVM_halt_memtest_failed + + iny + bne @2 + inx + bne @1 + + rts + +ZVM_halt_memtest_failed: + + jsr PRIMM + !pet $0D, "ATTIC RAM failure.", 0 + + ; FALLTROUGH + +ZVM_halt: + + jsr PRIMM + !pet " * System HALTED *", 0 +@1: + bra @1 diff --git a/src/zvm_m65/zvm_io.s b/src/zvm_m65/zvm_io.s new file mode 100644 index 00000000..033f7c50 --- /dev/null +++ b/src/zvm_m65/zvm_io.s @@ -0,0 +1,20 @@ + +; +; Z80 Virtual Machine - I/O access +; + + +ZVM_fetch_IO: + + ; XXX fetch addresses via ADDR_IO - but which ones are safe? + ; should we have a whitelist? + + lda #$00 + sta REG_A + rts + +ZVM_store_IO: + + ; XXX again, we should have a whitelist of addresses + + rts From edf105af31fbfcd4cbfc0d9c2c465e5816371e18 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 3 Jan 2021 21:37:12 +0100 Subject: [PATCH 111/257] more Z80 work, two opcodes left to implement --- src/zvm_m65/z80_instr_block.s | 60 +++++++++++++++++++++++++++++++ src/zvm_m65/z80_instr_math_8bit.s | 2 +- src/zvm_m65/zvm.s | 18 ---------- 3 files changed, 61 insertions(+), 19 deletions(-) diff --git a/src/zvm_m65/z80_instr_block.s b/src/zvm_m65/z80_instr_block.s index 49e2733f..2028352c 100644 --- a/src/zvm_m65/z80_instr_block.s +++ b/src/zvm_m65/z80_instr_block.s @@ -69,3 +69,63 @@ Z80_instr_ED_B8: ; LDDR dew REG_BC bne @1 jmp ZVM_next + + +!macro Z80_common_CP_block { + + ; XXX provide precalculated tables in attic RAM to speed this up + + lda REG_F + and #Z80_CF + sta REG_F + +Z80_PUT_1_NF + + +Z80_FETCH_VIA_HL + sta REG_TMP1 + + and #$0F ; calculate half-carry flag + sta REG_TMP2 + lda REG_A + and #$0F + sec + sbc REG_TMP2 + and #$F0 + beq @1 + +Z80_PUT_1_HF +@1: + lda REG_A + sec + sbc REG_TMP1 + bpl @2 + +Z80_PUT_1_SF +@2: + bne @3 + +Z80_PUT_1_ZF +@3: + ; FALLTROUGH +} + +Z80_instr_ED_A1: ; CPI + + +Z80_common_CP_block + inw REG_HL + dew REG_BC + +beq ZVM_next + + +Z80_PUT_1_VF + jmp ZVM_next + +Z80_instr_ED_A9: ; CPD + + +Z80_common_CP_block + dew REG_HL + dew REG_BC + +beq ZVM_next + + +Z80_PUT_1_VF + jmp ZVM_next + +Z80_instr_ED_B1: ; CPIR +Z80_instr_ED_B9: ; CPDR + + jmp ZVM_next ; XXX provide implementation \ No newline at end of file diff --git a/src/zvm_m65/z80_instr_math_8bit.s b/src/zvm_m65/z80_instr_math_8bit.s index a7a11f09..dd27c6e1 100644 --- a/src/zvm_m65/z80_instr_math_8bit.s +++ b/src/zvm_m65/z80_instr_math_8bit.s @@ -387,7 +387,7 @@ Z80_common_cp: and #%00101000 ora z80_ftable_CP, x sta REG_F - bvs @V1: + bvs @V1 @V0: bcc @VxC1 @V0C0: diff --git a/src/zvm_m65/zvm.s b/src/zvm_m65/zvm.s index 7afac815..f1b95217 100644 --- a/src/zvm_m65/zvm.s +++ b/src/zvm_m65/zvm.s @@ -84,24 +84,6 @@ ZVM: ; entry point - - -; -; Not implemented yet - XXX implement them! -; - - -Z80_instr_ED_A1: ; CPI -Z80_instr_ED_A9: ; CPD -Z80_instr_ED_B1: ; CPIR -Z80_instr_ED_B9: ; CPDR - - jmp ZVM_next ; XXX provide implementation - - - - - ZVM_memtest: ; Simple memory test From c245272f469ab678373526ad6f5b0be06a2487c1 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 4 Jan 2021 18:27:10 +0100 Subject: [PATCH 112/257] implemented missing Z80 instructions --- src/zvm_m65/z80_instr_block.s | 34 +++++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/src/zvm_m65/z80_instr_block.s b/src/zvm_m65/z80_instr_block.s index 2028352c..c3147fea 100644 --- a/src/zvm_m65/z80_instr_block.s +++ b/src/zvm_m65/z80_instr_block.s @@ -126,6 +126,38 @@ Z80_instr_ED_A9: ; CPD jmp ZVM_next Z80_instr_ED_B1: ; CPIR + + +Z80_common_CP_block + inw REG_HL + dew REG_BC + beq Z80_common_CPIR_CPDR + + +Z80_FETCH_VIA_HL + cmp REG_A + bne Z80_instr_ED_B1 + + +Z80_PUT_1_VF + jmp ZVM_next + +Z80_common_CPIR_CPDR: + + +Z80_FETCH_VIA_HL + cmp REG_A + +bne ZVM_next + + +Z80_PUT_1_VF + jmp ZVM_next + Z80_instr_ED_B9: ; CPDR - jmp ZVM_next ; XXX provide implementation \ No newline at end of file + +Z80_common_CP_block + dew REG_HL + dew REG_BC + beq Z80_common_CPIR_CPDR + + +Z80_FETCH_VIA_HL + cmp REG_A + bne Z80_instr_ED_B9 + + +Z80_PUT_1_VF + jmp ZVM_next From 6e690127e8014cf726377976c56870fa79298af0 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 4 Jan 2021 18:49:51 +0100 Subject: [PATCH 113/257] implemented several Z80 addressing modes --- src/zvm_m65/,aliases_zvm.s | 61 +++++++++++++++++++++++++++--- src/zvm_m65/z80_instr_exchange.s | 12 +++--- src/zvm_m65/z80_instr_load_16bit.s | 10 ++--- src/zvm_m65/z80_instr_load_8bit.s | 6 +-- 4 files changed, 69 insertions(+), 20 deletions(-) diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index 4cd0547b..2cf8a4d1 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -173,15 +173,64 @@ sta [REG_HL], z } +!macro Z80_FETCH_VIA_nn { ; fetch to .A from ((PC)) + + lda [REG_PC], z + sta PTR_DATA+0 + inw REG_PC + lda [REG_PC], z + sta PTR_DATA+1 + inw REG_PC + + lda [PTR_DATA], z +} + +!macro Z80_STORE_VIA_nn { ; store .X to ((PC)) + + lda [REG_PC], z + sta PTR_DATA+0 + inw REG_PC + lda [REG_PC], z + sta PTR_DATA+1 + inw REG_PC + + txa + lda [PTR_DATA], z +} + +!macro Z80_FETCH_VIA_plus1 { ; fetch to .A from [PTR_DATA+1] + + inw PTR_DATA + lda [PTR_DATA], z +} + +!macro Z80_STORE_VIA_plus1 { ; store .A to [PTR_DATA+1] + + inw PTR_DATA + sta [PTR_DATA], z +} + +!macro Z80_XCHG_VIA_SP_lo { ; for exchange via stack only + + lda [REG_SP], z + tay + txa + sta [REG_SP], z +} + +!macro Z80_XCHG_VIA_SP_hi { ; for exchange via stack only + + inz + lda [REG_SP], z + tay + txa + sta [REG_SP], z + dez +} + ; XXX turn vectors below into macros !addr VEC_fetch_via_IX_d = $52 !addr VEC_fetch_via_IY_d = $54 !addr VEC_store_via_IX_d = $56 !addr VEC_store_via_IY_d = $58 -!addr VEC_fetch_via_nn = $5A -!addr VEC_store_via_nn = $5C -!addr VEC_fetch_via_plus1 = $5E -!addr VEC_store_via_plus1 = $60 ; XXX jump to next directly? -!addr VEC_xchng_stack_lo = $62 -!addr VEC_xchng_stack_hi = $64 diff --git a/src/zvm_m65/z80_instr_exchange.s b/src/zvm_m65/z80_instr_exchange.s index 0893f413..0471c1f5 100644 --- a/src/zvm_m65/z80_instr_exchange.s +++ b/src/zvm_m65/z80_instr_exchange.s @@ -67,12 +67,12 @@ Z80_instr_D9: ; EXX jmp ZVM_next !macro Z80_EX_VIA_SP_REGnn .REGnn { - lda .REGnn+0 - jsr (VEC_xchng_stack_lo) - sta .REGnn+0 - lda .REGnn+1 - jsr (VEC_xchng_stack_hi) - sta .REGnn+1 + ldx .REGnn+0 + +Z80_XCHG_VIA_SP_lo + sty .REGnn+0 + ldx .REGnn+1 + +Z80_XCHG_VIA_SP_hi + sty .REGnn+1 jmp ZVM_next } diff --git a/src/zvm_m65/z80_instr_load_16bit.s b/src/zvm_m65/z80_instr_load_16bit.s index e7fb9dbb..c7a6c335 100644 --- a/src/zvm_m65/z80_instr_load_16bit.s +++ b/src/zvm_m65/z80_instr_load_16bit.s @@ -32,10 +32,10 @@ Z80_instr_DD_F9: +Z80_LD_REGnn_REGnn REG_SP, REG_IX ; Z80_instr_FD_F9: +Z80_LD_REGnn_REGnn REG_SP, REG_IY ; LD SP,IY !macro Z80_LD_VIA_nn_REGnn .REGnn { - lda .REGnn+0 - jsr (VEC_store_via_nn) + ldx .REGnn+0 + +Z80_STORE_VIA_nn lda .REGnn+1 - jsr (VEC_store_via_plus1) + +Z80_STORE_VIA_plus1 jmp ZVM_next } @@ -48,9 +48,9 @@ Z80_instr_FD_22: +Z80_LD_VIA_nn_REGnn REG_IY ; Z80_instr_ED_73: +Z80_LD_VIA_nn_REGnn REG_SP ; LD (nn),SP !macro Z80_LD_REGnn_VIA_nn .REGnn { - jsr (VEC_fetch_via_nn) + +Z80_FETCH_VIA_nn sta .REGnn+0 - jsr (VEC_fetch_via_plus1) + +Z80_FETCH_VIA_plus1 sta .REGnn+1 jmp ZVM_next } diff --git a/src/zvm_m65/z80_instr_load_8bit.s b/src/zvm_m65/z80_instr_load_8bit.s index 08c42fbc..4cb82ffc 100644 --- a/src/zvm_m65/z80_instr_load_8bit.s +++ b/src/zvm_m65/z80_instr_load_8bit.s @@ -182,13 +182,13 @@ Z80_instr_1A: ; Z80_instr_32: ; LD (nn),A - lda REG_A - jsr (VEC_store_via_nn) + ldx REG_A + +Z80_STORE_VIA_nn jmp ZVM_next Z80_instr_3A: ; LD A,(nn) - jsr (VEC_fetch_via_nn) + +Z80_FETCH_VIA_nn sta REG_A jmp ZVM_next From 8a39aeb8c75215d001314a1d0b79b097cf80ca57 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 4 Jan 2021 23:14:17 +0100 Subject: [PATCH 114/257] implemented missing Z80 addressing modes --- src/zvm_m65/,aliases_zvm.s | 23 +++++-- src/zvm_m65/z80_index_regs.s | 107 ++++++++++++++++++++++++++++++ src/zvm_m65/z80_instr_load_8bit.s | 12 ++-- src/zvm_m65/z80_instr_math_8bit.s | 40 +++++------ 4 files changed, 151 insertions(+), 31 deletions(-) create mode 100644 src/zvm_m65/z80_index_regs.s diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index 2cf8a4d1..bf263170 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -228,9 +228,22 @@ dez } -; XXX turn vectors below into macros +!macro Z80_FETCH_VIA_IX_d { ; fetch to .A using IX and displacement -!addr VEC_fetch_via_IX_d = $52 -!addr VEC_fetch_via_IY_d = $54 -!addr VEC_store_via_IX_d = $56 -!addr VEC_store_via_IY_d = $58 + jsr Z80_common_fetch_via_IX_d +} + +!macro Z80_FETCH_VIA_IY_d { ; fetch to .A using IY and displacement + + jsr Z80_common_fetch_via_IY_d +} + +!macro Z80_STORE_VIA_IX_d { ; store .X using IX and displacement + + jsr Z80_common_store_via_IX_d +} + +!macro Z80_STORE_VIA_IY_d { ; store .X using IY and displacement + + jsr Z80_common_store_via_IY_d +} \ No newline at end of file diff --git a/src/zvm_m65/z80_index_regs.s b/src/zvm_m65/z80_index_regs.s new file mode 100644 index 00000000..8abfc417 --- /dev/null +++ b/src/zvm_m65/z80_index_regs.s @@ -0,0 +1,107 @@ + +; +; Z80 indez register helpers +; + +; XXX find a way to optimize them (inline? helper table?) + + +Z80_common_fetch_via_IX_d: + + lda REG_IX+1 + sta PTR_DATA+1 + lda REG_IX+0 + bmi @1 + dec PTR_DATA+1 +@1: + eor #%10000000 + sta PTR_DATA+0 + + +Z80_FETCH_VIA_PC_INC + tax + lda z80_otable_displacement,x + clc + adc PTR_DATA+0 + sta PTR_DATA+0 + bcc @2 + inc PTR_DATA+1 +@2: + lda [PTR_DATA], z + + rts + + +Z80_common_fetch_via_IY_d: + + lda REG_IY+1 + sta PTR_DATA+1 + lda REG_IY+0 + bmi @1 + dec PTR_DATA+1 +@1: + eor #%10000000 + sta PTR_DATA+0 + + +Z80_FETCH_VIA_PC_INC + tax + lda z80_otable_displacement,x + clc + adc PTR_DATA+0 + sta PTR_DATA+0 + bcc @2 + inc PTR_DATA+1 +@2: + lda [PTR_DATA], z + + rts + +Z80_common_store_via_IX_d: + + lda REG_IX+1 + sta PTR_DATA+1 + lda REG_IX+0 + bmi @1 + dec PTR_DATA+1 +@1: + eor #%10000000 + sta PTR_DATA+0 + + +Z80_FETCH_VIA_PC_INC + tax + lda z80_otable_displacement,x + clc + adc PTR_DATA+0 + sta PTR_DATA+0 + bcc @2 + inc PTR_DATA+1 +@2: + txa + sta [PTR_DATA], z + + rts + + +Z80_common_store_via_IY_d: + + lda REG_IY+1 + sta PTR_DATA+1 + lda REG_IY+0 + bmi @1 + dec PTR_DATA+1 +@1: + eor #%10000000 + sta PTR_DATA+0 + + +Z80_FETCH_VIA_PC_INC + tax + lda z80_otable_displacement,x + clc + adc PTR_DATA+0 + sta PTR_DATA+0 + bcc @2 + inc PTR_DATA+1 +@2: + txa + sta [PTR_DATA], z + + rts \ No newline at end of file diff --git a/src/zvm_m65/z80_instr_load_8bit.s b/src/zvm_m65/z80_instr_load_8bit.s index 4cb82ffc..712cae79 100644 --- a/src/zvm_m65/z80_instr_load_8bit.s +++ b/src/zvm_m65/z80_instr_load_8bit.s @@ -193,7 +193,7 @@ Z80_instr_3A: ; jmp ZVM_next !macro Z80_LD_REGn_VIA_IX_d .REGn { - jsr (VEC_fetch_via_IX_d) + +Z80_FETCH_VIA_IX_d sta .REGn jmp ZVM_next } @@ -207,7 +207,7 @@ Z80_instr_DD_6E: +Z80_LD_REGn_VIA_IX_d REG_L ; Z80_instr_DD_7E: +Z80_LD_REGn_VIA_IX_d REG_A ; LD A,(IX+d) !macro Z80_LD_REGn_VIA_IY_d .REGn { - jsr (VEC_fetch_via_IY_d) + +Z80_FETCH_VIA_IX_d sta .REGn jmp ZVM_next } @@ -221,8 +221,8 @@ Z80_instr_FD_6E: +Z80_LD_REGn_VIA_IY_d REG_L ; Z80_instr_FD_7E: +Z80_LD_REGn_VIA_IY_d REG_A ; LD A,(IY+d) !macro Z80_LD_VIA_IX_d_REG_n .REGn { - lda .REGn - jsr (VEC_store_via_IX_d) + ldx .REGn + +Z80_STORE_VIA_IX_d jmp ZVM_next } @@ -235,8 +235,8 @@ Z80_instr_DD_75: +Z80_LD_VIA_IX_d_REG_n REG_L ; Z80_instr_DD_77: +Z80_LD_VIA_IX_d_REG_n REG_A ; LD (IX+d),A !macro Z80_LD_VIA_IY_d_REG_n .REGn { - lda .REGn - jsr (VEC_store_via_IY_d) + ldx .REGn + +Z80_STORE_VIA_IY_d jmp ZVM_next } diff --git a/src/zvm_m65/z80_instr_math_8bit.s b/src/zvm_m65/z80_instr_math_8bit.s index dd27c6e1..05d0e0b2 100644 --- a/src/zvm_m65/z80_instr_math_8bit.s +++ b/src/zvm_m65/z80_instr_math_8bit.s @@ -41,23 +41,23 @@ } !macro Z80_ADD_VIA_IX_d { - jsr (VEC_fetch_via_IX_d) + +Z80_FETCH_VIA_IX_d bra Z80_common_add } !macro Z80_ADC_VIA_IX_d { - jsr (VEC_fetch_via_IX_d) + +Z80_FETCH_VIA_IX_d bbs0 REG_F,Z80_common_adc jmp Z80_common_add } !macro Z80_ADD_VIA_IY_d { - jsr (VEC_fetch_via_IY_d) + +Z80_FETCH_VIA_IY_d bra Z80_common_add } !macro Z80_ADC_VIA_IY_d { - jsr (VEC_fetch_via_IY_d) + +Z80_FETCH_VIA_IY_d bbs0 REG_F,Z80_common_adc jmp Z80_common_add } @@ -200,23 +200,23 @@ Z80_common_adc: } !macro Z80_SUB_VIA_IX_d { - jsr (VEC_fetch_via_IX_d) + +Z80_FETCH_VIA_IX_d bra Z80_common_sub } !macro Z80_SBC_VIA_IX_d { - jsr (VEC_fetch_via_IX_d) + +Z80_FETCH_VIA_IX_d bbs0 REG_F,Z80_common_sbc jmp Z80_common_sub } !macro Z80_SUB_VIA_IY_d { - jsr (VEC_fetch_via_IY_d) + +Z80_FETCH_VIA_IY_d bra Z80_common_sub } !macro Z80_SBC_VIA_IY_d { - jsr (VEC_fetch_via_IY_d) + +Z80_FETCH_VIA_IY_d bbs0 REG_F,Z80_common_sbc jmp Z80_common_sub } @@ -341,12 +341,12 @@ Z80_common_sbc: } !macro Z80_CP_VIA_IX_d { - jsr (VEC_fetch_via_IX_d) + +Z80_FETCH_VIA_IX_d bra Z80_common_cp } !macro Z80_CP_VIA_IY_d { - jsr (VEC_fetch_via_IY_d) + +Z80_FETCH_VIA_IY_d bra Z80_common_cp } @@ -436,12 +436,12 @@ Z80_common_cp: } !macro Z80_AND_VIA_IX_d { - jsr (VEC_fetch_via_IX_d) + +Z80_FETCH_VIA_IX_d +Z80_AND_common } !macro Z80_AND_VIA_IY_d { - jsr (VEC_fetch_via_IY_d) + +Z80_FETCH_VIA_IY_d +Z80_AND_common } @@ -496,12 +496,12 @@ Z80_instr_FD_A6: +Z80_AND_VIA_IY_d ; } !macro Z80_OR_VIA_IX_d { - jsr (VEC_fetch_via_IX_d) + +Z80_FETCH_VIA_IX_d +Z80_OR_common } !macro Z80_OR_VIA_IY_d { - jsr (VEC_fetch_via_IY_d) + +Z80_FETCH_VIA_IY_d +Z80_OR_common } @@ -553,12 +553,12 @@ Z80_instr_FD_B6: +Z80_OR_VIA_IY_d ; } !macro Z80_XOR_VIA_IX_d { - jsr (VEC_fetch_via_IX_d) + +Z80_FETCH_VIA_IX_d +Z80_XOR_common } !macro Z80_XOR_VIA_IY_d { - jsr (VEC_fetch_via_IY_d) + +Z80_FETCH_VIA_IY_d +Z80_XOR_common } @@ -620,7 +620,7 @@ Z80_instr_34: ; INC (HL) Z80_instr_DD_34: ; INC (IX+d) - jsr (VEC_fetch_via_IX_d) + +Z80_FETCH_VIA_IX_d tax inc sta [PTR_DATA],z @@ -628,7 +628,7 @@ Z80_instr_DD_34: ; INC (IX+d) Z80_instr_FD_34: ; INC (IY+d) - jsr (VEC_fetch_via_IY_d) + +Z80_FETCH_VIA_IY_d tax inc sta [PTR_DATA],z @@ -676,7 +676,7 @@ Z80_instr_35: ; DEC (HL) Z80_instr_DD_35: ; DEC (IX+d) - jsr (VEC_fetch_via_IX_d) + +Z80_FETCH_VIA_IX_d tax dec sta [PTR_DATA],z @@ -684,7 +684,7 @@ Z80_instr_DD_35: ; DEC (IX+d) Z80_instr_FD_35: ; DEC (IY+d) - jsr (VEC_fetch_via_IY_d) + +Z80_FETCH_VIA_IY_d tax dec sta [PTR_DATA],z From c0359b250e1a98801dd8acb597aa9dd792711f8a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 5 Jan 2021 23:09:32 +0100 Subject: [PATCH 115/257] monitor fix for 40 column mode --- src/mon_m65/bsmon.s | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 83085a87..fa98a146 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -580,13 +580,13 @@ Dump_Row: DEX BNE @loop + BBS7 MODE_80,@done ; in 40 columns, do not display chars + JSR PRIMM !byte $3a,$12,$00 ; : reverse on LDZ #0 LDX #2 ; 4 blocks in 80 columns - BBR7 MODE_80,@lchr - DEX ; 2 blocks in 40 columns @lchr LDA #KEY_LT_RED ; XXX replace color with bold attribute JSR Dump_4_Chars LDA #KEY_WHITE ; XXX replace color with bold attribute @@ -595,6 +595,7 @@ Dump_Row: BNE @lchr TZA JSR Add_LPC +@done PLZ RTS From e3656bf2739aafae3e64bc501248610eff740f70 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 5 Jan 2021 23:31:56 +0100 Subject: [PATCH 116/257] monitor integration bugfix --- src/mon_m65/bsmon.s | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index fa98a146..f76705f3 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -594,8 +594,8 @@ Dump_Row: DEX BNE @lchr TZA - JSR Add_LPC @done + JSR Add_LPC PLZ RTS From cf92df4acd5badc5822d08a93c6f4c0cccf865c7 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 8 Jan 2021 22:40:03 +0100 Subject: [PATCH 117/257] another monitor integration bugfix, added some debug code --- src/mon_m65/mon_debug.s | 105 ++++++++++++++++++++++++++++++++ src/mon_m65/mon_helper_memory.s | 11 ++-- 2 files changed, 111 insertions(+), 5 deletions(-) create mode 100644 src/mon_m65/mon_debug.s diff --git a/src/mon_m65/mon_debug.s b/src/mon_m65/mon_debug.s new file mode 100644 index 00000000..aa66c1e8 --- /dev/null +++ b/src/mon_m65/mon_debug.s @@ -0,0 +1,105 @@ + +; +; Helper code for debugging the monitor +; + +; XXX disable this code once the monitor integration is complete + + +DBG_print_long_pc: + + php + pha + phx + phy + phz + + jsr PRIMM + !pet $0D, "long pc : ", 0 + + lda Long_PC+3 + jsr Print_Hex + lda Long_PC+2 + jsr Print_Hex + lda Long_PC+1 + jsr Print_Hex + lda Long_PC+0 + jsr Print_Hex + + jsr PRIMM + !pet " addr mode : ", 0 + + lda Adr_Mode + jsr Print_Hex + + jsr PRIMM + !pet " :: ", 0 + + plz + ply + plx + pla + plp + + rts + +DBG_print_hex: + + php + pha + phx + phy + phz + + pha + jsr PRIMM + !pet $0D, "hex : ", 0 + pla + + jsr Print_Hex + + plz + ply + plx + pla + plp + + rts + +DBG_print_CP1: + + php + pha + phx + phy + phz + + jsr PRIMM + !pet $0D, "checkpoint 1", 0 + + jmp DBG_END + +DBG_print_CP2: + + php + pha + phx + phy + phz + + jsr PRIMM + !pet $0D, "checkpoint 2", 0 + + ; FALLTROUGH + +DBG_END: + + plz + ply + plx + pla + plp + + rts + + diff --git a/src/mon_m65/mon_helper_memory.s b/src/mon_m65/mon_helper_memory.s index fa5e2d52..e0a5a884 100644 --- a/src/mon_m65/mon_helper_memory.s +++ b/src/mon_m65/mon_helper_memory.s @@ -16,13 +16,14 @@ Get_From_Memory: adc Long_PC+0 sta Long_TMP+0 - ldx #$02 + ldx #$01 @1: - lda Long_PC+1,x + lda Long_PC+0,x adc #$00 - sta Long_TMP+1,x - dex - bpl @1 + sta Long_TMP+0,x + inx + cpx #$04 + bne @1 ldz #$00 From 6dd3a6d5b2bbe4ef0880a85b053caa06ad919ba3 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 8 Jan 2021 23:53:07 +0100 Subject: [PATCH 118/257] monitor command 'M' fully adapted --- src/mon_m65/bsmon.s | 22 ++++++++-------------- src/mon_m65/mon_helper_memory.s | 3 +-- src/mon_m65/mon_helper_print.s | 27 +++++++++++++++++++++++++++ 3 files changed, 36 insertions(+), 16 deletions(-) create mode 100644 src/mon_m65/mon_helper_print.s diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index f76705f3..20eb2adc 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -192,7 +192,7 @@ Jump_Table: !word Mon_Go ; G XXX to be debugged/adapted !word Mon_Hunt ; H XXX to be debugged/adapted !word Mon_JSR ; J XXX to be debugged/adapted - !word Mon_Memory ; M XXX to be debugged/adapted + !word Mon_Memory ; M !word Mon_Register ; R !word Mon_Transfer ; T XXX to be debugged/adapted !word Mon_Exit ; X @@ -528,9 +528,7 @@ Mon_JSR: Dump_4_Bytes: ; XXX to be adapted ; *********** - JSR CHROUT ; colour -@loop - JSR Get_From_Memory +@loop JSR Get_From_Memory JSR Print_Hex_Blank INZ TZA @@ -542,11 +540,7 @@ Dump_4_Bytes: ; XXX to be adapted Dump_4_Chars: ; XXX to be adapted ; *********** - LDY #0 - STY QTSW ; disable quote mode - JSR CHROUT ; colour -@loop - JSR Get_From_Memory +@loop JSR Get_From_Memory TAY AND #%01100000 BNE @laba @@ -573,9 +567,9 @@ Dump_Row: LDX #2 ; 2 blocks in 80 columns BBR7 MODE_80,@loop DEX ; 1 block in 40 columns -@loop LDA #KEY_LT_RED +@loop JSR Print_Attr_Bold JSR Dump_4_Bytes - LDA #KEY_WHITE + JSR Print_Attr_NoBold JSR Dump_4_Bytes DEX BNE @loop @@ -583,13 +577,13 @@ Dump_Row: BBS7 MODE_80,@done ; in 40 columns, do not display chars JSR PRIMM - !byte $3a,$12,$00 ; : reverse on + !byte $3a,$12,$00 ; reverse on LDZ #0 LDX #2 ; 4 blocks in 80 columns -@lchr LDA #KEY_LT_RED ; XXX replace color with bold attribute +@lchr JSR Print_Attr_Bold JSR Dump_4_Chars - LDA #KEY_WHITE ; XXX replace color with bold attribute + JSR Print_Attr_NoBold JSR Dump_4_Chars DEX BNE @lchr diff --git a/src/mon_m65/mon_helper_memory.s b/src/mon_m65/mon_helper_memory.s index e0a5a884..7be5de6d 100644 --- a/src/mon_m65/mon_helper_memory.s +++ b/src/mon_m65/mon_helper_memory.s @@ -1,7 +1,6 @@ -; Monitor helper code - read and write +; Monitor helper code - memory read and write -; XXX there is a bug somewhere with wrapping arounf $FFFF Get_From_Memory: diff --git a/src/mon_m65/mon_helper_print.s b/src/mon_m65/mon_helper_print.s new file mode 100644 index 00000000..4ad15ce9 --- /dev/null +++ b/src/mon_m65/mon_helper_print.s @@ -0,0 +1,27 @@ + +; Monitor helper code - output printing + + +Print_Attr_Bold: + + jsr Print_Attr_Common1 + lda #'s' + bra Print_Attr_Common2 + +Print_Attr_NoBold: + + jsr Print_Attr_Common1 + lda #'u' + + ; FALLTROUGH + +Print_Attr_Common2: + + jmp CHROUT + +Print_Attr_Common1: + + lda #$00 + sta QTSW ; make sure quote mode is disabled + lda #KEY_ESC + jmp CHROUT From b0cc5dc503062c719515ab65c5965de1acf3cae9 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 9 Jan 2021 19:09:16 +0100 Subject: [PATCH 119/257] started work on disassemble command integration --- src/mon_m65/,aliases_mon.s | 2 +- src/mon_m65/bsmon.s | 59 ++++------------------- src/mon_m65/mon_command_disassemble.s | 50 +++++++++++++++++++ src/mon_m65/mon_helper_memory.s | 69 +++++++++++++++------------ src/mon_m65/mon_helper_print.s | 20 ++++---- 5 files changed, 109 insertions(+), 91 deletions(-) create mode 100644 src/mon_m65/mon_command_disassemble.s diff --git a/src/mon_m65/,aliases_mon.s b/src/mon_m65/,aliases_mon.s index c13403e3..015623fb 100644 --- a/src/mon_m65/,aliases_mon.s +++ b/src/mon_m65/,aliases_mon.s @@ -11,7 +11,7 @@ ; ******************** !addr Bank = 2 ; XXX remove this -!addr Adr_Mode = 2 ; $00 = C64 address, $80 = M65 flat address ; XXX adapt the implementation +!addr Adr_Mode = 2 ; $00 = 64K address, $80 = M65 flat address ; XXX adapt the implementation !addr PCH = 3 !addr PCL = 4 !addr SR = 5 diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 20eb2adc..84155460 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -15,14 +15,19 @@ Mon_Call: JSR Print_Commands -; clear register for monitor call +; set default addressing mode to 64K LDA #0 + STA Adr_Mode + +; clear register for monitor call + LDX #6 @loop STA AC,X DEX BPL @loop + ; set default PC to monitor exit point LDA # negative - -@loop JSR CR_Erase ; prepare empty line - JSR STOP - LBEQ Main - JSR Dis_Code ; disassemble one line - INC Op_Size - LDA Op_Size - JSR Add_LPC ; advance address - LDA Long_CT - SEC - SBC Op_Size - STA Long_CT - BCS @loop - JMP Main - ; ******* Dis_Code: ; ******* @@ -1397,8 +1360,7 @@ Print_Code: ; detect long branches -@long LDA #KEY_YELLOW - JSR CHROUT +@long JSR Print_Attr_Bold LDX Op_Code LDA LEN_ADM,X CMP #%10100000 ; long branch mode @@ -1475,8 +1437,7 @@ Print_Code: @mne4 JSR Print_Blank @mne5 JSR Print_Blank - LDA #KEY_WHITE - JSR CHROUT + JSR Print_Attr_NoBold ; check for accumulator operand diff --git a/src/mon_m65/mon_command_disassemble.s b/src/mon_m65/mon_command_disassemble.s new file mode 100644 index 00000000..40dcb33f --- /dev/null +++ b/src/mon_m65/mon_command_disassemble.s @@ -0,0 +1,50 @@ + +; Based on BSM (Bit Shifter's Monitor) + +Mon_Disassemble: + + lda Adr_Mode + pha ; store addressing mode, in case no parameter is given + lda #$00 + sta Adr_Mode ; by default use C64-style addressing + + jsr Get_Addr_To_LAC ; get 1st parameter (start address) + beq @nopar + pla ; drop previous addressing mode + jsr LAC_To_LPC ; Long_PC = start address + jsr Get_Addr_To_LAC ; get 2nd parameter (end address) + bne @range + +@nopar: + + pla ; retrieve old addressing mode + sta Adr_Mode + + lda #$20 ; by default disassemble 32 addresses + sta Long_CT+0 + lda #$00 + sta Long_CT+1 + sta Long_CT+2 + sta Long_CT+3 + bra @loop + +@range: + + jsr LAC_Minus_LPC ; Long_CT = range + +bcc Mon_Error ; -> negative + +@loop: + + jsr CR_Erase ; prepare empty line + jsr STOP + +beq Main + jsr Dis_Code ; disassemble one line + inc Op_Size + lda Op_Size + jsr Add_LPC ; advance address + lda Long_CT + sec + sbc Op_Size + sta Long_CT + bcs @loop + jmp Main diff --git a/src/mon_m65/mon_helper_memory.s b/src/mon_m65/mon_helper_memory.s index 7be5de6d..d6194d68 100644 --- a/src/mon_m65/mon_helper_memory.s +++ b/src/mon_m65/mon_helper_memory.s @@ -4,6 +4,9 @@ Get_From_Memory: + ; XXX consider temporarily switching off $C000-$CFFF ROM + ; XXX consider using long mode for addresses below $8000 always + phx phy phz @@ -12,59 +15,63 @@ Get_From_Memory: clc tza - adc Long_PC+0 - sta Long_TMP+0 + adc Long_PC+0 + sta Long_TMP+0 - ldx #$01 + ldx #$01 @1: - lda Long_PC+0,x - adc #$00 - sta Long_TMP+0,x + lda Long_PC+0,x + adc #$00 + sta Long_TMP+0,x inx - cpx #$04 - bne @1 + cpx #$04 + bne @1 - ldz #$00 + ldz #$00 ; Check addressing mode - bbs7 Adr_Mode, @mode_flat + bbs7 Adr_Mode, @mode_flat @mode_64k: - lda Long_TMP+1 - bne @read ; branch if no need to handle shadow memory (not zero page) - lda Long_TMP+0 + lda #$00 ; make sure this is 64K address + sta Long_TMP+2 + sta Long_TMP+3 + + lda Long_TMP+1 + bne @read ; branch if no need to handle shadow memory (not zero page) + lda Long_TMP+0 dec dec - cmp #$8E - bcs @read ; branch if no need to handle shadow memory (0, 1, or above $8F) + cmp #$8E + bcs @read ; branch if no need to handle shadow memory (0, 1, or above $8F) @2: - sta Long_TMP+0 - bra @read_shadow + sta Long_TMP+0 + bra @read_shadow @mode_flat: - lda Long_TMP+3 - ora Long_TMP+2 - ora Long_TMP+1 - bne @read_flat + lda Long_TMP+3 + ora Long_TMP+2 + ora Long_TMP+1 + bne @read_flat - lda Long_TMP+0 + lda Long_TMP+0 dec dec - cmp #$8E - bcs @read_flat - bra @2 + cmp #$8E + bcs @read_flat + bra @2 @read_shadow: - lda #MEMCONF_SHADOW_BZP_1 - sta Long_TMP+1 - lda #MEMCONF_SHADOW_BZP_2 - sta Long_TMP+2 - lda #MEMCONF_SHADOW_BZP_3 - sta Long_TMP+3 + lda #MEMCONF_SHADOW_BZP_1 + sta Long_TMP+1 + lda #MEMCONF_SHADOW_BZP_2 + sta Long_TMP+2 + lda #MEMCONF_SHADOW_BZP_3 + sta Long_TMP+3 @read_flat: +nop diff --git a/src/mon_m65/mon_helper_print.s b/src/mon_m65/mon_helper_print.s index 4ad15ce9..716ae3e5 100644 --- a/src/mon_m65/mon_helper_print.s +++ b/src/mon_m65/mon_helper_print.s @@ -4,24 +4,24 @@ Print_Attr_Bold: - jsr Print_Attr_Common1 - lda #'s' - bra Print_Attr_Common2 + jsr Print_Attr_Common1 + lda #'s' + bra Print_Attr_Common2 Print_Attr_NoBold: - jsr Print_Attr_Common1 - lda #'u' + jsr Print_Attr_Common1 + lda #'u' ; FALLTROUGH Print_Attr_Common2: - jmp CHROUT + jmp CHROUT Print_Attr_Common1: - lda #$00 - sta QTSW ; make sure quote mode is disabled - lda #KEY_ESC - jmp CHROUT + lda #$00 + sta QTSW ; make sure quote mode is disabled + lda #KEY_ESC + jmp CHROUT From 2efd0d2566d69bd88403cb849f0a1e7bc78f525e Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 9 Jan 2021 19:16:42 +0100 Subject: [PATCH 120/257] monitor memory handling improvements --- src/mon_m65/bsmon.s | 7 ++----- src/mon_m65/mon_helper_memory.s | 1 - 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 84155460..9e9f5dbd 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -391,21 +391,18 @@ Dec_LDA: RTS ; **** -Fetch: ; XXX get rid of this, use helper! +Fetch: ; **** PHZ TYA TAZ - BBS7 Long_PC+3,@banked ; trigger banked access - +NOP ; use LDA [Long_PC],Z -@banked LDA (Long_PC),Z + JSR Get_From_Memory PLZ AND #$ff RTS - ; ********* Print_Bits: ; ********* diff --git a/src/mon_m65/mon_helper_memory.s b/src/mon_m65/mon_helper_memory.s index d6194d68..90145589 100644 --- a/src/mon_m65/mon_helper_memory.s +++ b/src/mon_m65/mon_helper_memory.s @@ -4,7 +4,6 @@ Get_From_Memory: - ; XXX consider temporarily switching off $C000-$CFFF ROM ; XXX consider using long mode for addresses below $8000 always phx From 0e1118ebe3776f04391f06a2d6a135e8f9a5da1e Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 9 Jan 2021 19:36:59 +0100 Subject: [PATCH 121/257] monitor memory handling improvements --- src/mon_m65/bsmon.s | 8 ++++---- src/mon_m65/mon_command_memory.s | 2 +- src/mon_m65/mon_helper_memory.s | 11 +++++++---- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 9e9f5dbd..d40ad086 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -93,9 +93,9 @@ Mon_Register: DEY BNE @loopc -; ** -Main -; ** +; *** +Main: +; *** JSR Print_CR LDX #0 @@ -218,7 +218,7 @@ Mon_Exit: JMP (X_Vector) ; ******** -LAC_To_PC: ; XXX to be adapted, get rid of 'bcs'! +LAC_To_PC: ; XXX to be adapted ; ******** ; called from Mon_Set_Register, Mon_Go and Mon_JSR diff --git a/src/mon_m65/mon_command_memory.s b/src/mon_m65/mon_command_memory.s index 11b688ec..d59394dc 100644 --- a/src/mon_m65/mon_command_memory.s +++ b/src/mon_m65/mon_command_memory.s @@ -64,4 +64,4 @@ Mon_Memory: @exit: - jmp Main + jmp Main diff --git a/src/mon_m65/mon_helper_memory.s b/src/mon_m65/mon_helper_memory.s index 90145589..5f78e16e 100644 --- a/src/mon_m65/mon_helper_memory.s +++ b/src/mon_m65/mon_helper_memory.s @@ -4,8 +4,6 @@ Get_From_Memory: - ; XXX consider using long mode for addresses below $8000 always - phx phy phz @@ -44,7 +42,7 @@ Get_From_Memory: dec dec cmp #$8E - bcs @read ; branch if no need to handle shadow memory (0, 1, or above $8F) + bcs @read_64k ; branch if no need to handle shadow memory (0, 1, or above $8F) @2: sta Long_TMP+0 bra @read_shadow @@ -63,6 +61,11 @@ Get_From_Memory: bcs @read_flat bra @2 +@read_64k: + + bbr7 Long_TMP+1, @read_flat ; below $8000 we do not want to retrieve MAP/EOM banked memory + bra @read + @read_shadow: lda #MEMCONF_SHADOW_BZP_1 @@ -72,7 +75,7 @@ Get_From_Memory: lda #MEMCONF_SHADOW_BZP_3 sta Long_TMP+3 -@read_flat: +@read_flat: ; XXX read via helper in KERNAL_0 segment +nop @read: lda (Long_TMP),Z From 64a22abf50e207b41fcaca4afe6585221b2738b6 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 9 Jan 2021 23:45:22 +0100 Subject: [PATCH 122/257] fixed another memory-related problem in monitor --- src/kernal/board_m65/mega65_proxies_monitor.s | 10 +++++++ src/mon_m65/,aliases_mon.s | 2 +- src/mon_m65/imports.s | 29 ++++++++++--------- src/mon_m65/mon_helper_memory.s | 11 +++++-- 4 files changed, 34 insertions(+), 18 deletions(-) diff --git a/src/kernal/board_m65/mega65_proxies_monitor.s b/src/kernal/board_m65/mega65_proxies_monitor.s index 5329b781..9207706a 100644 --- a/src/kernal/board_m65/mega65_proxies_monitor.s +++ b/src/kernal/board_m65/mega65_proxies_monitor.s @@ -66,3 +66,13 @@ proxy_M1_TALK: jsr TALK bra proxy_M1_end + + + +!addr Long__TMP = $3C ; has to be the same as Long_TMP in monitor + +proxy_M1_memread: + + jsr map_NORMAL + lda [Long__TMP], z + bra proxy_M1_end diff --git a/src/mon_m65/,aliases_mon.s b/src/mon_m65/,aliases_mon.s index 015623fb..80c6c38d 100644 --- a/src/mon_m65/,aliases_mon.s +++ b/src/mon_m65/,aliases_mon.s @@ -63,7 +63,7 @@ ; $34-$3B - free space, unused for now -!addr Long_TMP = $3C ; temporary pointer, for fetching/storing memory content +!addr Long_TMP = $3C ; temporary pointer, for fetching/storing memory content; has to be the same as Long__TMP in Kernal !addr Disk_Msg = $40 ; 40 bytes, disk status as text message ; XXX rework code to make it not needed !addr Mon_Data = $68 ; 40 bytes, buffer for hunt and filename diff --git a/src/mon_m65/imports.s b/src/mon_m65/imports.s index f8fcf6ac..5b561051 100644 --- a/src/mon_m65/imports.s +++ b/src/mon_m65/imports.s @@ -4,22 +4,23 @@ ; Definitions for calling MEGA65 segment KERNAL_0 routines from MON_1 ; -;; #ALIAS# SETMSG = KERNAL_0.SETMSG -;; #ALIAS# STOP = KERNAL_0.STOP -;; #ALIAS# SCREEN = KERNAL_0.SCREEN +;; #ALIAS# SETMSG = KERNAL_0.SETMSG +;; #ALIAS# STOP = KERNAL_0.STOP +;; #ALIAS# SCREEN = KERNAL_0.SCREEN -;; #ALIAS# monitor_exit = KERNAL_0.m65_shadow_BZP +;; #ALIAS# monitor_exit = KERNAL_0.m65_shadow_BZP +;; #ALIAS# monitor_memread_helper = KERNAL_0.proxy_M1_memread -;; #ALIAS# CHRIN = KERNAL_0.proxy_M1_CHRIN -;; #ALIAS# CHROUT = KERNAL_0.proxy_M1_CHROUT -;; #ALIAS# SECOND = KERNAL_0.proxy_M1_SECOND -;; #ALIAS# TKSA = KERNAL_0.proxy_M1_TKSA -;; #ALIAS# ACPTR = KERNAL_0.proxy_M1_ACPTR -;; #ALIAS# CIOUT = KERNAL_0.proxy_M1_CIOUT -;; #ALIAS# UNTLK = KERNAL_0.proxy_M1_UNTLK -;; #ALIAS# UNLSN = KERNAL_0.proxy_M1_UNLSN -;; #ALIAS# LISTEN = KERNAL_0.proxy_M1_LISTEN -;; #ALIAS# TALK = KERNAL_0.proxy_M1_TALK +;; #ALIAS# CHRIN = KERNAL_0.proxy_M1_CHRIN +;; #ALIAS# CHROUT = KERNAL_0.proxy_M1_CHROUT +;; #ALIAS# SECOND = KERNAL_0.proxy_M1_SECOND +;; #ALIAS# TKSA = KERNAL_0.proxy_M1_TKSA +;; #ALIAS# ACPTR = KERNAL_0.proxy_M1_ACPTR +;; #ALIAS# CIOUT = KERNAL_0.proxy_M1_CIOUT +;; #ALIAS# UNTLK = KERNAL_0.proxy_M1_UNTLK +;; #ALIAS# UNLSN = KERNAL_0.proxy_M1_UNLSN +;; #ALIAS# LISTEN = KERNAL_0.proxy_M1_LISTEN +;; #ALIAS# TALK = KERNAL_0.proxy_M1_TALK ; 'Print immediate', original implementation by Mike Barry, adapted to 65CE02, modified to preserve .Y diff --git a/src/mon_m65/mon_helper_memory.s b/src/mon_m65/mon_helper_memory.s index 5f78e16e..f60e11fd 100644 --- a/src/mon_m65/mon_helper_memory.s +++ b/src/mon_m65/mon_helper_memory.s @@ -37,7 +37,7 @@ Get_From_Memory: sta Long_TMP+3 lda Long_TMP+1 - bne @read ; branch if no need to handle shadow memory (not zero page) + bne @read_64k ; branch if no need to handle shadow memory (not zero page) lda Long_TMP+0 dec dec @@ -75,11 +75,16 @@ Get_From_Memory: lda #MEMCONF_SHADOW_BZP_3 sta Long_TMP+3 -@read_flat: ; XXX read via helper in KERNAL_0 segment - +nop +@read_flat: + + jsr monitor_memread_helper + bra @end + @read: lda (Long_TMP),Z +@end: + plz ply plx From b6b45ac1585789827aaa61ff6ff84f3192351e8a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 9 Jan 2021 23:55:46 +0100 Subject: [PATCH 123/257] monitor visual improvements --- src/mon_m65/bsmon.s | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index d40ad086..4e4dc6dc 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -1333,6 +1333,7 @@ Print_Code: ; print instruction and operand bytes + JSR Print_Attr_Bold LDY #0 LDA #' ' BBR4 Op_Flag,@blpr @@ -1357,7 +1358,9 @@ Print_Code: ; detect long branches -@long JSR Print_Attr_Bold +@long JSR Print_Attr_NoBold + LDA #' ' + JSR CHROUT LDX Op_Code LDA LEN_ADM,X CMP #%10100000 ; long branch mode @@ -1434,7 +1437,6 @@ Print_Code: @mne4 JSR Print_Blank @mne5 JSR Print_Blank - JSR Print_Attr_NoBold ; check for accumulator operand From 519f0e537b9515a98709b04ca47e6c7cfaf141fe Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 10 Jan 2021 00:22:08 +0100 Subject: [PATCH 124/257] fixed 'ORA' mnemonic --- src/mon_m65/bsmon.s | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 4e4dc6dc..e9510614 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -2360,7 +2360,7 @@ Close_Disk_Buffer: !set ENC_L = %00000010 + 11 !set ENC_M = %00000010 + 12 !set ENC_N = %00000010 + 13 -!set ENC_O = %00000010 + 13 +!set ENC_O = %00000010 + 14 !set ENC_P = %00000010 + 15 !set ENC_Q = %00000010 + 16 !set ENC_R = %00000010 + 17 From 81f1213ad87e69a5ee849e1b74bf119ae9e5f6d9 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 10 Jan 2021 20:27:00 +0100 Subject: [PATCH 125/257] monitor command 'D' fully adapted --- src/mon_m65/,aliases_mon.s | 3 +-- src/mon_m65/bsmon.s | 20 +++++++++++--------- src/mon_m65/mon_command_disassemble.s | 15 +++++++-------- 3 files changed, 19 insertions(+), 19 deletions(-) diff --git a/src/mon_m65/,aliases_mon.s b/src/mon_m65/,aliases_mon.s index 80c6c38d..85b0005e 100644 --- a/src/mon_m65/,aliases_mon.s +++ b/src/mon_m65/,aliases_mon.s @@ -9,8 +9,7 @@ ; ******************** ; * Register storage * ; ******************** - -!addr Bank = 2 ; XXX remove this + !addr Adr_Mode = 2 ; $00 = 64K address, $80 = M65 flat address ; XXX adapt the implementation !addr PCH = 3 !addr PCL = 4 diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index e9510614..0c223472 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -192,7 +192,7 @@ Jump_Table: !word Mon_Assemble ; A XXX to be debugged/adapted !word Mon_Bits ; B XXX to be debugged/adapted !word Mon_Compare ; C XXX to be debugged/adapted - !word Mon_Disassemble ; D XXX to be debugged/adapted + !word Mon_Disassemble ; D !word Mon_Fill ; F XXX to be debugged/adapted !word Mon_Go ; G XXX to be debugged/adapted !word Mon_Hunt ; H XXX to be debugged/adapted @@ -221,6 +221,8 @@ Mon_Exit: LAC_To_PC: ; XXX to be adapted ; ******** + inc $D020 ; XXX fior debug only + ; called from Mon_Set_Register, Mon_Go and Mon_JSR ; as the first instruction. The carry flag was set from ; the routine Got_LAC if an error occured. @@ -231,12 +233,12 @@ LAC_To_PC: ; XXX to be adapted ; the routines FAR_JMP and FAR_JSR of the operating system BCS @error - LDA Long_AC - STA Bank+2 - LDA Long_AC+1 - STA Bank+1 - LDA Long_AC+2 - STA Bank + ;LDA Long_AC + ;STA Bank+2 + ;LDA Long_AC+1 + ;STA Bank+1 + ;LDA Long_AC+2 + ;STA Bank @error RTS ; ********* @@ -456,7 +458,7 @@ Mon_Bits: JMP Main ; *************** -Mon_Set_Register: +Mon_Set_Register: ; XXX this needs adaptation ; *************** JSR Get_LAC ; get 1st. parameter @@ -465,7 +467,7 @@ Mon_Set_Register: @loop JSR Get_LAC BCS @exit LDA Long_AC - STA Bank,Y + STA Adr_Mode,Y INY CPY #9 BCC @loop diff --git a/src/mon_m65/mon_command_disassemble.s b/src/mon_m65/mon_command_disassemble.s index 40dcb33f..884d7673 100644 --- a/src/mon_m65/mon_command_disassemble.s +++ b/src/mon_m65/mon_command_disassemble.s @@ -3,7 +3,6 @@ Mon_Disassemble: - lda Adr_Mode pha ; store addressing mode, in case no parameter is given lda #$00 sta Adr_Mode ; by default use C64-style addressing @@ -13,25 +12,24 @@ Mon_Disassemble: pla ; drop previous addressing mode jsr LAC_To_LPC ; Long_PC = start address jsr Get_Addr_To_LAC ; get 2nd parameter (end address) - bne @range + beq @norange + jsr LAC_Minus_LPC ; Long_CT = range + +bcc Mon_Error ; -> negative + bra @loop @nopar: pla ; retrieve old addressing mode sta Adr_Mode +@norange: + lda #$20 ; by default disassemble 32 addresses sta Long_CT+0 lda #$00 sta Long_CT+1 sta Long_CT+2 sta Long_CT+3 - bra @loop - -@range: - - jsr LAC_Minus_LPC ; Long_CT = range - +bcc Mon_Error ; -> negative @loop: @@ -47,4 +45,5 @@ Mon_Disassemble: sbc Op_Size sta Long_CT bcs @loop + jmp Main From 9af84dcf1803aad7b2b36fc7cd7abd8229e26412 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 10 Jan 2021 20:38:30 +0100 Subject: [PATCH 126/257] fixed syntax error at monitor exit --- src/basic/basic_commands_04/cmd_monitor.s | 3 ++- src/mon_m65/bsmon.s | 6 +++--- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/src/basic/basic_commands_04/cmd_monitor.s b/src/basic/basic_commands_04/cmd_monitor.s index 46ba3215..28139e02 100644 --- a/src/basic/basic_commands_04/cmd_monitor.s +++ b/src/basic/basic_commands_04/cmd_monitor.s @@ -7,4 +7,5 @@ cmd_monitor: jsr helper_ensure_native_mode jsr helper_ensure_direct_mode - jmp MONITOR + jsr MONITOR + jmp end_of_program diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 0c223472..37d3e90c 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -18,7 +18,7 @@ Mon_Call: ; set default addressing mode to 64K LDA #0 - STA Adr_Mode + STA Adr_Mode ; clear register for monitor call @@ -152,7 +152,7 @@ Mon_Select: STA VERCKK CPX #22 - LBCS Load_Save + LBCS Load_Save TXA ASL TAX @@ -221,7 +221,7 @@ Mon_Exit: LAC_To_PC: ; XXX to be adapted ; ******** - inc $D020 ; XXX fior debug only + inc $D020 ; XXX for debug only ; called from Mon_Set_Register, Mon_Go and Mon_JSR ; as the first instruction. The carry flag was set from From 35dfddda14d6f8407a8da70b42d426cbae24695f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 10 Jan 2021 22:00:24 +0100 Subject: [PATCH 127/257] restored line removed by mistake --- src/mon_m65/mon_command_disassemble.s | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mon_m65/mon_command_disassemble.s b/src/mon_m65/mon_command_disassemble.s index 884d7673..6bc8269e 100644 --- a/src/mon_m65/mon_command_disassemble.s +++ b/src/mon_m65/mon_command_disassemble.s @@ -3,6 +3,7 @@ Mon_Disassemble: + lda Adr_Mode pha ; store addressing mode, in case no parameter is given lda #$00 sta Adr_Mode ; by default use C64-style addressing From 2eba6f113a7b9515eba468c88214db9100990a0f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 10 Jan 2021 22:32:04 +0100 Subject: [PATCH 128/257] adapted monitor command 'B' --- src/mon_m65/bsmon.s | 38 ++------------------- src/mon_m65/mon_command_bits.s | 61 ++++++++++++++++++++++++++++++++++ 2 files changed, 63 insertions(+), 36 deletions(-) create mode 100644 src/mon_m65/mon_command_bits.s diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 37d3e90c..7dc54e1e 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -190,7 +190,7 @@ Jump_Table: ; ********* !word Mon_Assemble ; A XXX to be debugged/adapted - !word Mon_Bits ; B XXX to be debugged/adapted + !word Mon_Bits ; B !word Mon_Compare ; C XXX to be debugged/adapted !word Mon_Disassemble ; D !word Mon_Fill ; F XXX to be debugged/adapted @@ -422,40 +422,6 @@ Print_Bits: PLZ RTS -; ******* -Mon_Bits: -; ******* - - JSR Get_LAC ; get 1st. parameter - BCS @lab - JSR LAC_To_LPC ; Long_PC = start address -@lab JSR Print_CR - LDA #KEY_WHITE ; XXX adapt colors - STA Long_DA+1 - - LDX #8 -@row PHX - JSR Print_LPC_Addr - LDZ #0 -@col SEC - LDA #KEY_WHITE+KEY_LT_RED ; toggle colour - SBC Long_DA+1 - STA Long_DA+1 - JSR CHROUT - LDA [Long_PC],Z - JSR Print_Bits - CLC - TZA - ADC #8 - TAZ - CMP #64 - BCC @col - JSR Print_CR - JSR Inc_LPC - PLX - DEX - BNE @row - JMP Main ; *************** Mon_Set_Register: ; XXX this needs adaptation @@ -2665,7 +2631,7 @@ Mon_Help: !pet KEY_RETURN, KEY_RETURN !pet KEY_ESC,'s',"a",KEY_ESC,'u',"ssemble - a address mnemonic operand",KEY_RETURN - !pet KEY_ESC,'s',"b",KEY_ESC,'u',"itmaps - b [from [to]]",KEY_RETURN + !pet KEY_ESC,'s',"b",KEY_ESC,'u',"itmaps - b [from]",KEY_RETURN !pet KEY_ESC,'s',"c",KEY_ESC,'u',"ompare - c from to with",KEY_RETURN !pet KEY_ESC,'s',"d",KEY_ESC,'u',"isassemble - d [from [to]]",KEY_RETURN !pet KEY_ESC,'s',"f",KEY_ESC,'u',"ill - f from to fillbyte",KEY_RETURN diff --git a/src/mon_m65/mon_command_bits.s b/src/mon_m65/mon_command_bits.s new file mode 100644 index 00000000..983dd09f --- /dev/null +++ b/src/mon_m65/mon_command_bits.s @@ -0,0 +1,61 @@ + +; Based on BSM (Bit Shifter's Monitor) + + +Mon_Bits: + + lda Adr_Mode + pha ; store addressing mode, in case no parameter is given + lda #$00 + sta Adr_Mode ; by default use C64-style addressing + + jsr Get_Addr_To_LAC ; get 1st parameter (start address) + beq @nopar + pla ; drop previous addressing mode + jsr LAC_To_LPC ; Long_PC = start address + bra @start + +@nopar: + + pla ; retrieve old addressing mode + sta Adr_Mode + +@start: + + jsr Print_CR + ldx #$08 + +@row: + + phx + jsr Print_LPC_Addr + + ldz #$00 + +@col: + + phx ; toggle bold attribute + jsr Print_Attr_NoBold + tza + and #$08 + bne @lab + jsr Print_Attr_Bold + +@lab: + + plx + + jsr Get_From_Memory + jsr Print_Bits + clc + tza + adc #$08 + taz + cmp #64 + bcc @col + jsr Print_CR + jsr Inc_LPC + plx + dex + bne @row + jmp Main From ec0a03cb07d4575815478602b55af8b6d7f59165 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 10 Jan 2021 22:38:59 +0100 Subject: [PATCH 129/257] command 'B' can now handle 40-column mode --- src/mon_m65/mon_command_bits.s | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/mon_m65/mon_command_bits.s b/src/mon_m65/mon_command_bits.s index 983dd09f..8d6b90b1 100644 --- a/src/mon_m65/mon_command_bits.s +++ b/src/mon_m65/mon_command_bits.s @@ -4,6 +4,7 @@ Mon_Bits: + jsr Set_MODE_80 lda Adr_Mode pha ; store addressing mode, in case no parameter is given lda #$00 @@ -51,7 +52,12 @@ Mon_Bits: tza adc #$08 taz + bbr7 MODE_80,@disp8 + cmp #24 + bra @lab2 +@disp8: cmp #64 +@lab2: bcc @col jsr Print_CR jsr Inc_LPC From 409b01aec40d84df73379dd575fe1ef32874034d Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 11 Jan 2021 06:54:33 +0100 Subject: [PATCH 130/257] adapter converters, preparations for DOS Wedge from within the monitor --- Makefile | 2 +- src/aliases/,aliases_config.s | 7 +- src/basic/,imports.s | 2 + .../board_m65/4000.mega65_vectable_basic_1.s | 11 +- src/basic/wedge/wedge_dos.s | 17 + src/kernal/board_m65/mega65_proxies_monitor.s | 46 +-- src/mon_m65/,aliases_mon.s | 11 +- src/mon_m65/bsmon.s | 299 +----------------- src/mon_m65/imports.s | 11 +- src/mon_m65/mon_disabled.s | 295 +++++++++++++++++ 10 files changed, 341 insertions(+), 360 deletions(-) create mode 100644 src/mon_m65/mon_disabled.s diff --git a/Makefile b/Makefile index 44b66a30..a03f3f39 100644 --- a/Makefile +++ b/Makefile @@ -392,7 +392,7 @@ $(DIR_M65)/kernal.seg_1 $(DIR_M65)/KERNAL_1_combined.vs $(DIR_M65)/KERNAL_1_comb $(DIR_M65)/dos.seg_1 $(DIR_M65)/DOS_1_combined.vs $(DIR_M65)/DOS_1_combined.sym: \ $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_DOS_M65) $(CFG_M65) $(DIR_M65)/mon.seg_1 $(DIR_M65)/MON_1_combined.vs $(DIR_M65)/MON_1_combined.sym: \ - $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_MON_M65) $(CFG_M65) $(DIR_M65)/KERNAL_0_combined.sym + $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_MON_M65) $(CFG_M65) $(DIR_M65)/KERNAL_0_combined.sym $(DIR_M65)/BASIC_1_combined.sym $(DIR_M65)/zvm.seg_1 $(DIR_M65)/ZVM_1_combined.vs $(DIR_M65)/ZVM_1_combined.sym: \ $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_ZVM_M65) $(CFG_M65) $(DIR_M65)/KERNAL_0_combined.sym $(DIR_M65)/KERNAL_C_combined.sym diff --git a/src/aliases/,aliases_config.s b/src/aliases/,aliases_config.s index fdeeb70f..524eaabc 100644 --- a/src/aliases/,aliases_config.s +++ b/src/aliases/,aliases_config.s @@ -112,6 +112,7 @@ !ifdef CONFIG_MB_MEGA65 { !ifdef CONFIG_IEC_BURST_CIA1 { !error "Do not use CONFIG_IEC_BURST_CIA1 options for MEGA65 motherboard, CONFIG_IEC_BURST_M65 instead" } !ifdef CONFIG_IEC_BURST_CIA2 { !error "Do not use CONFIG_IEC_BURST_CIA2 options for MEGA65 motherboard, CONFIG_IEC_BURST_M65 instead" } + !ifndef CONFIG_DOS_WEDGE { !error "MEGA65 build requires CONFIG_DOS_WEDGE" } } !ifndef CONFIG_MB_MEGA65 { !ifdef CONFIG_IEC_BURST_M65 { !error "CONFIG_IEC_BURST_M65 is only possible for MEGA65 motherboard" } @@ -343,7 +344,7 @@ -; Handle IEC configuration +; Handle IEC and tape configuration !ifdef CONFIG_IEC_BURST_CIA1 { !set HAS_IEC_BURST = 1 } !ifdef CONFIG_IEC_BURST_CIA2 { !set HAS_IEC_BURST = 1 } @@ -352,10 +353,6 @@ !ifdef CONFIG_IEC_JIFFYDOS { !set CONFIG_IEC_JIFFYDOS_OR_DOLPHINDOS = 1 } !ifdef CONFIG_IEC_DOLPHINDOS { !set CONFIG_IEC_JIFFYDOS_OR_DOLPHINDOS = 1 } - - -; Handle tape configuration - !ifdef CONFIG_TAPE_NORMAL { !set HAS_TAPE = 1 } !ifdef CONFIG_TAPE_TURBO { !set HAS_TAPE = 1 } diff --git a/src/basic/,imports.s b/src/basic/,imports.s index 56443282..9972264a 100644 --- a/src/basic/,imports.s +++ b/src/basic/,imports.s @@ -40,12 +40,14 @@ ;; #ALIAS# map_end = KERNAL_0.map_end ;; #ALIAS# map_NORMAL = KERNAL_0.map_NORMAL ;; #ALIAS# map_BASIC_1 = KERNAL_0.map_BASIC_1 +;; #ALIAS# map_MON_1 = KERNAL_0.map_MON_1 ;; #ALIAS# M65_MODEGET = KERNAL_0.M65_MODEGET ;; #ALIAS# M65_MODESET = KERNAL_0.M65_MODESET ;; #ALIAS# M65_SETWIN_Y = KERNAL_0.M65_SETWIN_Y ;; #ALIAS# m65_colorset = KERNAL_0.m65_colorset +;; #ALIAS# m65_shadow_BZP = KERNAL_0.m65_shadow_BZP ; ; Ultimate 64 specific parts diff --git a/src/basic/board_m65/4000.mega65_vectable_basic_1.s b/src/basic/board_m65/4000.mega65_vectable_basic_1.s index 1962d456..da8cc963 100644 --- a/src/basic/board_m65/4000.mega65_vectable_basic_1.s +++ b/src/basic/board_m65/4000.mega65_vectable_basic_1.s @@ -27,10 +27,8 @@ !addr VB1__prepare_direct_execution = $4000 + 2 * 12 !addr VB1__helper_ask_if_sure = $4000 + 2 * 13 !addr VB1__helper_eggshell = $4000 + 2 * 14 - -!ifdef CONFIG_DOS_WEDGE { - !addr VB1__wedge_dos = $4000 + 2 * 15 -} + !addr VB1__wedge_dos = $4000 + 2 * 15 + !addr VB1__wedge_dos_monitor = $4000 + 2 * 15 } else { @@ -51,10 +49,7 @@ !word prepare_direct_execution !word helper_ask_if_sure !word helper_eggshell - -!ifdef CONFIG_DOS_WEDGE { !word wedge_dos -} - + !word wedge_dos_monitor } diff --git a/src/basic/wedge/wedge_dos.s b/src/basic/wedge/wedge_dos.s index 099c0393..df55ae78 100644 --- a/src/basic/wedge/wedge_dos.s +++ b/src/basic/wedge/wedge_dos.s @@ -8,6 +8,23 @@ !ifdef CONFIG_DOS_WEDGE { +!ifdef SEGMENT_M65_BASIC_0 { + +wedge_dos_monitor: ; entry point for the MONITOR + + jsr m65_shadow_BZP + jsr map_BASIC_1 + jsr (VB1__wedge_dos_monitor) + jsr m65_shadow_BZP + jmp map_MON_1 + +} else ifdef SEGMENT_M65_BASIC_1 { + +wedge_dos_monitor: + + rts +} + ; .X has to contain size of the buffer wedge_dos: diff --git a/src/kernal/board_m65/mega65_proxies_monitor.s b/src/kernal/board_m65/mega65_proxies_monitor.s index 9207706a..1dc9b3d6 100644 --- a/src/kernal/board_m65/mega65_proxies_monitor.s +++ b/src/kernal/board_m65/mega65_proxies_monitor.s @@ -24,52 +24,10 @@ proxy_M1_end: jmp map_MON_1 -; Routines below typicaly do not change mapping - but it is still possible they'll do +; Memory acccess routines -proxy_M1_SECOND: - - jsr SECOND - bra proxy_M1_end - -proxy_M1_TKSA: - - jsr TKSA - bra proxy_M1_end - -proxy_M1_ACPTR: - - jsr ACPTR - bra proxy_M1_end - -proxy_M1_CIOUT: - - jsr CIOUT - bra proxy_M1_end - -proxy_M1_UNTLK: - - jsr UNTLK - bra proxy_M1_end - -proxy_M1_UNLSN: - - jsr UNLSN - bra proxy_M1_end - -proxy_M1_LISTEN: - - jsr LISTEN - bra proxy_M1_end - -proxy_M1_TALK: - - jsr TALK - bra proxy_M1_end - - - -!addr Long__TMP = $3C ; has to be the same as Long_TMP in monitor +!addr Long__TMP = $64 ; has to be the same as Long_TMP in monitor proxy_M1_memread: diff --git a/src/mon_m65/,aliases_mon.s b/src/mon_m65/,aliases_mon.s index 85b0005e..c9a36459 100644 --- a/src/mon_m65/,aliases_mon.s +++ b/src/mon_m65/,aliases_mon.s @@ -56,13 +56,8 @@ !addr Op_Mne = $2C ; 3 bytes for mnemonic !addr Op_Ix = $2F ; type of constant !addr Op_Len = $30 ; length of operand -!addr Disk_Track = $31 ; logical track 1 -> 255 -!addr Disk_Sector = $32 ; logical sector 0 -> 255 -!addr Disk_Status = $33 ; BCD value of status - ; $34-$3B - free space, unused for now + ; $31-$63 - free space, unused for now -!addr Long_TMP = $3C ; temporary pointer, for fetching/storing memory content; has to be the same as Long__TMP in Kernal - -!addr Disk_Msg = $40 ; 40 bytes, disk status as text message ; XXX rework code to make it not needed -!addr Mon_Data = $68 ; 40 bytes, buffer for hunt and filename +!addr Long_TMP = $64 ; temporary pointer, for fetching/storing memory content; has to be the same as Long__TMP in Kernal +!addr Mon_Data = $68 ; 40 bytes, buffer for hunt diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 7dc54e1e..5072fab0 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -10,7 +10,7 @@ Mon_Call: ; ******* jsr PRIMM - !pet $0D, "* warning * - adaptation to open roms not finished yet", $0D, $0D, $00 + !pet $0D, "* warning * port not finished yet", $0D, $0D, $00 JSR Print_Commands @@ -163,7 +163,7 @@ Print_Commands: ; ************* JSR PRIMM - !pet KEY_RETURN,KEY_RVS_ON," commands: " + !pet KEY_RETURN," ",KEY_RVS_ON," commands: " ; *********** Command_Char: @@ -176,7 +176,7 @@ Command_Char: Cons_Prefix: ; ********** - !pet "$+&%'" + !pet "$+&%" ; *************** Load_Save_Verify: @@ -206,10 +206,10 @@ Jump_Table: !word Mon_Set_Memory ; > XXX to be debugged/adapted !word Mon_Set_Register ; ; XXX to be debugged/adapted !word Mon_Help ; ? - !word Converter ; $ XXX to be debugged/adapted - !word Converter ; + XXX to be debugged/adapted - !word Converter ; & XXX to be debugged/adapted - !word Converter ; % XXX to be debugged/adapted + !word Converter ; $ + !word Converter ; + + !word Converter ; & + !word Converter ; % ; ******* Mon_Exit: @@ -1881,8 +1881,9 @@ Converter: LDX #0 STX Buf_Index - JSR Get_LAC - LBCS Mon_Error + JSR Get_Addr_To_LAC + LBEQ Mon_Error + JSR Print_CR LDX #0 @loop PHX JSR CR_Erase @@ -1896,6 +1897,7 @@ Converter: INX CPX #4 BCC @loop + JSR Print_CR JMP Main Conv_Tab !word Print_Hexval @@ -2018,288 +2020,13 @@ Print_BCD: BNE @loopa RTS - -; ************** -Get_Disk_Status: -; ************** - - LDA FA - JSR TALK - LDA #$6f - JSR TKSA - JSR ACPTR ; 1st. digit - STA Disk_Msg - ASL - ASL - ASL - ASL - STA Disk_Status ; BCD - JSR ACPTR ; 2nd. digit - STA Disk_Msg+1 - AND #15 - ORA Disk_Status - STA Disk_Status ; complete BCD number - - LDY #1 -@loop INY - JSR ACPTR - STA Disk_Msg,Y - CMP #' ' - BCS @loop - LDA #0 - STA Disk_Msg,Y - JSR UNTLK - LDA Disk_Status - RTS - -; **************** -Print_Disk_Status: -; **************** - - JSR Get_Disk_Status - -; ************* -Print_Disk_Msg: -; ************* - - JSR Print_CR - LDY #0 -@loop LDA Disk_Msg,Y - BEQ @exit - JSR CHROUT - INY - BRA @loop -@exit JMP Print_CR - ; ****** Mon_DOS: ; ****** - ; XXX for Open ROMs it should invoke internal DOS wedge! - jmp Main - -; **** -DOS_U: ; XXX connect it somehow to command list -; **** - -; @[u],U1 mem track startsec [endsec] : read disk sector(s) -; @[u],U2 mem track startsec [endsec] : write disk sector(s) - - JSR Get_Char - CMP #'1' ; U1: read - LBCC Mon_Error - CMP #'3' ; U2: write - LBCS Mon_Error - STA Mon_Data+1 ; U type - INC Buf_Index - JSR Get_LAC - LBCS Mon_Error - JSR LAC_To_LPC ; Long_PC = memory address - - JSR Get_LAC - LBCS Mon_Error - LDA Long_AC - STA Disk_Track - - JSR Get_LAC - LBCS Mon_Error - LDA Long_AC - STA Disk_Sector - - JSR Get_LAC - JSR LAC_To_LCT ; Long_CT = sector count - DEW Long_CT ; Long_CT = -1 for single - - JSR Open_Disk_Buffer - -@loop LDA Mon_Data+1 - LSR - BEQ @write - JSR Find_next_Sector - BNE @error - JSR Read_Sector - BRA @next - -@write JSR Write_Sector - JSR Find_next_Sector - BNE @error - -@next JSR Inc_LPC_Page - INC Disk_Sector - DEW Long_CT - BPL @loop - -@error JSR Print_Disk_Msg - JSR Close_Disk_Buffer + JSR wedge_dos_monitor JMP Main -; *************** -Find_next_Sector: -; *************** - - JSR Build_U_String - JSR Send_Disk_Command - JSR Get_Disk_Status - BEQ @return ; OK - CMP #$66 ; illegal track or sector - BNE @error ; error - LDA #0 - STA Disk_Sector - INC Disk_Track ; try next track - JSR Build_U_String - JSR Send_Disk_Command - JSR Get_Disk_Status - BEQ @return -@error JSR Print_Disk_Msg - LDA Disk_Status -@return RTS - -; ******************* -Open_Command_Channel: -; ******************* - - LDA FA - JSR LISTEN - LDA #$ff - JSR SECOND - LDY #0 - STY IOSTATUS - RTS - -; ****** -Reset_BP -; ****** - - JSR Open_Command_Channel -@loop LDA BP_ZERO,Y - BEQ @end - JSR CIOUT - INY - BRA @loop -@end JMP UNLSN - -; **************** -Send_Disk_Command: -; **************** - - JSR Open_Command_Channel -@loop LDA Mon_Data,Y - BEQ @end - JSR CIOUT - INY - BRA @loop -@end JMP UNLSN - -; ********** -Read_Sector: -; ********** - - LDA FA - JSR TALK - LDA #$69 ; SA = 9 - JSR TKSA - LDZ #0 - STZ IOSTATUS -@loop JSR ACPTR - STA [Long_PC],Z - INZ - BNE @loop - JMP UNTLK - -; *********** -Write_Sector: -; *********** - - JSR Reset_BP ; reset disk buffer pointer - LDA FA - JSR LISTEN - LDA #$69 ; SA = 9 - JSR TKSA - LDZ #0 - STZ IOSTATUS -@loop LDA [Long_PC],Z - JSR CIOUT - INZ - BNE @loop - JSR UNLSN - RTS - -; ***** -Set_TS: -; ***** - -; Input A = track or sector -; X = string index - -@100 CMP #100 - BCC @10 - INC Mon_Data,X - SBC #100 - BRA @100 -@10 CMP #10 - BCC @1 - INC Mon_Data+1,X - SBC #10 - BRA @10 -@1 ORA #'0' - STA Mon_Data+2,X - RTS - -; @[u],U1 mem track startsec [endsec] : read disk sector(s) - -; U1:CHANNEL DRIVE TRACK SECTOR - -; ************* -Build_U_String: -; ************* - - LDX #14 -@loop LDA U1,X - STA Mon_Data,X - DEX - CPX #2 - BCS @loop - LDA #'U' - STA Mon_Data - LDA Disk_Track - LDX #7 - JSR Set_TS - LDA Disk_Sector - LDX #11 - JMP Set_TS - -; *************** -Open_Disk_Buffer: -; *************** - - LDA #0 - STA IOSTATUS - LDA FA - JSR LISTEN ; open fa,9,"#" - LDA #$f9 ; sa = 9 - JSR SECOND - LDA #'#' ; open buffer - JSR CIOUT - JSR UNLSN - LDA IOSTATUS - LBNE Print_Disk_Status - RTS - -; **************** -Close_Disk_Buffer: -; **************** - - LDA #0 - STA IOSTATUS - LDA FA - JSR LISTEN ; open fa,9,"#" - LDA #$e9 ; sa = 9 - JSR SECOND - JSR UNLSN - LDA IOSTATUS - LBNE Print_Disk_Status - RTS - ; The 3 letter mnemonics are encoded as three 5-bit values ; and stored in a left byte MNE_L and a right byte MNE_R @@ -2648,7 +2375,7 @@ Mon_Help: !pet KEY_ESC,'s',".",KEY_ESC,'u'," - . address mnemonic operand",KEY_RETURN !pet KEY_ESC,'s',">",KEY_ESC,'u'," - > address byte sequence",KEY_RETURN !pet KEY_ESC,'s',";",KEY_ESC,'u'," - ; register contents",KEY_RETURN - !pet KEY_ESC,'s',"@",KEY_ESC,'u',"dos - @ [dos command]",KEY_RETURN + !pet KEY_ESC,'s',"@",KEY_ESC,'u',"dos - @[dos wedge command]",KEY_RETURN !pet KEY_ESC,'s',"$",KEY_ESC,'u'," - hexadecimal number (default)",KEY_RETURN !pet KEY_ESC,'s',"+",KEY_ESC,'u'," - decimal number",KEY_RETURN !pet KEY_ESC,'s',"&",KEY_ESC,'u'," - octal number",KEY_RETURN diff --git a/src/mon_m65/imports.s b/src/mon_m65/imports.s index 5b561051..c359a8ba 100644 --- a/src/mon_m65/imports.s +++ b/src/mon_m65/imports.s @@ -1,4 +1,5 @@ ;; #IMPORT# KERNAL_0 = KERNAL_0_combined.sym +;; #IMPORT# BASIC_0 = BASIC_0_combined.sym ; ; Definitions for calling MEGA65 segment KERNAL_0 routines from MON_1 @@ -13,14 +14,8 @@ ;; #ALIAS# CHRIN = KERNAL_0.proxy_M1_CHRIN ;; #ALIAS# CHROUT = KERNAL_0.proxy_M1_CHROUT -;; #ALIAS# SECOND = KERNAL_0.proxy_M1_SECOND -;; #ALIAS# TKSA = KERNAL_0.proxy_M1_TKSA -;; #ALIAS# ACPTR = KERNAL_0.proxy_M1_ACPTR -;; #ALIAS# CIOUT = KERNAL_0.proxy_M1_CIOUT -;; #ALIAS# UNTLK = KERNAL_0.proxy_M1_UNTLK -;; #ALIAS# UNLSN = KERNAL_0.proxy_M1_UNLSN -;; #ALIAS# LISTEN = KERNAL_0.proxy_M1_LISTEN -;; #ALIAS# TALK = KERNAL_0.proxy_M1_TALK + +;; #ALIAS# wedge_dos_monitor = BASIC_0.wedge_dos_monitor ; 'Print immediate', original implementation by Mike Barry, adapted to 65CE02, modified to preserve .Y diff --git a/src/mon_m65/mon_disabled.s b/src/mon_m65/mon_disabled.s new file mode 100644 index 00000000..12d29652 --- /dev/null +++ b/src/mon_m65/mon_disabled.s @@ -0,0 +1,295 @@ + +; Based on BSM (Bit Shifter's Monitor) - disabled code + +!ifdef DISABLED_DISABLED { + +!addr Disk_Track = $XX ; logical track 1 -> 255 +!addr Disk_Sector = $XX ; logical sector 0 -> 255 +!addr Disk_Status = $XX ; BCD value of status + +!addr Disk_Msg = $XX ; 40 bytes, disk status as text message + +; ************** +Get_Disk_Status: +; ************** + + LDA FA + JSR TALK + LDA #$6f + JSR TKSA + JSR ACPTR ; 1st. digit + STA Disk_Msg + ASL + ASL + ASL + ASL + STA Disk_Status ; BCD + JSR ACPTR ; 2nd. digit + STA Disk_Msg+1 + AND #15 + ORA Disk_Status + STA Disk_Status ; complete BCD number + + LDY #1 +@loop INY + JSR ACPTR + STA Disk_Msg,Y + CMP #' ' + BCS @loop + LDA #0 + STA Disk_Msg,Y + JSR UNTLK + LDA Disk_Status + RTS + +; **************** +Print_Disk_Status: +; **************** + + JSR Get_Disk_Status + +; ************* +Print_Disk_Msg: +; ************* + + JSR Print_CR + LDY #0 +@loop LDA Disk_Msg,Y + BEQ @exit + JSR CHROUT + INY + BRA @loop +@exit JMP Print_CR + +; **** +DOS_U: ; XXX connect it somehow to command list +; **** + +; @[u],U1 mem track startsec [endsec] : read disk sector(s) +; @[u],U2 mem track startsec [endsec] : write disk sector(s) + + JSR Get_Char + CMP #'1' ; U1: read + LBCC Mon_Error + CMP #'3' ; U2: write + LBCS Mon_Error + STA Mon_Data+1 ; U type + INC Buf_Index + JSR Get_LAC + LBCS Mon_Error + JSR LAC_To_LPC ; Long_PC = memory address + + JSR Get_LAC + LBCS Mon_Error + LDA Long_AC + STA Disk_Track + + JSR Get_LAC + LBCS Mon_Error + LDA Long_AC + STA Disk_Sector + + JSR Get_LAC + JSR LAC_To_LCT ; Long_CT = sector count + DEW Long_CT ; Long_CT = -1 for single + + JSR Open_Disk_Buffer + +@loop LDA Mon_Data+1 + LSR + BEQ @write + JSR Find_next_Sector + BNE @error + JSR Read_Sector + BRA @next + +@write JSR Write_Sector + JSR Find_next_Sector + BNE @error + +@next JSR Inc_LPC_Page + INC Disk_Sector + DEW Long_CT + BPL @loop + +@error JSR Print_Disk_Msg + JSR Close_Disk_Buffer + JMP Main + +; *************** +Find_next_Sector: +; *************** + + JSR Build_U_String + JSR Send_Disk_Command + JSR Get_Disk_Status + BEQ @return ; OK + CMP #$66 ; illegal track or sector + BNE @error ; error + LDA #0 + STA Disk_Sector + INC Disk_Track ; try next track + JSR Build_U_String + JSR Send_Disk_Command + JSR Get_Disk_Status + BEQ @return +@error JSR Print_Disk_Msg + LDA Disk_Status +@return RTS + +; ******************* +Open_Command_Channel: +; ******************* + + LDA FA + JSR LISTEN + LDA #$ff + JSR SECOND + LDY #0 + STY IOSTATUS + RTS + +; ******* +Reset_BP: +; ******* + + JSR Open_Command_Channel +@loop LDA BP_ZERO,Y + BEQ @end + JSR CIOUT + INY + BRA @loop +@end JMP UNLSN + +; **************** +Send_Disk_Command: +; **************** + + JSR Open_Command_Channel +@loop LDA Mon_Data,Y + BEQ @end + JSR CIOUT + INY + BRA @loop +@end JMP UNLSN + +; ********** +Read_Sector: +; ********** + + LDA FA + JSR TALK + LDA #$69 ; SA = 9 + JSR TKSA + LDZ #0 + STZ IOSTATUS +@loop JSR ACPTR + STA [Long_PC],Z + INZ + BNE @loop + JMP UNTLK + +; *********** +Write_Sector: +; *********** + + JSR Reset_BP ; reset disk buffer pointer + LDA FA + JSR LISTEN + LDA #$69 ; SA = 9 + JSR TKSA + LDZ #0 + STZ IOSTATUS +@loop LDA [Long_PC],Z + JSR CIOUT + INZ + BNE @loop + JSR UNLSN + RTS + +; ***** +Set_TS: +; ***** + +; Input A = track or sector +; X = string index + +@100 CMP #100 + BCC @10 + INC Mon_Data,X + SBC #100 + BRA @100 +@10 CMP #10 + BCC @1 + INC Mon_Data+1,X + SBC #10 + BRA @10 +@1 ORA #'0' + STA Mon_Data+2,X + RTS + +; @[u],U1 mem track startsec [endsec] : read disk sector(s) + +; U1:CHANNEL DRIVE TRACK SECTOR + +; ************* +Build_U_String: +; ************* + + LDX #14 +@loop LDA U1,X + STA Mon_Data,X + DEX + CPX #2 + BCS @loop + LDA #'U' + STA Mon_Data + LDA Disk_Track + LDX #7 + JSR Set_TS + LDA Disk_Sector + LDX #11 + JMP Set_TS + +; *************** +Open_Disk_Buffer: +; *************** + + LDA #0 + STA IOSTATUS + LDA FA + JSR LISTEN ; open fa,9,"#" + LDA #$f9 ; sa = 9 + JSR SECOND + LDA #'#' ; open buffer + JSR CIOUT + JSR UNLSN + LDA IOSTATUS + LBNE Print_Disk_Status + RTS + +; **************** +Close_Disk_Buffer: +; **************** + + LDA #0 + STA IOSTATUS + LDA FA + JSR LISTEN ; open fa,9,"#" + LDA #$e9 ; sa = 9 + JSR SECOND + JSR UNLSN + LDA IOSTATUS + LBNE Print_Disk_Status + RTS + + + + + + + + + + +} \ No newline at end of file From 966f2fbefb2ae65dafe4dbde6f3a7edd60fc6586 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 12 Jan 2021 22:54:53 +0100 Subject: [PATCH 131/257] more work on DOS Wedge integration into monitor --- src/aliases/,aliases_ram_lowmem.s | 4 +- src/basic/,basic_aliases.s | 6 ++ src/basic/wedge/wedge_dos.s | 106 ++++++++++++++++++++++++++++-- 3 files changed, 108 insertions(+), 8 deletions(-) diff --git a/src/aliases/,aliases_ram_lowmem.s b/src/aliases/,aliases_ram_lowmem.s index d6660835..89e9aa5b 100644 --- a/src/aliases/,aliases_ram_lowmem.s +++ b/src/aliases/,aliases_ram_lowmem.s @@ -16,8 +16,8 @@ !addr ADRAY2 = $05 ; $05-$06 !addr CHARAC = $07 ; [!] our implementation might be different XXX give more details !addr ENDCHR = $08 ; [!] our implementation might be different XXX give more details - !addr TRMPOS = $09 ; -- NOT IMPLEMENTED -- - !addr VERCKB = $0A ; flag used by BASIC, 0 - LOAD, 1 - VERIFY + !addr TRMPOS = $09 ; -- NOT IMPLEMENTED -- [!] on MEGA65 also used by DOS Wedge under MONITOR + !addr VERCKB = $0A ; flag used by BASIC, 0 - LOAD, 1 - VERIFY, [!] on MEGA65 also used by DOS Wedge !addr COUNT = $0B ; [!] our implementation might be different XXX give more details !addr DIMFLG = $0C ; [!] our implementation might be different XXX give more details !addr VALTYP = $0D ; expression eveluation result; $00 - float, $FF - string diff --git a/src/basic/,basic_aliases.s b/src/basic/,basic_aliases.s index b1242b1c..e98ffc1e 100644 --- a/src/basic/,basic_aliases.s +++ b/src/basic/,basic_aliases.s @@ -22,6 +22,12 @@ !addr __tokenise_work4 = $0F ; GARBFL !addr __tokenise_work5 = $0C ; DIMFLG +; +; Helper aliases for DOS Wedge under MONITOR +; + +!addr __wedge_mon = $0A ; VERCKB +!addr __wedge_spstore = $09 ; TRMPOS ; diff --git a/src/basic/wedge/wedge_dos.s b/src/basic/wedge/wedge_dos.s index df55ae78..675f58f8 100644 --- a/src/basic/wedge/wedge_dos.s +++ b/src/basic/wedge/wedge_dos.s @@ -22,7 +22,11 @@ wedge_dos_monitor: ; entry point for the MONITOR wedge_dos_monitor: - rts + tsx + stx __wedge_spstore ; preserve stack pointer + + lda #$FF ; mark MONITOR-called wedge + bra wedge_dos_monitor_cont } ; .X has to contain size of the buffer @@ -44,10 +48,16 @@ wedge_dos: } else { ; Prepare buffer - finish it with '0' - lda #$00 sta BUF,x +!ifdef CONFIG_MB_M65 { + +wedge_dos_monitor_cont: + + sta __wedge_mon ; mark BASIC/MONITOR-called wedge +} + ; Close all the channels, so that wedge has full control jsr JCLALL @@ -164,7 +174,11 @@ wedge_dos_change_drive: jsr fetch_uint8 cmp #$08 +!ifdef CONFIG_MB_M65 { + +bcc wedge_dos_wrapper_ILLEGAL_DEVICE_NUMBER_error +} else { +bcc do_ILLEGAL_DEVICE_NUMBER_error +} ; Check if this is end of command, or directory request @@ -176,8 +190,11 @@ wedge_dos_change_drive: ; Make sure this is end of command cmp #$00 +!ifdef CONFIG_MB_M65 { + +bne wedge_dos_wrapper_SYNTAX_error +} else { +bne do_SYNTAX_error - +} ; Store new device number and return to shell pla @@ -221,8 +238,11 @@ wedge_dos_status_get_loop: ; Check for buffer overflow cpy #$50 +!ifdef CONFIG_MB_M65 { + +beq wedge_dos_wrapper_OVERFLOW_error +} else { +beq do_OVERFLOW_error - +} ; Check for EOF jsr JREADST @@ -326,8 +346,12 @@ wedge_dos_directory_line: jsr JCHRIN bcs wedge_dos_basic_error sta BUF, y - cpy #$50 - +beq do_OVERFLOW_error ; branch if line too long + cpy #$50 ; make sure line is not too long +!ifdef CONFIG_MB_M65 { + +beq wedge_dos_wrapper_OVERFLOW_error +} else { + +beq do_OVERFLOW_error +} jsr JREADST bne @6 ; end of file cpy #$04 ; 2 bytes (pointer to next line) + 2 bytes (line number) @@ -371,14 +395,22 @@ wedge_dos_directory_display: wedge_dos_clean_exit: jsr JCLALL +!ifdef CONFIG_MB_M65 { + jmp wedge_dos_wrapper_exit +} else { jmp shell_main_loop +} wedge_dos_basic_error: pha jsr JCLALL pla +!ifdef CONFIG_MB_M65 { + bra wedge_dos_wrapper_kernal_error +} else { jmp do_kernal_error +} wedge_dos_setnam: @@ -398,6 +430,68 @@ wedge_dos_setnam: jmp JSETNAM +!ifdef CONFIG_MB_M65 { + +wedge_dos_wrapper_exit: + + bbr7 __wedge_mon, wedge_dos_clean_exit_basic + + ; FALLTROUGH + +wedge_dos_wrapper_exit_nocheck: + + ldx __wedge_spstore + txs + rts + +wedge_dos_wrapper_SYNTAX_error: + + bbr7 __wedge_mon, wedge_dos_SYNTAX_error + + ; XXX + +wedge_dos_wrapper_ILLEGAL_DEVICE_NUMBER_error: + + bbr7 __wedge_mon, wedge_dos_ILLEGAL_DEVICE_NUMBER_error + + ; XXX + +wedge_dos_wrapper_OVERFLOW_error: + + bbr7 __wedge_mon, wedge_dos_OVERFLOW_error + + ; XXX + +wedge_dos_wrapper_kernal_error: + + bbr7 __wedge_mon, wedge_dos_kernal_error + + ; XXX + + bra wedge_dos_wrapper_exit_nocheck + +wedge_dos_SYNTAX_error: + + jmp do_SYNTAX_error + +wedge_dos_ILLEGAL_DEVICE_NUMBER_error: + + jmp do_ILLEGAL_DEVICE_NUMBER_error + +wedge_dos_OVERFLOW_error: + + jmp do_OVERFLOW_error + +wedge_dos_kernal_error: + + jmp do_kernal_error + +wedge_dos_clean_exit_basic: + + jmp shell_main_loop + + +} ; MEGA65 specific code } ; ROM layout From 9ccd94b36ed3214fc69d7b26cde7e7c05cfe891e Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 13 Jan 2021 23:05:30 +0100 Subject: [PATCH 132/257] DOS Wedge now fully works from within the MONITOR --- src/basic/,basic_aliases.s | 5 ++-- .../board_m65/4000.mega65_vectable_basic_1.s | 2 +- src/basic/board_m65/mega65_imports.s | 1 + src/basic/board_m65/mega65_proxies.s | 7 +++++ src/basic/engine_runtime/do_error.s | 18 ++++++++++++ src/basic/wedge/wedge_dos.s | 28 ++++++++++++++----- src/mon_m65/bsmon.s | 3 +- 7 files changed, 52 insertions(+), 12 deletions(-) diff --git a/src/basic/,basic_aliases.s b/src/basic/,basic_aliases.s index e98ffc1e..5a03a2a4 100644 --- a/src/basic/,basic_aliases.s +++ b/src/basic/,basic_aliases.s @@ -26,9 +26,8 @@ ; Helper aliases for DOS Wedge under MONITOR ; -!addr __wedge_mon = $0A ; VERCKB -!addr __wedge_spstore = $09 ; TRMPOS - +!addr __wedge_mon = $0A ; VERCKB +!addr __wedge_spstore = $09 ; TRMPOS ; ; Aliases for the tokeniser - reuse the CPU stack diff --git a/src/basic/board_m65/4000.mega65_vectable_basic_1.s b/src/basic/board_m65/4000.mega65_vectable_basic_1.s index da8cc963..bbfa50cc 100644 --- a/src/basic/board_m65/4000.mega65_vectable_basic_1.s +++ b/src/basic/board_m65/4000.mega65_vectable_basic_1.s @@ -28,7 +28,7 @@ !addr VB1__helper_ask_if_sure = $4000 + 2 * 13 !addr VB1__helper_eggshell = $4000 + 2 * 14 !addr VB1__wedge_dos = $4000 + 2 * 15 - !addr VB1__wedge_dos_monitor = $4000 + 2 * 15 + !addr VB1__wedge_dos_monitor = $4000 + 2 * 16 } else { diff --git a/src/basic/board_m65/mega65_imports.s b/src/basic/board_m65/mega65_imports.s index af9facea..999391b6 100644 --- a/src/basic/board_m65/mega65_imports.s +++ b/src/basic/board_m65/mega65_imports.s @@ -41,6 +41,7 @@ ;; #ALIAS# do_error_fetch = BASIC_0.do_error_fetch ;; #ALIAS# do_basic_error = BASIC_0.do_basic_error ;; #ALIAS# str_rev_question = BASIC_0.str_rev_question +;; #ALIAS# do_error_print_only = BASIC_0.proxy_B1_do_error_print_only ;; #ALIAS# fetch_character = BASIC_0.proxy_B1_fetch_character ;; #ALIAS# fetch_character_skip_spaces = BASIC_0.proxy_B1_fetch_character_skip_spaces ;; #ALIAS# fetch_uint8 = BASIC_0.proxy_B1_fetch_uint8 diff --git a/src/basic/board_m65/mega65_proxies.s b/src/basic/board_m65/mega65_proxies.s index c10cb70b..fd0ecb06 100644 --- a/src/basic/board_m65/mega65_proxies.s +++ b/src/basic/board_m65/mega65_proxies.s @@ -138,4 +138,11 @@ proxy_B1_shell_main_loop: jsr map_NORMAL jmp shell_main_loop + +proxy_B1_do_error_print_only: + + jsr map_NORMAL + jsr do_error_print_only + bra proxy_B1_end_2 + } diff --git a/src/basic/engine_runtime/do_error.s b/src/basic/engine_runtime/do_error.s index 068f8504..3d9735ab 100644 --- a/src/basic/engine_runtime/do_error.s +++ b/src/basic/engine_runtime/do_error.s @@ -200,6 +200,7 @@ do_basic_error: ; error code in .X +phx_trash_a jsr tmpstr_free_all + ldx #IDX__STR_RET_QM jsr print_packed_misc_str +plx_trash_a @@ -233,4 +234,21 @@ do_basic_error: ; error code in .X jmp shell_main_loop +!ifdef CONFIG_MB_M65 { + +do_error_print_only: ; used by DOS Wedge + + +phx_trash_a + lda #'?' + jsr JCHROUT + +plx_trash_a + + jsr print_packed_error + + ldx #IDX__STR_ERROR + jmp print_packed_misc_str +} + + + } ; ROM layout diff --git a/src/basic/wedge/wedge_dos.s b/src/basic/wedge/wedge_dos.s index 675f58f8..7fc3085f 100644 --- a/src/basic/wedge/wedge_dos.s +++ b/src/basic/wedge/wedge_dos.s @@ -199,7 +199,11 @@ wedge_dos_change_drive: pla sta FA +!ifdef CONFIG_MB_M65 { + jmp wedge_dos_wrapper_exit +} else { jmp shell_main_loop +} wedge_dos_status_get: @@ -447,27 +451,37 @@ wedge_dos_wrapper_exit_nocheck: wedge_dos_wrapper_SYNTAX_error: bbr7 __wedge_mon, wedge_dos_SYNTAX_error - - ; XXX + ldx #$0A + bra wedge_dos_wrapper_error_common wedge_dos_wrapper_ILLEGAL_DEVICE_NUMBER_error: bbr7 __wedge_mon, wedge_dos_ILLEGAL_DEVICE_NUMBER_error - - ; XXX + ldx #$08 + bra wedge_dos_wrapper_error_common wedge_dos_wrapper_OVERFLOW_error: bbr7 __wedge_mon, wedge_dos_OVERFLOW_error - - ; XXX + ldx #$0E + bra wedge_dos_wrapper_error_common wedge_dos_wrapper_kernal_error: bbr7 __wedge_mon, wedge_dos_kernal_error + tax + bne @1 + ldx #$1E ; BREAK error + 1 +@1: + dex - ; XXX + ; FALLTROUGH +wedge_dos_wrapper_error_common: + + ; Print error - within the MONITOR + + jsr do_error_print_only bra wedge_dos_wrapper_exit_nocheck wedge_dos_SYNTAX_error: diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 5072fab0..fc62afe8 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -201,7 +201,7 @@ Jump_Table: !word Mon_Register ; R !word Mon_Transfer ; T XXX to be debugged/adapted !word Mon_Exit ; X - !word Mon_DOS ; @ XXX to be debugged/adapted + !word Mon_DOS ; @ !word Mon_Assemble ; . XXX to be debugged/adapted !word Mon_Set_Memory ; > XXX to be debugged/adapted !word Mon_Set_Register ; ; XXX to be debugged/adapted @@ -2025,6 +2025,7 @@ Mon_DOS: ; ****** JSR wedge_dos_monitor + JSR Print_CR JMP Main From 68a784d563763c32d5d6b6ed9b8224536138de72 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 14 Jan 2021 18:08:03 +0100 Subject: [PATCH 133/257] monitor command 'F' adaptation, not tested yet --- src/kernal/board_m65/mega65_proxies_monitor.s | 6 + src/mon_m65/,aliases_mon.s | 68 ++++---- src/mon_m65/bsmon.s | 53 +----- src/mon_m65/imports.s | 1 + src/mon_m65/mon_command_bits.s | 6 +- src/mon_m65/mon_command_disassemble.s | 7 +- src/mon_m65/mon_command_fill.s | 31 ++++ src/mon_m65/mon_command_memory.s | 3 +- src/mon_m65/mon_debug.s | 2 +- src/mon_m65/mon_disabled.s | 1 + src/mon_m65/mon_helper_get_addr_to_lac.s | 3 +- src/mon_m65/mon_helper_get_param_range.s | 42 +++++ src/mon_m65/mon_helper_memory.s | 158 ++++++++++++------ 13 files changed, 240 insertions(+), 141 deletions(-) create mode 100644 src/mon_m65/mon_command_fill.s create mode 100644 src/mon_m65/mon_helper_get_param_range.s diff --git a/src/kernal/board_m65/mega65_proxies_monitor.s b/src/kernal/board_m65/mega65_proxies_monitor.s index 1dc9b3d6..f16f829c 100644 --- a/src/kernal/board_m65/mega65_proxies_monitor.s +++ b/src/kernal/board_m65/mega65_proxies_monitor.s @@ -34,3 +34,9 @@ proxy_M1_memread: jsr map_NORMAL lda [Long__TMP], z bra proxy_M1_end + +proxy_M1_memwrite: + + jsr map_NORMAL + sta [Long__TMP], z + bra proxy_M1_end diff --git a/src/mon_m65/,aliases_mon.s b/src/mon_m65/,aliases_mon.s index c9a36459..baf6877a 100644 --- a/src/mon_m65/,aliases_mon.s +++ b/src/mon_m65/,aliases_mon.s @@ -10,54 +10,56 @@ ; * Register storage * ; ******************** -!addr Adr_Mode = 2 ; $00 = 64K address, $80 = M65 flat address ; XXX adapt the implementation -!addr PCH = 3 -!addr PCL = 4 -!addr SR = 5 -!addr AC = 6 -!addr XR = 7 -!addr YR = 8 -!addr ZR = 9 -!addr BP = 10 -!addr SPH = 11 -!addr SPL = 12 - +!addr Addr_Mode = 2 ; $00 = 64K address, $80 = M65 flat address +!addr PCH = 3 +!addr PCL = 4 +!addr SR = 5 +!addr AC = 6 +!addr XR = 7 +!addr YR = 8 +!addr ZR = 9 +!addr BP = 10 +!addr SPH = 11 +!addr SPL = 12 ; ******************* ; * Other variables * ; ******************* +!addr Src_Addr_Mode = 13 ; Addr_Mode for 1st address +!addr Dst_Addr_Mode = 14 ; Addr_Mode for 2nd address + +!addr MODE_80 = 15 ; 80 column / 40 volumn flag ; A set of 32 bit variables also used as 32 bit pointer -!addr Long_AC = $10 ; 32 bit accumulator -!addr Long_CT = $14 ; 32 bit counter -!addr Long_PC = $18 ; 32 bit program counter -!addr Long_DA = $1C ; 32 bit data pointer +!addr Long_AC = $10 ; 32 bit accumulator +!addr Long_CT = $14 ; 32 bit counter +!addr Long_PC = $18 ; 32 bit program counter +!addr Long_DA = $1C ; 32 bit data pointer ; Flags are used in BBR BBS instructions -!addr Adr_Flags = $20 -!addr Mode_Flags = $21 -!addr Op_Code = $22 -!addr Op_Flag = $23 ; 7: two operands +!addr Adr_Flags = $20 +!addr Mode_Flags = $21 +!addr Op_Code = $22 +!addr Op_Flag = $23 ; 7: two operands ; 6: long branch ; 5: 32 bit address ; 4: Q register -!addr Op_Size = $24 -!addr Dig_Cnt = $25 -!addr Buf_Index = $26 +!addr Op_Size = $24 +!addr Dig_Cnt = $25 +!addr Buf_Index = $26 -!addr MODE_80 = $27 ; 80 column / 40 volumn flag ; XXX add routine to detect this -!addr SP_Storage = $28 ; location to preserve stack pointer +!addr SP_Storage = $27 ; location to preserve stack pointer -!addr X_Vector = $29 ; monitor exit vector -!addr Ix_Mne = $2B ; index to mnemonics table -!addr Op_Mne = $2C ; 3 bytes for mnemonic -!addr Op_Ix = $2F ; type of constant -!addr Op_Len = $30 ; length of operand +!addr X_Vector = $28 ; monitor exit vector +!addr Ix_Mne = $2A ; index to mnemonics table +!addr Op_Mne = $2B ; 3 bytes for mnemonic +!addr Op_Ix = $2E ; type of constant +!addr Op_Len = $2F ; length of operand - ; $31-$63 - free space, unused for now + ; $30-$63 - free space, unused for now -!addr Long_TMP = $64 ; temporary pointer, for fetching/storing memory content; has to be the same as Long__TMP in Kernal -!addr Mon_Data = $68 ; 40 bytes, buffer for hunt +!addr Long_TMP = $64 ; temporary pointer, for fetching/storing memory content; has to be the same as Long__TMP in Kernal +!addr Mon_Data = $68 ; 40 bytes, buffer for hunt diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index fc62afe8..1303c220 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -18,7 +18,7 @@ Mon_Call: ; set default addressing mode to 64K LDA #0 - STA Adr_Mode + STA Addr_Mode ; clear register for monitor call @@ -433,7 +433,7 @@ Mon_Set_Register: ; XXX this needs adaptation @loop JSR Get_LAC BCS @exit LDA Long_AC - STA Adr_Mode,Y + STA Addr_Mode,Y INY CPY #9 BCC @loop @@ -554,7 +554,7 @@ Dump_Row: Mon_Transfer: ; *********** - JSR Param_Range ; Long_PC = source + JSR Get_Param_Range ; Long_PC = source LBCS Mon_Error ; Long_CT = count JSR Get_LAC ; Long_AC = target LBCS Mon_Error @@ -587,7 +587,7 @@ Mon_Transfer: Mon_Compare: ; ********** - JSR Param_Range ; Long_PC = source + JSR Get_Param_Range ; Long_PC = source LBCS Mon_Error ; Long_CT = count JSR Get_LAC ; Long_AC = target LBCS Mon_Error @@ -607,7 +607,7 @@ Mon_Compare: Mon_Hunt: ; ******* - JSR Param_Range ; Long_PC = start + JSR Get_Param_Range ; Long_PC = start LBCS Mon_Error ; Long_CT = count LDY #0 JSR Get_Char @@ -738,23 +738,6 @@ Load_Save: ; STA SA ; and ignore load address from file ; BRA @do -; ******* -Mon_Fill: -; ******* - - JSR Param_Range ; Long_PC = target - LBCS Mon_Error ; Long_CT = count - JSR Get_LAC ; Long_AC = fill byte - LBCS Mon_Error - JSR Print_CR - LDZ #0 -@loop LDA Long_AC - STA [Long_PC],Z - JSR Inc_LPC - JSR Dec_LCT - BPL @loop - JMP Main - ; *********** Mon_Assemble: ; *********** @@ -1680,7 +1663,7 @@ Read_Number: ; XXX obsolete, to be replaced Print_LPC_Addr: ; prints out the address in PC ; ************* - bbr7 Adr_Mode, @short + bbr7 Addr_Mode, @short lda Long_PC+3 jsr Print_Hex_Low_Digit @@ -1850,30 +1833,6 @@ Inc_LPC_Page: Inc_LPC_Page_return RTS -; ********** -Param_Range: -; ********** - -; read two (address) parameters - -; Long_CT = difference (2nd. minus 1st.) -; Long_PC = 1st. parameter -; Long_DA = 2nd. parameter - -; carry on exit flags error - - JSR Get_LAC ; get 1st. parameter - BCS @error - JSR LAC_To_LPC ; Long_PC = 1st. address - JSR Get_LAC - BCS @error - JSR LAC_To_LDA ; Long_DA = 2nd. address - JSR LAC_Minus_LPC ; Long_CT = range - BCC @error - CLC - RTS -@error SEC - RTS ; ******** Converter: diff --git a/src/mon_m65/imports.s b/src/mon_m65/imports.s index c359a8ba..07ea79b5 100644 --- a/src/mon_m65/imports.s +++ b/src/mon_m65/imports.s @@ -11,6 +11,7 @@ ;; #ALIAS# monitor_exit = KERNAL_0.m65_shadow_BZP ;; #ALIAS# monitor_memread_helper = KERNAL_0.proxy_M1_memread +;; #ALIAS# monitor_memwrite_helper = KERNAL_0.proxy_M1_memwrite ;; #ALIAS# CHRIN = KERNAL_0.proxy_M1_CHRIN ;; #ALIAS# CHROUT = KERNAL_0.proxy_M1_CHROUT diff --git a/src/mon_m65/mon_command_bits.s b/src/mon_m65/mon_command_bits.s index 8d6b90b1..57fb2d87 100644 --- a/src/mon_m65/mon_command_bits.s +++ b/src/mon_m65/mon_command_bits.s @@ -5,10 +5,10 @@ Mon_Bits: jsr Set_MODE_80 - lda Adr_Mode + lda Addr_Mode pha ; store addressing mode, in case no parameter is given lda #$00 - sta Adr_Mode ; by default use C64-style addressing + sta Addr_Mode ; by default use C64-style addressing jsr Get_Addr_To_LAC ; get 1st parameter (start address) beq @nopar @@ -19,7 +19,7 @@ Mon_Bits: @nopar: pla ; retrieve old addressing mode - sta Adr_Mode + sta Addr_Mode @start: diff --git a/src/mon_m65/mon_command_disassemble.s b/src/mon_m65/mon_command_disassemble.s index 6bc8269e..68f33348 100644 --- a/src/mon_m65/mon_command_disassemble.s +++ b/src/mon_m65/mon_command_disassemble.s @@ -1,12 +1,13 @@ ; Based on BSM (Bit Shifter's Monitor) + Mon_Disassemble: - lda Adr_Mode + lda Addr_Mode pha ; store addressing mode, in case no parameter is given lda #$00 - sta Adr_Mode ; by default use C64-style addressing + sta Addr_Mode ; by default use C64-style addressing jsr Get_Addr_To_LAC ; get 1st parameter (start address) beq @nopar @@ -21,7 +22,7 @@ Mon_Disassemble: @nopar: pla ; retrieve old addressing mode - sta Adr_Mode + sta Addr_Mode @norange: diff --git a/src/mon_m65/mon_command_fill.s b/src/mon_m65/mon_command_fill.s new file mode 100644 index 00000000..66836da3 --- /dev/null +++ b/src/mon_m65/mon_command_fill.s @@ -0,0 +1,31 @@ + +; Based on BSM (Bit Shifter's Monitor) + + +; ******* +Mon_Fill: +; ******* + + jsr Get_Param_Range ; Long_PC = target + +bcs Mon_Error ; Long_CT = count + + jsr Get_Addr_To_LAC ; Long_AC = fill byte + +beq Mon_Error + lda Long_AC+1 + ora Long_AC+2 + ora Long_AC+3 + +bne Mon_Error ; only 1 fill byte allowed + + jsr Print_CR + + ldz #$00 + +@loop: + + lda Long_AC + jsr Put_To_Memory + jsr Inc_LPC + jsr Dec_LCT + bpl @loop + + jmp Main diff --git a/src/mon_m65/mon_command_memory.s b/src/mon_m65/mon_command_memory.s index d59394dc..02103be1 100644 --- a/src/mon_m65/mon_command_memory.s +++ b/src/mon_m65/mon_command_memory.s @@ -1,11 +1,12 @@ ; Based on BSM (Bit Shifter's Monitor) + Mon_Memory: jsr Set_MODE_80 lda #$00 - sta Adr_Mode ; by default use C64-style addressing + sta Addr_Mode ; by default use C64-style addressing jsr Get_Addr_To_LAC ; get 1st parameter (start address) +beq Mon_Error diff --git a/src/mon_m65/mon_debug.s b/src/mon_m65/mon_debug.s index aa66c1e8..ad9f5fed 100644 --- a/src/mon_m65/mon_debug.s +++ b/src/mon_m65/mon_debug.s @@ -29,7 +29,7 @@ DBG_print_long_pc: jsr PRIMM !pet " addr mode : ", 0 - lda Adr_Mode + lda Addr_Mode jsr Print_Hex jsr PRIMM diff --git a/src/mon_m65/mon_disabled.s b/src/mon_m65/mon_disabled.s index 12d29652..7fbe5b29 100644 --- a/src/mon_m65/mon_disabled.s +++ b/src/mon_m65/mon_disabled.s @@ -1,6 +1,7 @@ ; Based on BSM (Bit Shifter's Monitor) - disabled code + !ifdef DISABLED_DISABLED { !addr Disk_Track = $XX ; logical track 1 -> 255 diff --git a/src/mon_m65/mon_helper_get_addr_to_lac.s b/src/mon_m65/mon_helper_get_addr_to_lac.s index a165f8db..a2a17a3f 100644 --- a/src/mon_m65/mon_helper_get_addr_to_lac.s +++ b/src/mon_m65/mon_helper_get_addr_to_lac.s @@ -1,6 +1,7 @@ ; Based on BSM (Bit Shifter's Monitor) + Get_Addr_To_LAC: phx @@ -133,7 +134,7 @@ Get_Addr_To_LAC: @set_long_mode: lda #$80 ; set addressing mode to long - sta Adr_Mode + sta Addr_Mode @check_done: diff --git a/src/mon_m65/mon_helper_get_param_range.s b/src/mon_m65/mon_helper_get_param_range.s new file mode 100644 index 00000000..2f749269 --- /dev/null +++ b/src/mon_m65/mon_helper_get_param_range.s @@ -0,0 +1,42 @@ + +; Based on BSM (Bit Shifter's Monitor) + + +Get_Param_Range: + +; read two (address) parameters + +; Long_CT - difference (2nd minus 1st parameter) +; Long_PC - 1st parameter +; Src_Addr_Mode - 1st parameter addressing mode +; Long_DA - 2nd parameter +; Dst_Addr_Mode - 2nd parameter addressing mode + +; carry on exit - 2nd parameter lower than 1st one + + jsr @get_helper + sta Src_Addr_Mode + jsr LAC_To_LPC ; Long_PC - 1st address + + jsr @get_helper + sta Dst_Addr_Mode + jsr LAC_To_LDA ; Long_PC - 2nd address + + jsr LAC_Minus_LPC ; Long_CT = range + bcc @error + clc + rts + +@error: + + sec + rts + +@get_helper: + + lda #$00 + sta Addr_Mode + jsr Get_Addr_To_LAC + beq @error + lda Addr_Mode + rts diff --git a/src/mon_m65/mon_helper_memory.s b/src/mon_m65/mon_helper_memory.s index f60e11fd..5676d71d 100644 --- a/src/mon_m65/mon_helper_memory.s +++ b/src/mon_m65/mon_helper_memory.s @@ -10,6 +10,74 @@ Get_From_Memory: ; Copy PC + .Z to TMP, set .Z to 0 + jsr Get_Put_Memory_Prepare + + ; Check addressing mode + + bbs7 Addr_Mode, @mode_flat + +@mode_64k: + + lda #$00 ; make sure this is 64K address + sta Long_TMP+2 + sta Long_TMP+3 + + lda Long_TMP+1 + bne @read_64k ; branch if no need to handle shadow memory (not zero page) + lda Long_TMP+0 + dec + dec + cmp #$8E + bcs @read_64k ; branch if no need to handle shadow memory (0, 1, or above $8F) +@1: + bra @read_shadow + +@mode_flat: + + lda Long_TMP+3 + ora Long_TMP+2 + ora Long_TMP+1 + bne @read_flat + + lda Long_TMP+0 + dec + dec + cmp #$8E + bcs @read_flat + bra @1 + +@read_64k: + + bbr7 Long_TMP+1, @read_flat ; below $8000 we do not want to retrieve MAP/EOM banked memory + bra @read + +@read_shadow: + + jsr Get_Put_Memory_Prepare_Shadow + +@read_flat: + + jsr monitor_memread_helper + bra Get_Put_Memory_End + +@read: + + lda (Long_TMP),Z + + ; FALLTROUGH + +Get_Put_Memory_End: + + plz + ply + plx + + rts + +Get_Put_Memory_Prepare: + + ; Copy PC + .Z to TMP, set .Z to 0 + clc tza adc Long_PC+0 @@ -26,47 +94,11 @@ Get_From_Memory: ldz #$00 - ; Check addressing mode + rts - bbs7 Adr_Mode, @mode_flat +Get_Put_Memory_Prepare_Shadow: -@mode_64k: - - lda #$00 ; make sure this is 64K address - sta Long_TMP+2 - sta Long_TMP+3 - - lda Long_TMP+1 - bne @read_64k ; branch if no need to handle shadow memory (not zero page) - lda Long_TMP+0 - dec - dec - cmp #$8E - bcs @read_64k ; branch if no need to handle shadow memory (0, 1, or above $8F) -@2: sta Long_TMP+0 - bra @read_shadow - -@mode_flat: - - lda Long_TMP+3 - ora Long_TMP+2 - ora Long_TMP+1 - bne @read_flat - - lda Long_TMP+0 - dec - dec - cmp #$8E - bcs @read_flat - bra @2 - -@read_64k: - - bbr7 Long_TMP+1, @read_flat ; below $8000 we do not want to retrieve MAP/EOM banked memory - bra @read - -@read_shadow: lda #MEMCONF_SHADOW_BZP_1 sta Long_TMP+1 @@ -75,18 +107,40 @@ Get_From_Memory: lda #MEMCONF_SHADOW_BZP_3 sta Long_TMP+3 -@read_flat: - - jsr monitor_memread_helper - bra @end - -@read: - lda (Long_TMP),Z - -@end: - - plz - ply - plx - rts + + + +Put_To_Memory: + + phx + phy + phz + pha + + ; Copy PC + .Z to TMP, set .Z to 0 + + jsr Get_Put_Memory_Prepare + + ; Check if address is related to shadow zeropage + + lda Long_TMP+1 + ora Long_TMP+2 + ora Long_TMP+3 + beq @write_flat + + lda Long_TMP+0 + dec + dec + cmp #$8E + bcs @write_flat + +@write_shadow: + + jsr Get_Put_Memory_Prepare_Shadow + +@write_flat: + + pla + jsr monitor_memwrite_helper + bra Get_Put_Memory_End From e9e7490cb768fd0ea68d3969049546cbbc69c3d2 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 14 Jan 2021 18:12:51 +0100 Subject: [PATCH 134/257] small 'F' command bugfix --- src/mon_m65/bsmon.s | 2 +- src/mon_m65/mon_command_fill.s | 2 -- src/mon_m65/mon_helper_memory.s | 2 +- 3 files changed, 2 insertions(+), 4 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 1303c220..9c1a1425 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -193,7 +193,7 @@ Jump_Table: !word Mon_Bits ; B !word Mon_Compare ; C XXX to be debugged/adapted !word Mon_Disassemble ; D - !word Mon_Fill ; F XXX to be debugged/adapted + !word Mon_Fill ; F XXX to be bugfixed !word Mon_Go ; G XXX to be debugged/adapted !word Mon_Hunt ; H XXX to be debugged/adapted !word Mon_JSR ; J XXX to be debugged/adapted diff --git a/src/mon_m65/mon_command_fill.s b/src/mon_m65/mon_command_fill.s index 66836da3..f537c5bb 100644 --- a/src/mon_m65/mon_command_fill.s +++ b/src/mon_m65/mon_command_fill.s @@ -16,8 +16,6 @@ Mon_Fill: ora Long_AC+3 +bne Mon_Error ; only 1 fill byte allowed - jsr Print_CR - ldz #$00 @loop: diff --git a/src/mon_m65/mon_helper_memory.s b/src/mon_m65/mon_helper_memory.s index 5676d71d..ffb48462 100644 --- a/src/mon_m65/mon_helper_memory.s +++ b/src/mon_m65/mon_helper_memory.s @@ -137,7 +137,7 @@ Put_To_Memory: @write_shadow: - jsr Get_Put_Memory_Prepare_Shadow + jsr Get_Put_Memory_Prepare_Shadow @write_flat: From 541e84c4bb1313371226c21c480a3973e4219db1 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 14 Jan 2021 18:46:21 +0100 Subject: [PATCH 135/257] fixed 'F' monitor command --- src/mon_m65/bsmon.s | 2 +- src/mon_m65/mon_helper_memory.s | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 9c1a1425..449f029b 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -193,7 +193,7 @@ Jump_Table: !word Mon_Bits ; B !word Mon_Compare ; C XXX to be debugged/adapted !word Mon_Disassemble ; D - !word Mon_Fill ; F XXX to be bugfixed + !word Mon_Fill ; F !word Mon_Go ; G XXX to be debugged/adapted !word Mon_Hunt ; H XXX to be debugged/adapted !word Mon_JSR ; J XXX to be debugged/adapted diff --git a/src/mon_m65/mon_helper_memory.s b/src/mon_m65/mon_helper_memory.s index ffb48462..43d5cb33 100644 --- a/src/mon_m65/mon_helper_memory.s +++ b/src/mon_m65/mon_helper_memory.s @@ -127,7 +127,7 @@ Put_To_Memory: lda Long_TMP+1 ora Long_TMP+2 ora Long_TMP+3 - beq @write_flat + bne @write_flat lda Long_TMP+0 dec From 8bc074c070e8a430c7d44b5cc5973a2aed021e4b Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 14 Jan 2021 21:56:23 +0100 Subject: [PATCH 136/257] initial 'T' command adaptation, does not work yet --- src/mon_m65/,aliases_mon.s | 4 +- src/mon_m65/bsmon.s | 47 ++++------------------ src/mon_m65/mon_command_bits.s | 2 +- src/mon_m65/mon_command_fill.s | 2 +- src/mon_m65/mon_command_transfer.s | 42 ++++++++++++++++++++ src/mon_m65/mon_helper_memory.s | 64 +++++++++++++++++++++++++++++- 6 files changed, 115 insertions(+), 46 deletions(-) create mode 100644 src/mon_m65/mon_command_transfer.s diff --git a/src/mon_m65/,aliases_mon.s b/src/mon_m65/,aliases_mon.s index baf6877a..814abeea 100644 --- a/src/mon_m65/,aliases_mon.s +++ b/src/mon_m65/,aliases_mon.s @@ -26,8 +26,8 @@ ; * Other variables * ; ******************* -!addr Src_Addr_Mode = 13 ; Addr_Mode for 1st address -!addr Dst_Addr_Mode = 14 ; Addr_Mode for 2nd address +!addr Src_Addr_Mode = 13 ; Addr_Mode for 1st address XXX can this be replaced with Addr_Mode? +!addr Dst_Addr_Mode = 14 ; Addr_Mode for 2nd address XXX is it needed? !addr MODE_80 = 15 ; 80 column / 40 volumn flag diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 449f029b..5e26a4ce 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -199,7 +199,7 @@ Jump_Table: !word Mon_JSR ; J XXX to be debugged/adapted !word Mon_Memory ; M !word Mon_Register ; R - !word Mon_Transfer ; T XXX to be debugged/adapted + !word Mon_Transfer ; T XXX to be bugfixed !word Mon_Exit ; X !word Mon_DOS ; @ !word Mon_Assemble ; . XXX to be debugged/adapted @@ -399,7 +399,7 @@ Fetch: PHZ TYA TAZ - JSR Get_From_Memory + JSR Get_From_Memory_LPC PLZ AND #$ff RTS @@ -482,10 +482,10 @@ Mon_JSR: jmp Main ; *********** -Dump_4_Bytes: ; XXX to be adapted +Dump_4_Bytes: ; *********** -@loop JSR Get_From_Memory +@loop JSR Get_From_Memory_LPC JSR Print_Hex_Blank INZ TZA @@ -494,10 +494,10 @@ Dump_4_Bytes: ; XXX to be adapted RTS ; *********** -Dump_4_Chars: ; XXX to be adapted +Dump_4_Chars: ; *********** -@loop JSR Get_From_Memory +@loop JSR Get_From_Memory_LPC TAY AND #%01100000 BNE @laba @@ -550,39 +550,6 @@ Dump_Row: PLZ RTS -; *********** -Mon_Transfer: -; *********** - - JSR Get_Param_Range ; Long_PC = source - LBCS Mon_Error ; Long_CT = count - JSR Get_LAC ; Long_AC = target - LBCS Mon_Error - - LDZ #0 - JSR LAC_Compare_LPC ; target - source - BCC @forward - -; source < target: backward transfer - - JSR LAC_Plus_LCT ; Long_AC = end of target - -@lpback LDA [Long_DA],Z ; backward copy - STA [Long_AC],Z - JSR Dec_LDA - JSR Dec_LAC - JSR Dec_LCT - BPL @lpback - JMP Main - -@forward LDA [Long_PC],Z ; forward copy - STA [Long_AC],Z - JSR Inc_LPC - JSR Inc_LAC - JSR Dec_LCT - BPL @forward - JMP Main - ; ********** Mon_Compare: ; ********** @@ -2325,7 +2292,7 @@ Mon_Help: !pet KEY_ESC,'s',"g",KEY_ESC,'u',"o - g [address]",KEY_RETURN !pet KEY_ESC,'s',"h",KEY_ESC,'u',"unt - h from to (string or bytes)",KEY_RETURN !pet KEY_ESC,'s',"j",KEY_ESC,'u',"sr - j address",KEY_RETURN - !pet KEY_ESC,'s',"l",KEY_ESC,'u',"oad - l filename [uniy [address]]",KEY_RETURN + !pet KEY_ESC,'s',"l",KEY_ESC,'u',"oad - l filename [unit [address]]",KEY_RETURN !pet KEY_ESC,'s',"m",KEY_ESC,'u',"emory - m [from [to]]",KEY_RETURN !pet KEY_ESC,'s',"r",KEY_ESC,'u',"egisters - r",KEY_RETURN !pet KEY_ESC,'s',"s",KEY_ESC,'u',"ave - s filename unit from to",KEY_RETURN diff --git a/src/mon_m65/mon_command_bits.s b/src/mon_m65/mon_command_bits.s index 57fb2d87..7d9248e6 100644 --- a/src/mon_m65/mon_command_bits.s +++ b/src/mon_m65/mon_command_bits.s @@ -46,7 +46,7 @@ Mon_Bits: plx - jsr Get_From_Memory + jsr Get_From_Memory_LPC jsr Print_Bits clc tza diff --git a/src/mon_m65/mon_command_fill.s b/src/mon_m65/mon_command_fill.s index f537c5bb..9a9de779 100644 --- a/src/mon_m65/mon_command_fill.s +++ b/src/mon_m65/mon_command_fill.s @@ -21,7 +21,7 @@ Mon_Fill: @loop: lda Long_AC - jsr Put_To_Memory + jsr Put_To_Memory_LPC jsr Inc_LPC jsr Dec_LCT bpl @loop diff --git a/src/mon_m65/mon_command_transfer.s b/src/mon_m65/mon_command_transfer.s new file mode 100644 index 00000000..95eb5f94 --- /dev/null +++ b/src/mon_m65/mon_command_transfer.s @@ -0,0 +1,42 @@ + +; Based on BSM (Bit Shifter's Monitor) + + +Mon_Transfer: + + jsr Get_Param_Range ; Long_PC = source + ; Long_CT = count + + jsr Get_Addr_To_LAC ; Long_AC = target + +beq Mon_Error + + lda Src_Addr_Mode + sta Addr_Mode + + ldz #0 + jsr LAC_Compare_LPC ; target - source + bcc @forward + + ; source < target: backward transfer + + jsr LAC_Plus_LCT ; Long_AC = end of target + +@lpback: + + jsr Get_From_Memory_LDA ; backward copy + jsr Put_To_Memory_LAC + jsr Dec_LDA + jsr Dec_LAC + jsr Dec_LCT + bpl @lpback + jmp Main + +@forward: + + jsr Get_From_Memory_LPC ; forward copy + jsr Put_To_Memory_LAC + jsr Inc_LPC + jsr Inc_LAC + jsr Dec_LCT + bpl @forward + jmp Main diff --git a/src/mon_m65/mon_helper_memory.s b/src/mon_m65/mon_helper_memory.s index 43d5cb33..5eafd00b 100644 --- a/src/mon_m65/mon_helper_memory.s +++ b/src/mon_m65/mon_helper_memory.s @@ -1,8 +1,13 @@ ; Monitor helper code - memory read and write +Get_From_Memory_LDA: -Get_From_Memory: + jsr Exchange_LDA_LPC + jsr Get_From_Memory_LPC + jmp Exchange_LDA_LPC + +Get_From_Memory_LPC: phx phy @@ -111,7 +116,14 @@ Get_Put_Memory_Prepare_Shadow: -Put_To_Memory: + +Put_To_Memory_LAC: + + jsr Exchange_LAC_LPC + jsr Put_To_Memory_LPC + jmp Exchange_LAC_LPC + +Put_To_Memory_LPC: phx phy @@ -144,3 +156,51 @@ Put_To_Memory: pla jsr monitor_memwrite_helper bra Get_Put_Memory_End + + + +Exchange_LDA_LPC: + + phx + pha + + ldx #$03 + +@loop: + + lda Long_DA,X + pha + lda Long_PC,X + sta Long_DA,X + pla + sta Long_PC,X + + dex + bpl @loop + + pla + plx + rts + +Exchange_LAC_LPC: + + phx + pha + + ldx #$03 + +@loop: + + lda Long_AC,X + pha + lda Long_PC,X + sta Long_AC,X + pla + sta Long_PC,X + + dex + bpl @loop + + pla + plx + rts From d9d346f2b51b479dca4753c590e52af27b8df567 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 14 Jan 2021 23:38:39 +0100 Subject: [PATCH 137/257] command 'T' is now succesfully tested --- src/mon_m65/bsmon.s | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 5e26a4ce..64a6792d 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -199,7 +199,7 @@ Jump_Table: !word Mon_JSR ; J XXX to be debugged/adapted !word Mon_Memory ; M !word Mon_Register ; R - !word Mon_Transfer ; T XXX to be bugfixed + !word Mon_Transfer ; T !word Mon_Exit ; X !word Mon_DOS ; @ !word Mon_Assemble ; . XXX to be debugged/adapted From a1a0e55401db771d5c22f95129f2144f0d3926b4 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 14 Jan 2021 23:40:19 +0100 Subject: [PATCH 138/257] changes omitted by mistake --- src/mon_m65/mon_command_transfer.s | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mon_m65/mon_command_transfer.s b/src/mon_m65/mon_command_transfer.s index 95eb5f94..44b37f11 100644 --- a/src/mon_m65/mon_command_transfer.s +++ b/src/mon_m65/mon_command_transfer.s @@ -11,6 +11,7 @@ Mon_Transfer: +beq Mon_Error lda Src_Addr_Mode + ora Dst_Addr_Mode sta Addr_Mode ldz #0 From 352cebb42595136657b93c1bc7349211ab78a9f9 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 16 Jan 2021 16:16:29 +0100 Subject: [PATCH 139/257] MONITOR visual improvements --- src/mon_m65/bsmon.s | 6 ------ 1 file changed, 6 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 64a6792d..fae51867 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -1636,15 +1636,9 @@ Print_LPC_Addr: ; prints out the address in PC jsr Print_Hex_Low_Digit lda Long_PC+2 jsr Print_Hex - bra @remaining @short: - jsr PRIMM - !pet "...", 0 - -@remaining: - lda Long_PC+1 jsr Print_Hex lda Long_PC+0 From 767e000038e444bb75d05216efab17f22ec26da2 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 16 Jan 2021 16:49:59 +0100 Subject: [PATCH 140/257] adapted monitor command 'C' --- src/mon_m65/,aliases_mon.s | 3 ++- src/mon_m65/bsmon.s | 22 +--------------- src/mon_m65/mon_command_compare.s | 43 +++++++++++++++++++++++++++++++ src/mon_m65/mon_helper_memory.s | 6 +++++ 4 files changed, 52 insertions(+), 22 deletions(-) create mode 100644 src/mon_m65/mon_command_compare.s diff --git a/src/mon_m65/,aliases_mon.s b/src/mon_m65/,aliases_mon.s index 814abeea..d54a3fba 100644 --- a/src/mon_m65/,aliases_mon.s +++ b/src/mon_m65/,aliases_mon.s @@ -59,7 +59,8 @@ !addr Op_Ix = $2E ; type of constant !addr Op_Len = $2F ; length of operand - ; $30-$63 - free space, unused for now + ; $30-$62 - free space, unused for now +!addr Byte_TMP = $63 ; temporary byte !addr Long_TMP = $64 ; temporary pointer, for fetching/storing memory content; has to be the same as Long__TMP in Kernal !addr Mon_Data = $68 ; 40 bytes, buffer for hunt diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index fae51867..9e29ca4c 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -191,7 +191,7 @@ Jump_Table: !word Mon_Assemble ; A XXX to be debugged/adapted !word Mon_Bits ; B - !word Mon_Compare ; C XXX to be debugged/adapted + !word Mon_Compare ; C !word Mon_Disassemble ; D !word Mon_Fill ; F !word Mon_Go ; G XXX to be debugged/adapted @@ -550,26 +550,6 @@ Dump_Row: PLZ RTS -; ********** -Mon_Compare: -; ********** - - JSR Get_Param_Range ; Long_PC = source - LBCS Mon_Error ; Long_CT = count - JSR Get_LAC ; Long_AC = target - LBCS Mon_Error - JSR Print_CR - LDZ #0 -@loop LDA [Long_PC],Z - CMP [Long_AC],Z - BEQ @laba - JSR Print_LPC_Addr -@laba JSR Inc_LAC - JSR Inc_LPC - JSR Dec_LCT - BPL @loop - JMP Main - ; ******* Mon_Hunt: ; ******* diff --git a/src/mon_m65/mon_command_compare.s b/src/mon_m65/mon_command_compare.s new file mode 100644 index 00000000..c9684d8f --- /dev/null +++ b/src/mon_m65/mon_command_compare.s @@ -0,0 +1,43 @@ + +; Based on BSM (Bit Shifter's Monitor) + + +Mon_Compare: + + jsr Get_Param_Range ; Long_PC = source + +bcs Mon_Error ; Long_CT = count + jsr Get_LAC ; Long_AC = target + +bcs Mon_Error + + lda Src_Addr_Mode + ora Dst_Addr_Mode + sta Src_Addr_Mode + + lda Addr_Mode + sta Dst_Addr_Mode + + jsr Print_CR + ldz #0 + +@loop: + + lda Dst_Addr_Mode + sta Addr_Mode + jsr Get_From_Memory_LAC + sta Byte_TMP + + lda Src_Addr_Mode + sta Addr_Mode + jsr Get_From_Memory_LPC + + cmp Byte_TMP + beq @laba + jsr Print_LPC_Addr + +@laba: + + jsr Inc_LAC + jsr Inc_LPC + jsr Dec_LCT + bpl @loop + jmp Main diff --git a/src/mon_m65/mon_helper_memory.s b/src/mon_m65/mon_helper_memory.s index 5eafd00b..2a840445 100644 --- a/src/mon_m65/mon_helper_memory.s +++ b/src/mon_m65/mon_helper_memory.s @@ -1,6 +1,12 @@ ; Monitor helper code - memory read and write +Get_From_Memory_LAC: + + jsr Exchange_LAC_LPC + jsr Get_From_Memory_LPC + jmp Exchange_LAC_LPC + Get_From_Memory_LDA: jsr Exchange_LDA_LPC From 1474198afd5043c83b45e56569f8fe3a39c1245e Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 16 Jan 2021 16:54:33 +0100 Subject: [PATCH 141/257] got rid of some legacy routine usage --- src/mon_m65/mon_command_compare.s | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mon_m65/mon_command_compare.s b/src/mon_m65/mon_command_compare.s index c9684d8f..f2e6aa86 100644 --- a/src/mon_m65/mon_command_compare.s +++ b/src/mon_m65/mon_command_compare.s @@ -6,8 +6,10 @@ Mon_Compare: jsr Get_Param_Range ; Long_PC = source +bcs Mon_Error ; Long_CT = count - jsr Get_LAC ; Long_AC = target - +bcs Mon_Error + lda #$00 + sta Addr_Mode + jsr Get_Addr_To_LAC ; Long_AC = target + +beq Mon_Error lda Src_Addr_Mode ora Dst_Addr_Mode From d6c6b56e336e337fdb99f24efe8ddd1ace8efe30 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 16 Jan 2021 21:23:33 +0100 Subject: [PATCH 142/257] initial port of monitor 'H' command --- src/mon_m65/bsmon.s | 51 +--------------- src/mon_m65/mon_command_hunt.s | 77 ++++++++++++++++++++++++ src/mon_m65/mon_helper_get_addr_to_lac.s | 6 ++ 3 files changed, 84 insertions(+), 50 deletions(-) create mode 100644 src/mon_m65/mon_command_hunt.s diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 9e29ca4c..e8f68cda 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -195,7 +195,7 @@ Jump_Table: !word Mon_Disassemble ; D !word Mon_Fill ; F !word Mon_Go ; G XXX to be debugged/adapted - !word Mon_Hunt ; H XXX to be debugged/adapted + !word Mon_Hunt ; H XXX to be bugfixed !word Mon_JSR ; J XXX to be debugged/adapted !word Mon_Memory ; M !word Mon_Register ; R @@ -550,55 +550,6 @@ Dump_Row: PLZ RTS -; ******* -Mon_Hunt: -; ******* - - JSR Get_Param_Range ; Long_PC = start - LBCS Mon_Error ; Long_CT = count - LDY #0 - JSR Get_Char - CMP #KEY_APOSTROPHE - BNE @bin - JSR Get_Char ; string hunt - CMP #0 - LBEQ Mon_Error ; null string - -@lpstr STA Mon_Data,Y - INY - JSR Get_Char - BEQ @hunt - CPY #32 ;max. string length - BNE @lpstr - BRA @hunt - -@bin JSR Got_LAC -@lpbin LDA Long_AC - STA Mon_Data,Y - INY - JSR Get_LAC - BCS @hunt - CPY #32 ;max. data length - BNE @lpbin - -@hunt STY Long_DA ; hunt length - JSR Print_CR - -@lpstart LDY #0 -@lpins JSR Fetch - CMP Mon_Data,Y - BNE @next - INY - CPY Long_DA - BNE @lpins - JSR Print_LPC_Addr ; match -@next JSR STOP - LBEQ Main - JSR Inc_LPC - JSR Dec_LCT - BPL @lpstart - JMP Main - ; ******** Load_Save: ; ******** diff --git a/src/mon_m65/mon_command_hunt.s b/src/mon_m65/mon_command_hunt.s new file mode 100644 index 00000000..fa679c1c --- /dev/null +++ b/src/mon_m65/mon_command_hunt.s @@ -0,0 +1,77 @@ + +; Based on BSM (Bit Shifter's Monitor) + + +Mon_Hunt: + + jsr Get_Param_Range ; Long_PC = start + +bcs Mon_Error ; Long_CT = count + + ldy #$00 + jsr Get_Char + cmp #KEY_APOSTROPHE + bne @bin + jsr Get_Char ; string hunt + cmp #$00 + +beq Mon_Error ; null string + +@lpstr: + + sta Mon_Data,Y + iny + jsr Get_Char + beq @hunt + cpy #32 ; max string length + bne @lpstr + bra @hunt + +@bin: + + jsr Got_Addr_To_LAC + +@lpbin: + + lda Long_AC + sta Mon_Data,Y + iny + jsr Get_Addr_To_LAC + beq @hunt + lda Long_AC+1 + ora Long_AC+2 + ora Long_AC+3 + +beq Mon_Error ; value above $FF + + cpy #32 ; max data length + bne @lpbin + +@hunt: + + sty Long_DA ; hunt length + jsr Print_CR + +@lpstart: + + lda Src_Addr_Mode + ora Dst_Addr_Mode + sta Addr_Mode ; combined addressing mode + + ldy #$00 + +@lpins: + + jsr Fetch + cmp Mon_Data,Y + bne @next + iny + cpy Long_DA + bne @lpins + jsr Print_LPC_Addr ; match + +@next: + + jsr STOP + +beq Main + jsr Inc_LPC + jsr Dec_LCT + bpl @lpstart + jmp Main diff --git a/src/mon_m65/mon_helper_get_addr_to_lac.s b/src/mon_m65/mon_helper_get_addr_to_lac.s index a2a17a3f..d57c3e55 100644 --- a/src/mon_m65/mon_helper_get_addr_to_lac.s +++ b/src/mon_m65/mon_helper_get_addr_to_lac.s @@ -2,6 +2,12 @@ ; Based on BSM (Bit Shifter's Monitor) +Got_Addr_To_LAC: ; to be used when first byte already fetched + + dec Buf_Index + + ; FALLTROUGH + Get_Addr_To_LAC: phx From 81ea9d4fdee9196f492709b486776a853cf0d7f5 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 16 Jan 2021 22:43:03 +0100 Subject: [PATCH 143/257] fix for monitor command line parsing --- src/mon_m65/bsmon.s | 8 ++++++-- src/mon_m65/mon_debug.s | 22 ++++++++++++++++++++++ 2 files changed, 28 insertions(+), 2 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index e8f68cda..3c7b7a03 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -1689,11 +1689,15 @@ Get_Char: CMP #'?' ; help BEQ @return @regc CMP #0 - BEQ @return + BEQ @eof CMP #':' + BEQ @eof + RTS +@eof PHP + DEC Buf_Index + PLP @return RTS - ; ****** Dec_LCT: ; ****** diff --git a/src/mon_m65/mon_debug.s b/src/mon_m65/mon_debug.s index ad9f5fed..c148787d 100644 --- a/src/mon_m65/mon_debug.s +++ b/src/mon_m65/mon_debug.s @@ -5,6 +5,28 @@ ; XXX disable this code once the monitor integration is complete +DBG_print_Buf_Index: + + php + pha + phx + phy + phz + + jsr PRIMM + !pet $0D, "buf idx : ", 0 + + lda Buf_Index + jsr Print_Hex + + plz + ply + plx + pla + plp + + rts + DBG_print_long_pc: From 256256aa25808239d9d4eb7d8c113e81949117d9 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 16 Jan 2021 23:08:25 +0100 Subject: [PATCH 144/257] hunt bugfix, does not fully work yet --- src/mon_m65/bsmon.s | 13 ++----------- src/mon_m65/mon_command_hunt.s | 2 +- src/mon_m65/mon_debug.s | 12 ++++++------ 3 files changed, 9 insertions(+), 18 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 3c7b7a03..0a3c7259 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -1681,18 +1681,9 @@ Get_Char: LDX Buf_Index INC Buf_Index LDA BUF,X - CPX #1 PLX - BCC @regc - CMP #';' ; register - BEQ @return - CMP #'?' ; help - BEQ @return -@regc CMP #0 - BEQ @eof - CMP #':' - BEQ @eof - RTS + CMP #0 + BNE @return @eof PHP DEC Buf_Index PLP diff --git a/src/mon_m65/mon_command_hunt.s b/src/mon_m65/mon_command_hunt.s index fa679c1c..b8cd50f1 100644 --- a/src/mon_m65/mon_command_hunt.s +++ b/src/mon_m65/mon_command_hunt.s @@ -39,7 +39,7 @@ Mon_Hunt: lda Long_AC+1 ora Long_AC+2 ora Long_AC+3 - +beq Mon_Error ; value above $FF + +bne Mon_Error ; value above $FF cpy #32 ; max data length bne @lpbin diff --git a/src/mon_m65/mon_debug.s b/src/mon_m65/mon_debug.s index c148787d..4aacc2b4 100644 --- a/src/mon_m65/mon_debug.s +++ b/src/mon_m65/mon_debug.s @@ -28,7 +28,7 @@ DBG_print_Buf_Index: rts -DBG_print_long_pc: +DBG_print_long_ac: php pha @@ -37,15 +37,15 @@ DBG_print_long_pc: phz jsr PRIMM - !pet $0D, "long pc : ", 0 + !pet $0D, "long ac : ", 0 - lda Long_PC+3 + lda Long_AC+3 jsr Print_Hex - lda Long_PC+2 + lda Long_AC+2 jsr Print_Hex - lda Long_PC+1 + lda Long_AC+1 jsr Print_Hex - lda Long_PC+0 + lda Long_AC+0 jsr Print_Hex jsr PRIMM From d47b0cf841e97316d47c669f5f5df254dd0068e4 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 16 Jan 2021 23:21:49 +0100 Subject: [PATCH 145/257] hunt now works correctly --- src/mon_m65/bsmon.s | 2 +- src/mon_m65/mon_command_fill.s | 5 +---- src/mon_m65/mon_command_hunt.s | 6 ++---- src/mon_m65/mon_helper_get_addr_to_lac.s | 2 +- src/mon_m65/mon_helper_syntax.s | 17 +++++++++++++++++ 5 files changed, 22 insertions(+), 10 deletions(-) create mode 100644 src/mon_m65/mon_helper_syntax.s diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 0a3c7259..5f5be446 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -195,7 +195,7 @@ Jump_Table: !word Mon_Disassemble ; D !word Mon_Fill ; F !word Mon_Go ; G XXX to be debugged/adapted - !word Mon_Hunt ; H XXX to be bugfixed + !word Mon_Hunt ; H !word Mon_JSR ; J XXX to be debugged/adapted !word Mon_Memory ; M !word Mon_Register ; R diff --git a/src/mon_m65/mon_command_fill.s b/src/mon_m65/mon_command_fill.s index 9a9de779..e79f5ca0 100644 --- a/src/mon_m65/mon_command_fill.s +++ b/src/mon_m65/mon_command_fill.s @@ -11,10 +11,7 @@ Mon_Fill: jsr Get_Addr_To_LAC ; Long_AC = fill byte +beq Mon_Error - lda Long_AC+1 - ora Long_AC+2 - ora Long_AC+3 - +bne Mon_Error ; only 1 fill byte allowed + jsr Syntax_Byte_AC ; only 1 fill byte allowed ldz #$00 diff --git a/src/mon_m65/mon_command_hunt.s b/src/mon_m65/mon_command_hunt.s index b8cd50f1..048851a5 100644 --- a/src/mon_m65/mon_command_hunt.s +++ b/src/mon_m65/mon_command_hunt.s @@ -28,6 +28,7 @@ Mon_Hunt: @bin: jsr Got_Addr_To_LAC + jsr Syntax_Byte_AC @lpbin: @@ -36,10 +37,7 @@ Mon_Hunt: iny jsr Get_Addr_To_LAC beq @hunt - lda Long_AC+1 - ora Long_AC+2 - ora Long_AC+3 - +bne Mon_Error ; value above $FF + jsr Syntax_Byte_AC cpy #32 ; max data length bne @lpbin diff --git a/src/mon_m65/mon_helper_get_addr_to_lac.s b/src/mon_m65/mon_helper_get_addr_to_lac.s index d57c3e55..7bfb8d2b 100644 --- a/src/mon_m65/mon_helper_get_addr_to_lac.s +++ b/src/mon_m65/mon_helper_get_addr_to_lac.s @@ -40,7 +40,7 @@ Get_Addr_To_LAC: ; at this point .Y value determines a numeric system jsr Get_Char - beq @exit ; '?', ':'', ';' and zero terminate + beq @exit ; branch if terminated cmp #'0' bcc @exit cmp #':' diff --git a/src/mon_m65/mon_helper_syntax.s b/src/mon_m65/mon_helper_syntax.s new file mode 100644 index 00000000..ff77a4d5 --- /dev/null +++ b/src/mon_m65/mon_helper_syntax.s @@ -0,0 +1,17 @@ + +; Monitor helper code - syntax checking + + +Syntax_Byte_AC: ; ensure AC contains a 1-byte value + + php + pha + + lda Long_AC+1 + ora Long_AC+2 + ora Long_AC+3 + +bne Mon_Error ; value above $FF + + pla + plp + rts From 96bdf93b76800e9cf33f45e4b339d47e915386d2 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 17 Jan 2021 10:28:19 +0100 Subject: [PATCH 146/257] monitor command set memory adapted --- src/mon_m65/bsmon.s | 31 +-------------- src/mon_m65/mon_command_bits.s | 2 +- src/mon_m65/mon_command_compare.s | 2 +- src/mon_m65/mon_command_disassemble.s | 4 +- src/mon_m65/mon_command_fill.s | 2 +- src/mon_m65/mon_command_hunt.s | 4 +- src/mon_m65/mon_command_memory.s | 4 +- src/mon_m65/mon_command_set_memory.s | 38 +++++++++++++++++++ src/mon_m65/mon_command_transfer.s | 2 +- src/mon_m65/mon_helper_get_param_range.s | 2 +- ...r_to_lac.s => mon_helper_get_val_to_lac.s} | 8 ++-- src/mon_m65/mon_helper_syntax.s | 4 ++ 12 files changed, 59 insertions(+), 44 deletions(-) create mode 100644 src/mon_m65/mon_command_set_memory.s rename src/mon_m65/{mon_helper_get_addr_to_lac.s => mon_helper_get_val_to_lac.s} (93%) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 5f5be446..7ee8fa32 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -203,7 +203,7 @@ Jump_Table: !word Mon_Exit ; X !word Mon_DOS ; @ !word Mon_Assemble ; . XXX to be debugged/adapted - !word Mon_Set_Memory ; > XXX to be debugged/adapted + !word Mon_Set_Memory ; > !word Mon_Set_Register ; ; XXX to be debugged/adapted !word Mon_Help ; ? !word Converter ; $ @@ -439,33 +439,6 @@ Mon_Set_Register: ; XXX this needs adaptation BCC @loop @exit JMP Main -; ************* -Mon_Set_Memory: -; ************* - - JSR Set_MODE_80 - - JSR Get_LAC ; get 1st. parameter - BCS @exit - JSR LAC_To_LPC ; Long_PC = row address - LDZ #0 -@loop JSR Get_LAC - BCS @exit - LDA Long_AC - BBS7 Long_PC+3,@banked ; trigger banked access - +NOP ; use STA [Long_PC],Z -@banked STA (Long_PC),Z - INZ - CPZ #16 - BBR7 MODE_80,@next - CPZ #8 -@next BCC @loop - -@exit JSR PRIMM - !pet KEY_ESC, 'o' - !pet $91,$00 - JSR Dump_Row - JMP Main ; ***** Mon_Go: @@ -1727,7 +1700,7 @@ Converter: LDX #0 STX Buf_Index - JSR Get_Addr_To_LAC + JSR Get_Val_To_LAC LBEQ Mon_Error JSR Print_CR LDX #0 diff --git a/src/mon_m65/mon_command_bits.s b/src/mon_m65/mon_command_bits.s index 7d9248e6..6c07bd6b 100644 --- a/src/mon_m65/mon_command_bits.s +++ b/src/mon_m65/mon_command_bits.s @@ -10,7 +10,7 @@ Mon_Bits: lda #$00 sta Addr_Mode ; by default use C64-style addressing - jsr Get_Addr_To_LAC ; get 1st parameter (start address) + jsr Get_Val_To_LAC ; get 1st parameter (start address) beq @nopar pla ; drop previous addressing mode jsr LAC_To_LPC ; Long_PC = start address diff --git a/src/mon_m65/mon_command_compare.s b/src/mon_m65/mon_command_compare.s index f2e6aa86..8e60a3f6 100644 --- a/src/mon_m65/mon_command_compare.s +++ b/src/mon_m65/mon_command_compare.s @@ -8,7 +8,7 @@ Mon_Compare: +bcs Mon_Error ; Long_CT = count lda #$00 sta Addr_Mode - jsr Get_Addr_To_LAC ; Long_AC = target + jsr Get_Val_To_LAC ; Long_AC = target +beq Mon_Error lda Src_Addr_Mode diff --git a/src/mon_m65/mon_command_disassemble.s b/src/mon_m65/mon_command_disassemble.s index 68f33348..582fc71d 100644 --- a/src/mon_m65/mon_command_disassemble.s +++ b/src/mon_m65/mon_command_disassemble.s @@ -9,11 +9,11 @@ Mon_Disassemble: lda #$00 sta Addr_Mode ; by default use C64-style addressing - jsr Get_Addr_To_LAC ; get 1st parameter (start address) + jsr Get_Val_To_LAC ; get 1st parameter (start address) beq @nopar pla ; drop previous addressing mode jsr LAC_To_LPC ; Long_PC = start address - jsr Get_Addr_To_LAC ; get 2nd parameter (end address) + jsr Get_Val_To_LAC ; get 2nd parameter (end address) beq @norange jsr LAC_Minus_LPC ; Long_CT = range +bcc Mon_Error ; -> negative diff --git a/src/mon_m65/mon_command_fill.s b/src/mon_m65/mon_command_fill.s index e79f5ca0..a872097a 100644 --- a/src/mon_m65/mon_command_fill.s +++ b/src/mon_m65/mon_command_fill.s @@ -9,7 +9,7 @@ Mon_Fill: jsr Get_Param_Range ; Long_PC = target +bcs Mon_Error ; Long_CT = count - jsr Get_Addr_To_LAC ; Long_AC = fill byte + jsr Get_Val_To_LAC ; Long_AC = fill byte +beq Mon_Error jsr Syntax_Byte_AC ; only 1 fill byte allowed diff --git a/src/mon_m65/mon_command_hunt.s b/src/mon_m65/mon_command_hunt.s index 048851a5..bd1a74cc 100644 --- a/src/mon_m65/mon_command_hunt.s +++ b/src/mon_m65/mon_command_hunt.s @@ -27,7 +27,7 @@ Mon_Hunt: @bin: - jsr Got_Addr_To_LAC + jsr Got_Val_To_LAC jsr Syntax_Byte_AC @lpbin: @@ -35,7 +35,7 @@ Mon_Hunt: lda Long_AC sta Mon_Data,Y iny - jsr Get_Addr_To_LAC + jsr Get_Val_To_LAC beq @hunt jsr Syntax_Byte_AC diff --git a/src/mon_m65/mon_command_memory.s b/src/mon_m65/mon_command_memory.s index 02103be1..45f00ad5 100644 --- a/src/mon_m65/mon_command_memory.s +++ b/src/mon_m65/mon_command_memory.s @@ -8,11 +8,11 @@ Mon_Memory: lda #$00 sta Addr_Mode ; by default use C64-style addressing - jsr Get_Addr_To_LAC ; get 1st parameter (start address) + jsr Get_Val_To_LAC ; get 1st parameter (start address) +beq Mon_Error jsr LAC_To_LPC ; Long_PC = start address - jsr Get_Addr_To_LAC ; get 2nd parameter (end address) + jsr Get_Val_To_LAC ; get 2nd parameter (end address) bne @calcdiff lda #$10 ; by default display 16 rows diff --git a/src/mon_m65/mon_command_set_memory.s b/src/mon_m65/mon_command_set_memory.s new file mode 100644 index 00000000..263de1c4 --- /dev/null +++ b/src/mon_m65/mon_command_set_memory.s @@ -0,0 +1,38 @@ + +; Based on BSM (Bit Shifter's Monitor) + + +Mon_Set_Memory: + + jsr Get_Val_To_LAC ; get 1st. parameter + beq @exit + jsr LAC_To_LPC ; Long_PC = row address + lda Addr_Mode + sta Dst_Addr_Mode + + ldz #$00 + +@loop: + + jsr Get_Glyph + cmp #KEY_COLON + beq @exit + jsr Got_Val_To_LAC + beq @exit + jsr Syntax_Byte_AC + + lda Dst_Addr_Mode + sta Addr_Mode + + lda Long_AC+0 + jsr Put_To_Memory_LPC + + inz + bra @loop + +@exit: + + jsr PRIMM + !pet KEY_ESC, 'o', $91, $00 + jsr Dump_Row + jmp Main diff --git a/src/mon_m65/mon_command_transfer.s b/src/mon_m65/mon_command_transfer.s index 44b37f11..55c31158 100644 --- a/src/mon_m65/mon_command_transfer.s +++ b/src/mon_m65/mon_command_transfer.s @@ -7,7 +7,7 @@ Mon_Transfer: jsr Get_Param_Range ; Long_PC = source ; Long_CT = count - jsr Get_Addr_To_LAC ; Long_AC = target + jsr Get_Val_To_LAC ; Long_AC = target +beq Mon_Error lda Src_Addr_Mode diff --git a/src/mon_m65/mon_helper_get_param_range.s b/src/mon_m65/mon_helper_get_param_range.s index 2f749269..64a168d8 100644 --- a/src/mon_m65/mon_helper_get_param_range.s +++ b/src/mon_m65/mon_helper_get_param_range.s @@ -36,7 +36,7 @@ Get_Param_Range: lda #$00 sta Addr_Mode - jsr Get_Addr_To_LAC + jsr Get_Val_To_LAC beq @error lda Addr_Mode rts diff --git a/src/mon_m65/mon_helper_get_addr_to_lac.s b/src/mon_m65/mon_helper_get_val_to_lac.s similarity index 93% rename from src/mon_m65/mon_helper_get_addr_to_lac.s rename to src/mon_m65/mon_helper_get_val_to_lac.s index 7bfb8d2b..a1d0d090 100644 --- a/src/mon_m65/mon_helper_get_addr_to_lac.s +++ b/src/mon_m65/mon_helper_get_val_to_lac.s @@ -2,13 +2,13 @@ ; Based on BSM (Bit Shifter's Monitor) -Got_Addr_To_LAC: ; to be used when first byte already fetched +Got_Val_To_LAC: ; to be used when first byte already fetched dec Buf_Index ; FALLTROUGH -Get_Addr_To_LAC: +Get_Val_To_LAC: phx phy @@ -118,13 +118,13 @@ Get_Addr_To_LAC: inw Long_AC+2 bne @valid_prefix - jmp Mon_Error ; number foo large + jmp Mon_Error ; number too large @exit: lda Long_AC+3 and #%11110000 - +bne Mon_Error ; MEGA65 has a 28-bit address bu + +bne Mon_Error ; MEGA65 has a 28-bit address bus lda Dig_Cnt ; check if we should enable long addressing mode cmp Num_Limit,Y diff --git a/src/mon_m65/mon_helper_syntax.s b/src/mon_m65/mon_helper_syntax.s index ff77a4d5..ce30b745 100644 --- a/src/mon_m65/mon_helper_syntax.s +++ b/src/mon_m65/mon_helper_syntax.s @@ -7,6 +7,8 @@ Syntax_Byte_AC: ; ensure AC contains a 1-byte value php pha + ; XXX improve this - check for numeric system and Dig_Cnt, will require Got_Addr_To_LAC rework + lda Long_AC+1 ora Long_AC+2 ora Long_AC+3 @@ -15,3 +17,5 @@ Syntax_Byte_AC: ; ensure AC contains a 1-byte value pla plp rts + +; XXX add routine to check if this was last character From 1d6d6df70581930cb17c27b72db4e66e757cc6f4 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 17 Jan 2021 11:18:05 +0100 Subject: [PATCH 147/257] initial adaptation of register set --- src/mon_m65/bsmon.s | 17 -------- src/mon_m65/mon_command_set_register.s | 60 ++++++++++++++++++++++++++ 2 files changed, 60 insertions(+), 17 deletions(-) create mode 100644 src/mon_m65/mon_command_set_register.s diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 7ee8fa32..45264b23 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -423,23 +423,6 @@ Print_Bits: RTS -; *************** -Mon_Set_Register: ; XXX this needs adaptation -; *************** - - JSR Get_LAC ; get 1st. parameter - JSR LAC_To_PC - LDY #3 -@loop JSR Get_LAC - BCS @exit - LDA Long_AC - STA Addr_Mode,Y - INY - CPY #9 - BCC @loop -@exit JMP Main - - ; ***** Mon_Go: ; ***** diff --git a/src/mon_m65/mon_command_set_register.s b/src/mon_m65/mon_command_set_register.s new file mode 100644 index 00000000..96074804 --- /dev/null +++ b/src/mon_m65/mon_command_set_register.s @@ -0,0 +1,60 @@ + +; Based on BSM (Bit Shifter's Monitor) + + +Mon_Set_Register: + + ; PC - 16 bit + + jsr @helper_get_16_bit + + lda Long_AC+0 + sta PCL + lda Long_AC+1 + sta PCH + + ; SR / AC / XR / YR / ZR / BP - 8 bit each + + ldy #$00 + +@lpreg: + + jsr Get_Val_To_LAC + beq @exit + jsr Syntax_Byte_AC + + lda Long_AC+0 + sta SR,Y + + iny + cpy #$06 + bne @lpreg + + ; SP - 16 bit + + jsr @helper_get_16_bit + + lda Long_AC+0 + sta SPL + lda Long_AC+1 + sta SPH + + ; Flags + + ; XXX + +@exit: + + jmp Main + + +@helper_get_16_bit: + + lda #$00 + sta Addr_Mode + jsr Get_Val_To_LAC + beq @exit + lda Addr_Mode + +bne Mon_Error ; only 16-bit value allowed + + rts From 558e9f0bf1aeaba407806b140393fb80e8c4dc39 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 17 Jan 2021 11:19:23 +0100 Subject: [PATCH 148/257] added changes omited by mistake --- src/mon_m65/mon_command_set_register.s | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mon_m65/mon_command_set_register.s b/src/mon_m65/mon_command_set_register.s index 96074804..160b37c6 100644 --- a/src/mon_m65/mon_command_set_register.s +++ b/src/mon_m65/mon_command_set_register.s @@ -41,6 +41,8 @@ Mon_Set_Register: ; Flags + + ; XXX @exit: From 153e18679d49c2f930bc0d88dff8c5a280c36a03 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 17 Jan 2021 11:54:03 +0100 Subject: [PATCH 149/257] more work on register setting --- src/mon_m65/,aliases_mon.s | 16 +++++----- src/mon_m65/bsmon.s | 20 ++++++------ src/mon_m65/mon_command_set_register.s | 44 ++++++++++++++++++++++++-- 3 files changed, 60 insertions(+), 20 deletions(-) diff --git a/src/mon_m65/,aliases_mon.s b/src/mon_m65/,aliases_mon.s index d54a3fba..280cd665 100644 --- a/src/mon_m65/,aliases_mon.s +++ b/src/mon_m65/,aliases_mon.s @@ -13,14 +13,14 @@ !addr Addr_Mode = 2 ; $00 = 64K address, $80 = M65 flat address !addr PCH = 3 !addr PCL = 4 -!addr SR = 5 -!addr AC = 6 -!addr XR = 7 -!addr YR = 8 -!addr ZR = 9 -!addr BP = 10 -!addr SPH = 11 -!addr SPL = 12 +!addr AC = 5 +!addr XR = 6 +!addr YR = 7 +!addr ZR = 8 +!addr BP = 9 +!addr SPH = 10 +!addr SPL = 11 +!addr SR = 12 ; ******************* ; * Other variables * diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 45264b23..4b41faa2 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -63,13 +63,13 @@ Mon_Register: LDA PCH JSR Print_Hex -; print PCL,SR,PCL,A,X,Y,Z,BP +; print PCL,A,X,Y,Z,BP LDY #0 @loopb LDA PCL,Y JSR Print_Hex_Blank INY - CPY #7 + CPY #6 BCC @loopb ; print 16 bit stack pointer @@ -126,6 +126,8 @@ Main_A: Mon_Switch: ; ********* + CMP #'?' + +beq Mon_Help LDX #24 @loop CMP Command_Char,X BEQ Mon_Select @@ -151,7 +153,7 @@ Mon_Select: ; ********* STA VERCKK - CPX #22 + CPX #21 LBCS Load_Save TXA ASL @@ -163,14 +165,14 @@ Print_Commands: ; ************* JSR PRIMM - !pet KEY_RETURN," ",KEY_RVS_ON," commands: " + !pet KEY_RETURN,KEY_RVS_ON," commands: " ; *********** Command_Char: ; *********** ; 0123456789abcdef - !pet "abcdfghjmrtx@.>;?" + !pet "abcdfghjmrtx@.>;" ; ********** Cons_Prefix: @@ -182,7 +184,8 @@ Cons_Prefix: Load_Save_Verify: ; *************** - !pet "lsv ",KEY_RETURN,0 + !pet "lsv ",KEY_RETURN + !pet KEY_RVS_ON," for help: type ? and press return ",KEY_RETURN,0 RTS ; ********* @@ -204,8 +207,7 @@ Jump_Table: !word Mon_DOS ; @ !word Mon_Assemble ; . XXX to be debugged/adapted !word Mon_Set_Memory ; > - !word Mon_Set_Register ; ; XXX to be debugged/adapted - !word Mon_Help ; ? + !word Mon_Set_Register ; ; XXX to be bugfixed !word Converter ; $ !word Converter ; + !word Converter ; & @@ -2150,7 +2152,7 @@ Reg_Text: ; ******* JSR PRIMM - !pet KEY_RETURN, " pc sr ac xr yr zr bp sp nvebdizc", KEY_RETURN, "; ", KEY_ESC, 'q', 0 + !pet KEY_RETURN, " pc ac xr yr zr bp sp nvebdizc", KEY_RETURN, "; ", KEY_ESC, 'q', 0 RTS ; ******* diff --git a/src/mon_m65/mon_command_set_register.s b/src/mon_m65/mon_command_set_register.s index 160b37c6..836245fa 100644 --- a/src/mon_m65/mon_command_set_register.s +++ b/src/mon_m65/mon_command_set_register.s @@ -24,10 +24,10 @@ Mon_Set_Register: jsr Syntax_Byte_AC lda Long_AC+0 - sta SR,Y + sta AC,Y iny - cpy #$06 + cpy #$05 bne @lpreg ; SP - 16 bit @@ -41,9 +41,47 @@ Mon_Set_Register: ; Flags + jsr Get_Glyph + beq @exit + dec Buf_Index + lda #%01111111 ; prepare helper values for bit set/clear + sta Long_TMP+0 + lda #%10000000 + sta Long_TMP+1 - ; XXX +@lpflag: + + lda Get_Char + beq @exit + + cmp #'-' + beq @bit_clr + cmp #'1' + +bne Mon_Error + +@bit_set: + + lda SR + ora Long_TMP+1 + + bra @next + +@bit_clr: + + lda SR + and Long_TMP+0 + +@next: + + sta SR + + sec + rol Long_TMP+0 + clc + rol Long_TMP+1 + + bne @lpflag @exit: From 7e0ea1e2527bb792b33d067c8076bcbfee9bcdee Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 17 Jan 2021 12:23:10 +0100 Subject: [PATCH 150/257] register setting works now --- src/mon_m65/bsmon.s | 2 +- src/mon_m65/mon_command_set_register.s | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 4b41faa2..9fa6a69c 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -207,7 +207,7 @@ Jump_Table: !word Mon_DOS ; @ !word Mon_Assemble ; . XXX to be debugged/adapted !word Mon_Set_Memory ; > - !word Mon_Set_Register ; ; XXX to be bugfixed + !word Mon_Set_Register ; ; !word Converter ; $ !word Converter ; + !word Converter ; & diff --git a/src/mon_m65/mon_command_set_register.s b/src/mon_m65/mon_command_set_register.s index 836245fa..b76f6151 100644 --- a/src/mon_m65/mon_command_set_register.s +++ b/src/mon_m65/mon_command_set_register.s @@ -52,7 +52,7 @@ Mon_Set_Register: @lpflag: - lda Get_Char + jsr Get_Char beq @exit cmp #'-' @@ -77,9 +77,9 @@ Mon_Set_Register: sta SR sec - rol Long_TMP+0 + ror Long_TMP+0 clc - rol Long_TMP+1 + ror Long_TMP+1 bne @lpflag From 5dcecd7c45df6714baa7ae4f18e30d903a46655c Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 17 Jan 2021 12:43:58 +0100 Subject: [PATCH 151/257] help text improvements --- src/mon_m65/bsmon.s | 32 +++++++++++++++++--------------- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 9fa6a69c..2307519f 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -2162,30 +2162,32 @@ Mon_Help: JSR PRIMM !pet KEY_RETURN, KEY_RETURN - !pet KEY_ESC,'s',"a",KEY_ESC,'u',"ssemble - a address mnemonic operand",KEY_RETURN + !pet KEY_ESC,'s',"a",KEY_ESC,'u',"ssemble - a addr mnemonic operand",KEY_RETURN !pet KEY_ESC,'s',"b",KEY_ESC,'u',"itmaps - b [from]",KEY_RETURN !pet KEY_ESC,'s',"c",KEY_ESC,'u',"ompare - c from to with",KEY_RETURN !pet KEY_ESC,'s',"d",KEY_ESC,'u',"isassemble - d [from [to]]",KEY_RETURN !pet KEY_ESC,'s',"f",KEY_ESC,'u',"ill - f from to fillbyte",KEY_RETURN - !pet KEY_ESC,'s',"g",KEY_ESC,'u',"o - g [address]",KEY_RETURN - !pet KEY_ESC,'s',"h",KEY_ESC,'u',"unt - h from to (string or bytes)",KEY_RETURN - !pet KEY_ESC,'s',"j",KEY_ESC,'u',"sr - j address",KEY_RETURN - !pet KEY_ESC,'s',"l",KEY_ESC,'u',"oad - l filename [unit [address]]",KEY_RETURN + !pet KEY_ESC,'s',"g",KEY_ESC,'u',"o - g [addr]",KEY_RETURN + !pet KEY_ESC,'s',"h",KEY_ESC,'u',"unt - h from to ('str / bytes)",KEY_RETURN + !pet KEY_ESC,'s',"j",KEY_ESC,'u',"sr - j addr",KEY_RETURN + !pet KEY_ESC,'s',"l",KEY_ESC,'u',"oad - l filename [unit [addr]]",KEY_RETURN !pet KEY_ESC,'s',"m",KEY_ESC,'u',"emory - m [from [to]]",KEY_RETURN !pet KEY_ESC,'s',"r",KEY_ESC,'u',"egisters - r",KEY_RETURN !pet KEY_ESC,'s',"s",KEY_ESC,'u',"ave - s filename unit from to",KEY_RETURN !pet KEY_ESC,'s',"t",KEY_ESC,'u',"ransfer - t from to target",KEY_RETURN - !pet KEY_ESC,'s',"v",KEY_ESC,'u',"erify - v filename [unit [address]]",KEY_RETURN + !pet KEY_ESC,'s',"v",KEY_ESC,'u',"erify - v filename [unit [addr]]",KEY_RETURN !pet "e",KEY_ESC,'s',"x",KEY_ESC,'u',"it - x",KEY_RETURN - !pet KEY_ESC,'s',".",KEY_ESC,'u'," - . address mnemonic operand",KEY_RETURN - !pet KEY_ESC,'s',">",KEY_ESC,'u'," - > address byte sequence",KEY_RETURN - !pet KEY_ESC,'s',";",KEY_ESC,'u'," - ; register contents",KEY_RETURN - !pet KEY_ESC,'s',"@",KEY_ESC,'u',"dos - @[dos wedge command]",KEY_RETURN - !pet KEY_ESC,'s',"$",KEY_ESC,'u'," - hexadecimal number (default)",KEY_RETURN - !pet KEY_ESC,'s',"+",KEY_ESC,'u'," - decimal number",KEY_RETURN - !pet KEY_ESC,'s',"&",KEY_ESC,'u'," - octal number",KEY_RETURN - !pet KEY_ESC,'s',"%",KEY_ESC,'u'," - binary number",KEY_RETURN - !pet KEY_ESC,'s',"?",KEY_ESC,'u',"help - ?",KEY_RETURN + !pet KEY_ESC,'s',".",KEY_ESC,'u'," - . addr mnemonic operand",KEY_RETURN + !pet KEY_ESC,'s',">",KEY_ESC,'u'," - > addr byte sequence",KEY_RETURN + !pet KEY_ESC,'s',";",KEY_ESC,'u'," - ; register contents",KEY_RETURN + !pet KEY_ESC,'s',"@",KEY_ESC,'u',"dos - dos wedge command",KEY_RETURN + + !pet KEY_ESC,'s',"$",KEY_ESC,'u',"/" + !pet KEY_ESC,'s',"+",KEY_ESC,'u',"/" + !pet KEY_ESC,'s',"&",KEY_ESC,'u',"/" + !pet KEY_ESC,'s',"%",KEY_ESC,'u'," - hex/dec/oct/bin",KEY_RETURN + + !pet KEY_RETURN,"address above $ffff or enough digits", KEY_RETURN, "triggers flat memory access for read",KEY_RETURN !pet 0 JMP Main From 31de810366c7cd8f76e52d915ecc2bc53ac0562c Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 17 Jan 2021 13:23:49 +0100 Subject: [PATCH 152/257] small monitor integration bugfix --- src/mon_m65/bsmon.s | 52 ++++++++++++++------------------------------- 1 file changed, 16 insertions(+), 36 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 2307519f..b1882c6b 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -192,7 +192,7 @@ Load_Save_Verify: Jump_Table: ; ********* - !word Mon_Assemble ; A XXX to be debugged/adapted + !word Mon_Assemble ; A XXX to be bugfixed !word Mon_Bits ; B !word Mon_Compare ; C !word Mon_Disassemble ; D @@ -205,7 +205,7 @@ Jump_Table: !word Mon_Transfer ; T !word Mon_Exit ; X !word Mon_DOS ; @ - !word Mon_Assemble ; . XXX to be debugged/adapted + !word Mon_Assemble ; . XXX to be bugfixed !word Mon_Set_Memory ; > !word Mon_Set_Register ; ; !word Converter ; $ @@ -598,8 +598,13 @@ Load_Save: Mon_Assemble: ; *********** - JSR Get_LAC ; get 1st. parameter - LBCS Mon_Error + LDA #$00 + STA Addr_Mode + JSR Get_Val_To_LAC ; get 1st. parameter + LBEQ Mon_Error + LDA Addr_Mode + LBNE Mon_Error + JSR LAC_To_LPC ; Long_PC = PC @start LDX #0 ; mne letter counter @@ -661,6 +666,8 @@ Mon_Assemble: @found STX Ix_Mne +; XXX start debugging from here + ; find 1st. opcode for this mnemonic TXA @@ -933,13 +940,13 @@ Mon_Assemble: BBR5 Op_Flag,@storen LDA #$ea ; 32 bit prefix LDZ #0 - STA [Long_PC],Z ; store prefix + JSR Put_To_Memory_LPC ; store prefix INZ LDA Op_Code - STA [Long_PC],Z ; store opcode + JSR Put_To_Memory_LPC ; store opcode INZ LDA Long_AC - STA [Long_PC],Z ; store address + JSR Put_To_Memory_LPC ; store address INC Op_Size BRA @print @@ -948,13 +955,13 @@ Mon_Assemble: BEQ @store1 @lpsto LDA Long_AC-1,Y - STA [Long_PC],Z + JSR Put_To_Memory_LPC DEZ DEY BNE @lpsto @store1 LDA Op_Code - STA [Long_PC],Z + JSR Put_To_Memory_LPC @print JSR PRIMM !pet 13,$91,"a ", KEY_ESC, 'q', 0 @@ -1390,33 +1397,6 @@ Print_Code: INC Op_Size @return RTS -; ****** -Got_LAC: ; XXX to be replaced/adapted -; ****** - - DEC Buf_Index - -; ****** -Get_LAC: ; XXX to be replaced/adapted -; ****** - - JSR Read_Number - BCS @error ; illegal character - BEQ @noval ; no value - JSR Got_Char ; delimiter ? - BEQ @end ; end of input - CMP #' ' - BEQ @ok - CMP #',' - BEQ @ok -@error JMP Mon_Error ; stack is reset in Mon_Error - -@noval SEC - RTS - -@end DEC Buf_Index -@ok CLC - RTS ; ********** Read_Number: ; XXX obsolete, to be replaced From cb851c92885ebfc60ba842d391430a29756602ff Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 17 Jan 2021 23:37:12 +0100 Subject: [PATCH 153/257] removed some obsolete code --- src/mon_m65/bsmon.s | 28 ++-------------------------- 1 file changed, 2 insertions(+), 26 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index b1882c6b..cfeb070b 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -219,30 +219,6 @@ Mon_Exit: JMP (X_Vector) -; ******** -LAC_To_PC: ; XXX to be adapted -; ******** - - inc $D020 ; XXX for debug only - -; called from Mon_Set_Register, Mon_Go and Mon_JSR -; as the first instruction. The carry flag was set from -; the routine Got_LAC if an error occured. -; Notice that the Bank, PCH and PCL values are stored -; high to low, reverse to the standard order. - -; Bank, PCH and PCL are part of a list, that is used by -; the routines FAR_JMP and FAR_JSR of the operating system - - BCS @error - ;LDA Long_AC - ;STA Bank+2 - ;LDA Long_AC+1 - ;STA Bank+1 - ;LDA Long_AC+2 - ;STA Bank -@error RTS - ; ********* LAC_To_LPC: ; ********* @@ -666,8 +642,6 @@ Mon_Assemble: @found STX Ix_Mne -; XXX start debugging from here - ; find 1st. opcode for this mnemonic TXA @@ -703,6 +677,8 @@ Mon_Assemble: ; read operand +; XXX start debugging from here + @labc LDA #0 @labd STA Mode_Flags JSR Read_Number From 09cd066256cd607235e8441990ed2b135de3a895 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 18 Jan 2021 22:06:22 +0100 Subject: [PATCH 154/257] started work on monitor GO/JSR commands --- src/kernal/board_m65/mega65_proxies_monitor.s | 16 ++++ src/mon_m65/bsmon.s | 19 +--- src/mon_m65/imports.s | 2 + src/mon_m65/mon_command_fill.s | 2 - src/mon_m65/mon_command_jmp_jsr.s | 93 +++++++++++++++++++ 5 files changed, 113 insertions(+), 19 deletions(-) create mode 100644 src/mon_m65/mon_command_jmp_jsr.s diff --git a/src/kernal/board_m65/mega65_proxies_monitor.s b/src/kernal/board_m65/mega65_proxies_monitor.s index f16f829c..0a2f9f95 100644 --- a/src/kernal/board_m65/mega65_proxies_monitor.s +++ b/src/kernal/board_m65/mega65_proxies_monitor.s @@ -19,6 +19,7 @@ proxy_M1_CHROUT: ; FALLTROUGH +proxy_M1_jmpout_ret: ; reused by monitor proxy_M1_end: jmp map_MON_1 @@ -40,3 +41,18 @@ proxy_M1_memwrite: jsr map_NORMAL sta [Long__TMP], z bra proxy_M1_end + + +; JMP/JSR to user code + +proxy_M1_jmpout: + + plz ; ZR + ply ; YR + plx ; XR + pla ; BP + tab + pla ; AC + plp ; SR + + jmp map_NORMAL diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index cfeb070b..966e74c8 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -197,9 +197,9 @@ Jump_Table: !word Mon_Compare ; C !word Mon_Disassemble ; D !word Mon_Fill ; F - !word Mon_Go ; G XXX to be debugged/adapted + !word Mon_Go ; G XXX to be finished/bugfixed !word Mon_Hunt ; H - !word Mon_JSR ; J XXX to be debugged/adapted + !word Mon_JSR ; J XXX to be finished/bugfixed !word Mon_Memory ; M !word Mon_Register ; R !word Mon_Transfer ; T @@ -400,21 +400,6 @@ Print_Bits: PLZ RTS - -; ***** -Mon_Go: -; ***** - - ; XXX to be rewritten for Open ROMs! - jmp Main - -; ****** -Mon_JSR: -; ****** - - ; XXX to be rewritten for Open ROMs! - jmp Main - ; *********** Dump_4_Bytes: ; *********** diff --git a/src/mon_m65/imports.s b/src/mon_m65/imports.s index 07ea79b5..a981faf6 100644 --- a/src/mon_m65/imports.s +++ b/src/mon_m65/imports.s @@ -12,6 +12,8 @@ ;; #ALIAS# monitor_exit = KERNAL_0.m65_shadow_BZP ;; #ALIAS# monitor_memread_helper = KERNAL_0.proxy_M1_memread ;; #ALIAS# monitor_memwrite_helper = KERNAL_0.proxy_M1_memwrite +;; #ALIAS# monitor_jmpout = KERNAL_0.proxy_M1_jmpout +;; #ALIAS# monitor_jmpout_ret = KERNAL_0.proxy_M1_jmpout_ret ;; #ALIAS# CHRIN = KERNAL_0.proxy_M1_CHRIN ;; #ALIAS# CHROUT = KERNAL_0.proxy_M1_CHROUT diff --git a/src/mon_m65/mon_command_fill.s b/src/mon_m65/mon_command_fill.s index a872097a..75db2c4f 100644 --- a/src/mon_m65/mon_command_fill.s +++ b/src/mon_m65/mon_command_fill.s @@ -2,9 +2,7 @@ ; Based on BSM (Bit Shifter's Monitor) -; ******* Mon_Fill: -; ******* jsr Get_Param_Range ; Long_PC = target +bcs Mon_Error ; Long_CT = count diff --git a/src/mon_m65/mon_command_jmp_jsr.s b/src/mon_m65/mon_command_jmp_jsr.s new file mode 100644 index 00000000..573dca3a --- /dev/null +++ b/src/mon_m65/mon_command_jmp_jsr.s @@ -0,0 +1,93 @@ + +; Based on BSM (Bit Shifter's Monitor) + + +Mon_JSR: + + + lda #$00 + sta Addr_Mode + + jsr Get_Val_To_LAC ; Long_AC = jump address + +beq Mon_Error + + ; Push return addresses + + lda #>(Mon_JSR_ret-1) ; XXX return routine should JSR, to store address + pha + lda #<(Mon_JSR_ret-1) + pha + + lda #>(monitor_jmpout_ret-1) + pha + lda #<(monitor_jmpout_ret-1) + pha + + bra Mon_Go_JSR_comon + +Mon_Go: + + lda #$00 + sta Addr_Mode + + jsr Get_Val_To_LAC ; Long_AC = jump address + +bne Mon_Go_JSR_comon + + lda PCL ; use PC as jump address + sta Long_AC+0 + lda PCH + sta Long_AC+0 + + ; FALLTROUGH + +Mon_Go_JSR_comon: + + lda Addr_Mode ; only first 64KB is supported as target + +bne Mon_Error + + lda PCH ; push target address for RTS + sta Long_TMP+1 + lda PCL + sta Long_TMP+0 + dew Long_TMP+0 + + lda Long_TMP+1 + pha + lda Long_TMP+0 + pha + + ; Prepare registers + + lda SR + pha + lda AC + pha + lda BP + pha + lda XR + pha + lda YR + pha + lda ZR + pha + + jmp monitor_jmpout + +Mon_JSR_ret: + + ; Retrieve registers + ; XXX address! + + pha + php + pla + sta SR + pla + sta AC + tba + sta BP + stx XR + sty YR + stz ZR + + jmp Mon_Register From e93d018a51e8215a8d16b0b85ec9152266035529 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 19 Jan 2021 16:42:22 +0100 Subject: [PATCH 155/257] fixed GO/JSR monitor commands --- src/mon_m65/bsmon.s | 4 ++-- src/mon_m65/mon_command_jmp_jsr.s | 14 ++++---------- 2 files changed, 6 insertions(+), 12 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 966e74c8..294f058d 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -197,9 +197,9 @@ Jump_Table: !word Mon_Compare ; C !word Mon_Disassemble ; D !word Mon_Fill ; F - !word Mon_Go ; G XXX to be finished/bugfixed + !word Mon_Go ; G !word Mon_Hunt ; H - !word Mon_JSR ; J XXX to be finished/bugfixed + !word Mon_JSR ; J !word Mon_Memory ; M !word Mon_Register ; R !word Mon_Transfer ; T diff --git a/src/mon_m65/mon_command_jmp_jsr.s b/src/mon_m65/mon_command_jmp_jsr.s index 573dca3a..fe7cdf04 100644 --- a/src/mon_m65/mon_command_jmp_jsr.s +++ b/src/mon_m65/mon_command_jmp_jsr.s @@ -36,7 +36,7 @@ Mon_Go: lda PCL ; use PC as jump address sta Long_AC+0 lda PCH - sta Long_AC+0 + sta Long_AC+1 ; FALLTROUGH @@ -45,15 +45,10 @@ Mon_Go_JSR_comon: lda Addr_Mode ; only first 64KB is supported as target +bne Mon_Error - lda PCH ; push target address for RTS - sta Long_TMP+1 - lda PCL - sta Long_TMP+0 - dew Long_TMP+0 - - lda Long_TMP+1 + dew Long_AC+0 ; push target address for RTS-jump + lda Long_AC+1 pha - lda Long_TMP+0 + lda Long_AC+0 pha ; Prepare registers @@ -76,7 +71,6 @@ Mon_Go_JSR_comon: Mon_JSR_ret: ; Retrieve registers - ; XXX address! pha php From 7885e53d747a3ec2ef6ee463a432c3d5455383c5 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 19 Jan 2021 22:44:38 +0100 Subject: [PATCH 156/257] started work on monitor disc commands --- src/aliases/,aliases_ram_lowmem.s | 2 +- src/mon_m65/bsmon.s | 86 ---------------- src/mon_m65/imports.s | 1 + src/mon_m65/mon_command_load_save.s | 152 ++++++++++++++++++++++++++++ 4 files changed, 154 insertions(+), 87 deletions(-) create mode 100644 src/mon_m65/mon_command_load_save.s diff --git a/src/aliases/,aliases_ram_lowmem.s b/src/aliases/,aliases_ram_lowmem.s index 89e9aa5b..cdce7464 100644 --- a/src/aliases/,aliases_ram_lowmem.s +++ b/src/aliases/,aliases_ram_lowmem.s @@ -122,7 +122,7 @@ !addr FNLEN = $B7 ; current file name length !addr LA = $B8 ; current logical_file number !addr SA = $B9 ; current secondary address - !addr FA = $BA ; current device number + !addr FA = $BA ; current unit number !addr FNADDR = $BB ; $BB-$BC current file name pointer !addr ROPRTY = $BD ; -- NOT IMPLEMENTED -- tape / RS-232 temporary storage !addr FSBLK = $BE ; -- NOT IMPLEMENTED -- tape / RS-232 temporary storage diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 294f058d..5c66750d 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -469,92 +469,6 @@ Dump_Row: PLZ RTS -; ******** -Load_Save: -; ******** - - ; XXX to be rewritten for Open ROMs! - jmp Main - - ; LDY Disk_Unit - ; STY FA - ; LDY #8 - ; STY SA - ; LDY #0 - ; STY BA - ; STY FNLEN - ; STY FNBANK - ; STY IOSTATUS - ; LDA #>Mon_Data - ; STA FNADR+1 - ; LDA # load/verify - ; JSR Print_CR - ; LDX Long_AC ; X/Y = end address - ; LDY Long_AC+1 - ; LDA VERCKK ; A = load/verify/save - ; CMP #'S' - ; LBNE Mon_Error ; must be Save - ; LDA #0 - ; STA SA ; set SA for PRG - ; LDA #Long_PC ; Long_PC = start address - ; JSR SAVE -; @exit JMP Main - -; @do LDA VERCKK - ; CMP #'V' ; Verify - ; BEQ @exec - ; CMP #'L' ; Load - ; LBNE Mon_Error - ; LDA #0 ; 0 = LOAD -; @exec JSR LOAD ; A == 0 : LOAD else VERIFY - ; BBR4 IOSTATUS,@exit - ; LDA VERCKK - ; LBEQ Mon_Error - ; LBCS Main - ; JSR PRIMM - ; !pet " error",0 - ; JMP Main - -; @load LDX Long_PC - ; LDY Long_PC+1 - ; LDA #0 ; 0 = use X/Y as load address - ; STA SA ; and ignore load address from file - ; BRA @do - ; *********** Mon_Assemble: ; *********** diff --git a/src/mon_m65/imports.s b/src/mon_m65/imports.s index a981faf6..94510187 100644 --- a/src/mon_m65/imports.s +++ b/src/mon_m65/imports.s @@ -8,6 +8,7 @@ ;; #ALIAS# SETMSG = KERNAL_0.SETMSG ;; #ALIAS# STOP = KERNAL_0.STOP ;; #ALIAS# SCREEN = KERNAL_0.SCREEN +;; #ALIAS# SELDEV = KERNAL_0.SELDEV ;; #ALIAS# monitor_exit = KERNAL_0.m65_shadow_BZP ;; #ALIAS# monitor_memread_helper = KERNAL_0.proxy_M1_memread diff --git a/src/mon_m65/mon_command_load_save.s b/src/mon_m65/mon_command_load_save.s new file mode 100644 index 00000000..3e2f41a0 --- /dev/null +++ b/src/mon_m65/mon_command_load_save.s @@ -0,0 +1,152 @@ + +; Based on BSM (Bit Shifter's Monitor) + + +Load_Save: + + ; Retrieve file name + +@skip1: + + jsr Get_Char + +beq Mon_Error + cmp #' ' + beq @skip1 + cmp #KEY_QUOTE + +bne Mon_Error + + lda #$FF + sta FNLEN + lda Buf_Index + sta FNADDR+0 + lda #>BUF + sta FNADDR+1 + +@skip2: + inc FNLEN + jsr Get_Char + +beq Mon_Error + cmp #KEY_QUOTE + bne @skip2 + + ; Separate flow for SAVE + + lda VERCKK + cmp #$02 + beq Mon_Save + + ; FALLTROUGH + +Mon_Load_Verify: + + ; Determine unit + + jsr SELDEV ; set default unit + stx FA + + jsr Get_Val_To_LAC + beq @got_unit + jsr Syntax_Byte_AC + lda Long_AC+0 + sta FA + +@got_unit: + + ; XXX to be finished + + jmp Main + + +Mon_Save: + + ; Determine unit + + jsr Get_Val_To_LAC + +beq Mon_Error + jsr Syntax_Byte_AC + + + + ; XXX to be finished + + jmp Main + + + + + ; LDY #8 + ; STY SA + ; LDY #0 + ; STY BA + ; STY FNLEN + ; STY FNBANK + ; STY IOSTATUS + ; LDA #>Mon_Data + ; STA FNADR+1 + ; LDA # load/verify + ; JSR Print_CR + ; LDX Long_AC ; X/Y = end address + ; LDY Long_AC+1 + ; LDA VERCKK ; A = load/verify/save + ; CMP #'S' + ; LBNE Mon_Error ; must be Save + ; LDA #0 + ; STA SA ; set SA for PRG + ; LDA #Long_PC ; Long_PC = start address + ; JSR SAVE +; @exit JMP Main + +; @do LDA VERCKK + ; CMP #'V' ; Verify + ; BEQ @exec + ; CMP #'L' ; Load + ; LBNE Mon_Error + ; LDA #0 ; 0 = LOAD +; @exec JSR LOAD ; A == 0 : LOAD else VERIFY + ; BBR4 IOSTATUS,@exit + ; LDA VERCKK + ; LBEQ Mon_Error + ; LBCS Main + ; JSR PRIMM + ; !pet " error",0 + ; JMP Main + +; @load LDX Long_PC + ; LDY Long_PC+1 + ; LDA #0 ; 0 = use X/Y as load address + ; STA SA ; and ignore load address from file + ; BRA @do From 1bc7bf7e40381937b1b8c217e9c78ff78a98e007 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 20 Jan 2021 18:00:09 +0100 Subject: [PATCH 157/257] more work towards disk operations in monitor --- src/kernal/board_m65/mega65_proxies_monitor.s | 11 ++ src/mon_m65/imports.s | 9 +- src/mon_m65/mon_command_jmp_jsr.s | 3 + src/mon_m65/mon_command_load_save.s | 158 ++++++++---------- src/mon_m65/mon_helper_memory.s | 1 + 5 files changed, 96 insertions(+), 86 deletions(-) diff --git a/src/kernal/board_m65/mega65_proxies_monitor.s b/src/kernal/board_m65/mega65_proxies_monitor.s index 0a2f9f95..6baeea29 100644 --- a/src/kernal/board_m65/mega65_proxies_monitor.s +++ b/src/kernal/board_m65/mega65_proxies_monitor.s @@ -24,6 +24,17 @@ proxy_M1_end: jmp map_MON_1 +proxy_M1_JLOAD: + + jsr map_NORMAL + jsr JLOAD + bra proxy_M1_end + +proxy_M1_JSAVE: + + jsr map_NORMAL + jsr JSAVE + bra proxy_M1_end ; Memory acccess routines diff --git a/src/mon_m65/imports.s b/src/mon_m65/imports.s index 94510187..d9c7cb68 100644 --- a/src/mon_m65/imports.s +++ b/src/mon_m65/imports.s @@ -10,14 +10,19 @@ ;; #ALIAS# SCREEN = KERNAL_0.SCREEN ;; #ALIAS# SELDEV = KERNAL_0.SELDEV +;; #ALIAS# CHRIN = KERNAL_0.proxy_M1_CHRIN +;; #ALIAS# CHROUT = KERNAL_0.proxy_M1_CHROUT + +;; #ALIAS# LOAD = KERNAL_0.proxy_M1_JLOAD +;; #ALIAS# SAVE = KERNAL_0.proxy_M1_JSAVE + ;; #ALIAS# monitor_exit = KERNAL_0.m65_shadow_BZP ;; #ALIAS# monitor_memread_helper = KERNAL_0.proxy_M1_memread ;; #ALIAS# monitor_memwrite_helper = KERNAL_0.proxy_M1_memwrite ;; #ALIAS# monitor_jmpout = KERNAL_0.proxy_M1_jmpout ;; #ALIAS# monitor_jmpout_ret = KERNAL_0.proxy_M1_jmpout_ret -;; #ALIAS# CHRIN = KERNAL_0.proxy_M1_CHRIN -;; #ALIAS# CHROUT = KERNAL_0.proxy_M1_CHROUT +;; #ALIAS# m65_shadow_BZP = KERNAL_0.m65_shadow_BZP ;; #ALIAS# wedge_dos_monitor = BASIC_0.wedge_dos_monitor diff --git a/src/mon_m65/mon_command_jmp_jsr.s b/src/mon_m65/mon_command_jmp_jsr.s index fe7cdf04..dfbe7167 100644 --- a/src/mon_m65/mon_command_jmp_jsr.s +++ b/src/mon_m65/mon_command_jmp_jsr.s @@ -66,10 +66,13 @@ Mon_Go_JSR_comon: lda ZR pha + jsr m65_shadow_BZP jmp monitor_jmpout Mon_JSR_ret: + jsr m65_shadow_BZP + ; Retrieve registers pha diff --git a/src/mon_m65/mon_command_load_save.s b/src/mon_m65/mon_command_load_save.s index 3e2f41a0..1ab93c9f 100644 --- a/src/mon_m65/mon_command_load_save.s +++ b/src/mon_m65/mon_command_load_save.s @@ -32,8 +32,11 @@ Load_Save: ; Separate flow for SAVE lda VERCKK - cmp #$02 + cmp #'S' beq Mon_Save + sec + sbc #'L' + sta VERCKK ; 0 for load, other value for verify ; FALLTROUGH @@ -52,10 +55,37 @@ Mon_Load_Verify: @got_unit: - ; XXX to be finished + ; Determine start address - jmp Main + lda #$00 + sta Addr_Mode + jsr Get_Val_To_LAC + beq @no_startaddr + lda Addr_Mode + +bne Mon_Error + ; Load/Verify with fixed start address + + ldx Long_AC+0 + ldy Long_AC+1 + + lda #$00 + +skip_2_bytes_trash_nvz + +@no_startaddr: + + ; Load/Verify without fixed start address + + lda #$01 + +@load: + + sta SA + lda VERCKK + jsr m65_shadow_BZP + jsr LOAD + + bra Mon_Load_Save_Common Mon_Save: @@ -64,89 +94,49 @@ Mon_Save: jsr Get_Val_To_LAC +beq Mon_Error jsr Syntax_Byte_AC + lda Long_AC+0 + sta FA + ; Determine start address + lda #$00 + sta Addr_Mode + jsr Get_Val_To_LAC + +bne Mon_Error + lda Addr_Mode + +bne Mon_Error - ; XXX to be finished + lda Long_AC+1 + pha + lda Long_AC+0 + pha + + ; Determine end address + + jsr Get_Val_To_LAC + +bne Mon_Error + lda Addr_Mode + +bne Mon_Error + + inw Long_AC+0 + ldx Long_AC+0 + ldy Long_AC+1 + + jsr m65_shadow_BZP + pla ; set start address for SAVE + sta TXTTAB+0 + pla + sta TXTTAB+1 + lda #TXTTAB + + jsr SAVE + + ; FALLTROUGH + +Mon_Load_Save_Common: + + jsr m65_shadow_BZP + + ; XXX to be finished - check for errors jmp Main - - - - - ; LDY #8 - ; STY SA - ; LDY #0 - ; STY BA - ; STY FNLEN - ; STY FNBANK - ; STY IOSTATUS - ; LDA #>Mon_Data - ; STA FNADR+1 - ; LDA # load/verify - ; JSR Print_CR - ; LDX Long_AC ; X/Y = end address - ; LDY Long_AC+1 - ; LDA VERCKK ; A = load/verify/save - ; CMP #'S' - ; LBNE Mon_Error ; must be Save - ; LDA #0 - ; STA SA ; set SA for PRG - ; LDA #Long_PC ; Long_PC = start address - ; JSR SAVE -; @exit JMP Main - -; @do LDA VERCKK - ; CMP #'V' ; Verify - ; BEQ @exec - ; CMP #'L' ; Load - ; LBNE Mon_Error - ; LDA #0 ; 0 = LOAD -; @exec JSR LOAD ; A == 0 : LOAD else VERIFY - ; BBR4 IOSTATUS,@exit - ; LDA VERCKK - ; LBEQ Mon_Error - ; LBCS Main - ; JSR PRIMM - ; !pet " error",0 - ; JMP Main - -; @load LDX Long_PC - ; LDY Long_PC+1 - ; LDA #0 ; 0 = use X/Y as load address - ; STA SA ; and ignore load address from file - ; BRA @do diff --git a/src/mon_m65/mon_helper_memory.s b/src/mon_m65/mon_helper_memory.s index 2a840445..01af1ab1 100644 --- a/src/mon_m65/mon_helper_memory.s +++ b/src/mon_m65/mon_helper_memory.s @@ -1,6 +1,7 @@ ; Monitor helper code - memory read and write + Get_From_Memory_LAC: jsr Exchange_LAC_LPC From c5da00c2456b704dfa484b417ed84ca078a2c4c6 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 22 Jan 2021 20:56:46 +0100 Subject: [PATCH 158/257] filled-in some gaps in MONITOR code --- src/basic/board_m65/mega65_proxies.s | 11 +++++++++++ src/mon_m65/imports.s | 1 + src/mon_m65/mon_command_load_save.s | 4 +++- 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/src/basic/board_m65/mega65_proxies.s b/src/basic/board_m65/mega65_proxies.s index fd0ecb06..f6927909 100644 --- a/src/basic/board_m65/mega65_proxies.s +++ b/src/basic/board_m65/mega65_proxies.s @@ -145,4 +145,15 @@ proxy_B1_do_error_print_only: jsr do_error_print_only bra proxy_B1_end_2 +proxy_B1_do_mon_kernal_error: ; for the MONITOR only + + jsr map_NORMAL + tax + bne @1 + ldx #$1E ; BREAK error + 1 +@1: + dex + jsr do_error_print_only + bra proxy_B1_end_2 + } diff --git a/src/mon_m65/imports.s b/src/mon_m65/imports.s index d9c7cb68..91b4a8b4 100644 --- a/src/mon_m65/imports.s +++ b/src/mon_m65/imports.s @@ -25,6 +25,7 @@ ;; #ALIAS# m65_shadow_BZP = KERNAL_0.m65_shadow_BZP ;; #ALIAS# wedge_dos_monitor = BASIC_0.wedge_dos_monitor +;; #ALIAS# do_mon_kernal_error = BASIC_0.proxy_B1_do_mon_kernal_error ; 'Print immediate', original implementation by Mike Barry, adapted to 65CE02, modified to preserve .Y diff --git a/src/mon_m65/mon_command_load_save.s b/src/mon_m65/mon_command_load_save.s index 1ab93c9f..8d7c60f4 100644 --- a/src/mon_m65/mon_command_load_save.s +++ b/src/mon_m65/mon_command_load_save.s @@ -136,7 +136,9 @@ Mon_Save: Mon_Load_Save_Common: jsr m65_shadow_BZP + bcc @end + jsr do_mon_kernal_error - ; XXX to be finished - check for errors +@end: jmp Main From a0d548697f51d2b8ceb8964d3cae1d1bdc0b6606 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 22 Jan 2021 22:27:21 +0100 Subject: [PATCH 159/257] MONITOR command dispatch bugfixes --- src/mon_m65/bsmon.s | 9 +++++---- src/mon_m65/mon_command_load_save.s | 2 ++ 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 5c66750d..e7f93ca9 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -128,7 +128,7 @@ Mon_Switch: CMP #'?' +beq Mon_Help - LDX #24 + LDX #22 @loop CMP Command_Char,X BEQ Mon_Select DEX @@ -152,8 +152,7 @@ Mon_Error: Mon_Select: ; ********* - STA VERCKK - CPX #21 + CPX #20 LBCS Load_Save TXA ASL @@ -171,19 +170,21 @@ Print_Commands: Command_Char: ; *********** - ; 0123456789abcdef + ; 0123456789012345 !pet "abcdfghjmrtx@.>;" ; ********** Cons_Prefix: ; ********** + ; 6789 !pet "$+&%" ; *************** Load_Save_Verify: ; *************** + ; 012 !pet "lsv ",KEY_RETURN !pet KEY_RVS_ON," for help: type ? and press return ",KEY_RETURN,0 RTS diff --git a/src/mon_m65/mon_command_load_save.s b/src/mon_m65/mon_command_load_save.s index 8d7c60f4..d85a881c 100644 --- a/src/mon_m65/mon_command_load_save.s +++ b/src/mon_m65/mon_command_load_save.s @@ -4,6 +4,8 @@ Load_Save: + stx VERCKK ; store command + ; Retrieve file name @skip1: From d97052076d7728de80cf11d8280c492eb777163c Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 22 Jan 2021 22:46:49 +0100 Subject: [PATCH 160/257] some more bugfixes --- src/mon_m65/bsmon.s | 2 ++ src/mon_m65/mon_command_load_save.s | 5 ++--- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index e7f93ca9..7b6c9939 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -166,6 +166,8 @@ Print_Commands: JSR PRIMM !pet KEY_RETURN,KEY_RVS_ON," commands: " + ; In case of changes in command numbering, adapt 'Load_Save' + ; *********** Command_Char: ; *********** diff --git a/src/mon_m65/mon_command_load_save.s b/src/mon_m65/mon_command_load_save.s index d85a881c..f40a5b8c 100644 --- a/src/mon_m65/mon_command_load_save.s +++ b/src/mon_m65/mon_command_load_save.s @@ -34,10 +34,10 @@ Load_Save: ; Separate flow for SAVE lda VERCKK - cmp #'S' + cmp #21 ; 'S' beq Mon_Save sec - sbc #'L' + sbc #20 ; 'L' sta VERCKK ; 0 for load, other value for verify ; FALLTROUGH @@ -86,7 +86,6 @@ Mon_Load_Verify: lda VERCKK jsr m65_shadow_BZP jsr LOAD - bra Mon_Load_Save_Common Mon_Save: From 7cabe62cc5039e0c01827271b8892f434eb6b16b Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 22 Jan 2021 23:44:59 +0100 Subject: [PATCH 161/257] more monitor bugfixes --- src/basic/,imports.s | 1 + src/basic/board_m65/mega65_proxies.s | 7 ++-- src/kernal/board_m65/mega65_proxies_monitor.s | 35 ++++++++++++------- src/mon_m65/imports.s | 4 +-- src/mon_m65/mon_command_jmp_jsr.s | 3 -- src/mon_m65/mon_command_load_save.s | 14 +++++--- 6 files changed, 37 insertions(+), 27 deletions(-) diff --git a/src/basic/,imports.s b/src/basic/,imports.s index 9972264a..767bf70a 100644 --- a/src/basic/,imports.s +++ b/src/basic/,imports.s @@ -48,6 +48,7 @@ ;; #ALIAS# m65_colorset = KERNAL_0.m65_colorset ;; #ALIAS# m65_shadow_BZP = KERNAL_0.m65_shadow_BZP +;; #ALIAS# proxy_M1_IO_end = KERNAL_0.proxy_M1_IO_end ; ; Ultimate 64 specific parts diff --git a/src/basic/board_m65/mega65_proxies.s b/src/basic/board_m65/mega65_proxies.s index f6927909..a218be22 100644 --- a/src/basic/board_m65/mega65_proxies.s +++ b/src/basic/board_m65/mega65_proxies.s @@ -145,15 +145,14 @@ proxy_B1_do_error_print_only: jsr do_error_print_only bra proxy_B1_end_2 -proxy_B1_do_mon_kernal_error: ; for the MONITOR only +proxy_M1_print_kernal_error: - jsr map_NORMAL tax bne @1 ldx #$1E ; BREAK error + 1 @1: dex + jsr m65_shadow_BZP jsr do_error_print_only - bra proxy_B1_end_2 - + jmp proxy_M1_IO_end } diff --git a/src/kernal/board_m65/mega65_proxies_monitor.s b/src/kernal/board_m65/mega65_proxies_monitor.s index 6baeea29..e40b4bf7 100644 --- a/src/kernal/board_m65/mega65_proxies_monitor.s +++ b/src/kernal/board_m65/mega65_proxies_monitor.s @@ -19,22 +19,10 @@ proxy_M1_CHROUT: ; FALLTROUGH -proxy_M1_jmpout_ret: ; reused by monitor proxy_M1_end: jmp map_MON_1 -proxy_M1_JLOAD: - - jsr map_NORMAL - jsr JLOAD - bra proxy_M1_end - -proxy_M1_JSAVE: - - jsr map_NORMAL - jsr JSAVE - bra proxy_M1_end ; Memory acccess routines @@ -58,6 +46,8 @@ proxy_M1_memwrite: proxy_M1_jmpout: + jsr m65_shadow_BZP + plz ; ZR ply ; YR plx ; XR @@ -67,3 +57,24 @@ proxy_M1_jmpout: plp ; SR jmp map_NORMAL + +; LOAD/SAVE + +proxy_M1_JLOAD: + + jsr m65_shadow_BZP + jsr JLOAD + + ; FALLTROUGH + +proxy_M1_jmpout_ret: ; reused by monitor +proxy_M1_IO_end: + + jsr m65_shadow_BZP + bra proxy_M1_end + +proxy_M1_JSAVE: + + jsr m65_shadow_BZP + jsr JSAVE + bra proxy_M1_IO_end diff --git a/src/mon_m65/imports.s b/src/mon_m65/imports.s index 91b4a8b4..2ea099c5 100644 --- a/src/mon_m65/imports.s +++ b/src/mon_m65/imports.s @@ -22,10 +22,8 @@ ;; #ALIAS# monitor_jmpout = KERNAL_0.proxy_M1_jmpout ;; #ALIAS# monitor_jmpout_ret = KERNAL_0.proxy_M1_jmpout_ret -;; #ALIAS# m65_shadow_BZP = KERNAL_0.m65_shadow_BZP - ;; #ALIAS# wedge_dos_monitor = BASIC_0.wedge_dos_monitor -;; #ALIAS# do_mon_kernal_error = BASIC_0.proxy_B1_do_mon_kernal_error +;; #ALIAS# print_kernal_error = BASIC_0.proxy_M1_print_kernal_error ; 'Print immediate', original implementation by Mike Barry, adapted to 65CE02, modified to preserve .Y diff --git a/src/mon_m65/mon_command_jmp_jsr.s b/src/mon_m65/mon_command_jmp_jsr.s index dfbe7167..fe7cdf04 100644 --- a/src/mon_m65/mon_command_jmp_jsr.s +++ b/src/mon_m65/mon_command_jmp_jsr.s @@ -66,13 +66,10 @@ Mon_Go_JSR_comon: lda ZR pha - jsr m65_shadow_BZP jmp monitor_jmpout Mon_JSR_ret: - jsr m65_shadow_BZP - ; Retrieve registers pha diff --git a/src/mon_m65/mon_command_load_save.s b/src/mon_m65/mon_command_load_save.s index f40a5b8c..f06b2ee5 100644 --- a/src/mon_m65/mon_command_load_save.s +++ b/src/mon_m65/mon_command_load_save.s @@ -83,8 +83,9 @@ Mon_Load_Verify: @load: sta SA + + jsr Print_CR lda VERCKK - jsr m65_shadow_BZP jsr LOAD bra Mon_Load_Save_Common @@ -123,22 +124,25 @@ Mon_Save: ldx Long_AC+0 ldy Long_AC+1 - jsr m65_shadow_BZP pla ; set start address for SAVE sta TXTTAB+0 pla sta TXTTAB+1 - lda #TXTTAB + jsr Print_CR + lda #TXTTAB jsr SAVE ; FALLTROUGH Mon_Load_Save_Common: - jsr m65_shadow_BZP bcc @end - jsr do_mon_kernal_error + pha + jsr Print_CR + pla + jsr print_kernal_error + jsr Print_CR @end: From 1c1051726da7cbb0e961770c5893504f77e75db6 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 23 Jan 2021 00:01:03 +0100 Subject: [PATCH 162/257] DOS wedge simplified a little --- src/basic/wedge/wedge_dos.s | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) diff --git a/src/basic/wedge/wedge_dos.s b/src/basic/wedge/wedge_dos.s index 7fc3085f..e41f6f5b 100644 --- a/src/basic/wedge/wedge_dos.s +++ b/src/basic/wedge/wedge_dos.s @@ -155,7 +155,7 @@ wedge_dos_command_confirmed: ; Retrieve status, print it if not OK jsr JCLALL - jsr wedge_dos_status_get_no_new_line + jsr wedge_dos_status_get lda BUF+0 cmp #$30 ; '0' @@ -207,14 +207,6 @@ wedge_dos_change_drive: wedge_dos_status_get: - ; New line - separate status from current display - - jsr print_return - - ; FALLTROUGH - -wedge_dos_status_get_no_new_line: - ; Here the flow is mostly the same as in the example from ; https://codebase64.org/doku.php?id=base:reading_the_error_channel_of_a_disk_drive @@ -273,16 +265,13 @@ wedge_dos_status_get_done: wedge_dos_status: jsr wedge_dos_status_get - +bra wedge_dos_status_print_no_new_line + + ; FALLTROUGH wedge_dos_status_print: jsr print_return - ; FALLTROUGH - -wedge_dos_status_print_no_new_line: - ; Print buffered status ldx #$00 From e0d54ea424766875a197b326709277d5fd5d3744 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 23 Jan 2021 00:03:49 +0100 Subject: [PATCH 163/257] small visual improvement --- src/mon_m65/bsmon.s | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 7b6c9939..38b96a77 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -1686,6 +1686,7 @@ Print_BCD: Mon_DOS: ; ****** + JSR Print_CR JSR wedge_dos_monitor JSR Print_CR JMP Main From 5fef3a411c700f7699f9711013f92a6b16541439 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 23 Jan 2021 18:00:39 +0100 Subject: [PATCH 164/257] some more BSMON adaptations --- src/mon_m65/bsmon.s | 105 +----------------------- src/mon_m65/mon_helper_get_val_to_lac.s | 5 +- 2 files changed, 6 insertions(+), 104 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 38b96a77..38d79e88 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -583,10 +583,11 @@ Mon_Assemble: @labc LDA #0 @labd STA Mode_Flags - JSR Read_Number - LBCS Mon_Error + LDA #0 + STA Addr_Mode + JSR Got_Val_To_LAC BEQ @labg ; no operand - LDA Long_AC+2 + LDA Mode_Flags LBNE Mon_Error ; -> overflow LDY #2 ; Y=2 word operand LDA Long_AC+1 @@ -1275,104 +1276,6 @@ Print_Code: INC Op_Size @return RTS - -; ********** -Read_Number: ; XXX obsolete, to be replaced -; ********** - - PHX - PHY - PHZ - LDA #0 - STA Dig_Cnt ; count columns read - STA Long_AC ; clear result Long_AC - STA Long_AC+1 - STA Long_AC+2 - STA Long_AC+3 - - JSR Get_Glyph ; get 1st. character - BEQ @exit - CMP #KEY_APOSTROPHE ; character entry 'C - BNE @numeric - JSR Get_Char ; character after ' - STA Long_AC - INC Dig_Cnt - BRA @exit - -@numeric LDY #3 ; $ + % % -@prefix CMP Cons_Prefix,Y ; Y = base index - BEQ @digit ; -> valid prefix - DEY - BPL @prefix - INY ; Y = 0 - DEC Buf_Index ; character is digit - -@digit JSR Get_Char ; hex -> BCD - BEQ @exit ; ? : ; and zero terminate - CMP #'0' - BCC @exit - CMP #':' - BCC @valid ; 0-9 - CMP #'A' - BCC @exit - CMP #'G' - BCS @exit - SBC #7 ; hex conversion -@valid SBC #'0'-1 - CMP Num_Base,Y - BCS @error - PHA ; push digit - INC Dig_Cnt - - CPY #1 ; decimal - BNE @laba - LDX #3 ; push Long_AC * 2 - CLC -@push LDA Long_AC,X - ROL - PHA - DEX - BPL @push - -@laba LDX Num_Bits,Y -@shift ASL Long_AC - ROL Long_AC+1 - ROW Long_AC+2 - BCS @error ; overflow - DEX - BNE @shift - - CPY #1 ; decimal adjustment - BNE @labc - LDX #0 - LDZ #3 - CLC -@pull PLA - ADC Long_AC,X - STA Long_AC,X - INX - DEZ - BPL @pull - -@labc PLA ; pull digit - CLC - ADC Long_AC - STA Long_AC - BCC @digit - INC Long_AC+1 - BNE @digit - INW Long_AC+2 - BNE @digit - -@error SEC - BRA @return -@exit CLC -@return PLZ - PLY - PLX - LDA Dig_Cnt ; digits read - RTS - ; ************* Print_LPC_Addr: ; prints out the address in PC ; ************* diff --git a/src/mon_m65/mon_helper_get_val_to_lac.s b/src/mon_m65/mon_helper_get_val_to_lac.s index a1d0d090..259d8de5 100644 --- a/src/mon_m65/mon_helper_get_val_to_lac.s +++ b/src/mon_m65/mon_helper_get_val_to_lac.s @@ -144,11 +144,10 @@ Get_Val_To_LAC: @check_done: - lda Dig_Cnt - plz ply plx - cmp #$00 ; allow to easily check if a parameter was given + lda Dig_Cnt ; allow to easily check if a parameter was given + clc rts From 88f6be8a0fd7ce5dc835b8802a354196839907bd Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 23 Jan 2021 18:30:01 +0100 Subject: [PATCH 165/257] MONITOR assembly bugfix --- src/mon_m65/bsmon.s | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 38d79e88..e5a23d4b 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -587,7 +587,7 @@ Mon_Assemble: STA Addr_Mode JSR Got_Val_To_LAC BEQ @labg ; no operand - LDA Mode_Flags + LDA Addr_Mode LBNE Mon_Error ; -> overflow LDY #2 ; Y=2 word operand LDA Long_AC+1 @@ -600,8 +600,7 @@ Mon_Assemble: TXA ; A = current index BNE @labg ; -> at 2nd. byte JSR LAC_To_LCT ; Long_CT = 1st. operand -@labg DEC Buf_Index ; back to delimiter - +@labg @lpnop JSR Get_Char ; get delimiter LBEQ @adjust ; end of operand CMP #' ' From ecb815597640659775a17c299a0ada0fd37ed2f2 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 23 Jan 2021 19:43:39 +0100 Subject: [PATCH 166/257] fixed assembling immediate mode --- src/mon_m65/bsmon.s | 17 +++- src/mon_m65/mon_debug.s | 103 +++++++----------------- src/mon_m65/mon_helper_get_val_to_lac.s | 10 ++- 3 files changed, 50 insertions(+), 80 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index e5a23d4b..14ae4cda 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -476,6 +476,10 @@ Dump_Row: Mon_Assemble: ; *********** + lda #$0D + jsr DBG_print_char + jsr DBG_print_Buf_Index + LDA #$00 STA Addr_Mode JSR Get_Val_To_LAC ; get 1st. parameter @@ -581,12 +585,14 @@ Mon_Assemble: ; XXX start debugging from here -@labc LDA #0 +@labc jsr DBG_print_Buf_Index + LDA #0 @labd STA Mode_Flags LDA #0 STA Addr_Mode - JSR Got_Val_To_LAC + JSR Get_Val_To_LAC BEQ @labg ; no operand + jsr DBG_print_long_ac LDA Addr_Mode LBNE Mon_Error ; -> overflow LDY #2 ; Y=2 word operand @@ -603,6 +609,7 @@ Mon_Assemble: @labg @lpnop JSR Get_Char ; get delimiter LBEQ @adjust ; end of operand + jsr DBG_print_char CMP #' ' BEQ @lpnop @@ -841,7 +848,11 @@ Mon_Assemble: @store1 LDA Op_Code JSR Put_To_Memory_LPC -@print JSR PRIMM +@print pha + lda #$0D + jsr DBG_print_char + pla + JSR PRIMM !pet 13,$91,"a ", KEY_ESC, 'q', 0 JSR Print_Code INC Op_Size diff --git a/src/mon_m65/mon_debug.s b/src/mon_m65/mon_debug.s index 4aacc2b4..0809ea88 100644 --- a/src/mon_m65/mon_debug.s +++ b/src/mon_m65/mon_debug.s @@ -13,8 +13,8 @@ DBG_print_Buf_Index: phy phz - jsr PRIMM - !pet $0D, "buf idx : ", 0 + lda #':' + jsr CHROUT lda Buf_Index jsr Print_Hex @@ -28,6 +28,25 @@ DBG_print_Buf_Index: rts +DBG_print_char: + + php + pha + phx + phy + phz + + jsr CHROUT + + plz + ply + plx + pla + plp + + rts + + DBG_print_long_ac: php @@ -36,8 +55,14 @@ DBG_print_long_ac: phy phz - jsr PRIMM - !pet $0D, "long ac : ", 0 + lda #'*' + jsr CHROUT + + lda Dig_Cnt + jsr Print_Hex + + lda #'*' + jsr CHROUT lda Long_AC+3 jsr Print_Hex @@ -48,15 +73,6 @@ DBG_print_long_ac: lda Long_AC+0 jsr Print_Hex - jsr PRIMM - !pet " addr mode : ", 0 - - lda Addr_Mode - jsr Print_Hex - - jsr PRIMM - !pet " :: ", 0 - plz ply plx @@ -64,64 +80,3 @@ DBG_print_long_ac: plp rts - -DBG_print_hex: - - php - pha - phx - phy - phz - - pha - jsr PRIMM - !pet $0D, "hex : ", 0 - pla - - jsr Print_Hex - - plz - ply - plx - pla - plp - - rts - -DBG_print_CP1: - - php - pha - phx - phy - phz - - jsr PRIMM - !pet $0D, "checkpoint 1", 0 - - jmp DBG_END - -DBG_print_CP2: - - php - pha - phx - phy - phz - - jsr PRIMM - !pet $0D, "checkpoint 2", 0 - - ; FALLTROUGH - -DBG_END: - - plz - ply - plx - pla - plp - - rts - - diff --git a/src/mon_m65/mon_helper_get_val_to_lac.s b/src/mon_m65/mon_helper_get_val_to_lac.s index 259d8de5..52b721a5 100644 --- a/src/mon_m65/mon_helper_get_val_to_lac.s +++ b/src/mon_m65/mon_helper_get_val_to_lac.s @@ -42,13 +42,13 @@ Get_Val_To_LAC: jsr Get_Char beq @exit ; branch if terminated cmp #'0' - bcc @exit + bcc @exit_invalid_digit cmp #':' bcc @valid_digit ; 0-9 cmp #'A' - bcc @exit + bcc @exit_invalid_digit cmp #'G' - bcs @exit + bcs @exit_invalid_digit sbc #$07 ; hex conversion @valid_digit: @@ -120,6 +120,10 @@ Get_Val_To_LAC: jmp Mon_Error ; number too large +@exit_invalid_digit: + + dec Buf_Index + @exit: lda Long_AC+3 From 06116cd0eef68cb01f56ae4237fda89d635066ec Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 23 Jan 2021 20:09:44 +0100 Subject: [PATCH 167/257] better MONITOR -> DOS Wedge integration --- src/basic/wedge/wedge_dos.s | 1 + src/mon_m65/bsmon.s | 20 ++++++++++++++++++-- 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/src/basic/wedge/wedge_dos.s b/src/basic/wedge/wedge_dos.s index e41f6f5b..77449da0 100644 --- a/src/basic/wedge/wedge_dos.s +++ b/src/basic/wedge/wedge_dos.s @@ -471,6 +471,7 @@ wedge_dos_wrapper_error_common: ; Print error - within the MONITOR jsr do_error_print_only + jsr print_return bra wedge_dos_wrapper_exit_nocheck wedge_dos_SYNTAX_error: diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 14ae4cda..ab1b3750 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -1599,9 +1599,25 @@ Print_BCD: Mon_DOS: ; ****** - JSR Print_CR +; Shift BUF content so that '@' is first character + +@lp1 LDA BUF + CMP #'@' + BEQ @wedge + LDX #01 +@lp2 LDA BUF,x + DEX + STA BUF,x + INX + INX + CPX #80 + BNE @lp2 + BRA @lp1 + +; Launch DOS Wedge + +@wedge JSR Print_CR JSR wedge_dos_monitor - JSR Print_CR JMP Main From a6a5bd9a249d7dd8803cae0e58615191743a21a9 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 23 Jan 2021 20:28:22 +0100 Subject: [PATCH 168/257] removed some debug code --- src/mon_m65/bsmon.s | 30 ++++++++++----------- src/mon_m65/mon_debug.s | 60 +---------------------------------------- 2 files changed, 15 insertions(+), 75 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index ab1b3750..0ee27703 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -9,10 +9,6 @@ Mon_Call: ; ******* - jsr PRIMM - !pet $0D, "* warning * port not finished yet", $0D, $0D, $00 - - JSR Print_Commands ; set default addressing mode to 64K @@ -478,7 +474,18 @@ Mon_Assemble: lda #$0D jsr DBG_print_char - jsr DBG_print_Buf_Index + lda #'-' + jsr DBG_print_char + ldx #$FF +@xx: + inx + lda BUF,x + beq @x1 + jsr DBG_print_char + bra @xx +@x1: + lda #$0D + jsr DBG_print_char LDA #$00 STA Addr_Mode @@ -583,16 +590,12 @@ Mon_Assemble: ; read operand -; XXX start debugging from here - -@labc jsr DBG_print_Buf_Index - LDA #0 +@labc LDA #0 @labd STA Mode_Flags LDA #0 STA Addr_Mode JSR Get_Val_To_LAC BEQ @labg ; no operand - jsr DBG_print_long_ac LDA Addr_Mode LBNE Mon_Error ; -> overflow LDY #2 ; Y=2 word operand @@ -609,7 +612,6 @@ Mon_Assemble: @labg @lpnop JSR Get_Char ; get delimiter LBEQ @adjust ; end of operand - jsr DBG_print_char CMP #' ' BEQ @lpnop @@ -848,11 +850,7 @@ Mon_Assemble: @store1 LDA Op_Code JSR Put_To_Memory_LPC -@print pha - lda #$0D - jsr DBG_print_char - pla - JSR PRIMM +@print JSR PRIMM !pet 13,$91,"a ", KEY_ESC, 'q', 0 JSR Print_Code INC Op_Size diff --git a/src/mon_m65/mon_debug.s b/src/mon_m65/mon_debug.s index 0809ea88..d1c0e8f7 100644 --- a/src/mon_m65/mon_debug.s +++ b/src/mon_m65/mon_debug.s @@ -3,30 +3,7 @@ ; Helper code for debugging the monitor ; -; XXX disable this code once the monitor integration is complete - -DBG_print_Buf_Index: - - php - pha - phx - phy - phz - - lda #':' - jsr CHROUT - - lda Buf_Index - jsr Print_Hex - - plz - ply - plx - pla - plp - - rts - +; XXX remove this code once the monitor integration is complete DBG_print_char: @@ -45,38 +22,3 @@ DBG_print_char: plp rts - - -DBG_print_long_ac: - - php - pha - phx - phy - phz - - lda #'*' - jsr CHROUT - - lda Dig_Cnt - jsr Print_Hex - - lda #'*' - jsr CHROUT - - lda Long_AC+3 - jsr Print_Hex - lda Long_AC+2 - jsr Print_Hex - lda Long_AC+1 - jsr Print_Hex - lda Long_AC+0 - jsr Print_Hex - - plz - ply - plx - pla - plp - - rts From dc5cc32e7bc8d0ad84776949d95a16021e6567b2 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 24 Jan 2021 20:22:38 +0100 Subject: [PATCH 169/257] minor CHRIN code size optimization --- src/kernal/screen/chrin_keyboard.s | 4 ++-- src/kernal/screen_m65/mega65_chrin_keyboard.s | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/kernal/screen/chrin_keyboard.s b/src/kernal/screen/chrin_keyboard.s index 6fc937c9..28e41933 100644 --- a/src/kernal/screen/chrin_keyboard.s +++ b/src/kernal/screen/chrin_keyboard.s @@ -136,7 +136,7 @@ chrin_enter_loop: ; Set mark informing that we are returning a line ldy #$01 - sty CRSW + sty CRSW ; XXX has to get previous PNTR+1, not 1 ; Clear quote mode mark dey ; set .Y to 0 @@ -158,4 +158,4 @@ chrkn_keyboard_not_enter: ; Print character, keep looking for input from keyboard until carriage return jsr CHROUT jsr pop_keyboard_buffer - jmp chrin_keyboard_repeat + +bra chrin_keyboard_read diff --git a/src/kernal/screen_m65/mega65_chrin_keyboard.s b/src/kernal/screen_m65/mega65_chrin_keyboard.s index 419abeae..071bd30a 100644 --- a/src/kernal/screen_m65/mega65_chrin_keyboard.s +++ b/src/kernal/screen_m65/mega65_chrin_keyboard.s @@ -143,7 +143,7 @@ m65_chrin_enter_loop: ; Set mark informing that we are returning a line ldy #$01 - sty CRSW + sty CRSW ; XXX has to get previous PNTR+1, not 1 ; Clear quote mode mark dey @@ -166,4 +166,4 @@ m65_chrin_keyboard_not_enter: ; Print character, keep looking for input from keyboard until carriage return jsr CHROUT jsr pop_keyboard_buffer - jmp m65_chrin_keyboard_repeat + bra m65_chrin_keyboard_read From a9c999c1892eb09e8c40e91f0ad01522c4320248 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 24 Jan 2021 22:10:02 +0100 Subject: [PATCH 170/257] CHRIN fix, M65 part --- src/kernal/screen_m65/mega65_chrin_keyboard.s | 27 ++++++++++--------- 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/src/kernal/screen_m65/mega65_chrin_keyboard.s b/src/kernal/screen_m65/mega65_chrin_keyboard.s index 071bd30a..25a66363 100644 --- a/src/kernal/screen_m65/mega65_chrin_keyboard.s +++ b/src/kernal/screen_m65/mega65_chrin_keyboard.s @@ -6,7 +6,7 @@ ; -m65_chrin_keyboard: ; XXX connnect this function to Kernal +m65_chrin_keyboard: ; Preserve .X, .Y and .Z register @@ -14,6 +14,11 @@ m65_chrin_keyboard: ; XXX connnect this function to Kernal phy phz + ; Preserve old PNTR + + lda PNTR + pha + ; FALLTROUGH m65_chrin_keyboard_repeat: @@ -48,6 +53,8 @@ m65_chrin_keyboard_empty_line: m65_chrin_keyboard_end: + plz ; drop stored PNTR + plz ply plx @@ -61,10 +68,6 @@ m65_chrin_keyboard_not_end_of_input: inc CRSW tay - ; FALLTROUGH - -m65_chrin_keyboard_return_byte: - jsr m65_helper_scrlpnt_chrin tya @@ -141,17 +144,17 @@ m65_chrin_enter_loop: ; XXX add windowed mode support here - correct INDX and M65__SCRINPUT - ; Set mark informing that we are returning a line - ldy #$01 - sty CRSW ; XXX has to get previous PNTR+1, not 1 - ; Clear quote mode mark - dey + ldy #$00 sty QTSW - ; Return first char of line - bra m65_chrin_keyboard_return_byte ; branch always + ; Set current character to return + pla + pha + sta CRSW + ; Return first char + bra m65_chrin_keyboard_not_end_of_input m65_chrin_keyboard_not_enter: From 737fa3c443ec485689bbf347dc4044d00964715f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 24 Jan 2021 22:18:07 +0100 Subject: [PATCH 171/257] CHRIN fix, C64 part --- src/kernal/screen/chrin_keyboard.s | 22 +++++++++++-------- src/kernal/screen_m65/mega65_chrin_keyboard.s | 8 +++---- 2 files changed, 17 insertions(+), 13 deletions(-) diff --git a/src/kernal/screen/chrin_keyboard.s b/src/kernal/screen/chrin_keyboard.s index 28e41933..ad649e79 100644 --- a/src/kernal/screen/chrin_keyboard.s +++ b/src/kernal/screen/chrin_keyboard.s @@ -21,6 +21,11 @@ chrin_keyboard: stx XSAV +phy_trash_a + ; Preserve old PNTR + + lda PNTR + pha + ; FALLTROUGH chrin_keyboard_repeat: @@ -48,6 +53,7 @@ chrin_keyboard_empty_line: ; For an empty line, just return the carriage return +ply_trash_a + pla ; drop preserved PNTR ldx XSAV clc lda #$0D @@ -60,14 +66,11 @@ chrin_keyboard_not_end_of_input: inc CRSW tay - ; FALLTROUGH - -chrin_keyboard_return_byte: - lda (LSXP),y jsr screen_check_toggle_quote tax +ply_trash_a + pla ; drop preserved PNTR txa ldx XSAV jsr screen_code_to_petscii @@ -134,16 +137,17 @@ chrin_enter_loop: iny sty INDX - ; Set mark informing that we are returning a line - ldy #$01 - sty CRSW ; XXX has to get previous PNTR+1, not 1 + ; Set current character to return + pla + pha + sta CRSW ; Clear quote mode mark - dey ; set .Y to 0 + ldy #$00 sty QTSW ; Return first char of line - beq chrin_keyboard_return_byte ; branch always + beq chrin_keyboard_not_end_of_input ; branch always chrkn_keyboard_not_enter: diff --git a/src/kernal/screen_m65/mega65_chrin_keyboard.s b/src/kernal/screen_m65/mega65_chrin_keyboard.s index 25a66363..2da187f3 100644 --- a/src/kernal/screen_m65/mega65_chrin_keyboard.s +++ b/src/kernal/screen_m65/mega65_chrin_keyboard.s @@ -144,15 +144,15 @@ m65_chrin_enter_loop: ; XXX add windowed mode support here - correct INDX and M65__SCRINPUT - ; Clear quote mode mark - ldy #$00 - sty QTSW - ; Set current character to return pla pha sta CRSW + ; Clear quote mode mark + ldy #$00 + sty QTSW + ; Return first char bra m65_chrin_keyboard_not_end_of_input From 41b268f2ae074136ea18c1c5641a15393873c80a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 24 Jan 2021 22:22:20 +0100 Subject: [PATCH 172/257] removed some obsolete/unused code --- src/mon_m65/bsmon.s | 15 -- src/mon_m65/mon_debug.s | 24 --- src/mon_m65/mon_disabled.s | 296 ------------------------------------- 3 files changed, 335 deletions(-) delete mode 100644 src/mon_m65/mon_debug.s delete mode 100644 src/mon_m65/mon_disabled.s diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 0ee27703..d024056c 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -472,21 +472,6 @@ Dump_Row: Mon_Assemble: ; *********** - lda #$0D - jsr DBG_print_char - lda #'-' - jsr DBG_print_char - ldx #$FF -@xx: - inx - lda BUF,x - beq @x1 - jsr DBG_print_char - bra @xx -@x1: - lda #$0D - jsr DBG_print_char - LDA #$00 STA Addr_Mode JSR Get_Val_To_LAC ; get 1st. parameter diff --git a/src/mon_m65/mon_debug.s b/src/mon_m65/mon_debug.s deleted file mode 100644 index d1c0e8f7..00000000 --- a/src/mon_m65/mon_debug.s +++ /dev/null @@ -1,24 +0,0 @@ - -; -; Helper code for debugging the monitor -; - -; XXX remove this code once the monitor integration is complete - -DBG_print_char: - - php - pha - phx - phy - phz - - jsr CHROUT - - plz - ply - plx - pla - plp - - rts diff --git a/src/mon_m65/mon_disabled.s b/src/mon_m65/mon_disabled.s deleted file mode 100644 index 7fbe5b29..00000000 --- a/src/mon_m65/mon_disabled.s +++ /dev/null @@ -1,296 +0,0 @@ - -; Based on BSM (Bit Shifter's Monitor) - disabled code - - -!ifdef DISABLED_DISABLED { - -!addr Disk_Track = $XX ; logical track 1 -> 255 -!addr Disk_Sector = $XX ; logical sector 0 -> 255 -!addr Disk_Status = $XX ; BCD value of status - -!addr Disk_Msg = $XX ; 40 bytes, disk status as text message - -; ************** -Get_Disk_Status: -; ************** - - LDA FA - JSR TALK - LDA #$6f - JSR TKSA - JSR ACPTR ; 1st. digit - STA Disk_Msg - ASL - ASL - ASL - ASL - STA Disk_Status ; BCD - JSR ACPTR ; 2nd. digit - STA Disk_Msg+1 - AND #15 - ORA Disk_Status - STA Disk_Status ; complete BCD number - - LDY #1 -@loop INY - JSR ACPTR - STA Disk_Msg,Y - CMP #' ' - BCS @loop - LDA #0 - STA Disk_Msg,Y - JSR UNTLK - LDA Disk_Status - RTS - -; **************** -Print_Disk_Status: -; **************** - - JSR Get_Disk_Status - -; ************* -Print_Disk_Msg: -; ************* - - JSR Print_CR - LDY #0 -@loop LDA Disk_Msg,Y - BEQ @exit - JSR CHROUT - INY - BRA @loop -@exit JMP Print_CR - -; **** -DOS_U: ; XXX connect it somehow to command list -; **** - -; @[u],U1 mem track startsec [endsec] : read disk sector(s) -; @[u],U2 mem track startsec [endsec] : write disk sector(s) - - JSR Get_Char - CMP #'1' ; U1: read - LBCC Mon_Error - CMP #'3' ; U2: write - LBCS Mon_Error - STA Mon_Data+1 ; U type - INC Buf_Index - JSR Get_LAC - LBCS Mon_Error - JSR LAC_To_LPC ; Long_PC = memory address - - JSR Get_LAC - LBCS Mon_Error - LDA Long_AC - STA Disk_Track - - JSR Get_LAC - LBCS Mon_Error - LDA Long_AC - STA Disk_Sector - - JSR Get_LAC - JSR LAC_To_LCT ; Long_CT = sector count - DEW Long_CT ; Long_CT = -1 for single - - JSR Open_Disk_Buffer - -@loop LDA Mon_Data+1 - LSR - BEQ @write - JSR Find_next_Sector - BNE @error - JSR Read_Sector - BRA @next - -@write JSR Write_Sector - JSR Find_next_Sector - BNE @error - -@next JSR Inc_LPC_Page - INC Disk_Sector - DEW Long_CT - BPL @loop - -@error JSR Print_Disk_Msg - JSR Close_Disk_Buffer - JMP Main - -; *************** -Find_next_Sector: -; *************** - - JSR Build_U_String - JSR Send_Disk_Command - JSR Get_Disk_Status - BEQ @return ; OK - CMP #$66 ; illegal track or sector - BNE @error ; error - LDA #0 - STA Disk_Sector - INC Disk_Track ; try next track - JSR Build_U_String - JSR Send_Disk_Command - JSR Get_Disk_Status - BEQ @return -@error JSR Print_Disk_Msg - LDA Disk_Status -@return RTS - -; ******************* -Open_Command_Channel: -; ******************* - - LDA FA - JSR LISTEN - LDA #$ff - JSR SECOND - LDY #0 - STY IOSTATUS - RTS - -; ******* -Reset_BP: -; ******* - - JSR Open_Command_Channel -@loop LDA BP_ZERO,Y - BEQ @end - JSR CIOUT - INY - BRA @loop -@end JMP UNLSN - -; **************** -Send_Disk_Command: -; **************** - - JSR Open_Command_Channel -@loop LDA Mon_Data,Y - BEQ @end - JSR CIOUT - INY - BRA @loop -@end JMP UNLSN - -; ********** -Read_Sector: -; ********** - - LDA FA - JSR TALK - LDA #$69 ; SA = 9 - JSR TKSA - LDZ #0 - STZ IOSTATUS -@loop JSR ACPTR - STA [Long_PC],Z - INZ - BNE @loop - JMP UNTLK - -; *********** -Write_Sector: -; *********** - - JSR Reset_BP ; reset disk buffer pointer - LDA FA - JSR LISTEN - LDA #$69 ; SA = 9 - JSR TKSA - LDZ #0 - STZ IOSTATUS -@loop LDA [Long_PC],Z - JSR CIOUT - INZ - BNE @loop - JSR UNLSN - RTS - -; ***** -Set_TS: -; ***** - -; Input A = track or sector -; X = string index - -@100 CMP #100 - BCC @10 - INC Mon_Data,X - SBC #100 - BRA @100 -@10 CMP #10 - BCC @1 - INC Mon_Data+1,X - SBC #10 - BRA @10 -@1 ORA #'0' - STA Mon_Data+2,X - RTS - -; @[u],U1 mem track startsec [endsec] : read disk sector(s) - -; U1:CHANNEL DRIVE TRACK SECTOR - -; ************* -Build_U_String: -; ************* - - LDX #14 -@loop LDA U1,X - STA Mon_Data,X - DEX - CPX #2 - BCS @loop - LDA #'U' - STA Mon_Data - LDA Disk_Track - LDX #7 - JSR Set_TS - LDA Disk_Sector - LDX #11 - JMP Set_TS - -; *************** -Open_Disk_Buffer: -; *************** - - LDA #0 - STA IOSTATUS - LDA FA - JSR LISTEN ; open fa,9,"#" - LDA #$f9 ; sa = 9 - JSR SECOND - LDA #'#' ; open buffer - JSR CIOUT - JSR UNLSN - LDA IOSTATUS - LBNE Print_Disk_Status - RTS - -; **************** -Close_Disk_Buffer: -; **************** - - LDA #0 - STA IOSTATUS - LDA FA - JSR LISTEN ; open fa,9,"#" - LDA #$e9 ; sa = 9 - JSR SECOND - JSR UNLSN - LDA IOSTATUS - LBNE Print_Disk_Status - RTS - - - - - - - - - - -} \ No newline at end of file From 88a0a583e40ee6d09d4fdec53087cf4ca9995028 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 24 Jan 2021 22:31:22 +0100 Subject: [PATCH 173/257] updated binaries and documentation --- CREDITS.md | 1 + bin/basic_generic.rom | Bin 8192 -> 8192 bytes bin/basic_generic_crt.rom | Bin 8192 -> 8192 bytes bin/basic_ultimate64.rom | Bin 8192 -> 8192 bytes bin/extrom_generic_crt.crt | Bin 32896 -> 32896 bytes bin/kernal_generic.rom | Bin 8192 -> 8192 bytes bin/kernal_generic_crt.rom | Bin 8192 -> 8192 bytes bin/kernal_ultimate64.rom | Bin 8192 -> 8192 bytes bin/mega65.rom | Bin 131072 -> 131072 bytes bin/mega65_orfont.rom | Bin 131072 -> 131072 bytes doc/Extended-BASIC.md | 2 +- src/mon_m65/LICENSE | 4 ++++ 12 files changed, 6 insertions(+), 1 deletion(-) diff --git a/CREDITS.md b/CREDITS.md index e2790ddd..aa878e5f 100644 --- a/CREDITS.md +++ b/CREDITS.md @@ -4,6 +4,7 @@ ## for source code/assets we reused * Retrofan - for his MEGA65 banner artwork and PXLfont +* Edilbert Kirk - for his BSMON (Bit Shifter's Monitor) * TWW/CTR - for his keyboard handling code * Graham - for his PAL/NTSC detection code and compact 8x8 multiplication routine * enthusi/Onslaught - for his example Turbo Tape 64 compatible loader diff --git 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zqmjE>0Bm=)xP}NL|7tUk0Kfxh54^`RaOlBEfO&uu0BAQN?7ELG4?OHWWxE2@-(qLQq7EV!Z+eqN0&@vKufq;uG@G{G+Im1jIo+AFCm02_F z<2KN?M^C^@yoVC##r$p9Yr~!tUFwfC<_?hdGo7fuapVo!8;!O%XrQRlrN14y`{&y; zn_Hb#1vV4(ngd8$V>Rq;1Zc>(W;p7>TQhJ6m`|IhtGALwSV)LJu{C@JL9U95Ce|%q zgI2sbl7$4n%0ph|vx&FY#x7kKwGRCW1rvmwquVI&u@fdu4Vp85>FV`J(LiqR#4lrA z9~U07y&R+~2B^@23~Bpe={&lEB0X9Ja+8((Y2FYSF+_R|kz Date: Mon, 25 Jan 2021 21:02:16 +0100 Subject: [PATCH 174/257] fixed another CHRIN problem, with empty lines --- src/kernal/screen/chrin_keyboard.s | 12 ++++++++---- src/kernal/screen_m65/mega65_chrin_keyboard.s | 12 ++++++++---- 2 files changed, 16 insertions(+), 8 deletions(-) diff --git a/src/kernal/screen/chrin_keyboard.s b/src/kernal/screen/chrin_keyboard.s index ad649e79..752a281a 100644 --- a/src/kernal/screen/chrin_keyboard.s +++ b/src/kernal/screen/chrin_keyboard.s @@ -41,15 +41,15 @@ chrin_keyboard_repeat: cmp INDX bne chrin_keyboard_not_end_of_input + ; FALLTROUGH + +chrin_keyboard_empty_line: + ; Clear pending input and quote flags lda #$00 sta CRSW sta QTSW - ; FALLTROUGH - -chrin_keyboard_empty_line: - ; For an empty line, just return the carriage return +ply_trash_a @@ -142,6 +142,10 @@ chrin_enter_loop: pha sta CRSW + ; Another empty line case + cmp INDX + bcs chrin_keyboard_empty_line + ; Clear quote mode mark ldy #$00 sty QTSW diff --git a/src/kernal/screen_m65/mega65_chrin_keyboard.s b/src/kernal/screen_m65/mega65_chrin_keyboard.s index 2da187f3..87c81af6 100644 --- a/src/kernal/screen_m65/mega65_chrin_keyboard.s +++ b/src/kernal/screen_m65/mega65_chrin_keyboard.s @@ -35,16 +35,16 @@ m65_chrin_keyboard_repeat: cmp INDX bne m65_chrin_keyboard_not_end_of_input + ; FALLTROUGH + +m65_chrin_keyboard_empty_line: + ; Clear pending input and quote flags lda #$00 sta CRSW sta QTSW - ; FALLTROUGH - -m65_chrin_keyboard_empty_line: - ; For an empty line, just return the carriage return lda #$0D @@ -149,6 +149,10 @@ m65_chrin_enter_loop: pha sta CRSW + ; Another empty line case + cmp INDX + bcs m65_chrin_keyboard_empty_line + ; Clear quote mode mark ldy #$00 sty QTSW From 6193fdcf7b2c5b1309595b98dc07dc84a229557f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 25 Jan 2021 21:21:01 +0100 Subject: [PATCH 175/257] disabled function keys for non-direct mode and for MONITOR --- src/kernal/screen/chrin_programmable_keys.s | 20 +++++++++++++------- src/mon_m65/,aliases_mon.s | 6 +++++- src/mon_m65/bsmon.s | 3 ++- 3 files changed, 20 insertions(+), 9 deletions(-) diff --git a/src/kernal/screen/chrin_programmable_keys.s b/src/kernal/screen/chrin_programmable_keys.s index 8f79d65a..05b55ba1 100644 --- a/src/kernal/screen/chrin_programmable_keys.s +++ b/src/kernal/screen/chrin_programmable_keys.s @@ -13,33 +13,39 @@ chrin_programmable_keys: + ; Check if in direct mode + + ldx CURLIN+1 + inx + bne @2 + ; Check if the key is programmable ldx #(__programmable_keys_codes_end - programmable_keys_codes - 1) @1: cmp programmable_keys_codes, x - beq @2 + beq @3 dex bpl @1 ; This is not a programmable key - +@2: sec rts -@2: +@3: ; .X contains index of the key code, we need offset to key string instead lda programmable_keys_offsets, x tax ; Print all the characters assigned to key -@3: +@4: lda programmable_keys_strings, x - beq @4 + beq @5 jsr CHROUT ; our implementation preserves .X too inx - bne @3 ; jumps always -@4: + bne @4 ; jumps always +@5: clc rts diff --git a/src/mon_m65/,aliases_mon.s b/src/mon_m65/,aliases_mon.s index 280cd665..1fce51ab 100644 --- a/src/mon_m65/,aliases_mon.s +++ b/src/mon_m65/,aliases_mon.s @@ -59,7 +59,11 @@ !addr Op_Ix = $2E ; type of constant !addr Op_Len = $2F ; length of operand - ; $30-$62 - free space, unused for now + ; $30-$39 - free space, unused for now + +!addr Key_Direct = $3A ; same as CURLIN+1 + + ; $3B-$62 - free space, unused for now !addr Byte_TMP = $63 ; temporary byte !addr Long_TMP = $64 ; temporary pointer, for fetching/storing memory content; has to be the same as Long__TMP in Kernal diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index d024056c..354efd70 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -43,7 +43,8 @@ Mon_Start: TSX STX SPL STX SP_Storage - LDA #$c0 + LDA #$C0 + STA Key_Direct ; to disable function keys JSR SETMSG CLI +NOP From 91468574fddc45230dfa4c807d439e4624b61a86 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 25 Jan 2021 21:44:34 +0100 Subject: [PATCH 176/257] improved syntax in MONITOR --- bin/basic_generic.rom | Bin 8192 -> 8192 bytes bin/basic_generic_crt.rom | Bin 8192 -> 8192 bytes bin/basic_ultimate64.rom | Bin 8192 -> 8192 bytes bin/extrom_generic_crt.crt | Bin 32896 -> 32896 bytes bin/kernal_generic.rom | Bin 8192 -> 8192 bytes bin/kernal_generic_crt.rom | Bin 8192 -> 8192 bytes bin/kernal_ultimate64.rom | Bin 8192 -> 8192 bytes bin/mega65.rom | Bin 131072 -> 131072 bytes bin/mega65_orfont.rom | Bin 131072 -> 131072 bytes src/mon_m65/mon_command_load_save.s | 4 +-- src/mon_m65/mon_helper_get_val_to_lac.s | 45 ++++++++++++++++++++---- 11 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z9oiA4z_s~};!Xc1N{-mL7?PJNKvCA4Dx{)7bmOH7q>(Hzc_)xcl4>f8CsV@~XaPWR v!Y~969C|&TSPAYwtRep;D{RvcmlAQ)MDie6aOmhnlBpz*9~ziKqA&jwxVC`# diff --git a/src/mon_m65/mon_command_load_save.s b/src/mon_m65/mon_command_load_save.s index f06b2ee5..78260364 100644 --- a/src/mon_m65/mon_command_load_save.s +++ b/src/mon_m65/mon_command_load_save.s @@ -49,7 +49,7 @@ Mon_Load_Verify: jsr SELDEV ; set default unit stx FA - jsr Get_Val_To_LAC + jsr Get_DecVal_To_LAC beq @got_unit jsr Syntax_Byte_AC lda Long_AC+0 @@ -93,7 +93,7 @@ Mon_Save: ; Determine unit - jsr Get_Val_To_LAC + jsr Get_DecVal_To_LAC +beq Mon_Error jsr Syntax_Byte_AC lda Long_AC+0 diff --git a/src/mon_m65/mon_helper_get_val_to_lac.s b/src/mon_m65/mon_helper_get_val_to_lac.s index 52b721a5..f189029a 100644 --- a/src/mon_m65/mon_helper_get_val_to_lac.s +++ b/src/mon_m65/mon_helper_get_val_to_lac.s @@ -2,6 +2,26 @@ ; Based on BSM (Bit Shifter's Monitor) +Get_DecVal_To_LAC: + + phx + phy + phz + jsr Get_Val_To_LAC_reset + + ; Enforce decimal system + + jsr Get_Glyph + +beq @exit + + dec Buf_Index + lda #'+' ; set numbric system to decimal + +@exit: + + bra Get_Val_To_LAC_common + + Got_Val_To_LAC: ; to be used when first byte already fetched dec Buf_Index @@ -13,18 +33,20 @@ Get_Val_To_LAC: phx phy phz - lda #$00 - sta Dig_Cnt ; count columns read - sta Long_AC+0 ; clear result Long_AC - sta Long_AC+1 - sta Long_AC+2 - sta Long_AC+3 + jsr Get_Val_To_LAC_reset jsr Get_Glyph ; get 1st. character + + ; FALLTROUGH + +Get_Val_To_LAC_common: + +beq @exit ldy #$03 ; here we allow '$', '+', '&', and '%' prefixes + ; FALLTROUGH + @loop_prefix: cmp Cons_Prefix,Y ; Y = base index @@ -155,3 +177,14 @@ Get_Val_To_LAC: lda Dig_Cnt ; allow to easily check if a parameter was given clc rts + + +Get_Val_To_LAC_reset: + + lda #$00 + sta Dig_Cnt ; count columns read + sta Long_AC+0 ; clear result Long_AC + sta Long_AC+1 + sta Long_AC+2 + sta Long_AC+3 + rts From 34788815700ea196159544674e0c5ac5283fd6dc Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 25 Jan 2021 21:59:30 +0100 Subject: [PATCH 177/257] L/S/V sytntax check fix in MONITOR --- src/mon_m65/mon_command_load_save.s | 2 ++ src/mon_m65/mon_helper_get_val_to_lac.s | 13 ++++++++++--- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/src/mon_m65/mon_command_load_save.s b/src/mon_m65/mon_command_load_save.s index 78260364..ba320158 100644 --- a/src/mon_m65/mon_command_load_save.s +++ b/src/mon_m65/mon_command_load_save.s @@ -50,6 +50,7 @@ Mon_Load_Verify: stx FA jsr Get_DecVal_To_LAC + +bcs Mon_Error beq @got_unit jsr Syntax_Byte_AC lda Long_AC+0 @@ -94,6 +95,7 @@ Mon_Save: ; Determine unit jsr Get_DecVal_To_LAC + +bcs Mon_Error +beq Mon_Error jsr Syntax_Byte_AC lda Long_AC+0 diff --git a/src/mon_m65/mon_helper_get_val_to_lac.s b/src/mon_m65/mon_helper_get_val_to_lac.s index f189029a..a4fbd5f1 100644 --- a/src/mon_m65/mon_helper_get_val_to_lac.s +++ b/src/mon_m65/mon_helper_get_val_to_lac.s @@ -145,6 +145,10 @@ Get_Val_To_LAC_common: @exit_invalid_digit: dec Buf_Index + lda #$00 + sta Dig_Cnt + sec + bra @check_done @exit: @@ -154,20 +158,24 @@ Get_Val_To_LAC_common: lda Dig_Cnt ; check if we should enable long addressing mode cmp Num_Limit,Y - bcc @check_done + bcc @check_done_ok cpy #$1 bne @set_long_mode lda Long_AC+2 ; for decimal system check most significant bytes instead ora Long_AC+3 - beq @check_done + beq @check_done_ok @set_long_mode: lda #$80 ; set addressing mode to long sta Addr_Mode +@check_done_ok: + + clc + @check_done: plz @@ -175,7 +183,6 @@ Get_Val_To_LAC_common: plx lda Dig_Cnt ; allow to easily check if a parameter was given - clc rts From 38bf4686535f650377717d94f37000166c8ed08f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 25 Jan 2021 22:37:55 +0100 Subject: [PATCH 178/257] fixed infinite loop in IEC code --- src/kernal/iec/load_iec.s | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/kernal/iec/load_iec.s b/src/kernal/iec/load_iec.s index 45978d42..5712a914 100644 --- a/src/kernal/iec/load_iec.s +++ b/src/kernal/iec/load_iec.s @@ -201,7 +201,7 @@ load_iec_get_addr_byte: load_iec_file_not_found: - jmp load_iec_file_not_found + jmp kernalerror_FILE_NOT_FOUND } ; CONFIG_IEC From 7d7b3c8419d161904da489baffbac7a7dacf5536 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 25 Jan 2021 22:41:18 +0100 Subject: [PATCH 179/257] improved IEC error handling --- src/kernal/iec/load_iec.s | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/kernal/iec/load_iec.s b/src/kernal/iec/load_iec.s index 5712a914..8210267d 100644 --- a/src/kernal/iec/load_iec.s +++ b/src/kernal/iec/load_iec.s @@ -18,7 +18,7 @@ load_iec_error: jsr iec_close_load jmp lvs_load_verify_error -load_break_error: +load_iec_break_error: pla lda FA jsr iec_close_load @@ -157,7 +157,7 @@ load_iec_loop: +phx_trash_a jsr udtim_keyboard jsr STOP - +bcs load_break_error + +bcs load_iec_break_error +plx_trash_a @3: ; Check for EOI - if so, this was the last byte @@ -201,6 +201,8 @@ load_iec_get_addr_byte: load_iec_file_not_found: + lda FA + jsr iec_close_load jmp kernalerror_FILE_NOT_FOUND From b3e1456f029337dae586de53a03b62c5b9f14a1d Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 25 Jan 2021 23:06:37 +0100 Subject: [PATCH 180/257] explained all similarities >3 --- strings/20D7F720 | 3 +++ strings/688AA697 | 3 +++ strings/6C8564A563 | 3 +++ strings/FAA4B7F0 | 3 +++ 4 files changed, 12 insertions(+) create mode 100644 strings/20D7F720 create mode 100644 strings/688AA697 create mode 100644 strings/6C8564A563 create mode 100644 strings/FAA4B7F0 diff --git a/strings/20D7F720 b/strings/20D7F720 new file mode 100644 index 00000000..c0ac136d --- /dev/null +++ b/strings/20D7F720 @@ -0,0 +1,3 @@ +JSR $F7D7 + JSR (address not included in match) + +Instruction + some part. Trivial - not copyrightable. diff --git a/strings/688AA697 b/strings/688AA697 new file mode 100644 index 00000000..3c2a9bf8 --- /dev/null +++ b/strings/688AA697 @@ -0,0 +1,3 @@ +688AA697 PLA + TXA + LDX $97 + +Drop value from stack, copy .X to .A, restore .X from standard .X storage. Trivial - not copyrightable. diff --git a/strings/6C8564A563 b/strings/6C8564A563 new file mode 100644 index 00000000..4ec61114 --- /dev/null +++ b/strings/6C8564A563 @@ -0,0 +1,3 @@ +$6C + STA $64 + LDA $63 + +Small part of floating point mantissa processing. Trivial - not copyrightable. diff --git a/strings/FAA4B7F0 b/strings/FAA4B7F0 new file mode 100644 index 00000000..93d56b48 --- /dev/null +++ b/strings/FAA4B7F0 @@ -0,0 +1,3 @@ +$FA + LDY $B7 + BEQ (offset not included in match) + +Instruction + some parts. Trivial - not copyrightable. From c23f8f87f22cf3ba41557896330c98c531ba80bd Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 26 Jan 2021 00:00:26 +0100 Subject: [PATCH 181/257] updated binaries --- bin/basic_generic.rom | Bin 8192 -> 8192 bytes bin/basic_generic_crt.rom | Bin 8192 -> 8192 bytes bin/basic_ultimate64.rom | Bin 8192 -> 8192 bytes bin/extrom_generic_crt.crt | Bin 32896 -> 32896 bytes bin/kernal_generic.rom | Bin 8192 -> 8192 bytes bin/kernal_generic_crt.rom | Bin 8192 -> 8192 bytes bin/kernal_ultimate64.rom | Bin 8192 -> 8192 bytes bin/mega65.rom | Bin 131072 -> 131072 bytes bin/mega65_orfont.rom | Bin 131072 -> 131072 bytes 9 files changed, 0 insertions(+), 0 deletions(-) diff --git a/bin/basic_generic.rom b/bin/basic_generic.rom index 584de4c154f638044a69d7fb730e1dd2153c4eb7..7238590707a8f05d80af13940f2ff057207d7635 100644 GIT binary patch delta 90 zcmZp0XmHpd&BXTc*U}9NA15m^^)MdXypHJsD^t(w$rCu{0(p9z>P*51zb{}`nEKG8 s14yjOP~h95aBOl0_amURH;*SDQ1RwzQYTm#%_hgo2QeO;yh+{<0LUsO3;+NC delta 90 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z4jn%1kYEstPECq&Dl!;i9SV?@KU?x7>t3;%yI$ZZCW4D+L_ln|ddf*k+-R3NhT$$& zqXZhDU{@rwL)T&3MR(1J}q}F#(bANPc_Edh}ky4wBW9B2sVW*%dolc0DcE2 z?K7X&u9CzaTS+cn$5A@W+F33N%Gl^Qkd-`Gid#(MwR`f=UD{jmFIdB_j00Lw&+d-{ zb7x{@vuJ`fI#^T6ZIf=7zT$}CUM?!KpTJXF&vwOu64M`udP&cjwcf~T>hX>1Sz>Yb z*tOPI?M2pT`!eem`>M;E9>^Zd>Dj%3PX#*Htaji?ZIE20bX`=Sbp`;7Nw8P~7DoX7 zf5ex2H$+ld@ty>NA7uAX;2AZi%Jn+05!|ev{Tr-G>>J79>GVd}EDR~&pUJFL_8STm zfZMD Date: Wed, 27 Jan 2021 18:56:48 +0100 Subject: [PATCH 182/257] imported Z80 exerciser tool --- .gitmodules | 3 +++ 3rdparty/z80exer | 1 + 2 files changed, 4 insertions(+) create mode 160000 3rdparty/z80exer diff --git a/.gitmodules b/.gitmodules index a7fa85bb..9010ba90 100644 --- a/.gitmodules +++ b/.gitmodules @@ -4,3 +4,6 @@ [submodule "3rdparty/zmac"] path = 3rdparty/zmac url = https://github.com/FeralChild64/zmac +[submodule "3rdparty/z80exer"] + path = 3rdparty/z80exer + url = https://github.com/FeralChild64/z80exer diff --git a/3rdparty/z80exer b/3rdparty/z80exer new file mode 160000 index 00000000..8634cccd --- /dev/null +++ b/3rdparty/z80exer @@ -0,0 +1 @@ +Subproject commit 8634cccdd362e030efebcdeec1aeb8b4f2ce9179 From 265c29a883e96d7e989e993933344d3e41bce1d3 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 27 Jan 2021 22:58:16 +0100 Subject: [PATCH 183/257] added Z*) CPU tester to makefile --- Makefile | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index a03f3f39..f939a90f 100644 --- a/Makefile +++ b/Makefile @@ -107,6 +107,7 @@ DIR_ZMAC = 3rdparty/zmac/src DIR_ZMAC_TMP = build/,tmp_zmac HDR_ZMAC = $(filter-out $(wildcard $(DIR_ZMAC)/_*.h),$(wildcard $(DIR_ZMAC)/*.h)) SRC_ZMAC = $(DIR_ZMAC)/mio.c $(DIR_ZMAC)/doc.c $(DIR_ZMAC)/zi80dis.cpp +SRC_Z80TEST = 3rdparty/z80exer/cpm/zexdoc.src GEN_ZMAC_C = $(DIR_ZMAC_TMP)/zmac.c GEN_ZMAC_H = $(DIR_ZMAC_TMP)/doc.inl @@ -209,6 +210,7 @@ TARGET_LIST_TST = $(TARGET_TST_B) $(TARGET_TST_K) TARGET_LIST_U64 = $(TARGET_U64_B) $(TARGET_U64_K) TARGET_LIST_U64CRT = $(TARGET_U64CRT_B) $(TARGET_U64CRT_K) $(TARGET_U64CRT_X) +TARGET_Z80TEST = ./build/cpm/Z80TEST.COM TARGET_LIST = $(TARGET_CHR_ORF) \ $(TARGET_LIST_CUS) \ @@ -289,7 +291,7 @@ $(ROM_CBM_BASIC): # Rules - tools -$(DIR_ACME) $(SRC_ACME) $(DIR_ZMAC) $(SRC_ZMAC): +$(DIR_ACME) $(SRC_ACME) $(DIR_ZMAC) $(SRC_ZMAC) $(SRC_Z80TEST): @echo @echo Fetching 3rd party source code... @git submodule init @@ -881,8 +883,9 @@ testsimilarity: $(TOOL_SIMILARITY) $(DIR_GEN)/OUTx_x.BIN $(ROM_CBM_KERNAL) $(ROM # Z80 part # + .PHONY: cpm -cpm: $(TOOL_ASSEMBLER_Z80) +cpm: $(TOOL_ASSEMBLER_Z80) $(TARGET_Z80TEST) $(DIR_ZMAC_TMP)/doc: $(SRC_ZMAC) @mkdir -p $(DIR_ZMAC_TMP) @@ -904,3 +907,11 @@ $(TOOL_ASSEMBLER_Z80): $(DIR_ZMAC) $(SRC_ZMAC) $(GEN_ZMAC_C) $(GEN_ZMAC_H) $(HDR @echo Compiling tool $@ ... @mkdir -p build/tools @$(CC) -o $(TOOL_ASSEMBLER_Z80) $(SRC_ZMAC) $(GEN_ZMAC_C) -lm -w -I$(DIR_ZMAC) -I$(DIR_ZMAC_TMP) + +$(TARGET_Z80TEST) : $(TOOL_ASSEMBLER_Z80) $(SRC_Z80TEST) + @echo + @echo Compiling Z80 CPU tester ... + @mkdir -p build/cpm + @rm -f $(TARGET_Z80TEST).CIM $(TARGET_Z80TEST) + @$(TOOL_ASSEMBLER_Z80) -o $(TARGET_Z80TEST).CIM $(SRC_Z80TEST) + @mv -f $(TARGET_Z80TEST).CIM $(TARGET_Z80TEST) From 6e42bfe73123936a1440fc8a00c24ba8d42577be Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 28 Jan 2021 23:12:21 +0100 Subject: [PATCH 184/257] some code for loading CPU test from SD card --- src/aliases/,aliases_hardware_m65.s | 5 ++ src/zvm_m65/z80_reset.s | 2 +- src/zvm_m65/zvm.s | 14 +++-- src/zvm_m65/zvm_cputest.s | 82 +++++++++++++++++++++++++++++ 4 files changed, 97 insertions(+), 6 deletions(-) create mode 100644 src/zvm_m65/zvm_cputest.s diff --git a/src/aliases/,aliases_hardware_m65.s b/src/aliases/,aliases_hardware_m65.s index bfc5e178..59333d43 100644 --- a/src/aliases/,aliases_hardware_m65.s +++ b/src/aliases/,aliases_hardware_m65.s @@ -72,6 +72,11 @@ !addr MISC_BOARDID = $D629 ; board identification byte !addr MISC_EMU = $D710 ; to enable badlines and slow interrupts + ; Hypervisor traps + + !addr HTRAP00 = $D640 + + ; SID offsets !set __SID_R1_OFFSET = $00 ; right SID 1, $D400 diff --git a/src/zvm_m65/z80_reset.s b/src/zvm_m65/z80_reset.s index 7a17c8fb..6a97db9f 100644 --- a/src/zvm_m65/z80_reset.s +++ b/src/zvm_m65/z80_reset.s @@ -33,6 +33,6 @@ Z80_reset: stz PTR_IXY_d+3 stz PTR_DATA+3 - ; Default bank is 1 (the fastest, continuous memory) + ; Default bank is 1 (the one user software runs from) jmp ZVM_set_bank_1 diff --git a/src/zvm_m65/zvm.s b/src/zvm_m65/zvm.s index f1b95217..3827ae41 100644 --- a/src/zvm_m65/zvm.s +++ b/src/zvm_m65/zvm.s @@ -51,12 +51,18 @@ ZVM: ; entry point ; Check if extended memory is present - jsr ZVM_memtest + ; XXX enable test jsr ZVM_memtest ; Generate CPU tables jsr z80_table_gen + ; Try CPU test + + jsr ZVM_cputest + + + ; XXX code is not ready to progress further jsr PRIMM !pet $0D, "Implementation not finished yet.", 0 @@ -82,12 +88,10 @@ ZVM: ; entry point - - ZVM_memtest: ; Simple memory test - ; XXX this test is temporary + ; XXX this test fails for now lda #$00 sta PTR_DATA+0 @@ -98,7 +102,7 @@ ZVM_memtest: ldx #$F0 @1: - ldy #$00 + ldy #$10 @2: lda PTR_DATA+2 eor #%01111111 diff --git a/src/zvm_m65/zvm_cputest.s b/src/zvm_m65/zvm_cputest.s new file mode 100644 index 00000000..d924145e --- /dev/null +++ b/src/zvm_m65/zvm_cputest.s @@ -0,0 +1,82 @@ + +; +; Z80 Virtual Machine CPU test +; + + +ZVM_cputest: + + ; Copy file name to RAM + + ldx #$FF + +@loop1: + + inx + lda ZVM_filename_Z80TEST, x + sta BUF, x + bne @loop1 + + ; Set Z80TEST.COM file name + + ldy #>BUF + ldx # Date: Fri, 29 Jan 2021 19:11:17 +0100 Subject: [PATCH 185/257] Z80TEST.COM loading code complete, not tested yet --- src/zvm_m65/,aliases_zvm.s | 14 +++++-- src/zvm_m65/z80_table_gen.s | 3 +- src/zvm_m65/zvm.s | 10 +++-- src/zvm_m65/zvm_cputest.s | 84 ++++++++++++++++++++++++++++++++----- 4 files changed, 93 insertions(+), 18 deletions(-) diff --git a/src/zvm_m65/,aliases_zvm.s b/src/zvm_m65/,aliases_zvm.s index bf263170..845a30a7 100644 --- a/src/zvm_m65/,aliases_zvm.s +++ b/src/zvm_m65/,aliases_zvm.s @@ -73,9 +73,17 @@ ; BIOS data ; -!addr VEC_MOVE_fetch = $40 ; 2 bytes - vector to byte fetch routine, for BIOS routine MOVE -!addr VEC_MOVE_store = $42 ; 2 bytes - vector to byte store routine, for BIOS routine MOVE -!addr VEC_DISKIO_store = $44 ; 2 bytes - vector to byte store routine, for BIOS disk I/O operations +; Reuse data for loading + +!addr BIOS_IOBUFERPTR = $40 ; 4 bytes - pointer to hardware I/O buffer +!addr BIOS_LOADPTR = $44 ; 4 bytes - pointer for loading data +!addr BIOS_LOADCOUNT = $48 ; 2 bytes - counter used for loading data + +; XXX are the values below needed? + +!addr VEC_MOVE_fetch = $4A ; 2 bytes - vector to byte fetch routine, for BIOS routine MOVE +!addr VEC_MOVE_store = $4C ; 2 bytes - vector to byte store routine, for BIOS routine MOVE +!addr VEC_DISKIO_store = $4E ; 2 bytes - vector to byte store routine, for BIOS disk I/O operations ; diff --git a/src/zvm_m65/z80_table_gen.s b/src/zvm_m65/z80_table_gen.s index 5bce535d..fa52c7b7 100644 --- a/src/zvm_m65/z80_table_gen.s +++ b/src/zvm_m65/z80_table_gen.s @@ -3,7 +3,8 @@ ; Z80 emulator - precalculated data generator ; -z80_table_gen: + +Z80_table_gen: jsr PRIMM !pet $0D, "Generating CPU tables... " diff --git a/src/zvm_m65/zvm.s b/src/zvm_m65/zvm.s index 3827ae41..e22212b7 100644 --- a/src/zvm_m65/zvm.s +++ b/src/zvm_m65/zvm.s @@ -53,9 +53,11 @@ ZVM: ; entry point ; XXX enable test jsr ZVM_memtest - ; Generate CPU tables + ; Generate CPU tables, reset the CPU - jsr z80_table_gen + jsr Z80_table_gen + jsr Z80_reset + ; XXX Z80 clear memory here ; Try CPU test @@ -66,7 +68,7 @@ ZVM: ; entry point ; XXX code is not ready to progress further jsr PRIMM !pet $0D, "Implementation not finished yet.", 0 - jmp ZVM_halt + jmp ZVM_syshalt jmp zvm_BIOS_00_BOOT @@ -134,7 +136,7 @@ ZVM_halt_memtest_failed: ; FALLTROUGH -ZVM_halt: +ZVM_syshalt: jsr PRIMM !pet " * System HALTED *", 0 diff --git a/src/zvm_m65/zvm_cputest.s b/src/zvm_m65/zvm_cputest.s index d924145e..d34833a3 100644 --- a/src/zvm_m65/zvm_cputest.s +++ b/src/zvm_m65/zvm_cputest.s @@ -6,6 +6,8 @@ ZVM_cputest: + ; XXX move loading code to separate routine(s) + ; Copy file name to RAM ldx #$FF @@ -24,14 +26,14 @@ ZVM_cputest: lda #$2E ; dos_setname sta HTRAP00 +nop ; required by hypervisor - bcc @end + +bcc @end ; Try to find the file lda #$34 sta HTRAP00 +nop - bcc @end + +bcc @end jsr PRIMM !pet "Loading 'Z80TEST.COM'... ", 0 @@ -51,32 +53,94 @@ ZVM_cputest: lda #$80 tsb $D689 ; XXX invent name for the register + ; Prepare pointers + + lda #$FF + sta BIOS_IOBUFERPTR+3 + lda #$D6 + sta BIOS_IOBUFERPTR+2 + + lda #$FF + sta BIOS_IOBUFERPTR+3 + lda #$D6 + sta BIOS_IOBUFERPTR+2 + + lda #$00 + sta BIOS_LOADPTR+3 + lda #$05 + sta BIOS_LOADPTR+2 + lda #$01 + sta BIOS_LOADPTR+1 + lda #$00 + sta BIOS_LOADPTR+1 + +!addr BIOS_LOADCOUNT = $48 ; 2 bytes - counter used for loading data + + ; Read sectors @loop2: + ; Set I/O buffer pointer to start + + lda #$6E + sta BIOS_IOBUFERPTR+1 + lda #$00 + sta BIOS_IOBUFERPTR+0 + + ; Read up to 512 bytes + lda #$1A sta HTRAP00 +nop - ; .X (low byte) and .Y (high byte) contain number of bytes read + ; Copy data from buffer to memory - ; XXX copy data from buffer at $FFD6E00 + stx BIOS_LOADCOUNT+0 + sty BIOS_LOADCOUNT+1 + tya + ora BIOS_LOADCOUNT+0 + beq @load_done +@loop3: - ; XXX finish the implementation + dew BIOS_LOADCOUNT + bmi @loop2 + lda [BIOS_IOBUFERPTR],z + sta [BIOS_LOADPTR],z + + inw BIOS_IOBUFERPTR + inw BIOS_LOADPTR + + bra @loop3 + +@load_done: + + ; At this moment we have Z80TEST.COM loaded into memory + ; Install a virtual CP/M, set PC to $0100, and run it! + + lda #$01 + sta REG_PC+1 + dec + sta BIOS_LOADPTR+1 + lda #$05 + sta BIOS_LOADPTR+0 + lda #$76 ; HALT + sta [BIOS_LOADPTR],z + inc BIOS_LOADPTR + lda #$FF + sta [BIOS_LOADPTR],z ; $FF = CP/M simulation for CPU test + + ; Run the software + + jmp ZVM_next @end: rts - - - - - ZVM_filename_Z80TEST: !pet "z80test.com", 0 From eef13f4cfeb50da611d49838af6fa739f284ed74 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 29 Jan 2021 19:39:22 +0100 Subject: [PATCH 186/257] Z80TEST.COM loading bugfixes --- src/zvm_m65/z80_reset.s | 2 +- src/zvm_m65/z80_table_gen.s | 4 ++-- src/zvm_m65/zvm_cputest.s | 7 ++++++- 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/src/zvm_m65/z80_reset.s b/src/zvm_m65/z80_reset.s index 6a97db9f..dd8ba8ea 100644 --- a/src/zvm_m65/z80_reset.s +++ b/src/zvm_m65/z80_reset.s @@ -13,7 +13,7 @@ Z80_reset: @1: sta z80_cpustate__start, y iny - cmp #(z80_cpustate__end - z80_cpustate__start + 1) + cpy #(z80_cpustate__end - z80_cpustate__start + 1) bne @1 dew REG_AF ; AF and SP have $FFFF value at start diff --git a/src/zvm_m65/z80_table_gen.s b/src/zvm_m65/z80_table_gen.s index fa52c7b7..e7c202f2 100644 --- a/src/zvm_m65/z80_table_gen.s +++ b/src/zvm_m65/z80_table_gen.s @@ -7,7 +7,7 @@ Z80_table_gen: jsr PRIMM - !pet $0D, "Generating CPU tables... " + !pet $0D, "Generating CPU tables" !byte 0 ; @@ -23,7 +23,7 @@ Z80_table_gen: ; jsr PRIMM - !pet "done", $0D, $0D + !pet " done", $0D, $0D !byte 0 rts diff --git a/src/zvm_m65/zvm_cputest.s b/src/zvm_m65/zvm_cputest.s index d34833a3..3aae1781 100644 --- a/src/zvm_m65/zvm_cputest.s +++ b/src/zvm_m65/zvm_cputest.s @@ -36,7 +36,7 @@ ZVM_cputest: +bcc @end jsr PRIMM - !pet "Loading 'Z80TEST.COM'... ", 0 + !pet "Loading Z80TEST.COM", 0 ; Open the file @@ -105,6 +105,8 @@ ZVM_cputest: @loop3: + inc $D020 + dew BIOS_LOADCOUNT bmi @loop2 @@ -118,6 +120,9 @@ ZVM_cputest: @load_done: + jsr PRIMM + !pet " done", $0D, $0D, 0 + ; At this moment we have Z80TEST.COM loaded into memory ; Install a virtual CP/M, set PC to $0100, and run it! From 5e8d2205e8da7f278087bf4c73fb9c1add969d29 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 29 Jan 2021 20:27:39 +0100 Subject: [PATCH 187/257] crude implementation of CP/M rutine $09 --- src/zvm_m65/z80_instr_general.s | 18 +++++++++--------- src/zvm_m65/zvm_cpmemu.s | 29 +++++++++++++++++++++++++++++ src/zvm_m65/zvm_cputest.s | 8 ++++++-- 3 files changed, 44 insertions(+), 11 deletions(-) create mode 100644 src/zvm_m65/zvm_cpmemu.s diff --git a/src/zvm_m65/z80_instr_general.s b/src/zvm_m65/z80_instr_general.s index 414adb76..4ab50531 100644 --- a/src/zvm_m65/z80_instr_general.s +++ b/src/zvm_m65/z80_instr_general.s @@ -96,17 +96,17 @@ Z80_instr_37: ; Z80_instr_76: ; HALT - ; Used to call BIOS routines - ; XXX probably not the besta idea, GENCPC seems to do some relocations + ; Used to call BIOS and simulated CP/M routines - ldx #$01 ; default BIOS function, warm start + +Z80_FETCH_VIA_PC_INC + + cmp #$FF ; $FF = CP/M call + +beq zvm_CPMemu + + inc $D021 + + ldx #$01 ; default routine, warm boot - lda REG_PC+1 - cmp #$FE ; - bne @1 - lda REG_PC+0 - sec - sbc #$64 cmp #33 bcs @1 tax diff --git a/src/zvm_m65/zvm_cpmemu.s b/src/zvm_m65/zvm_cpmemu.s new file mode 100644 index 00000000..2c58c979 --- /dev/null +++ b/src/zvm_m65/zvm_cpmemu.s @@ -0,0 +1,29 @@ + +; +; Z80 Virtual Machine CP/M simulation (just to run selected binaries) +; + + +zvm_CPMemu: + + ldx REG_C + cpx #$09 + beq zvm_CPMemu_09 + + ; XXX implement additional functions if needed + + ; FALLTROUGH + +zvm_CPMemu_end: + + jmp Z80_instr_C9 ; RET + +zvm_CPMemu_09: ; C_WRITESTR + + +Z80_FETCH_VIA_DE + cmp #'$' + beq zvm_CPMemu_end + + jsr CHROUT + inw REG_DE + bra zvm_CPMemu_09 diff --git a/src/zvm_m65/zvm_cputest.s b/src/zvm_m65/zvm_cputest.s index 3aae1781..11801c5f 100644 --- a/src/zvm_m65/zvm_cputest.s +++ b/src/zvm_m65/zvm_cputest.s @@ -105,8 +105,6 @@ ZVM_cputest: @loop3: - inc $D020 - dew BIOS_LOADCOUNT bmi @loop2 @@ -120,6 +118,12 @@ ZVM_cputest: @load_done: + ; Close the file + + lda #$20 + sta HTRAP00 + +nop + jsr PRIMM !pet " done", $0D, $0D, 0 From 50da4aa2b1f49347f9ccfd5e62b15dd76bdfb45c Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 29 Jan 2021 20:48:57 +0100 Subject: [PATCH 188/257] more file loading fixes --- src/zvm_m65/zvm_cpmemu.s | 3 +++ src/zvm_m65/zvm_cputest.s | 12 +++++++++--- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/src/zvm_m65/zvm_cpmemu.s b/src/zvm_m65/zvm_cpmemu.s index 2c58c979..4a17bbe5 100644 --- a/src/zvm_m65/zvm_cpmemu.s +++ b/src/zvm_m65/zvm_cpmemu.s @@ -6,6 +6,9 @@ zvm_CPMemu: + jsr PRIMM + !pet "DBG: CP1", $0D, 0 + ldx REG_C cpx #$09 beq zvm_CPMemu_09 diff --git a/src/zvm_m65/zvm_cputest.s b/src/zvm_m65/zvm_cputest.s index 11801c5f..bf7b7d52 100644 --- a/src/zvm_m65/zvm_cputest.s +++ b/src/zvm_m65/zvm_cputest.s @@ -74,13 +74,17 @@ ZVM_cputest: lda #$00 sta BIOS_LOADPTR+1 -!addr BIOS_LOADCOUNT = $48 ; 2 bytes - counter used for loading data + ; Read data, 512 byte chunks - - ; Read sectors + lda #$02 ; summy value - 2*256 bytes read + pha @loop2: + pla + cmp #$02 + bne @load_done + ; Set I/O buffer pointer to start lda #$6E @@ -103,6 +107,8 @@ ZVM_cputest: ora BIOS_LOADCOUNT+0 beq @load_done + phy ; if 2 - we most likely have something more to read + @loop3: dew BIOS_LOADCOUNT From 5c556c3b750864291656dab6e27521a2f97cc947 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 29 Jan 2021 21:29:44 +0100 Subject: [PATCH 189/257] more small fixes --- src/zvm_m65/zvm_cputest.s | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/src/zvm_m65/zvm_cputest.s b/src/zvm_m65/zvm_cputest.s index bf7b7d52..dc15ab24 100644 --- a/src/zvm_m65/zvm_cputest.s +++ b/src/zvm_m65/zvm_cputest.s @@ -23,9 +23,9 @@ ZVM_cputest: ldy #>BUF ldx # Date: Sat, 30 Jan 2021 16:08:58 +0100 Subject: [PATCH 190/257] added some debug code --- src/zvm_m65/debug.s | 82 ++++++++++++++++++++++++++++++++++++++ src/zvm_m65/z80_dispatch.s | 3 ++ src/zvm_m65/zvm_cputest.s | 21 +++++----- 3 files changed, 97 insertions(+), 9 deletions(-) create mode 100644 src/zvm_m65/debug.s diff --git a/src/zvm_m65/debug.s b/src/zvm_m65/debug.s new file mode 100644 index 00000000..9f39401a --- /dev/null +++ b/src/zvm_m65/debug.s @@ -0,0 +1,82 @@ + + +DBG_print_PC_opcode: + + php + pha + phx + phy + phz + + pha + + jsr PRIMM + !pet $0D, "PC: ", 0 + + dew REG_PC + lda REG_PC+1 + jsr DBGINT_print_hex_byte + lda REG_PC+0 + jsr DBGINT_print_hex_byte + inw REG_PC + + jsr PRIMM + !pet " opcode: ", 0 + + pla +@1: + beq @1 + jsr DBGINT_print_hex_byte + + ; FALLTROUGH + +DBGINT_end: + + plz + ply + plx + pla + plp + + rts + + +DBG_print_hex: + + php + pha + phx + phy + phz + + pha + lda #' ' + jsr CHROUT + pla + jsr DBGINT_print_hex_byte + jmp DBGINT_end + + + + +DBGINT_print_hex_byte: + + pha + lsr + lsr + lsr + lsr + ora #$30 + cmp #$3A + bcc @1 + adc #6 +@1: + jsr CHROUT + pla + and #$0f + ora #$30 + cmp #$3A + bcc @2 + adc #6 +@2: + jmp CHROUT diff --git a/src/zvm_m65/z80_dispatch.s b/src/zvm_m65/z80_dispatch.s index ee6baebf..9d0132fc 100644 --- a/src/zvm_m65/z80_dispatch.s +++ b/src/zvm_m65/z80_dispatch.s @@ -8,6 +8,9 @@ ; Fetch and execute next opcode +Z80_FETCH_VIA_PC_INC + + ; jsr DBG_print_PC_opcode + asl tax bcs @1 diff --git a/src/zvm_m65/zvm_cputest.s b/src/zvm_m65/zvm_cputest.s index dc15ab24..157e507c 100644 --- a/src/zvm_m65/zvm_cputest.s +++ b/src/zvm_m65/zvm_cputest.s @@ -8,6 +8,7 @@ ZVM_cputest: ; XXX move loading code to separate routine(s) + ; Copy file name to RAM ldx #$FF @@ -30,7 +31,7 @@ ZVM_cputest: ; Try to find the file - lda #$34 + lda #$34 ; dos_findfile sta HTRAP00 +nop +bcc @end @@ -38,13 +39,15 @@ ZVM_cputest: jsr PRIMM !pet "Loading Z80TEST.COM", 0 - ; Open the file + ; Close all the files, to make sure handle is available - lda #$00 + lda #$22 ; dos_closeall sta HTRAP00 +nop - - lda #$18 + + ; Open the file + + lda #$18 ; dos_openfile sta HTRAP00 +nop @@ -55,9 +58,9 @@ ZVM_cputest: ; Prepare pointers - lda #$FF + lda #$0F sta BIOS_IOBUFERPTR+3 - lda #$D6 + lda #$FD sta BIOS_IOBUFERPTR+2 lda #$00 ; $0005:0100 - from CP/M point of view this is start of page 1 in bank 1 @@ -89,7 +92,7 @@ ZVM_cputest: ; Read up to 512 bytes - lda #$1A + lda #$1A ; dos_readfile sta HTRAP00 +nop @@ -123,7 +126,7 @@ ZVM_cputest: ; Close the file - lda #$20 + lda #$20 ; dos_closefile sta HTRAP00 +nop From c6ed0f0d00ce76d38357a0f51b6a2334eea3620a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 30 Jan 2021 17:07:11 +0100 Subject: [PATCH 191/257] added memory clearing, improved debug code --- src/zvm_m65/debug.s | 2 +- src/zvm_m65/z80_dispatch.s | 2 +- src/zvm_m65/z80_reset.s | 26 ++++++++++++++++++++++++-- src/zvm_m65/zvm.s | 4 ++-- src/zvm_m65/zvm_bios.s | 4 ++-- 5 files changed, 30 insertions(+), 8 deletions(-) diff --git a/src/zvm_m65/debug.s b/src/zvm_m65/debug.s index 9f39401a..73d9618a 100644 --- a/src/zvm_m65/debug.s +++ b/src/zvm_m65/debug.s @@ -54,7 +54,7 @@ DBG_print_hex: jsr CHROUT pla jsr DBGINT_print_hex_byte - jmp DBGINT_end + bra DBGINT_end diff --git a/src/zvm_m65/z80_dispatch.s b/src/zvm_m65/z80_dispatch.s index 9d0132fc..00dc7f18 100644 --- a/src/zvm_m65/z80_dispatch.s +++ b/src/zvm_m65/z80_dispatch.s @@ -9,7 +9,7 @@ +Z80_FETCH_VIA_PC_INC - ; jsr DBG_print_PC_opcode + jsr DBG_print_PC_opcode asl tax diff --git a/src/zvm_m65/z80_reset.s b/src/zvm_m65/z80_reset.s index dd8ba8ea..bddecbe5 100644 --- a/src/zvm_m65/z80_reset.s +++ b/src/zvm_m65/z80_reset.s @@ -1,10 +1,10 @@ ; -; Z80 CPU reset +; Z80 CPU/memory reset ; -Z80_reset: +Z80_reset_CPU: ; Reset registers and internal emulation data @@ -36,3 +36,25 @@ Z80_reset: ; Default bank is 1 (the one user software runs from) jmp ZVM_set_bank_1 + + +Z80_reset_MEM: + + lda #$05 + sta BIOS_LOADPTR+2 + lda #$00 + sta BIOS_LOADPTR+0 + sta BIOS_LOADPTR+1 + sta BIOS_LOADPTR+3 + +@loop: + + dec BIOS_LOADPTR+2 + sta [BIOS_LOADPTR],z + inc BIOS_LOADPTR+2 + sta [BIOS_LOADPTR],z + + inw BIOS_LOADPTR + bne @loop + + rts diff --git a/src/zvm_m65/zvm.s b/src/zvm_m65/zvm.s index e22212b7..8cdbf8c2 100644 --- a/src/zvm_m65/zvm.s +++ b/src/zvm_m65/zvm.s @@ -56,8 +56,8 @@ ZVM: ; entry point ; Generate CPU tables, reset the CPU jsr Z80_table_gen - jsr Z80_reset - ; XXX Z80 clear memory here + ; XXX jsr Z80_reset_MEM + jsr Z80_reset_CPU ; Try CPU test diff --git a/src/zvm_m65/zvm_bios.s b/src/zvm_m65/zvm_bios.s index 86d6b7f4..e3454ff0 100644 --- a/src/zvm_m65/zvm_bios.s +++ b/src/zvm_m65/zvm_bios.s @@ -55,9 +55,9 @@ zvm_BIOS_00_BOOT: ; Cold start ; XXX fetch RAM disk image, CPM3.SYS, command interpreter ; XXX close all the files, reset I/O, set screen mode - ; XXX clear memory - jsr Z80_reset + jsr Z80_reset_MEM + jsr Z80_reset_CPU ; FALLTROUGH From a9f3371772484784d2d026ad1f4f4fc77901f915 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 30 Jan 2021 17:25:35 +0100 Subject: [PATCH 192/257] safer loading code --- src/zvm_m65/zvm_cputest.s | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/zvm_m65/zvm_cputest.s b/src/zvm_m65/zvm_cputest.s index 157e507c..416aba27 100644 --- a/src/zvm_m65/zvm_cputest.s +++ b/src/zvm_m65/zvm_cputest.s @@ -77,6 +77,8 @@ ZVM_cputest: lda #$02 ; value means - 2*256 bytes read pha + ldz #$00 ; in case hypervisor modified it + @loop2: pla @@ -142,18 +144,20 @@ ZVM_cputest: sta BIOS_LOADPTR+1 lda #$05 sta BIOS_LOADPTR+0 - lda #$76 ; HALT + lda #$76 ; HALT sta [BIOS_LOADPTR],z inc BIOS_LOADPTR lda #$FF - sta [BIOS_LOADPTR],z ; $FF = CP/M simulation for CPU test + sta [BIOS_LOADPTR],z ; $FF = CP/M simulation for CPU test ; Run the software + ldz #$00 ; in case hypervisor modified it jmp ZVM_next @end: + ldz #$00 ; in case hypervisor modified it rts ZVM_filename_Z80TEST: From 6f1a80637e4523976d57b2d248ad2182211f845b Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 30 Jan 2021 23:29:41 +0100 Subject: [PATCH 193/257] more work on Z80 bringup --- src/mon_m65/bsmon.s | 1 + src/zvm_m65/debug.s | 19 +++++++++++++++++-- src/zvm_m65/z80_instr_jump.s | 2 ++ src/zvm_m65/zvm.s | 9 +++++---- src/zvm_m65/zvm_cputest.s | 4 +++- src/zvm_m65/zvm_imports.s | 2 ++ 6 files changed, 30 insertions(+), 7 deletions(-) diff --git a/src/mon_m65/bsmon.s b/src/mon_m65/bsmon.s index 354efd70..96ebbdbf 100644 --- a/src/mon_m65/bsmon.s +++ b/src/mon_m65/bsmon.s @@ -38,6 +38,7 @@ Mon_Start: ; ******** CLD + CLI TSY STY SPH TSX diff --git a/src/zvm_m65/debug.s b/src/zvm_m65/debug.s index 73d9618a..64b81deb 100644 --- a/src/zvm_m65/debug.s +++ b/src/zvm_m65/debug.s @@ -24,8 +24,7 @@ DBG_print_PC_opcode: !pet " opcode: ", 0 pla -@1: - beq @1 + +beq MONITOR jsr DBGINT_print_hex_byte ; FALLTROUGH @@ -57,6 +56,22 @@ DBG_print_hex: bra DBGINT_end +DBG_print_LOADCOUNT: + + php + pha + phx + phy + phz + + lda BIOS_LOADCOUNT+1 + jsr DBGINT_print_hex_byte + lda BIOS_LOADCOUNT+0 + jsr DBGINT_print_hex_byte + lda #$0D + jsr CHROUT + + bra DBGINT_end DBGINT_print_hex_byte: diff --git a/src/zvm_m65/z80_instr_jump.s b/src/zvm_m65/z80_instr_jump.s index 47729310..bd2ef756 100644 --- a/src/zvm_m65/z80_instr_jump.s +++ b/src/zvm_m65/z80_instr_jump.s @@ -7,8 +7,10 @@ Z80_instr_C3: ; JP nn +Z80_FETCH_VIA_PC_INC + jsr DBG_print_hex sta REG_PC+0 +Z80_FETCH_VIA_PC_INC + jsr DBG_print_hex sta REG_PC+1 jmp ZVM_next diff --git a/src/zvm_m65/zvm.s b/src/zvm_m65/zvm.s index 8cdbf8c2..75f48c4b 100644 --- a/src/zvm_m65/zvm.s +++ b/src/zvm_m65/zvm.s @@ -14,10 +14,11 @@ ZVM: ; entry point ; Skip the IRQ processing, even if Kernal reenables it sei - lda #return_from_interrupt - sta CINV+1 + ; XXX uncomment this when debugging is finished + ; lda #return_from_interrupt + ; sta CINV+1 ; Make sure $C000-$CFFF ROM is mapped-in, we keep our proxies there ; Also make sure the palette is taken from RAM diff --git a/src/zvm_m65/zvm_cputest.s b/src/zvm_m65/zvm_cputest.s index 416aba27..f69056f3 100644 --- a/src/zvm_m65/zvm_cputest.s +++ b/src/zvm_m65/zvm_cputest.s @@ -111,10 +111,12 @@ ZVM_cputest: ; Copy up to 512 bytes from buffer to target memory + inw BIOS_LOADCOUNT + @loop3: dew BIOS_LOADCOUNT - bmi @loop2 + beq @loop2 ; XXX why no BMI, without INW? lda [BIOS_IOBUFERPTR],z sta [BIOS_LOADPTR],z diff --git a/src/zvm_m65/zvm_imports.s b/src/zvm_m65/zvm_imports.s index 92d77b53..bce4cff3 100644 --- a/src/zvm_m65/zvm_imports.s +++ b/src/zvm_m65/zvm_imports.s @@ -8,9 +8,11 @@ ;; #ALIAS# CHROUT = KERNAL_C.proxy_Z1_CHROUT +;; #ALIAS# MONITOR = KERNAL_0.MONITOR ;; #ALIAS# return_from_interrupt = KERNAL_0.return_from_interrupt + ; 'Print immediate', original implementation by Mike Barry, adapted to 65CE02, modified to preserve .Y ; see http://www.6502.org/source/io/primm.htm From fb8592dc5eee87112fdb8a669aab52dda2eecf32 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 31 Jan 2021 10:27:45 +0100 Subject: [PATCH 194/257] several Z80 fixes --- src/zvm_m65/debug.s | 9 +++++++-- src/zvm_m65/z80_instr_general.s | 3 ++- src/zvm_m65/z80_instr_jump.s | 5 ++--- src/zvm_m65/z80_instr_load_16bit.s | 2 +- src/zvm_m65/zvm_cpmemu.s | 13 +++++++++---- src/zvm_m65/zvm_cputest.s | 15 +++++++++++++-- 6 files changed, 34 insertions(+), 13 deletions(-) diff --git a/src/zvm_m65/debug.s b/src/zvm_m65/debug.s index 64b81deb..2f09c143 100644 --- a/src/zvm_m65/debug.s +++ b/src/zvm_m65/debug.s @@ -2,6 +2,8 @@ DBG_print_PC_opcode: + rts ; XXX disable this to turn debugging on + php pha phx @@ -11,7 +13,7 @@ DBG_print_PC_opcode: pha jsr PRIMM - !pet $0D, "PC: ", 0 + !pet $0D, $1E, "PC: ", 0 dew REG_PC lda REG_PC+1 @@ -24,8 +26,11 @@ DBG_print_PC_opcode: !pet " opcode: ", 0 pla - +beq MONITOR + pha jsr DBGINT_print_hex_byte + pla +@1: + beq @1 ; XXX stop on NOP ; FALLTROUGH diff --git a/src/zvm_m65/z80_instr_general.s b/src/zvm_m65/z80_instr_general.s index 4ab50531..31a0387d 100644 --- a/src/zvm_m65/z80_instr_general.s +++ b/src/zvm_m65/z80_instr_general.s @@ -103,7 +103,8 @@ Z80_instr_76: ; cmp #$FF ; $FF = CP/M call +beq zvm_CPMemu - inc $D021 +@halt: ; XXX temporary, as the BIOS is not ready yet + bra @halt ldx #$01 ; default routine, warm boot diff --git a/src/zvm_m65/z80_instr_jump.s b/src/zvm_m65/z80_instr_jump.s index bd2ef756..d0c2e3a7 100644 --- a/src/zvm_m65/z80_instr_jump.s +++ b/src/zvm_m65/z80_instr_jump.s @@ -7,10 +7,9 @@ Z80_instr_C3: ; JP nn +Z80_FETCH_VIA_PC_INC - jsr DBG_print_hex - sta REG_PC+0 + tax +Z80_FETCH_VIA_PC_INC - jsr DBG_print_hex + stx REG_PC+0 sta REG_PC+1 jmp ZVM_next diff --git a/src/zvm_m65/z80_instr_load_16bit.s b/src/zvm_m65/z80_instr_load_16bit.s index c7a6c335..5b5eee2e 100644 --- a/src/zvm_m65/z80_instr_load_16bit.s +++ b/src/zvm_m65/z80_instr_load_16bit.s @@ -22,7 +22,7 @@ Z80_instr_FD_21: +Z80_LD_REGnn_nn REG_IY ; !macro Z80_LD_REGnn_REGnn .REGnn1, .REGnn2 { lda .REGnn2+0 sta .REGnn1+0 - jsr .REGnn2+1 + lda .REGnn2+1 sta .REGnn1+1 jmp ZVM_next } diff --git a/src/zvm_m65/zvm_cpmemu.s b/src/zvm_m65/zvm_cpmemu.s index 4a17bbe5..168a105d 100644 --- a/src/zvm_m65/zvm_cpmemu.s +++ b/src/zvm_m65/zvm_cpmemu.s @@ -6,12 +6,11 @@ zvm_CPMemu: - jsr PRIMM - !pet "DBG: CP1", $0D, 0 - ldx REG_C cpx #$09 beq zvm_CPMemu_09 + cpx #$02 + beq zvm_CPMemu_02 ; XXX implement additional functions if needed @@ -21,10 +20,16 @@ zvm_CPMemu_end: jmp Z80_instr_C9 ; RET +zvm_CPMemu_02: ; C_WRITE + + lda REG_E + jsr CHROUT + bra zvm_CPMemu_end + zvm_CPMemu_09: ; C_WRITESTR +Z80_FETCH_VIA_DE - cmp #'$' + cmp #$24 ; CP/M string termination character beq zvm_CPMemu_end jsr CHROUT diff --git a/src/zvm_m65/zvm_cputest.s b/src/zvm_m65/zvm_cputest.s index f69056f3..407c449f 100644 --- a/src/zvm_m65/zvm_cputest.s +++ b/src/zvm_m65/zvm_cputest.s @@ -111,12 +111,12 @@ ZVM_cputest: ; Copy up to 512 bytes from buffer to target memory - inw BIOS_LOADCOUNT + inw BIOS_LOADCOUNT ; XXX workaround for DEW not handling N flag @loop3: dew BIOS_LOADCOUNT - beq @loop2 ; XXX why no BMI, without INW? + beq @loop2 lda [BIOS_IOBUFERPTR],z sta [BIOS_LOADPTR],z @@ -152,8 +152,19 @@ ZVM_cputest: lda #$FF sta [BIOS_LOADPTR],z ; $FF = CP/M simulation for CPU test + lda #$00 + sta BIOS_LOADPTR+0 + lda #$76 ; HALT + sta [BIOS_LOADPTR],z + inc BIOS_LOADPTR + lda #$FE + sta [BIOS_LOADPTR],z ; $FE = dummy + ; Run the software + jsr PRIMM + !pet $0D, $0D, 0 + ldz #$00 ; in case hypervisor modified it jmp ZVM_next From 82729bb62183e1c52360b1f266b857e886b50404 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 2 Feb 2021 22:06:57 +0100 Subject: [PATCH 195/257] removed obsolete code, CBDOS is going to be based on hypervisor calls --- Makefile | 4 +--- src/,,config_mega65.s | 2 -- src/aliases/,aliases_config.s | 12 ----------- src/basic/assets/str_nolgpl3_warn.s | 15 -------------- src/basic/init/initmsg_m65.s | 9 --------- src/basic/init/initmsg_real.s | 2 -- src/dos_m65/,aliases_dos.s | 20 ------------------- .../{sdcard => ,disabled}/sdcard_helpers.s | 0 .../{sdcard => ,disabled}/sdcard_init.s | 0 .../{sdcard => ,disabled}/sdcard_readsector.s | 0 .../{sdcard => ,disabled}/sdcard_reset.s | 0 .../{sdcard => ,disabled}/sdcard_wait.s | 0 .../sdcard_writesector.s | 0 src/dos_m65/cmdrdos/,check_nonlgpl3.s | 4 ---- src/dos_m65/dos_init.s | 5 ----- 15 files changed, 1 insertion(+), 72 deletions(-) delete mode 100644 src/basic/assets/str_nolgpl3_warn.s rename src/dos_m65/{sdcard => ,disabled}/sdcard_helpers.s (100%) rename src/dos_m65/{sdcard => ,disabled}/sdcard_init.s (100%) rename src/dos_m65/{sdcard => ,disabled}/sdcard_readsector.s (100%) rename src/dos_m65/{sdcard => ,disabled}/sdcard_reset.s (100%) rename src/dos_m65/{sdcard => ,disabled}/sdcard_wait.s (100%) rename src/dos_m65/{sdcard => ,disabled}/sdcard_writesector.s (100%) delete mode 100644 src/dos_m65/cmdrdos/,check_nonlgpl3.s diff --git a/Makefile b/Makefile index f939a90f..782ad434 100644 --- a/Makefile +++ b/Makefile @@ -61,9 +61,7 @@ SRCDIR_KERNAL = $(SRCDIR_COMMON) \ src/kernal/time SRCDIR_DOS_M65 = $(SRCDIR_COMMON) \ - src/dos_m65 \ - # src/dos_m65/cmdrdos \ - src/dos_m65/sdcard + src/dos_m65 SRCDIR_MON_M65 = $(SRCDIR_COMMON) \ src/mon_m65 diff --git a/src/,,config_mega65.s b/src/,,config_mega65.s index dbf5f316..4d13d9f8 100644 --- a/src/,,config_mega65.s +++ b/src/,,config_mega65.s @@ -91,8 +91,6 @@ ; --- Built-in DOS configuration -;; #CONFIG# CMDRDOS NO ; do not change, DOS is not implemented yet - ;; #CONFIG# UNIT_SDCARD 0 ; do not change, DOS is not implemented yet ;; #CONFIG# UNIT_FLOPPY 0 ; do not change, DOS is not implemented yet ;; #CONFIG# UNIT_RAMDISK 0 ; do not change, DOS is not implemented yet diff --git a/src/aliases/,aliases_config.s b/src/aliases/,aliases_config.s index 524eaabc..5d00e55f 100644 --- a/src/aliases/,aliases_config.s +++ b/src/aliases/,aliases_config.s @@ -247,12 +247,6 @@ !ifndef CONFIG_VIC_PALETTE { !error "CONFIG_VIC_PALETTE not specified" } } -; Check that internal DOS configuration is correct - -!ifdef CONFIG_CMDRDOS { !ifndef CONFIG_MB_M65 { - !error "CONFIG_CMDRDOS requires CONFIG_MB_M65" -} } - ; Check that startup banner configuration is correct @@ -424,12 +418,6 @@ -; Handle non-LGPL3 code - -!ifdef CONFIG_CMDRDOS { !set HAS_NOLGPL3_WARN = 1 } - - - ; Determine if we need space-savings in BASIC code !ifndef CONFIG_MB_M65 { !ifndef ROM_LAYOUT_CRT { diff --git a/src/basic/assets/str_nolgpl3_warn.s b/src/basic/assets/str_nolgpl3_warn.s deleted file mode 100644 index 88bf8fa9..00000000 --- a/src/basic/assets/str_nolgpl3_warn.s +++ /dev/null @@ -1,15 +0,0 @@ -;; #LAYOUT# M65 BASIC_1 #TAKE -;; #LAYOUT# * * #IGNORE - - - -!ifdef HAS_NOLGPL3_WARN { - -str_nonlgpl3_warn: - - !byte $0D, $0D, $0D, $0D - !pet "build contains non-lgpl3 code" - !byte $0D - !pet " *** do not distribute ***" - !byte $0D, $0D, $00 -} diff --git a/src/basic/init/initmsg_m65.s b/src/basic/init/initmsg_m65.s index e36672d7..3608cc7a 100644 --- a/src/basic/init/initmsg_m65.s +++ b/src/basic/init/initmsg_m65.s @@ -64,18 +64,9 @@ INITMSG_native: jsr initmsg_bytes_free -!ifdef HAS_NOLGPL3_WARN { - - lda #str_nonlgpl3_warn - jmp STROUT - -} else { - ldx #$09 ldy #$00 jmp plot_set -} INITMSG_main_banner: diff --git a/src/basic/init/initmsg_real.s b/src/basic/init/initmsg_real.s index d8a21c32..01384071 100644 --- a/src/basic/init/initmsg_real.s +++ b/src/basic/init/initmsg_real.s @@ -115,5 +115,3 @@ initmsg_real: } } - -!ifdef HAS_NOLGPL3_WARN { !error "HAS_NOLGPL3_WARN not implemented" } diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index 9a00472e..ffc4f214 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -20,23 +20,3 @@ !addr UNIT_SDCARD = $05 !addr UNIT_FLOPPY = $06 !addr UNIT_RAMDISK = $07 - - ; SD/SDHC card variables - - !addr CARD_INIT_DONE = $08 ; $80 - init done, $00 - init not done - !addr CARD_IS_SDHC = $09 ; $00 = SD, $80 = SDHC - !addr CARD_SIZE = $0A ; 4 bytes - !addr CARD_SECNUM = $0E ; 4 bytes - sector number - - !addr CARD_TMP_STEP = $12 ; 4 bytes - !addr CARD_TMP_RETRIES = $16 ; 1 byte - - !addr CARD_BUFPNT1 = $17 ; 4 bytes - pointer to hardware sector buffer XXX replace copy routines with DMAgic - !addr CARD_BUFPNT2 = $1B ; 4 bytes - as above, but points to the 2nd page of the hardware buffer - - - ; - ; High memory - ; - - !addr CARD_BUF = $8100 ; 512 bytes, up to $82FF - buffer for reading/writing data diff --git a/src/dos_m65/sdcard/sdcard_helpers.s b/src/dos_m65/,disabled/sdcard_helpers.s similarity index 100% rename from src/dos_m65/sdcard/sdcard_helpers.s rename to src/dos_m65/,disabled/sdcard_helpers.s diff --git a/src/dos_m65/sdcard/sdcard_init.s b/src/dos_m65/,disabled/sdcard_init.s similarity index 100% rename from src/dos_m65/sdcard/sdcard_init.s rename to src/dos_m65/,disabled/sdcard_init.s diff --git a/src/dos_m65/sdcard/sdcard_readsector.s b/src/dos_m65/,disabled/sdcard_readsector.s similarity index 100% rename from src/dos_m65/sdcard/sdcard_readsector.s rename to src/dos_m65/,disabled/sdcard_readsector.s diff --git a/src/dos_m65/sdcard/sdcard_reset.s b/src/dos_m65/,disabled/sdcard_reset.s similarity index 100% rename from src/dos_m65/sdcard/sdcard_reset.s rename to src/dos_m65/,disabled/sdcard_reset.s diff --git a/src/dos_m65/sdcard/sdcard_wait.s b/src/dos_m65/,disabled/sdcard_wait.s similarity index 100% rename from src/dos_m65/sdcard/sdcard_wait.s rename to src/dos_m65/,disabled/sdcard_wait.s diff --git a/src/dos_m65/sdcard/sdcard_writesector.s b/src/dos_m65/,disabled/sdcard_writesector.s similarity index 100% rename from src/dos_m65/sdcard/sdcard_writesector.s rename to src/dos_m65/,disabled/sdcard_writesector.s diff --git a/src/dos_m65/cmdrdos/,check_nonlgpl3.s b/src/dos_m65/cmdrdos/,check_nonlgpl3.s deleted file mode 100644 index a5e16f82..00000000 --- a/src/dos_m65/cmdrdos/,check_nonlgpl3.s +++ /dev/null @@ -1,4 +0,0 @@ - -!ifndef HAS_NOLGPL3_WARN { - !error "No LGPL3 incompatible warning issued" -} diff --git a/src/dos_m65/dos_init.s b/src/dos_m65/dos_init.s index 5654e923..f7bd85f6 100644 --- a/src/dos_m65/dos_init.s +++ b/src/dos_m65/dos_init.s @@ -26,9 +26,4 @@ dos_INIT: lda #CONFIG_UNIT_RAMDISK sta UNIT_RAMDISK - ; Mark SD card as not initialized - - lda #$00 - sta CARD_INIT_DONE - rts From 92d1ad01770cebd7d0cbfa6d7d91c392481d1d40 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 3 Feb 2021 16:05:07 +0100 Subject: [PATCH 196/257] rework for the initial CBDOS --- src/,,config_mega65.s | 2 + src/dos_m65/,aliases_dos.s | 4 + src/dos_m65/4020.dos_vectable.s | 5 +- src/dos_m65/dos_error_strings.s | 156 +++++++++++++++++++ src/dos_m65/dos_init.s | 5 + src/dos_m65/dos_memchk.s | 32 ++++ src/dos_m65/dos_setunit.s | 42 ----- src/dos_m65/{dos_chkunit.s => dos_unitchk.s} | 37 ++--- src/dos_m65/dos_unitnum.s | 53 +++++++ src/dos_m65/dos_unitset.s | 49 ++++++ src/kernal/iec_fast/m65dos_bridge.s | 41 +++-- src/kernal/iec_fast/m65dos_detect.s | 2 +- src/kernal/iostack/setfls.s | 6 +- 13 files changed, 349 insertions(+), 85 deletions(-) create mode 100644 src/dos_m65/dos_error_strings.s create mode 100644 src/dos_m65/dos_memchk.s delete mode 100644 src/dos_m65/dos_setunit.s rename src/dos_m65/{dos_chkunit.s => dos_unitchk.s} (51%) create mode 100644 src/dos_m65/dos_unitnum.s create mode 100644 src/dos_m65/dos_unitset.s diff --git a/src/,,config_mega65.s b/src/,,config_mega65.s index 4d13d9f8..8398be8c 100644 --- a/src/,,config_mega65.s +++ b/src/,,config_mega65.s @@ -33,6 +33,8 @@ ;; #CONFIG# IEC_JIFFYDOS_BLANK NO ;; #CONFIG# IEC_BURST_M65 NO ; please keep disabled for now +;; #CONFIG# UNIT_SDCARD 20 ; do not change for now + ; --- Tape deck configuration diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index ffc4f214..685fd5b6 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -20,3 +20,7 @@ !addr UNIT_SDCARD = $05 !addr UNIT_FLOPPY = $06 !addr UNIT_RAMDISK = $07 + + ; General DOS status + + !addr UNIT_HANDLER = $08 \ No newline at end of file diff --git a/src/dos_m65/4020.dos_vectable.s b/src/dos_m65/4020.dos_vectable.s index 63d31009..8df00ad4 100644 --- a/src/dos_m65/4020.dos_vectable.s +++ b/src/dos_m65/4020.dos_vectable.s @@ -2,8 +2,9 @@ ; A vector table to integrate DOS with the MEGA65 Kernal !word dos_INIT -!word dos_CHKUNIT -!word dos_SETUNIT +!word dos_UNITCHK +!word dos_UNITSET +!word dos_UNITNUM !word dos_ACPTR !word dos_CIOUT !word dos_LISTEN diff --git a/src/dos_m65/dos_error_strings.s b/src/dos_m65/dos_error_strings.s new file mode 100644 index 00000000..91a69be4 --- /dev/null +++ b/src/dos_m65/dos_error_strings.s @@ -0,0 +1,156 @@ + +; +; DOS error codes and strings +; + + +; XXX get rid of unnecessary error messages + + +dos_err_init_sdcard: + + !pet "m65 dos sdcard", 0 + +dos_err_init_floppy: + + !pet "m65 dos floppy", 0 + +dos_err_init_ramdisk: + + !pet "m65 dos ram disk", 0 + + +; List compiled from various manuals (CBM 1571, CBM 1581, CMD FD4000, MSD Super Disk, IDE64) + + +dos_err_00: ; not an error + + !pet "ok", 0 + +dos_err_01: ; not an error + + !pet "files scratched", 0 + +dos_err_02: ; not an error + + !pet "partition selected", 0 + +dos_err_20: ; header not found +dos_err_21: ; no data addres mark +dos_err_22: ; block not found +dos_err_23: ; data error +dos_err_27: ; header error + + !pet "read error", 0 + +dos_err_25: + + !pet "write error", 0 + +dos_err_26: + + !pet "write protect on", 0 + +dos_err_29: + + !pet "disk changed", 0 + +dos_err_30: ; invalid characters in command +dos_err_31: ; unrecognized command +dos_err_32: ; command too long +dos_err_33: ; illegal file name +dos_err_34: ; missing file name + + !pet "syntax error", 0 + +dos_err_39: + + !pet "file not found", 0 + +dos_err_49: ; disk formatted, but format not supported + + !pet "invalid format", 0 + +dos_err_50: + + !pet "record not present", 0 + +dos_err_51: + + !pet "overflow in record", 0 + +dos_err_52: + + !pet "file too large", 0 + +dos_err_60: + + !pet "write file open", 0 + +dos_err_61: + + !pet "file not open", 0 + +dos_err_62: + + !pet "file not found", 0 + +dos_err_63: + + !pet "file exists", 0 + +dos_err_64: + + !pet "file type mismatch", 0 + +dos_err_65: + + !pet "no block", 0 + +dos_err_66: + + !pet "illegal track and sector", 0 + +dos_err_67: + + !pet "illegal system t or s", 0 + +dos_err_70: + + !pet "no channel", 0 + +dos_err_71: + + !pet "directory error", 0 + +dos_err_72: + + !pet "partition full", 0 + +dos_err_73: + + !pet "dos mismatch", 0 + +dos_err_74: + + !pet "drive not ready", 0 + +dos_err_75: + + !pet "format error", 0 + +dos_err_76: + + !pet "controller error", 0 + +dos_err_77: + + !pet "selected partition illegal", 0 + +dos_err_78: + + !pet "system error", 0 + +dos_err_79: ; SD2IEC compatible + + !pet "image invalid", 0 diff --git a/src/dos_m65/dos_init.s b/src/dos_m65/dos_init.s index f7bd85f6..8ef2e514 100644 --- a/src/dos_m65/dos_init.s +++ b/src/dos_m65/dos_init.s @@ -3,6 +3,11 @@ ; Initializes DOS. For detailed description see 'm65dos_bridge.s' file ; + +!set CONFIG_UNIT_FLOPPY = 0 ; XXX floppy not supported yet +!set CONFIG_UNIT_RAMDISK = 0 ; XXX RAM disk not supported yet + + dos_INIT: ; Set the magic string 'CBDOS' diff --git a/src/dos_m65/dos_memchk.s b/src/dos_m65/dos_memchk.s new file mode 100644 index 00000000..62eea52d --- /dev/null +++ b/src/dos_m65/dos_memchk.s @@ -0,0 +1,32 @@ + +; +; Check if DOS memory is not overwritten +; + + +dos_MEMCHK: + + ; Check for magic string + + pha + phx + + ldx #$04 +@1: + lda MAGICSTR, x + cmp dos_magicstr, x + bne @fail + dex + bpl @1 + + plx + pla + clc + rts + +@fail: + + plx + pla + sec + rts diff --git a/src/dos_m65/dos_setunit.s b/src/dos_m65/dos_setunit.s deleted file mode 100644 index 1863dfe9..00000000 --- a/src/dos_m65/dos_setunit.s +++ /dev/null @@ -1,42 +0,0 @@ - -; -; Unit number handling. For detailed description see 'm65dos_bridge.s' file -; - - -dos_SETUNIT: - - ; XXX check if .X is valid - - cmp #$00 - beq dos_SETUNIT_sdcard - cmp #$01 - beq dos_SETUNIT_floppy - cmp #$02 - beq dos_SETUNIT_ramdisk - - sec - rts - -dos_SETUNIT_sdcard: - - stx UNIT_SDCARD - +skip_2_bytes_trash_nvz - - ; FALLTROUGH - -dos_SETUNIT_floppy: - - stx UNIT_FLOPPY - +skip_2_bytes_trash_nvz - - ; FALLTROUGH - -dos_SETUNIT_ramdisk: - - stx UNIT_RAMDISK - - ; FALLTROUGH - - clc - rts diff --git a/src/dos_m65/dos_chkunit.s b/src/dos_m65/dos_unitchk.s similarity index 51% rename from src/dos_m65/dos_chkunit.s rename to src/dos_m65/dos_unitchk.s index a530850d..ee94d898 100644 --- a/src/dos_m65/dos_chkunit.s +++ b/src/dos_m65/dos_unitchk.s @@ -4,58 +4,51 @@ ; -dos_CHKUNIT: +dos_UNITCHK: - ; Check for magic string + ; Check if memory content is not damaged - pha - phx - - ldx #$04 -@1: - lda MAGICSTR, x - cmp dos_magicstr, x - bne dos_CHKUNIT_mem_fail - dex - bpl @1 - - plx - pla + jsr dos_MEMCHK + bcs dos_UNITCHK_none ; Check for unit cmp UNIT_SDCARD - beq dos_CHKUNIT_sdcard + beq dos_UNITCHK_sdcard cmp UNIT_FLOPPY - beq dos_CHKUNIT_floppy + beq dos_UNITCHK_floppy cmp UNIT_RAMDISK - beq dos_CHKUNIT_ramdisk + beq dos_UNITCHK_ramdisk + + ; FALLTROUGH + +dos_UNITCHK_none: sec rts -dos_CHKUNIT_sdcard: +dos_UNITCHK_sdcard: lda #$00 +skip_2_bytes_trash_nvz ; FALLTROUGH -dos_CHKUNIT_floppy: +dos_UNITCHK_floppy: lda #$01 +skip_2_bytes_trash_nvz ; FALLTROUGH -dos_CHKUNIT_ramdisk: +dos_UNITCHK_ramdisk: lda #$02 clc rts -dos_CHKUNIT_mem_fail: +dos_UNITCHK_mem_fail: plx pla diff --git a/src/dos_m65/dos_unitnum.s b/src/dos_m65/dos_unitnum.s new file mode 100644 index 00000000..8336a779 --- /dev/null +++ b/src/dos_m65/dos_unitnum.s @@ -0,0 +1,53 @@ + +; +; Unit number handling. For detailed description see 'm65dos_bridge.s' file +; + + +dos_UNITNUM: + + ; Check if memory content is not damaged + + jsr dos_MEMCHK + bcs dos_UNITNUM_none + + ; Check what kind of device was requested + + cmp #$00 + beq dos_UNITNUM_sdcard + cmp #$01 + beq dos_UNITNUM_floppy + cmp #$02 + beq dos_UNITNUM_ramdisk + + lda #$00 + + ; FALLTROUGH + +dos_UNITNUM_none: + + sec + rts + +dos_UNITNUM_sdcard: + + lda UNIT_SDCARD + + +skip_2_bytes_trash_nvz + +dos_UNITNUM_floppy: + + lda UNIT_FLOPPY + + +skip_2_bytes_trash_nvz + +dos_UNITNUM_ramdisk: + + lda UNIT_RAMDISK + + cmp #$00 + beq dos_UNITNUM_none + + clc + rts + diff --git a/src/dos_m65/dos_unitset.s b/src/dos_m65/dos_unitset.s new file mode 100644 index 00000000..49133f6d --- /dev/null +++ b/src/dos_m65/dos_unitset.s @@ -0,0 +1,49 @@ + +; +; Unit number handling. For detailed description see 'm65dos_bridge.s' file +; + + +dos_UNITSET: + + ; Check if memory content is not damaged + + jsr dos_MEMCHK + bcc @1 + rts +@1: + ; Check what kind of device was requested + + cmp #$00 + beq dos_UNITSET_sdcard + ; XXX devioces below are not implemented yet + ; cmp #$01 + ; beq dos_UNITSET_floppy + ; cmp #$02 + ; beq dos_UNITSET_ramdisk + + sec + rts + +dos_UNITSET_sdcard: + + stx UNIT_SDCARD + +skip_2_bytes_trash_nvz + + ; FALLTROUGH + +dos_UNITSET_floppy: + + stx UNIT_FLOPPY + +skip_2_bytes_trash_nvz + + ; FALLTROUGH + +dos_UNITSET_ramdisk: + + stx UNIT_RAMDISK + + ; FALLTROUGH + + clc + rts diff --git a/src/kernal/iec_fast/m65dos_bridge.s b/src/kernal/iec_fast/m65dos_bridge.s index f0d2b00b..8acfbfc8 100644 --- a/src/kernal/iec_fast/m65dos_bridge.s +++ b/src/kernal/iec_fast/m65dos_bridge.s @@ -7,16 +7,17 @@ !addr VDOS_INIT = $4020 + 0 * 2 -!addr VDOS_CHKUNIT = $4020 + 1 * 2 -!addr VDOS_SETUNIT = $4020 + 2 * 2 -!addr VDOS_ACPTR = $4020 + 3 * 2 -!addr VDOS_CIOUT = $4020 + 4 * 2 -!addr VDOS_LISTEN = $4020 + 5 * 2 -!addr VDOS_SECOND = $4020 + 6 * 2 -!addr VDOS_TALK = $4020 + 7 * 2 -!addr VDOS_TKSA = $4020 + 8 * 2 -!addr VDOS_UNTLK = $4020 + 9 * 2 -!addr VDOS_UNLSN = $4020 + 10 * 2 +!addr VDOS_UNITCHK = $4020 + 1 * 2 +!addr VDOS_UNITSET = $4020 + 2 * 2 +!addr VDOS_UNITNUM = $4020 + 3 * 2 +!addr VDOS_ACPTR = $4020 + 4 * 2 +!addr VDOS_CIOUT = $4020 + 5 * 2 +!addr VDOS_LISTEN = $4020 + 6 * 2 +!addr VDOS_SECOND = $4020 + 7 * 2 +!addr VDOS_TALK = $4020 + 8 * 2 +!addr VDOS_TKSA = $4020 + 9 * 2 +!addr VDOS_UNTLK = $4020 + 10 * 2 +!addr VDOS_UNLSN = $4020 + 11 * 2 m65dos_init: @@ -27,24 +28,34 @@ m65dos_init: jsr (VDOS_INIT) bra m65dos_end_1 -m65dos_chkunit: ; XXX expose to BASIC +m65dos_unitchk: ; XXX expose to BASIC ; Checks is the unit number is supported by the internal DOS ; Input: .A - unit number to check ; Output: Carry set if not supported, otherwise .A contains unit type (0 = SD card, 1 = internal floppy, 2 = RAM disk) jsr map_DOS_1 - jsr (VDOS_CHKUNIT) + jsr (VDOS_UNITCHK) bra m65dos_end_1 -m65dos_setunit: ; XXX expose to BASIC +m65dos_unitset: ; XXX expose to BASIC ; Set the unit number - ; Input: .A - unit number, .X - unit type (as in m65dos_chkunit) + ; Input: .X - unit number, .A - unit type (as in m65dos_chkunit) ; Output: Carry set means error jsr map_DOS_1 - jsr (VDOS_SETUNIT) + jsr (VDOS_UNITSET) + bra m65dos_end_1 + +m65dos_unitnum: ; XXX expose to BASIC + + ; Set the unit number + ; Input: .A - unit type (as in m65dos_chkunit) + ; Output: .A - unit number, Carry set means error + + jsr map_DOS_1 + jsr (VDOS_UNITNUM) bra m65dos_end_1 m65dos_acptr: diff --git a/src/kernal/iec_fast/m65dos_detect.s b/src/kernal/iec_fast/m65dos_detect.s index b188b6d5..2cb5fed4 100644 --- a/src/kernal/iec_fast/m65dos_detect.s +++ b/src/kernal/iec_fast/m65dos_detect.s @@ -12,7 +12,7 @@ m65dos_detect: ; Output: Carry set if not supported, if supported IECPROTO isset to IEC_ROMDOS pha - jsr m65dos_chkunit + jsr m65dos_unitchk bcs @1 lda #IEC_ROMDOS diff --git a/src/kernal/iostack/setfls.s b/src/kernal/iostack/setfls.s index 36be657e..968bd9de 100644 --- a/src/kernal/iostack/setfls.s +++ b/src/kernal/iostack/setfls.s @@ -16,8 +16,8 @@ SETFLS: ; There are 6 sane ways to implement this routine, ; I hope this one will not cause similarity to CBM code - sta LA - sty SA - stx FA + sta LA ; logical number + sty SA ; secondary address + stx FA ; unit number rts From 5f6a8eb7bf69bdd659c0bd33d99df692a994f50e Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 3 Feb 2021 20:20:10 +0100 Subject: [PATCH 197/257] MEGA65 banner now displays internal device numbers --- src/,,config_mega65.s | 4 +-- src/basic/,imports.s | 2 ++ src/basic/basic_commands_04/cmd_sysinfo.s | 38 +++++++++++++++++++++-- src/basic/board_m65/mega65_imports.s | 1 + src/basic/board_m65/mega65_proxies.s | 6 ++++ src/basic/init/initmsg_m65.s | 4 +-- src/dos_m65/,aliases_dos.s | 11 +++---- src/dos_m65/dos_unitnum.s | 13 ++++---- src/kernal/board_m65/mega65_map_helpers.s | 19 +----------- src/kernal/iec_fast/m65dos_bridge.s | 4 +-- tools/generate_strings.cc | 5 ++- 11 files changed, 67 insertions(+), 40 deletions(-) diff --git a/src/,,config_mega65.s b/src/,,config_mega65.s index 8398be8c..59537149 100644 --- a/src/,,config_mega65.s +++ b/src/,,config_mega65.s @@ -33,8 +33,6 @@ ;; #CONFIG# IEC_JIFFYDOS_BLANK NO ;; #CONFIG# IEC_BURST_M65 NO ; please keep disabled for now -;; #CONFIG# UNIT_SDCARD 20 ; do not change for now - ; --- Tape deck configuration @@ -93,7 +91,7 @@ ; --- Built-in DOS configuration -;; #CONFIG# UNIT_SDCARD 0 ; do not change, DOS is not implemented yet +;; #CONFIG# UNIT_SDCARD 20 ; do not change, DOS is not implemented yet ;; #CONFIG# UNIT_FLOPPY 0 ; do not change, DOS is not implemented yet ;; #CONFIG# UNIT_RAMDISK 0 ; do not change, DOS is not implemented yet diff --git a/src/basic/,imports.s b/src/basic/,imports.s index 767bf70a..d3626678 100644 --- a/src/basic/,imports.s +++ b/src/basic/,imports.s @@ -50,6 +50,8 @@ ;; #ALIAS# m65_shadow_BZP = KERNAL_0.m65_shadow_BZP ;; #ALIAS# proxy_M1_IO_end = KERNAL_0.proxy_M1_IO_end +;; #ALIAS# m65dos_unitnum = KERNAL_0.m65dos_unitnum + ; ; Ultimate 64 specific parts ; diff --git a/src/basic/basic_commands_04/cmd_sysinfo.s b/src/basic/basic_commands_04/cmd_sysinfo.s index 27f5c5b3..dfed12c2 100644 --- a/src/basic/basic_commands_04/cmd_sysinfo.s +++ b/src/basic/basic_commands_04/cmd_sysinfo.s @@ -106,12 +106,46 @@ print_sysinfo_video: @5: jsr print_packed_misc_str - ; Print build featires information + ; Print build features information ldx #IDX__STR_SI_FEATURES - jmp print_packed_misc_str + jsr print_packed_misc_str + ; Print SD CARD unit ID + lda #$00 + jsr cmd_sysinfo_print_dev + + ldx #IDX__STR_DOS_FD + jsr print_packed_misc_str + + ; Print floppy unit ID + + lda #$01 + jsr cmd_sysinfo_print_dev + + ; Print ram disk unit ID + + ldx #IDX__STR_DOS_RD + jsr print_packed_misc_str + + lda #$02 + jsr cmd_sysinfo_print_dev + + jmp print_return + +cmd_sysinfo_print_dev: + + jsr m65dos_unitnum + bcs @nounit + tax + lda #$00 + jmp print_integer + +@nounit: + + lda #'-' + jmp JCHROUT cmd_sysinfo_hw_ids: diff --git a/src/basic/board_m65/mega65_imports.s b/src/basic/board_m65/mega65_imports.s index 999391b6..613df99e 100644 --- a/src/basic/board_m65/mega65_imports.s +++ b/src/basic/board_m65/mega65_imports.s @@ -46,3 +46,4 @@ ;; #ALIAS# fetch_character_skip_spaces = BASIC_0.proxy_B1_fetch_character_skip_spaces ;; #ALIAS# fetch_uint8 = BASIC_0.proxy_B1_fetch_uint8 ;; #ALIAS# shell_main_loop = BASIC_0.proxy_B1_shell_main_loop +;; #ALIAS# m65dos_unitnum = BASIC_0.proxy_B1_m65dos_unitnum diff --git a/src/basic/board_m65/mega65_proxies.s b/src/basic/board_m65/mega65_proxies.s index a218be22..953e9658 100644 --- a/src/basic/board_m65/mega65_proxies.s +++ b/src/basic/board_m65/mega65_proxies.s @@ -156,3 +156,9 @@ proxy_M1_print_kernal_error: jsr do_error_print_only jmp proxy_M1_IO_end } + +proxy_B1_m65dos_unitnum: + + jsr map_NORMAL + jsr m65dos_unitnum + bra proxy_B1_end_2 diff --git a/src/basic/init/initmsg_m65.s b/src/basic/init/initmsg_m65.s index 3608cc7a..72c1f2c0 100644 --- a/src/basic/init/initmsg_m65.s +++ b/src/basic/init/initmsg_m65.s @@ -31,11 +31,11 @@ INITMSG_native: ; Native mode - ldx #48 + ldx #44 ldy #0 jsr M65_SETWIN_XY - ldx #32 + ldx #36 ldy #9 jsr M65_SETWIN_WH diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index 685fd5b6..031df0f1 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -3,7 +3,6 @@ ; ; NOTES: -; - DOS zeropage is mirrored at $8000 ; - starting from $8000, 16KB RAM is available (starting from $10000 in C65 address space) ; - additional 16KB RAM is reserved for DOS too ($14000-$17FFF), and can be banked-in if needed @@ -13,14 +12,14 @@ ; Page 0 ; - !addr MAGICSTR = $00 ; magic string; if not matching, DOS considered non-functional + !addr MAGICSTR = $8000 ; magic string; if not matching, DOS considered non-functional ; General DOS configuration - !addr UNIT_SDCARD = $05 - !addr UNIT_FLOPPY = $06 - !addr UNIT_RAMDISK = $07 + !addr UNIT_SDCARD = $8005 + !addr UNIT_FLOPPY = $8006 + !addr UNIT_RAMDISK = $8007 ; General DOS status - !addr UNIT_HANDLER = $08 \ No newline at end of file + !addr UNIT_HANDLER = $8008 diff --git a/src/dos_m65/dos_unitnum.s b/src/dos_m65/dos_unitnum.s index 8336a779..c0bc9509 100644 --- a/src/dos_m65/dos_unitnum.s +++ b/src/dos_m65/dos_unitnum.s @@ -20,30 +20,31 @@ dos_UNITNUM: cmp #$02 beq dos_UNITNUM_ramdisk - lda #$00 - ; FALLTROUGH dos_UNITNUM_none: + lda #$00 + sec rts dos_UNITNUM_sdcard: lda UNIT_SDCARD - - +skip_2_bytes_trash_nvz + bra dos_UNITNUM_common dos_UNITNUM_floppy: lda UNIT_FLOPPY - - +skip_2_bytes_trash_nvz + bra dos_UNITNUM_common dos_UNITNUM_ramdisk: lda UNIT_RAMDISK + bra dos_UNITNUM_common + +dos_UNITNUM_common: cmp #$00 beq dos_UNITNUM_none diff --git a/src/kernal/board_m65/mega65_map_helpers.s b/src/kernal/board_m65/mega65_map_helpers.s index 0c9005bf..8cfb5b59 100644 --- a/src/kernal/board_m65/mega65_map_helpers.s +++ b/src/kernal/board_m65/mega65_map_helpers.s @@ -76,12 +76,8 @@ map_DOS_1: phy phz - lda #$80 - tab ; from now on, zeropage starts from $C000 - ldy #$80 - lda #$30 - taz ; $8000 <- map 16KB RAM from $10000 + ldz #$30 ; $8000 <- map 16KB RAM from $10000 lda #$C0 ldx #$C1 ; $4000 <- map 16KB ROM from $20000 @@ -89,19 +85,6 @@ map_DOS_1: map bra map_end_no_eom ; no EOM, we do not want interrupts within DOS! -map_NORMAL_from_DOS_1: - - php - pha - phx - phy - phz - - lda #$00 - tab - - bra map_NORMAL_common - map_MON_1: php diff --git a/src/kernal/iec_fast/m65dos_bridge.s b/src/kernal/iec_fast/m65dos_bridge.s index 8acfbfc8..7e7643c1 100644 --- a/src/kernal/iec_fast/m65dos_bridge.s +++ b/src/kernal/iec_fast/m65dos_bridge.s @@ -67,7 +67,7 @@ m65dos_acptr: m65dos_end_1: - jmp map_NORMAL_from_DOS_1 ; ACPTR is slightly faster + jmp map_NORMAL ; ACPTR is slightly faster m65dos_ciout: @@ -78,7 +78,7 @@ m65dos_ciout: m65dos_end_2: - jmp map_NORMAL_from_DOS_1 ; CIOUT is slightly faster + jmp map_NORMAL ; CIOUT is slightly faster m65dos_listen: diff --git a/tools/generate_strings.cc b/tools/generate_strings.cc index dc9cc2e1..62c22dbd 100644 --- a/tools/generate_strings.cc +++ b/tools/generate_strings.cc @@ -306,6 +306,9 @@ const StringEntryList GLOBAL_MiscStrings = { ListType::STRINGS_BASIC, "misc", { false, true, true, false, false, "STR_MEM_STRS", "\r STRS" }, { false, true, true, false, false, "STR_MEM_FREE", "\r\r FREE" }, + { false, false, true, false, false, "STR_DOS_FD", ", FDD " }, + { false, false, true, false, false, "STR_DOS_RD", ", RAM " }, + { false, false, true, false, false, "STR_SI_HEADER", "OPEN ROMS, " }, { false, false, true, false, false, "STR_SI_MODE64", "LEGACY MODE" }, { false, false, true, false, false, "STR_SI_MODE65", "NATIVE MODE" }, @@ -1221,7 +1224,7 @@ void DataSet::generateConfigDepStrings() // CBDOS features - featureStrM65 += "CBDOS : NO FDD/SD/RAM SUPPORT\r"; + featureStrM65 += "CBDOS : CARD "; // Keyboard support features From 575833d763cd602b74717c954a9b6a5d20c1ca37 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 6 Feb 2021 23:19:11 +0100 Subject: [PATCH 198/257] implemented TALK/LISTEN/UNTLK/UNLSN in the internal DOS --- src/dos_m65/,aliases_dos.s | 12 ++--- src/dos_m65/dos_init.s | 6 +++ src/dos_m65/dos_listen_unlsn.s | 99 ++++++++++++++++++++++++++++++++++ src/dos_m65/dos_unitset.s | 2 + src/dos_m65/stubs.s | 10 +--- 5 files changed, 115 insertions(+), 14 deletions(-) create mode 100644 src/dos_m65/dos_listen_unlsn.s diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index 031df0f1..96b2f5c2 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -7,19 +7,19 @@ ; - additional 16KB RAM is reserved for DOS too ($14000-$17FFF), and can be banked-in if needed - ; - ; Page 0 + ; Page start+0 ; !addr MAGICSTR = $8000 ; magic string; if not matching, DOS considered non-functional ; General DOS configuration - !addr UNIT_SDCARD = $8005 - !addr UNIT_FLOPPY = $8006 - !addr UNIT_RAMDISK = $8007 + !addr UNIT_SDCARD = $8005 ; unit number for device, 0 = none + !addr UNIT_FLOPPY = $8006 ; as above + !addr UNIT_RAMDISK = $8007 ; as above ; General DOS status - !addr UNIT_HANDLER = $8008 + !addr IDX_LISTENER = $8008 ; listener idx * 2, >=$80 = none + !addr IDX_TALKER = $8009 ; talker idx * 2, >=$80 = none diff --git a/src/dos_m65/dos_init.s b/src/dos_m65/dos_init.s index 8ef2e514..2b537af7 100644 --- a/src/dos_m65/dos_init.s +++ b/src/dos_m65/dos_init.s @@ -31,4 +31,10 @@ dos_INIT: lda #CONFIG_UNIT_RAMDISK sta UNIT_RAMDISK + ; Clear listener / talker + + lda #$FF + sta IDX_LISTENER + sta IDX_TALKER + rts diff --git a/src/dos_m65/dos_listen_unlsn.s b/src/dos_m65/dos_listen_unlsn.s new file mode 100644 index 00000000..e3bf5700 --- /dev/null +++ b/src/dos_m65/dos_listen_unlsn.s @@ -0,0 +1,99 @@ + +; +; Implementation of LISTEN/UNLSN/TALK/UNTLK commands. +; For detailed description see 'm65dos_bridge.s' file. +; + + +; LISTEN + +dos_LISTEN: + + pha + and #$1F + beq dos_fail_TALK_LISTEN ; branch if device 0 (used to denote lack of device) + + cmp UNIT_SDCARD + bne @1 + + lda #$00 + bra dos_LISTEN_success +@1: + cmp UNIT_FLOPPY + bne @2 + + lda #$02 + bra dos_LISTEN_success +@2: + cmp UNIT_RAMDISK + bne dos_fail_TALK_LISTEN + + lda #$04 + + ; FALLTROUGH + +dos_LISTEN_success: + + sta IDX_LISTENER + bra dos_common_LSN_TALK_UN + +; TALK + +dos_TALK: + + pha + and #$1F + beq dos_fail_TALK_LISTEN ; branch if device 0 (used to denote lack of device) + + cmp UNIT_SDCARD + bne @1 + + lda #$00 + bra dos_TALK_success +@1: + cmp UNIT_FLOPPY + bne @2 + + lda #$02 + bra dos_TALK_success +@2: + cmp UNIT_RAMDISK + bne dos_fail_TALK_LISTEN + + lda #$04 + + ; FALLTROUGH + +dos_TALK_success: + + sta IDX_TALKER + bra dos_common_LSN_TALK_UN + +dos_fail_TALK_LISTEN: + + pla + sec + rts + +; UNLSN / UNTLK + +dos_UNLSN: + + pha + lda #$FF + sta IDX_LISTENER + bra dos_common_LSN_TALK_UN + +dos_UNTLK: + + pha + lda #$FF + sta IDX_TALKER + + ; FALLTROUGH + +dos_common_LSN_TALK_UN: + + pla + clc + rts diff --git a/src/dos_m65/dos_unitset.s b/src/dos_m65/dos_unitset.s index 49133f6d..9ef2326b 100644 --- a/src/dos_m65/dos_unitset.s +++ b/src/dos_m65/dos_unitset.s @@ -12,6 +12,8 @@ dos_UNITSET: bcc @1 rts @1: + ; XXX do not allow illegal device numbers... above 30 or below 8 ? + ; Check what kind of device was requested cmp #$00 diff --git a/src/dos_m65/stubs.s b/src/dos_m65/stubs.s index 17c67de7..2c8a2052 100644 --- a/src/dos_m65/stubs.s +++ b/src/dos_m65/stubs.s @@ -5,18 +5,12 @@ dos_ACPTR: +nop dos_CIOUT: +nop -dos_LISTEN: - +nop dos_SECOND: +nop -dos_TALK: - +nop dos_TKSA: +nop -dos_UNTLK: - +nop -dos_UNLSN: - +nop sec rts + + From 04be4bf1d16af63f651e4e3a751989e378eae8b8 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 7 Feb 2021 12:39:18 +0100 Subject: [PATCH 199/257] work towards SECOND/TKSA in CBDOS --- Makefile | 6 ++- src/dos_m65/,aliases_dos.s | 13 ++++- src/dos_m65/dev_floppy/dev_fd_init.s | 22 +++++++++ src/dos_m65/dev_ramdisk/dev_rd_init.s | 22 +++++++++ src/dos_m65/dev_sdcard/dev_sd_init.s | 22 +++++++++ src/dos_m65/dos_acptr_ciout.s | 22 +++++++++ src/dos_m65/dos_error_strings.s | 6 +-- src/dos_m65/dos_init.s | 6 +++ .../{dos_listen_unlsn.s => dos_listen_talk.s} | 1 + src/dos_m65/dos_second_tksa.s | 47 +++++++++++++++++++ src/dos_m65/stubs.s | 16 ------- src/kernal/iec/acptr.s | 2 +- src/kernal/iec/tksa.s | 2 +- 13 files changed, 163 insertions(+), 24 deletions(-) create mode 100644 src/dos_m65/dev_floppy/dev_fd_init.s create mode 100644 src/dos_m65/dev_ramdisk/dev_rd_init.s create mode 100644 src/dos_m65/dev_sdcard/dev_sd_init.s create mode 100644 src/dos_m65/dos_acptr_ciout.s rename src/dos_m65/{dos_listen_unlsn.s => dos_listen_talk.s} (97%) create mode 100644 src/dos_m65/dos_second_tksa.s delete mode 100644 src/dos_m65/stubs.s diff --git a/Makefile b/Makefile index 782ad434..c2c1040a 100644 --- a/Makefile +++ b/Makefile @@ -61,7 +61,11 @@ SRCDIR_KERNAL = $(SRCDIR_COMMON) \ src/kernal/time SRCDIR_DOS_M65 = $(SRCDIR_COMMON) \ - src/dos_m65 + src/dos_m65 \ + src/dos_m65/dev_floppy \ + src/dos_m65/dev_ramdisk \ + src/dos_m65/dev_sdcard + SRCDIR_MON_M65 = $(SRCDIR_COMMON) \ src/mon_m65 diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index 96b2f5c2..a8b3e35b 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -21,5 +21,14 @@ ; General DOS status - !addr IDX_LISTENER = $8008 ; listener idx * 2, >=$80 = none - !addr IDX_TALKER = $8009 ; talker idx * 2, >=$80 = none + !addr IDX_LISTENER = $8008 ; listener idx * 2, >=$80 = none - for calling routines via vector table + !addr IDX_TALKER = $8009 ; talker idx * 2, >=$80 = none - for calling routines via vector table + + ; Free space: $800A-$806F + + !addr SD_STATUS_STR = $8070 ; status string for SD card, terminated by 0 + !addr SD_STATUS_IDX = $809F ; index byte for reading status + !addr FD_STATUS_STR = $80A0 ; status string for floppy drive, terminated by 0 + !addr FD_STATUS_IDX = $80CF ; index byte for reading status + !addr RD_STATUS_STR = $80D0 ; status string for ram disk, terminated by 0 + !addr RD_STATUS_IDX = $80FF ; index byte for reading status diff --git a/src/dos_m65/dev_floppy/dev_fd_init.s b/src/dos_m65/dev_floppy/dev_fd_init.s new file mode 100644 index 00000000..0d153d81 --- /dev/null +++ b/src/dos_m65/dev_floppy/dev_fd_init.s @@ -0,0 +1,22 @@ + +; +; Initializes DOS part of floppy controller +; + + +dev_fd_init: + + ; Copy status string + + ldx #$00 + stx FD_STATUS_IDX + dex +@1: + inx + lda dos_err_init_floppy,x + sta FD_STATUS_STR,x + bne @1 + + ; End of initialization + + rts diff --git a/src/dos_m65/dev_ramdisk/dev_rd_init.s b/src/dos_m65/dev_ramdisk/dev_rd_init.s new file mode 100644 index 00000000..227f8f31 --- /dev/null +++ b/src/dos_m65/dev_ramdisk/dev_rd_init.s @@ -0,0 +1,22 @@ + +; +; Initializes DOS part of ram disk +; + + +dev_rd_init: + + ; Copy status string + + ldx #$00 + stx RD_STATUS_IDX + dex +@1: + inx + lda dos_err_init_ramdisk,x + sta RD_STATUS_STR,x + bne @1 + + ; End of initialization + + rts diff --git a/src/dos_m65/dev_sdcard/dev_sd_init.s b/src/dos_m65/dev_sdcard/dev_sd_init.s new file mode 100644 index 00000000..afb799e8 --- /dev/null +++ b/src/dos_m65/dev_sdcard/dev_sd_init.s @@ -0,0 +1,22 @@ + +; +; Initializes DOS part of SD card +; + + +dev_sd_init: + + ; Copy status string + + ldx #$00 + stx SD_STATUS_IDX + dex +@1: + inx + lda dos_err_init_sdcard,x + sta SD_STATUS_STR,x + bne @1 + + ; End of initialization + + rts diff --git a/src/dos_m65/dos_acptr_ciout.s b/src/dos_m65/dos_acptr_ciout.s new file mode 100644 index 00000000..4b868ae5 --- /dev/null +++ b/src/dos_m65/dos_acptr_ciout.s @@ -0,0 +1,22 @@ + +; +; Implementation of ACPTR/CIOUT commands. +; For detailed description see 'm65dos_bridge.s' file. +; + + +dos_ACPTR: + + ; XXX provide implementation + + sec + rts + + + +dos_CIOUT: + + ; XXX provide implementation + + sec + rts diff --git a/src/dos_m65/dos_error_strings.s b/src/dos_m65/dos_error_strings.s index 91a69be4..2c72cfc6 100644 --- a/src/dos_m65/dos_error_strings.s +++ b/src/dos_m65/dos_error_strings.s @@ -9,15 +9,15 @@ dos_err_init_sdcard: - !pet "m65 dos sdcard", 0 + !pet "73,m65 dos sdcard,00,00", 0 dos_err_init_floppy: - !pet "m65 dos floppy", 0 + !pet "73,m65 dos floppy,00,00", 0 dos_err_init_ramdisk: - !pet "m65 dos ram disk", 0 + !pet "73,m65 dos ram disk,00,00", 0 ; List compiled from various manuals (CBM 1571, CBM 1581, CMD FD4000, MSD Super Disk, IDE64) diff --git a/src/dos_m65/dos_init.s b/src/dos_m65/dos_init.s index 2b537af7..e1bb14a6 100644 --- a/src/dos_m65/dos_init.s +++ b/src/dos_m65/dos_init.s @@ -37,4 +37,10 @@ dos_INIT: sta IDX_LISTENER sta IDX_TALKER + ; Initialize device handlers + + jsr dev_sd_init + jsr dev_fd_init + jsr dev_rd_init + rts diff --git a/src/dos_m65/dos_listen_unlsn.s b/src/dos_m65/dos_listen_talk.s similarity index 97% rename from src/dos_m65/dos_listen_unlsn.s rename to src/dos_m65/dos_listen_talk.s index e3bf5700..2855500c 100644 --- a/src/dos_m65/dos_listen_unlsn.s +++ b/src/dos_m65/dos_listen_talk.s @@ -72,6 +72,7 @@ dos_TALK_success: dos_fail_TALK_LISTEN: pla + lda #K_ERR_DEVICE_NOT_FOUND sec rts diff --git a/src/dos_m65/dos_second_tksa.s b/src/dos_m65/dos_second_tksa.s new file mode 100644 index 00000000..076f6850 --- /dev/null +++ b/src/dos_m65/dos_second_tksa.s @@ -0,0 +1,47 @@ + +; +; Implementation of SECOND/TKSA commands. +; For detailed description see 'm65dos_bridge.s' file. +; + + +dos_SECOND: + + ; XXX provide implementation + + sec + rts + + +dos_TKSA: + + pha + and #$60 + bne dos_TKSA_OPEN + pla + + ; XXX provide implementation + + sec + rts + + +dos_TKSA_OPEN: + + pla + and #$1F + cmp #$0F + beq dos_TKSA_OPEN_cmd + + ; XXX provide implementation + + sec + rts + + +dos_TKSA_OPEN_cmd: + + ; XXX provide implementation + + sec + rts diff --git a/src/dos_m65/stubs.s b/src/dos_m65/stubs.s deleted file mode 100644 index 2c8a2052..00000000 --- a/src/dos_m65/stubs.s +++ /dev/null @@ -1,16 +0,0 @@ - -; Dummy implementations - XXX to be replaced with real ones - -dos_ACPTR: - +nop -dos_CIOUT: - +nop -dos_SECOND: - +nop -dos_TKSA: - +nop - - sec - rts - - diff --git a/src/kernal/iec/acptr.s b/src/kernal/iec/acptr.s index 732d3b96..973f8bd4 100644 --- a/src/kernal/iec/acptr.s +++ b/src/kernal/iec/acptr.s @@ -24,7 +24,7 @@ ACPTR: !ifdef CONFIG_MB_M65 { jsr m65dos_check - +bcc m65dos_acptr ; branch if device is handeld by internal DOS + +bcc m65dos_acptr ; branch if device is handeld by internal DOS } !ifdef CONFIG_IEC { diff --git a/src/kernal/iec/tksa.s b/src/kernal/iec/tksa.s index 13563324..b9e9dee8 100644 --- a/src/kernal/iec/tksa.s +++ b/src/kernal/iec/tksa.s @@ -15,7 +15,7 @@ TKSA: -!ifdef CONFIG_MB_MEGA65 { +!ifdef CONFIG_MB_M65 { jsr m65dos_check +bcc m65dos_tksa ; branch if device is handeld by internal DOS From 49b9a13d14fe3ed6e8647d726c1bb15845fab8f2 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 7 Feb 2021 14:21:15 +0100 Subject: [PATCH 200/257] removed workaround for CPU DEW problem --- src/zvm_m65/zvm_cputest.s | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/zvm_m65/zvm_cputest.s b/src/zvm_m65/zvm_cputest.s index 407c449f..b23a84f9 100644 --- a/src/zvm_m65/zvm_cputest.s +++ b/src/zvm_m65/zvm_cputest.s @@ -111,12 +111,10 @@ ZVM_cputest: ; Copy up to 512 bytes from buffer to target memory - inw BIOS_LOADCOUNT ; XXX workaround for DEW not handling N flag - @loop3: dew BIOS_LOADCOUNT - beq @loop2 + bmi @loop2 lda [BIOS_IOBUFERPTR],z sta [BIOS_LOADPTR],z From d1b19c8739956c73d2db1f684286cf96f38fa14a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 8 Feb 2021 17:20:20 +0100 Subject: [PATCH 201/257] CBDOS can now return status --- src/,,config_mega65.s | 2 +- src/dos_m65/,aliases_dos.s | 21 +++++--- src/dos_m65/dos_acptr_ciout.s | 91 ++++++++++++++++++++++++++++++++++- src/dos_m65/dos_init.s | 6 ++- src/dos_m65/dos_listen_talk.s | 24 ++++++--- src/dos_m65/dos_second_tksa.s | 10 +++- tools/generate_strings.cc | 2 +- 7 files changed, 135 insertions(+), 21 deletions(-) diff --git a/src/,,config_mega65.s b/src/,,config_mega65.s index 59537149..6dcd28d8 100644 --- a/src/,,config_mega65.s +++ b/src/,,config_mega65.s @@ -66,7 +66,7 @@ ;; #CONFIG# KEYCMD_HELP "LIST" -;; #CONFIG# KEYCMD_F9 "REM F9" +;; #CONFIG# KEYCMD_F9 "@20$" ;; #CONFIG# KEYCMD_F10 "\5FL" ;; #CONFIG# KEYCMD_F11 "COLORSET 128" ;; #CONFIG# KEYCMD_F12 "\5FHF" diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index a8b3e35b..ec0002ae 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -21,14 +21,23 @@ ; General DOS status - !addr IDX_LISTENER = $8008 ; listener idx * 2, >=$80 = none - for calling routines via vector table - !addr IDX_TALKER = $8009 ; talker idx * 2, >=$80 = none - for calling routines via vector table + !addr IDX1_LISTENER = $8008 ; listener idx, >=$80 = none + !addr IDX2_LISTENER = $8009 ; listener idx * 2, >=$80 = none - for calling routines via vector table + !addr IDX1_TALKER = $800A ; talker idx, >=$80 = none + !addr IDX2_TALKER = $800B ; talker idx * 2, >=$80 = none - for calling routines via vector table - ; Free space: $800A-$806F + ; Free space: $800C-$8069 + + !addr XX_CHANNEL = $806A ; current channel + !addr SD_CHANNEL = $806A ; - SD card + !addr FD_CHANNEL = $806B ; - floppy + !addr RD_CHANNEL = $806C ; - ram disk + + !addr XX_STATUS_IDX = $806D ; index byte for reading status + !addr SD_STATUS_IDX = $806D ; - SD card + !addr FD_STATUS_IDX = $806E ; - floppy + !addr RD_STATUS_IDX = $806F ; - ram disk !addr SD_STATUS_STR = $8070 ; status string for SD card, terminated by 0 - !addr SD_STATUS_IDX = $809F ; index byte for reading status !addr FD_STATUS_STR = $80A0 ; status string for floppy drive, terminated by 0 - !addr FD_STATUS_IDX = $80CF ; index byte for reading status !addr RD_STATUS_STR = $80D0 ; status string for ram disk, terminated by 0 - !addr RD_STATUS_IDX = $80FF ; index byte for reading status diff --git a/src/dos_m65/dos_acptr_ciout.s b/src/dos_m65/dos_acptr_ciout.s index 4b868ae5..bee74e56 100644 --- a/src/dos_m65/dos_acptr_ciout.s +++ b/src/dos_m65/dos_acptr_ciout.s @@ -5,13 +5,89 @@ ; -dos_ACPTR: +dos_ACPTR: ; does not have to preserve .X - ; XXX provide implementation + ldx IDX1_TALKER + bmi dos_ACPTR_fail + + lda XX_CHANNEL, X + cmp #$0F + beq dos_ACPTR_status + + ; XXX providde implementation for non-status streams + + jmp dos_ACPTR_fail + +dos_ACPTR_status: + + ldx IDX2_TALKER + jsr (dos_ACPTR_getsts_table, X) + sta TBTCNT ; byte return + beq dos_ACPTR_reset_status + + ; XXX + + clc + rts + +dos_ACPTR_fail: + + ; XXX set error code sec rts +dos_ACPTR_reset_status: + + ; XXX replace status with OK instead + + ldx IDX1_TALKER + lda #$00 + sta XX_STATUS_IDX,x + + ; FALLTROUGH + +dos_ACPTR_eoi: + + jsr kernalstatus_EOI + + clc + rts + +dos_ACPTR_getsts_SD: ; get next byte of status - SD card + + ldx SD_STATUS_IDX + inc SD_STATUS_IDX + lda SD_STATUS_STR,x + rts + +dos_ACPTR_getsts_FD: ; get next byte of status - floppy + + ldx FD_STATUS_IDX + inc FD_STATUS_IDX + lda FD_STATUS_STR,x + rts + +dos_ACPTR_getsts_RD: ; get next byte of status - ram disk + + ldx RD_STATUS_IDX + inc RD_STATUS_IDX + lda RD_STATUS_STR,x + rts + + +dos_ACPTR_getsts_table: + + !word dos_ACPTR_getsts_SD + !word dos_ACPTR_getsts_FD + !word dos_ACPTR_getsts_RD + + + + + + + dos_CIOUT: @@ -20,3 +96,14 @@ dos_CIOUT: sec rts + + + +kernalstatus_EOI: + + ; XXX reuse original code instead + + lda IOSTATUS + ora #K_STS_EOI + sta IOSTATUS + rts diff --git a/src/dos_m65/dos_init.s b/src/dos_m65/dos_init.s index e1bb14a6..5cad08ed 100644 --- a/src/dos_m65/dos_init.s +++ b/src/dos_m65/dos_init.s @@ -34,8 +34,10 @@ dos_INIT: ; Clear listener / talker lda #$FF - sta IDX_LISTENER - sta IDX_TALKER + sta IDX1_LISTENER + sta IDX2_LISTENER + sta IDX1_TALKER + sta IDX2_TALKER ; Initialize device handlers diff --git a/src/dos_m65/dos_listen_talk.s b/src/dos_m65/dos_listen_talk.s index 2855500c..c959d435 100644 --- a/src/dos_m65/dos_listen_talk.s +++ b/src/dos_m65/dos_listen_talk.s @@ -22,19 +22,22 @@ dos_LISTEN: cmp UNIT_FLOPPY bne @2 - lda #$02 + lda #$01 bra dos_LISTEN_success @2: cmp UNIT_RAMDISK bne dos_fail_TALK_LISTEN - lda #$04 + lda #$02 ; FALLTROUGH dos_LISTEN_success: - sta IDX_LISTENER + sta IDX1_LISTENER + asl + sta IDX2_LISTENER + bra dos_common_LSN_TALK_UN ; TALK @@ -54,19 +57,22 @@ dos_TALK: cmp UNIT_FLOPPY bne @2 - lda #$02 + lda #$01 bra dos_TALK_success @2: cmp UNIT_RAMDISK bne dos_fail_TALK_LISTEN - lda #$04 + lda #$02 ; FALLTROUGH dos_TALK_success: - sta IDX_TALKER + sta IDX1_TALKER + asl + sta IDX2_TALKER + bra dos_common_LSN_TALK_UN dos_fail_TALK_LISTEN: @@ -82,14 +88,16 @@ dos_UNLSN: pha lda #$FF - sta IDX_LISTENER + sta IDX1_LISTENER + sta IDX2_LISTENER bra dos_common_LSN_TALK_UN dos_UNTLK: pha lda #$FF - sta IDX_TALKER + sta IDX1_TALKER + sta IDX2_TALKER ; FALLTROUGH diff --git a/src/dos_m65/dos_second_tksa.s b/src/dos_m65/dos_second_tksa.s index 076f6850..6ad101cb 100644 --- a/src/dos_m65/dos_second_tksa.s +++ b/src/dos_m65/dos_second_tksa.s @@ -15,6 +15,7 @@ dos_SECOND: dos_TKSA: + phx pha and #$60 bne dos_TKSA_OPEN @@ -22,6 +23,7 @@ dos_TKSA: ; XXX provide implementation + plx sec rts @@ -30,11 +32,16 @@ dos_TKSA_OPEN: pla and #$1F + + ldx IDX1_TALKER ; store channel + sta XX_CHANNEL, X + cmp #$0F beq dos_TKSA_OPEN_cmd ; XXX provide implementation + plx sec rts @@ -43,5 +50,6 @@ dos_TKSA_OPEN_cmd: ; XXX provide implementation - sec + plx + clc rts diff --git a/tools/generate_strings.cc b/tools/generate_strings.cc index 62c22dbd..424bed0a 100644 --- a/tools/generate_strings.cc +++ b/tools/generate_strings.cc @@ -1224,7 +1224,7 @@ void DataSet::generateConfigDepStrings() // CBDOS features - featureStrM65 += "CBDOS : CARD "; + featureStrM65 += "CBDOS : SDCARD "; // Keyboard support features From 2ea3ebe4b05b1229dab44bd7d19038cbc12bf374 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 8 Feb 2021 18:52:14 +0100 Subject: [PATCH 202/257] code size optimization --- Makefile | 2 +- .../{dos_acptr_ciout.s => dos_acptr.s} | 34 +++---------------- src/dos_m65/dos_ciout.s | 12 +++++++ src/dos_m65/dos_imports.s | 10 ++++++ 4 files changed, 28 insertions(+), 30 deletions(-) rename src/dos_m65/{dos_acptr_ciout.s => dos_acptr.s} (81%) create mode 100644 src/dos_m65/dos_ciout.s create mode 100644 src/dos_m65/dos_imports.s diff --git a/Makefile b/Makefile index c2c1040a..39316abc 100644 --- a/Makefile +++ b/Makefile @@ -394,7 +394,7 @@ $(DIR_M65)/kernal.seg_C $(DIR_M65)/KERNAL_C_combined.vs $(DIR_M65)/KERNAL_C_comb $(DIR_M65)/kernal.seg_1 $(DIR_M65)/KERNAL_1_combined.vs $(DIR_M65)/KERNAL_1_combined.sym: \ $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_KERNAL) $(CFG_M65) $(GEN_STR_M65) $(DIR_M65)/KERNAL_0_combined.sym $(DIR_M65)/dos.seg_1 $(DIR_M65)/DOS_1_combined.vs $(DIR_M65)/DOS_1_combined.sym: \ - $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_DOS_M65) $(CFG_M65) + $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_DOS_M65) $(CFG_M65) $(DIR_M65)/KERNAL_0_combined.sym $(DIR_M65)/mon.seg_1 $(DIR_M65)/MON_1_combined.vs $(DIR_M65)/MON_1_combined.sym: \ $(TOOL_ASSEMBLER) $(TOOL_BUILD_SEGMENT) $(DEP_MON_M65) $(CFG_M65) $(DIR_M65)/KERNAL_0_combined.sym $(DIR_M65)/BASIC_1_combined.sym $(DIR_M65)/zvm.seg_1 $(DIR_M65)/ZVM_1_combined.vs $(DIR_M65)/ZVM_1_combined.sym: \ diff --git a/src/dos_m65/dos_acptr_ciout.s b/src/dos_m65/dos_acptr.s similarity index 81% rename from src/dos_m65/dos_acptr_ciout.s rename to src/dos_m65/dos_acptr.s index bee74e56..f5a0a630 100644 --- a/src/dos_m65/dos_acptr_ciout.s +++ b/src/dos_m65/dos_acptr.s @@ -1,7 +1,6 @@ ; -; Implementation of ACPTR/CIOUT commands. -; For detailed description see 'm65dos_bridge.s' file. +; Implementation of ACPTR command. For detailed description see 'm65dos_bridge.s' file. ; @@ -54,6 +53,10 @@ dos_ACPTR_eoi: clc rts + + +; Retrieving bytes from the status string + dos_ACPTR_getsts_SD: ; get next byte of status - SD card ldx SD_STATUS_IDX @@ -75,35 +78,8 @@ dos_ACPTR_getsts_RD: ; get next byte of status - ram disk lda RD_STATUS_STR,x rts - dos_ACPTR_getsts_table: !word dos_ACPTR_getsts_SD !word dos_ACPTR_getsts_FD !word dos_ACPTR_getsts_RD - - - - - - - - - -dos_CIOUT: - - ; XXX provide implementation - - sec - rts - - - -kernalstatus_EOI: - - ; XXX reuse original code instead - - lda IOSTATUS - ora #K_STS_EOI - sta IOSTATUS - rts diff --git a/src/dos_m65/dos_ciout.s b/src/dos_m65/dos_ciout.s new file mode 100644 index 00000000..179b046f --- /dev/null +++ b/src/dos_m65/dos_ciout.s @@ -0,0 +1,12 @@ + +; +; Implementation of ACPTR command. For detailed description see 'm65dos_bridge.s' file. +; + + +dos_CIOUT: + + ; XXX provide implementation + + sec + rts diff --git a/src/dos_m65/dos_imports.s b/src/dos_m65/dos_imports.s new file mode 100644 index 00000000..6c427057 --- /dev/null +++ b/src/dos_m65/dos_imports.s @@ -0,0 +1,10 @@ + +;; #IMPORT# KERNAL_0 = KERNAL_0_combined.sym + +; +; Definitions for calling MEGA65 segment KERNAL_0 routines from DOS_1 +; + +;; #ALIAS# kernalstatus_EOI = KERNAL_0.kernalstatus_EOI +;; #ALIAS# kernalstatus_DEVICE_NOT_FOUND = KERNAL_0.kernalstatus_DEVICE_NOT_FOUND + From 59d8f215d7319e6a537169be617f6b3fb8df9e65 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 12 Feb 2021 18:07:13 +0100 Subject: [PATCH 203/257] erase status after reading error code --- Makefile | 1 + src/dos_m65/,aliases_dos.s | 1 + src/dos_m65/{ => assets}/dos_error_strings.s | 0 src/dos_m65/{ => assets}/dos_magicstr.s | 0 src/dos_m65/dos_acptr.s | 9 +- src/dos_m65/dos_error.s | 91 ++++++++++++++++++++ 6 files changed, 95 insertions(+), 7 deletions(-) rename src/dos_m65/{ => assets}/dos_error_strings.s (100%) rename src/dos_m65/{ => assets}/dos_magicstr.s (100%) create mode 100644 src/dos_m65/dos_error.s diff --git a/Makefile b/Makefile index 39316abc..07d5800e 100644 --- a/Makefile +++ b/Makefile @@ -62,6 +62,7 @@ SRCDIR_KERNAL = $(SRCDIR_COMMON) \ SRCDIR_DOS_M65 = $(SRCDIR_COMMON) \ src/dos_m65 \ + src/dos_m65/assets \ src/dos_m65/dev_floppy \ src/dos_m65/dev_ramdisk \ src/dos_m65/dev_sdcard diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index ec0002ae..657300b4 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -38,6 +38,7 @@ !addr FD_STATUS_IDX = $806E ; - floppy !addr RD_STATUS_IDX = $806F ; - ram disk + !addr XX_STATUS_STR = $8070 !addr SD_STATUS_STR = $8070 ; status string for SD card, terminated by 0 !addr FD_STATUS_STR = $80A0 ; status string for floppy drive, terminated by 0 !addr RD_STATUS_STR = $80D0 ; status string for ram disk, terminated by 0 diff --git a/src/dos_m65/dos_error_strings.s b/src/dos_m65/assets/dos_error_strings.s similarity index 100% rename from src/dos_m65/dos_error_strings.s rename to src/dos_m65/assets/dos_error_strings.s diff --git a/src/dos_m65/dos_magicstr.s b/src/dos_m65/assets/dos_magicstr.s similarity index 100% rename from src/dos_m65/dos_magicstr.s rename to src/dos_m65/assets/dos_magicstr.s diff --git a/src/dos_m65/dos_acptr.s b/src/dos_m65/dos_acptr.s index f5a0a630..50582e1b 100644 --- a/src/dos_m65/dos_acptr.s +++ b/src/dos_m65/dos_acptr.s @@ -24,8 +24,6 @@ dos_ACPTR_status: sta TBTCNT ; byte return beq dos_ACPTR_reset_status - ; XXX - clc rts @@ -38,11 +36,8 @@ dos_ACPTR_fail: dos_ACPTR_reset_status: - ; XXX replace status with OK instead - - ldx IDX1_TALKER - lda #$00 - sta XX_STATUS_IDX,x + lda IDX1_TALKER + jsr dos_status_00 ; FALLTROUGH diff --git a/src/dos_m65/dos_error.s b/src/dos_m65/dos_error.s new file mode 100644 index 00000000..490270c5 --- /dev/null +++ b/src/dos_m65/dos_error.s @@ -0,0 +1,91 @@ + +; +; Set current error or status +; + + +; XXX add methods for remaining codes +; XXX size-optimize this, move some parts into subroutines + + +; .A = 0 for SD card, 1 for FDD, 2 for RAM disk + +dos_status_00: ; OK + + pha + phx + phy + + ; Set status byte pointer to the beginning + + tax + lda #$00 + sta XX_STATUS_IDX, x + + ; Set .X to offset from XX_STATUS_STR + + lda dos_status_offset, x + tax + + ; Store '00,' + + lda #'0' + sta XX_STATUS_STR, x + inx + sta XX_STATUS_STR, x + inx + lda #',' + sta XX_STATUS_STR, x + inx + + ; Store 'OK' + + dex + ldy #$FF +@1: + inx + iny + lda dos_err_00, y + beq @2 + sta XX_STATUS_STR, x + bra @1 +@2: + ; Store ',00,00' + + lda #',' + sta XX_STATUS_STR, x + inx + lda #'0' + sta XX_STATUS_STR, x + inx + sta XX_STATUS_STR, x + inx + lda #',' + sta XX_STATUS_STR, x + inx + lda #'0' + sta XX_STATUS_STR, x + inx + sta XX_STATUS_STR, x + inx + + ; Store 0 (mark end of the status) + + lda #$00 + sta XX_STATUS_STR, x + + ; End + + ply + plx + pla + + clc ; mark status as OK + rts + + + + +dos_status_offset: + + !byte $00,$20,$40 From beefa98acc6e964705aab553b1870223f6343b8a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 12 Feb 2021 18:53:38 +0100 Subject: [PATCH 204/257] some work towards SECOND in the internal DOS --- src/dos_m65/dos_second_tksa.s | 42 +++++++++++++++++++++++++++++------ src/kernal/iec/open_iec.s | 9 +++----- 2 files changed, 38 insertions(+), 13 deletions(-) diff --git a/src/dos_m65/dos_second_tksa.s b/src/dos_m65/dos_second_tksa.s index 6ad101cb..071869a0 100644 --- a/src/dos_m65/dos_second_tksa.s +++ b/src/dos_m65/dos_second_tksa.s @@ -7,19 +7,25 @@ dos_SECOND: + phx + cmp #$60 + bcs dos_SECOND_OPEN + ; XXX provide implementation + plx sec rts +dos_SECOND_OPEN: -dos_TKSA: + and #$1F - phx - pha - and #$60 - bne dos_TKSA_OPEN - pla + ldx IDX1_LISTENER ; store channel + sta XX_CHANNEL, X + + cmp #$0F + beq dos_SECOND_OPEN_cmd ; XXX provide implementation @@ -28,9 +34,31 @@ dos_TKSA: rts +dos_SECOND_OPEN_cmd: + + ; XXX provide implementation + + plx + clc + rts + + + + +dos_TKSA: + + phx + cmp #$60 + bcs dos_TKSA_OPEN + + ; XXX provide implementation + + plx + sec + rts + dos_TKSA_OPEN: - pla and #$1F ldx IDX1_TALKER ; store channel diff --git a/src/kernal/iec/open_iec.s b/src/kernal/iec/open_iec.s index f0f94bc2..d4b5fb54 100644 --- a/src/kernal/iec/open_iec.s +++ b/src/kernal/iec/open_iec.s @@ -18,14 +18,11 @@ open_iec: ; We have a command to send to IEC device jsr LISTEN - bcc @1 - jmp kernalerror_DEVICE_NOT_FOUND -@1: + +bcs kernalerror_DEVICE_NOT_FOUND + lda SA jsr iec_cmd_open - bcc @2 - jmp kernalerror_DEVICE_NOT_FOUND -@2: + +bcs kernalerror_DEVICE_NOT_FOUND !ifdef CONFIG_MEMORY_MODEL_60K { ; We need our helpers to get to filenames under ROMs or IO area From 279adc1e0e0872fcf73b1d005f34c00b0c1672ab Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 12 Feb 2021 21:00:09 +0100 Subject: [PATCH 205/257] fixed improper SECOND/TKSA processing in CBDOS --- src/dos_m65/dos_second_tksa.s | 79 +++++++++++++---------------------- 1 file changed, 29 insertions(+), 50 deletions(-) diff --git a/src/dos_m65/dos_second_tksa.s b/src/dos_m65/dos_second_tksa.s index 071869a0..2c139500 100644 --- a/src/dos_m65/dos_second_tksa.s +++ b/src/dos_m65/dos_second_tksa.s @@ -7,77 +7,56 @@ dos_SECOND: + pha phx - cmp #$60 - bcs dos_SECOND_OPEN + phy - ; XXX provide implementation + ; First store the channel - plx - sec - rts - -dos_SECOND_OPEN: - - and #$1F + tay + and #$0F ; support channels 0-15, like 1541 drive ldx IDX1_LISTENER ; store channel - sta XX_CHANNEL, X + bmi dos_SECOND_done ; do nothing if no listener + sta XX_CHANNEL, x - cmp #$0F - beq dos_SECOND_OPEN_cmd + ; Determine command type + + tya + and #$F0 + + cmp #$F0 + beq dos_SECOND_OPEN + cmp #$E0 + beq dos_SECOND_CLOSE ; XXX provide implementation - plx - sec - rts +dos_SECOND_OPEN: ; XXX provide implementaation +dos_SECOND_CLOSE: ; XXX provide implementaation + ; finish -dos_SECOND_OPEN_cmd: - - ; XXX provide implementation - - plx - clc - rts - +dos_SECOND_done: + ply + bra dos_TKSA_done ; reuse part of TKSA code dos_TKSA: + pha phx - cmp #$60 - bcs dos_TKSA_OPEN - ; XXX provide implementation + and #$0F ; support channels 0-15, like 1541 drive - plx - sec - rts + ldx IDX1_TALKER ; store channel + bmi dos_TKSA_done ; do nothing if no taalker + sta XX_CHANNEL, x -dos_TKSA_OPEN: - - and #$1F - - ldx IDX1_TALKER ; store channel - sta XX_CHANNEL, X - - cmp #$0F - beq dos_TKSA_OPEN_cmd - - ; XXX provide implementation - - plx - sec - rts - - -dos_TKSA_OPEN_cmd: - - ; XXX provide implementation +dos_TKSA_done: plx + pla clc rts From 3e9581cb89dd7402fe40d6d6865f467860059b55 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Fri, 12 Feb 2021 21:25:06 +0100 Subject: [PATCH 206/257] fixed sending file name to CBDOS --- src/kernal/iec/iec_send_file_name.s | 48 ++++++++++++++++++++++++++--- 1 file changed, 43 insertions(+), 5 deletions(-) diff --git a/src/kernal/iec/iec_send_file_name.s b/src/kernal/iec/iec_send_file_name.s index 19cd316b..e32c76d3 100644 --- a/src/kernal/iec/iec_send_file_name.s +++ b/src/kernal/iec/iec_send_file_name.s @@ -11,11 +11,18 @@ iec_send_file_name: - ldy #0 + + ldy #$00 + +!ifdef CONFIG_MB_M65 { + jsr m65dos_check + +bcc m65dos_send_file_name_loop ; branch if device is handeld by internal DOS +} iec_send_file_name_loop: + cpy FNLEN - beq iec_send_file_name_done + +beq UNLSN !ifdef CONFIG_MEMORY_MODEL_60K { ldx # Date: Fri, 12 Feb 2021 22:47:46 +0100 Subject: [PATCH 207/257] more work on filename/command reception in CBDOS --- src/dos_m65/,aliases_dos.s | 17 ++++-- src/dos_m65/dev_floppy/dev_fd_cmd_close.s | 12 +++++ src/dos_m65/dev_floppy/dev_fd_cmd_open.s | 12 +++++ src/dos_m65/dev_floppy/dev_fd_init.s | 1 + src/dos_m65/dev_ramdisk/dev_rd_cmd_close.s | 12 +++++ src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s | 12 +++++ src/dos_m65/dev_ramdisk/dev_rd_init.s | 1 + src/dos_m65/dev_sdcard/dev_sd_cmd_close.s | 12 +++++ src/dos_m65/dev_sdcard/dev_sd_cmd_open.s | 12 +++++ src/dos_m65/dev_sdcard/dev_sd_init.s | 1 + src/dos_m65/dos_acptr.s | 2 +- src/dos_m65/dos_ciout.s | 63 +++++++++++++++++++++- src/dos_m65/dos_listen_talk.s | 4 +- src/dos_m65/dos_second_tksa.s | 23 +++++--- src/dos_m65/dos_vectable_dev.s | 18 +++++++ 15 files changed, 187 insertions(+), 15 deletions(-) create mode 100644 src/dos_m65/dev_floppy/dev_fd_cmd_close.s create mode 100644 src/dos_m65/dev_floppy/dev_fd_cmd_open.s create mode 100644 src/dos_m65/dev_ramdisk/dev_rd_cmd_close.s create mode 100644 src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s create mode 100644 src/dos_m65/dev_sdcard/dev_sd_cmd_close.s create mode 100644 src/dos_m65/dev_sdcard/dev_sd_cmd_open.s create mode 100644 src/dos_m65/dos_vectable_dev.s diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index 657300b4..68c1d1a0 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -28,10 +28,15 @@ ; Free space: $800C-$8069 - !addr XX_CHANNEL = $806A ; current channel - !addr SD_CHANNEL = $806A ; - SD card - !addr FD_CHANNEL = $806B ; - floppy - !addr RD_CHANNEL = $806C ; - ram disk + !addr XX_CHANNEL = $8067 ; current channel + !addr SD_CHANNEL = $8067 ; - SD card + !addr FD_CHANNEL = $8068 ; - floppy + !addr RD_CHANNEL = $8069 ; - ram disk + + !addr XX_CMDFN_IDX = $806A ; index byte for storing file name/command + !addr SD_CMDFN_IDX = $806A ; - SD card + !addr FD_CMDFN_IDX = $806B ; - floppy + !addr RD_CMDFN_IDX = $806C ; - ram disk !addr XX_STATUS_IDX = $806D ; index byte for reading status !addr SD_STATUS_IDX = $806D ; - SD card @@ -42,3 +47,7 @@ !addr SD_STATUS_STR = $8070 ; status string for SD card, terminated by 0 !addr FD_STATUS_STR = $80A0 ; status string for floppy drive, terminated by 0 !addr RD_STATUS_STR = $80D0 ; status string for ram disk, terminated by 0 + + !addr SD_CMDFN_BUF = $8100 ; buffer for command and/or file name, 128 bytes, SD card + !addr FD_CMDFN_BUF = $8180 ; buffer for command and/or file name, 128 bytes, floppy + !addr RD_CMDFN_BUF = $8200 ; buffer for command and/or file name, 128 bytes, ram disk diff --git a/src/dos_m65/dev_floppy/dev_fd_cmd_close.s b/src/dos_m65/dev_floppy/dev_fd_cmd_close.s new file mode 100644 index 00000000..09a06999 --- /dev/null +++ b/src/dos_m65/dev_floppy/dev_fd_cmd_close.s @@ -0,0 +1,12 @@ + +; +; Close currently opened file +; + + +dev_fd_cmd_CLOSE: + + ; XXX provide implementation + + sec + jmp dos_SECOND_done diff --git a/src/dos_m65/dev_floppy/dev_fd_cmd_open.s b/src/dos_m65/dev_floppy/dev_fd_cmd_open.s new file mode 100644 index 00000000..462309b1 --- /dev/null +++ b/src/dos_m65/dev_floppy/dev_fd_cmd_open.s @@ -0,0 +1,12 @@ + +; +; Open file for reading +; + + +dev_fd_cmd_OPEN: + + ; XXX provide implementation + + sec + jmp dos_SECOND_done diff --git a/src/dos_m65/dev_floppy/dev_fd_init.s b/src/dos_m65/dev_floppy/dev_fd_init.s index 0d153d81..5c3a8141 100644 --- a/src/dos_m65/dev_floppy/dev_fd_init.s +++ b/src/dos_m65/dev_floppy/dev_fd_init.s @@ -10,6 +10,7 @@ dev_fd_init: ldx #$00 stx FD_STATUS_IDX + stx FD_CMDFN_IDX dex @1: inx diff --git a/src/dos_m65/dev_ramdisk/dev_rd_cmd_close.s b/src/dos_m65/dev_ramdisk/dev_rd_cmd_close.s new file mode 100644 index 00000000..58be858d --- /dev/null +++ b/src/dos_m65/dev_ramdisk/dev_rd_cmd_close.s @@ -0,0 +1,12 @@ + +; +; Close currently opened file +; + + +dev_rd_cmd_CLOSE: + + ; XXX provide implementation + + sec + jmp dos_SECOND_done diff --git a/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s b/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s new file mode 100644 index 00000000..64f55a31 --- /dev/null +++ b/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s @@ -0,0 +1,12 @@ + +; +; Open file for reading +; + + +dev_rd_cmd_OPEN: + + ; XXX provide implementation + + sec + jmp dos_SECOND_done diff --git a/src/dos_m65/dev_ramdisk/dev_rd_init.s b/src/dos_m65/dev_ramdisk/dev_rd_init.s index 227f8f31..b5aad740 100644 --- a/src/dos_m65/dev_ramdisk/dev_rd_init.s +++ b/src/dos_m65/dev_ramdisk/dev_rd_init.s @@ -10,6 +10,7 @@ dev_rd_init: ldx #$00 stx RD_STATUS_IDX + stx RD_CMDFN_IDX dex @1: inx diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_close.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_close.s new file mode 100644 index 00000000..b6e75e00 --- /dev/null +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_close.s @@ -0,0 +1,12 @@ + +; +; Close currently opened file +; + + +dev_sd_cmd_CLOSE: + + ; XXX provide implementation + + sec + jmp dos_SECOND_done diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s new file mode 100644 index 00000000..61a504c6 --- /dev/null +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s @@ -0,0 +1,12 @@ + +; +; Open file for reading +; + + +dev_sd_cmd_OPEN: + + ; XXX provide implementation + + sec + jmp dos_SECOND_done diff --git a/src/dos_m65/dev_sdcard/dev_sd_init.s b/src/dos_m65/dev_sdcard/dev_sd_init.s index afb799e8..b12689e2 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_init.s +++ b/src/dos_m65/dev_sdcard/dev_sd_init.s @@ -10,6 +10,7 @@ dev_sd_init: ldx #$00 stx SD_STATUS_IDX + stx SD_CMDFN_IDX dex @1: inx diff --git a/src/dos_m65/dos_acptr.s b/src/dos_m65/dos_acptr.s index 50582e1b..35d2658c 100644 --- a/src/dos_m65/dos_acptr.s +++ b/src/dos_m65/dos_acptr.s @@ -50,7 +50,7 @@ dos_ACPTR_eoi: -; Retrieving bytes from the status string +; Sending bytes from the status string dos_ACPTR_getsts_SD: ; get next byte of status - SD card diff --git a/src/dos_m65/dos_ciout.s b/src/dos_m65/dos_ciout.s index 179b046f..7549b070 100644 --- a/src/dos_m65/dos_ciout.s +++ b/src/dos_m65/dos_ciout.s @@ -6,7 +6,66 @@ dos_CIOUT: - ; XXX provide implementation + pha + phx - sec + ; XXX handle cases of transferring data + + ; Receive command/file name byte + + ldx IDX2_TALKER + jsr (dos_CIOUT_putcmdfn_table, X) + + plx + pla + + clc rts + + + + + +; Receiving command/file name + +dos_CIOUT_putcmdfn_SD: ; get next byte of status - SD card + + ldx SD_CMDFN_IDX + sta SD_CMDFN_IDX,x + inx + bpl @1 + ldx #$7F +@1: + lda #$00 + sta SD_CMDFN_IDX,x + rts + +dos_CIOUT_putcmdfn_FD: ; get next byte of status - floppy + + ldx FD_CMDFN_IDX + sta FD_CMDFN_IDX,x + inx + bpl @1 + ldx #$7F +@1: + lda #$00 + sta FD_CMDFN_IDX,x + rts + +dos_CIOUT_putcmdfn_RD: ; get next byte of status - ram disk + + ldx RD_CMDFN_IDX + sta RD_CMDFN_IDX,x + inx + bpl @1 + ldx #$7F +@1: + lda #$00 + sta RD_CMDFN_IDX,x + rts + +dos_CIOUT_putcmdfn_table: + + !word dos_CIOUT_putcmdfn_SD + !word dos_CIOUT_putcmdfn_FD + !word dos_CIOUT_putcmdfn_RD diff --git a/src/dos_m65/dos_listen_talk.s b/src/dos_m65/dos_listen_talk.s index c959d435..72dbd45d 100644 --- a/src/dos_m65/dos_listen_talk.s +++ b/src/dos_m65/dos_listen_talk.s @@ -36,7 +36,9 @@ dos_LISTEN_success: sta IDX1_LISTENER asl - sta IDX2_LISTENER + sta IDX2_LISTENER + + ; XXX should we reset XX_CMDFN_IDX ? bra dos_common_LSN_TALK_UN diff --git a/src/dos_m65/dos_second_tksa.s b/src/dos_m65/dos_second_tksa.s index 2c139500..8b8ee56c 100644 --- a/src/dos_m65/dos_second_tksa.s +++ b/src/dos_m65/dos_second_tksa.s @@ -16,9 +16,9 @@ dos_SECOND: tay and #$0F ; support channels 0-15, like 1541 drive - ldx IDX1_LISTENER ; store channel + ldx IDX1_LISTENER bmi dos_SECOND_done ; do nothing if no listener - sta XX_CHANNEL, x + sta XX_CHANNEL, x ; store channel ; Determine command type @@ -32,10 +32,17 @@ dos_SECOND: ; XXX provide implementation -dos_SECOND_OPEN: ; XXX provide implementaation -dos_SECOND_CLOSE: ; XXX provide implementaation + bra dos_SECOND_done - ; finish +dos_SECOND_OPEN: + + ldx IDX2_LISTENER + jmp (dos_cmd_OPEN_vectable, x) + +dos_SECOND_CLOSE: + + ldx IDX2_LISTENER + jmp (dos_cmd_CLOSE_vectable, x) dos_SECOND_done: @@ -50,9 +57,11 @@ dos_TKSA: and #$0F ; support channels 0-15, like 1541 drive - ldx IDX1_TALKER ; store channel + ldx IDX1_TALKER bmi dos_TKSA_done ; do nothing if no taalker - sta XX_CHANNEL, x + sta XX_CHANNEL, x ; store channel + + ; FALLTROUGH dos_TKSA_done: diff --git a/src/dos_m65/dos_vectable_dev.s b/src/dos_m65/dos_vectable_dev.s new file mode 100644 index 00000000..7881735f --- /dev/null +++ b/src/dos_m65/dos_vectable_dev.s @@ -0,0 +1,18 @@ + +; +; Vector tables to device-specific routines +; + + +dos_cmd_OPEN_vectable: + + !word dev_sd_cmd_OPEN + !word dev_fd_cmd_OPEN + !word dev_rd_cmd_OPEN + + +dos_cmd_CLOSE_vectable: + + !word dev_sd_cmd_CLOSE + !word dev_fd_cmd_CLOSE + !word dev_rd_cmd_CLOSE From 13c675990440f170977f024fdab7635f68d3339c Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 13 Feb 2021 14:50:10 +0100 Subject: [PATCH 208/257] rework in CBDOS --- src/dos_m65/,aliases_dos.s | 30 +++-- src/dos_m65/4020.dos_vectable.s | 16 +-- src/dos_m65/dev_floppy/dev_fd_cmd_close.s | 3 +- src/dos_m65/dev_floppy/dev_fd_cmd_open.s | 3 +- src/dos_m65/dev_floppy/dev_fd_init.s | 1 + src/dos_m65/dev_ramdisk/dev_rd_cmd_close.s | 3 +- src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s | 3 +- src/dos_m65/dev_ramdisk/dev_rd_init.s | 1 + src/dos_m65/dev_sdcard/dev_sd_cmd_close.s | 3 +- src/dos_m65/dev_sdcard/dev_sd_cmd_open.s | 6 +- src/dos_m65/dev_sdcard/dev_sd_init.s | 1 + src/dos_m65/dos_acptr.s | 80 ------------- src/dos_m65/dos_ciout.s | 71 ----------- src/dos_m65/dos_enter_exit.s | 54 +++++++++ src/dos_m65/dos_error.s | 9 -- src/dos_m65/dos_init.s | 9 +- src/dos_m65/dos_listen_talk.s | 110 ------------------ src/dos_m65/dos_memchk.s | 7 -- src/dos_m65/dos_second_tksa.s | 71 ----------- src/dos_m65/dos_unitchk.s | 19 +-- src/dos_m65/dos_unitnum.s | 19 +-- src/dos_m65/dos_unitset.s | 12 +- .../{dos_vectable_dev.s => dos_vectab_dev.s} | 4 +- src/dos_m65/msg_acptr.s | 86 ++++++++++++++ src/dos_m65/msg_ciout.s | 74 ++++++++++++ src/dos_m65/msg_listen.s | 54 +++++++++ src/dos_m65/msg_second.s | 49 ++++++++ src/dos_m65/msg_talk.s | 52 +++++++++ src/dos_m65/msg_tksa.s | 22 ++++ src/dos_m65/msg_unlsn_untlk.s | 25 ++++ 30 files changed, 485 insertions(+), 412 deletions(-) delete mode 100644 src/dos_m65/dos_acptr.s delete mode 100644 src/dos_m65/dos_ciout.s create mode 100644 src/dos_m65/dos_enter_exit.s delete mode 100644 src/dos_m65/dos_listen_talk.s delete mode 100644 src/dos_m65/dos_second_tksa.s rename src/dos_m65/{dos_vectable_dev.s => dos_vectab_dev.s} (80%) create mode 100644 src/dos_m65/msg_acptr.s create mode 100644 src/dos_m65/msg_ciout.s create mode 100644 src/dos_m65/msg_listen.s create mode 100644 src/dos_m65/msg_second.s create mode 100644 src/dos_m65/msg_talk.s create mode 100644 src/dos_m65/msg_tksa.s create mode 100644 src/dos_m65/msg_unlsn_untlk.s diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index 68c1d1a0..5c40c77a 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -13,20 +13,34 @@ !addr MAGICSTR = $8000 ; magic string; if not matching, DOS considered non-functional + ; Register storage + + !addr REG_A = $8005 + !addr REG_X = $8006 + !addr REG_Y = $8007 + !addr REG_Z = $8008 + + ; Reserved: $8009 - $800C + ; General DOS configuration - !addr UNIT_SDCARD = $8005 ; unit number for device, 0 = none - !addr UNIT_FLOPPY = $8006 ; as above - !addr UNIT_RAMDISK = $8007 ; as above + !addr UNIT_SDCARD = $800D ; unit number for device, 0 = none + !addr UNIT_FLOPPY = $800E ; as above + !addr UNIT_RAMDISK = $800F ; as above ; General DOS status - !addr IDX1_LISTENER = $8008 ; listener idx, >=$80 = none - !addr IDX2_LISTENER = $8009 ; listener idx * 2, >=$80 = none - for calling routines via vector table - !addr IDX1_TALKER = $800A ; talker idx, >=$80 = none - !addr IDX2_TALKER = $800B ; talker idx * 2, >=$80 = none - for calling routines via vector table + !addr IDX1_LISTENER = $8010 ; listener idx, >=$80 = none + !addr IDX2_LISTENER = $8011 ; listener idx * 2, >=$80 = none - for calling routines via vector table + !addr IDX1_TALKER = $8012 ; talker idx, >=$80 = none + !addr IDX2_TALKER = $8013 ; talker idx * 2, >=$80 = none - for calling routines via vector table - ; Free space: $800C-$8069 + ; Free space: $8014-$8063 + + !addr XX_MODE = $8064 ; current mode (0 = none, 1 = receiving command/file name) + !addr SD_MODE = $8064 ; - SD card + !addr FD_MODE = $8065 ; - floppy + !addr RD_MODE = $8066 ; - ram disk !addr XX_CHANNEL = $8067 ; current channel !addr SD_CHANNEL = $8067 ; - SD card diff --git a/src/dos_m65/4020.dos_vectable.s b/src/dos_m65/4020.dos_vectable.s index 8df00ad4..fb940b73 100644 --- a/src/dos_m65/4020.dos_vectable.s +++ b/src/dos_m65/4020.dos_vectable.s @@ -5,11 +5,11 @@ !word dos_UNITCHK !word dos_UNITSET !word dos_UNITNUM -!word dos_ACPTR -!word dos_CIOUT -!word dos_LISTEN -!word dos_SECOND -!word dos_TALK -!word dos_TKSA -!word dos_UNTLK -!word dos_UNLSN +!word msg_ACPTR +!word msg_CIOUT +!word msg_LISTEN +!word msg_SECOND +!word msg_TALK +!word msg_TKSA +!word msg_UNTLK +!word msg_UNLSN diff --git a/src/dos_m65/dev_floppy/dev_fd_cmd_close.s b/src/dos_m65/dev_floppy/dev_fd_cmd_close.s index 09a06999..cf2b6b6f 100644 --- a/src/dos_m65/dev_floppy/dev_fd_cmd_close.s +++ b/src/dos_m65/dev_floppy/dev_fd_cmd_close.s @@ -8,5 +8,4 @@ dev_fd_cmd_CLOSE: ; XXX provide implementation - sec - jmp dos_SECOND_done + jmp dos_EXIT_SEC diff --git a/src/dos_m65/dev_floppy/dev_fd_cmd_open.s b/src/dos_m65/dev_floppy/dev_fd_cmd_open.s index 462309b1..eeca8192 100644 --- a/src/dos_m65/dev_floppy/dev_fd_cmd_open.s +++ b/src/dos_m65/dev_floppy/dev_fd_cmd_open.s @@ -8,5 +8,4 @@ dev_fd_cmd_OPEN: ; XXX provide implementation - sec - jmp dos_SECOND_done + jmp dos_EXIT_SEC diff --git a/src/dos_m65/dev_floppy/dev_fd_init.s b/src/dos_m65/dev_floppy/dev_fd_init.s index 5c3a8141..fbaddd33 100644 --- a/src/dos_m65/dev_floppy/dev_fd_init.s +++ b/src/dos_m65/dev_floppy/dev_fd_init.s @@ -11,6 +11,7 @@ dev_fd_init: ldx #$00 stx FD_STATUS_IDX stx FD_CMDFN_IDX + stx FD_MODE dex @1: inx diff --git a/src/dos_m65/dev_ramdisk/dev_rd_cmd_close.s b/src/dos_m65/dev_ramdisk/dev_rd_cmd_close.s index 58be858d..87575b81 100644 --- a/src/dos_m65/dev_ramdisk/dev_rd_cmd_close.s +++ b/src/dos_m65/dev_ramdisk/dev_rd_cmd_close.s @@ -8,5 +8,4 @@ dev_rd_cmd_CLOSE: ; XXX provide implementation - sec - jmp dos_SECOND_done + jmp dos_EXIT_SEC diff --git a/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s b/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s index 64f55a31..46eceb62 100644 --- a/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s +++ b/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s @@ -8,5 +8,4 @@ dev_rd_cmd_OPEN: ; XXX provide implementation - sec - jmp dos_SECOND_done + jmp dos_EXIT_SEC diff --git a/src/dos_m65/dev_ramdisk/dev_rd_init.s b/src/dos_m65/dev_ramdisk/dev_rd_init.s index b5aad740..352cf003 100644 --- a/src/dos_m65/dev_ramdisk/dev_rd_init.s +++ b/src/dos_m65/dev_ramdisk/dev_rd_init.s @@ -11,6 +11,7 @@ dev_rd_init: ldx #$00 stx RD_STATUS_IDX stx RD_CMDFN_IDX + stx RD_MODE dex @1: inx diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_close.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_close.s index b6e75e00..af8ca747 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_close.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_close.s @@ -8,5 +8,4 @@ dev_sd_cmd_CLOSE: ; XXX provide implementation - sec - jmp dos_SECOND_done + jmp dos_EXIT diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s index 61a504c6..b104f0ba 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s @@ -6,7 +6,7 @@ dev_sd_cmd_OPEN: - ; XXX provide implementation + lda #$01 ; mode: receive command or file name + sta SD_MODE - sec - jmp dos_SECOND_done + jmp dos_EXIT diff --git a/src/dos_m65/dev_sdcard/dev_sd_init.s b/src/dos_m65/dev_sdcard/dev_sd_init.s index b12689e2..cf47aa11 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_init.s +++ b/src/dos_m65/dev_sdcard/dev_sd_init.s @@ -11,6 +11,7 @@ dev_sd_init: ldx #$00 stx SD_STATUS_IDX stx SD_CMDFN_IDX + stx SD_MODE dex @1: inx diff --git a/src/dos_m65/dos_acptr.s b/src/dos_m65/dos_acptr.s deleted file mode 100644 index 35d2658c..00000000 --- a/src/dos_m65/dos_acptr.s +++ /dev/null @@ -1,80 +0,0 @@ - -; -; Implementation of ACPTR command. For detailed description see 'm65dos_bridge.s' file. -; - - -dos_ACPTR: ; does not have to preserve .X - - ldx IDX1_TALKER - bmi dos_ACPTR_fail - - lda XX_CHANNEL, X - cmp #$0F - beq dos_ACPTR_status - - ; XXX providde implementation for non-status streams - - jmp dos_ACPTR_fail - -dos_ACPTR_status: - - ldx IDX2_TALKER - jsr (dos_ACPTR_getsts_table, X) - sta TBTCNT ; byte return - beq dos_ACPTR_reset_status - - clc - rts - -dos_ACPTR_fail: - - ; XXX set error code - - sec - rts - -dos_ACPTR_reset_status: - - lda IDX1_TALKER - jsr dos_status_00 - - ; FALLTROUGH - -dos_ACPTR_eoi: - - jsr kernalstatus_EOI - - clc - rts - - - -; Sending bytes from the status string - -dos_ACPTR_getsts_SD: ; get next byte of status - SD card - - ldx SD_STATUS_IDX - inc SD_STATUS_IDX - lda SD_STATUS_STR,x - rts - -dos_ACPTR_getsts_FD: ; get next byte of status - floppy - - ldx FD_STATUS_IDX - inc FD_STATUS_IDX - lda FD_STATUS_STR,x - rts - -dos_ACPTR_getsts_RD: ; get next byte of status - ram disk - - ldx RD_STATUS_IDX - inc RD_STATUS_IDX - lda RD_STATUS_STR,x - rts - -dos_ACPTR_getsts_table: - - !word dos_ACPTR_getsts_SD - !word dos_ACPTR_getsts_FD - !word dos_ACPTR_getsts_RD diff --git a/src/dos_m65/dos_ciout.s b/src/dos_m65/dos_ciout.s deleted file mode 100644 index 7549b070..00000000 --- a/src/dos_m65/dos_ciout.s +++ /dev/null @@ -1,71 +0,0 @@ - -; -; Implementation of ACPTR command. For detailed description see 'm65dos_bridge.s' file. -; - - -dos_CIOUT: - - pha - phx - - ; XXX handle cases of transferring data - - ; Receive command/file name byte - - ldx IDX2_TALKER - jsr (dos_CIOUT_putcmdfn_table, X) - - plx - pla - - clc - rts - - - - - -; Receiving command/file name - -dos_CIOUT_putcmdfn_SD: ; get next byte of status - SD card - - ldx SD_CMDFN_IDX - sta SD_CMDFN_IDX,x - inx - bpl @1 - ldx #$7F -@1: - lda #$00 - sta SD_CMDFN_IDX,x - rts - -dos_CIOUT_putcmdfn_FD: ; get next byte of status - floppy - - ldx FD_CMDFN_IDX - sta FD_CMDFN_IDX,x - inx - bpl @1 - ldx #$7F -@1: - lda #$00 - sta FD_CMDFN_IDX,x - rts - -dos_CIOUT_putcmdfn_RD: ; get next byte of status - ram disk - - ldx RD_CMDFN_IDX - sta RD_CMDFN_IDX,x - inx - bpl @1 - ldx #$7F -@1: - lda #$00 - sta RD_CMDFN_IDX,x - rts - -dos_CIOUT_putcmdfn_table: - - !word dos_CIOUT_putcmdfn_SD - !word dos_CIOUT_putcmdfn_FD - !word dos_CIOUT_putcmdfn_RD diff --git a/src/dos_m65/dos_enter_exit.s b/src/dos_m65/dos_enter_exit.s new file mode 100644 index 00000000..12b524fe --- /dev/null +++ b/src/dos_m65/dos_enter_exit.s @@ -0,0 +1,54 @@ + +; Helper routines for entering/exiting the context + + + +dos_ENTER: ; enter DOS context + + sta REG_A + stx REG_X + sty REG_Y + stz REG_Z + + rts + + +dos_EXIT_SEC: ; exit DOS context with Carry set + + sec + bra dos_EXIT_common + +dos_EXIT: ; exit DOS context with Carry clear + + clc + + ; FALLTROUGH + +dos_EXIT_common: + + ldz REG_Z + ldy REG_Y + ldx REG_X + lda REG_A + + rts + + +dos_EXIT_A_SEC: ; exit DOS context with Carry set, return .A + + sec + bra dos_EXIT_A_common + +dos_EXIT_A: ; exit DOS context with Carry clear, return .A + + clc + + ; FALLTROUGH + +dos_EXIT_A_common: + + ldz REG_Z + ldy REG_Y + ldx REG_X + + rts diff --git a/src/dos_m65/dos_error.s b/src/dos_m65/dos_error.s index 490270c5..d8859e04 100644 --- a/src/dos_m65/dos_error.s +++ b/src/dos_m65/dos_error.s @@ -12,10 +12,6 @@ dos_status_00: ; OK - pha - phx - phy - ; Set status byte pointer to the beginning tax @@ -76,11 +72,6 @@ dos_status_00: ; OK ; End - ply - plx - pla - - clc ; mark status as OK rts diff --git a/src/dos_m65/dos_init.s b/src/dos_m65/dos_init.s index 5cad08ed..53784393 100644 --- a/src/dos_m65/dos_init.s +++ b/src/dos_m65/dos_init.s @@ -10,9 +10,10 @@ dos_INIT: + jsr dos_ENTER + ; Set the magic string 'CBDOS' - phx ldx #$04 @1: lda dos_magicstr, x @@ -20,8 +21,6 @@ dos_INIT: dex bpl @1 - plx - ; Set default device numbers lda #CONFIG_UNIT_SDCARD @@ -45,4 +44,6 @@ dos_INIT: jsr dev_fd_init jsr dev_rd_init - rts + ; Exit DOS context + + jmp dos_EXIT diff --git a/src/dos_m65/dos_listen_talk.s b/src/dos_m65/dos_listen_talk.s deleted file mode 100644 index 72dbd45d..00000000 --- a/src/dos_m65/dos_listen_talk.s +++ /dev/null @@ -1,110 +0,0 @@ - -; -; Implementation of LISTEN/UNLSN/TALK/UNTLK commands. -; For detailed description see 'm65dos_bridge.s' file. -; - - -; LISTEN - -dos_LISTEN: - - pha - and #$1F - beq dos_fail_TALK_LISTEN ; branch if device 0 (used to denote lack of device) - - cmp UNIT_SDCARD - bne @1 - - lda #$00 - bra dos_LISTEN_success -@1: - cmp UNIT_FLOPPY - bne @2 - - lda #$01 - bra dos_LISTEN_success -@2: - cmp UNIT_RAMDISK - bne dos_fail_TALK_LISTEN - - lda #$02 - - ; FALLTROUGH - -dos_LISTEN_success: - - sta IDX1_LISTENER - asl - sta IDX2_LISTENER - - ; XXX should we reset XX_CMDFN_IDX ? - - bra dos_common_LSN_TALK_UN - -; TALK - -dos_TALK: - - pha - and #$1F - beq dos_fail_TALK_LISTEN ; branch if device 0 (used to denote lack of device) - - cmp UNIT_SDCARD - bne @1 - - lda #$00 - bra dos_TALK_success -@1: - cmp UNIT_FLOPPY - bne @2 - - lda #$01 - bra dos_TALK_success -@2: - cmp UNIT_RAMDISK - bne dos_fail_TALK_LISTEN - - lda #$02 - - ; FALLTROUGH - -dos_TALK_success: - - sta IDX1_TALKER - asl - sta IDX2_TALKER - - bra dos_common_LSN_TALK_UN - -dos_fail_TALK_LISTEN: - - pla - lda #K_ERR_DEVICE_NOT_FOUND - sec - rts - -; UNLSN / UNTLK - -dos_UNLSN: - - pha - lda #$FF - sta IDX1_LISTENER - sta IDX2_LISTENER - bra dos_common_LSN_TALK_UN - -dos_UNTLK: - - pha - lda #$FF - sta IDX1_TALKER - sta IDX2_TALKER - - ; FALLTROUGH - -dos_common_LSN_TALK_UN: - - pla - clc - rts diff --git a/src/dos_m65/dos_memchk.s b/src/dos_m65/dos_memchk.s index 62eea52d..683a33a5 100644 --- a/src/dos_m65/dos_memchk.s +++ b/src/dos_m65/dos_memchk.s @@ -8,9 +8,6 @@ dos_MEMCHK: ; Check for magic string - pha - phx - ldx #$04 @1: lda MAGICSTR, x @@ -19,14 +16,10 @@ dos_MEMCHK: dex bpl @1 - plx - pla clc rts @fail: - plx - pla sec rts diff --git a/src/dos_m65/dos_second_tksa.s b/src/dos_m65/dos_second_tksa.s deleted file mode 100644 index 8b8ee56c..00000000 --- a/src/dos_m65/dos_second_tksa.s +++ /dev/null @@ -1,71 +0,0 @@ - -; -; Implementation of SECOND/TKSA commands. -; For detailed description see 'm65dos_bridge.s' file. -; - - -dos_SECOND: - - pha - phx - phy - - ; First store the channel - - tay - and #$0F ; support channels 0-15, like 1541 drive - - ldx IDX1_LISTENER - bmi dos_SECOND_done ; do nothing if no listener - sta XX_CHANNEL, x ; store channel - - ; Determine command type - - tya - and #$F0 - - cmp #$F0 - beq dos_SECOND_OPEN - cmp #$E0 - beq dos_SECOND_CLOSE - - ; XXX provide implementation - - bra dos_SECOND_done - -dos_SECOND_OPEN: - - ldx IDX2_LISTENER - jmp (dos_cmd_OPEN_vectable, x) - -dos_SECOND_CLOSE: - - ldx IDX2_LISTENER - jmp (dos_cmd_CLOSE_vectable, x) - -dos_SECOND_done: - - ply - bra dos_TKSA_done ; reuse part of TKSA code - - -dos_TKSA: - - pha - phx - - and #$0F ; support channels 0-15, like 1541 drive - - ldx IDX1_TALKER - bmi dos_TKSA_done ; do nothing if no taalker - sta XX_CHANNEL, x ; store channel - - ; FALLTROUGH - -dos_TKSA_done: - - plx - pla - clc - rts diff --git a/src/dos_m65/dos_unitchk.s b/src/dos_m65/dos_unitchk.s index ee94d898..ad5dc9a4 100644 --- a/src/dos_m65/dos_unitchk.s +++ b/src/dos_m65/dos_unitchk.s @@ -6,10 +6,12 @@ dos_UNITCHK: + jsr dos_ENTER + ; Check if memory content is not damaged jsr dos_MEMCHK - bcs dos_UNITCHK_none + bcs dos_UNITCHK_fail ; Check for unit @@ -22,10 +24,9 @@ dos_UNITCHK: ; FALLTROUGH -dos_UNITCHK_none: +dos_UNITCHK_fail: - sec - rts + jmp dos_EXIT_SEC dos_UNITCHK_sdcard: @@ -44,13 +45,5 @@ dos_UNITCHK_floppy: dos_UNITCHK_ramdisk: lda #$02 - - clc - rts -dos_UNITCHK_mem_fail: - - plx - pla - sec - rts + jmp dos_EXIT_A diff --git a/src/dos_m65/dos_unitnum.s b/src/dos_m65/dos_unitnum.s index c0bc9509..dbdc3c99 100644 --- a/src/dos_m65/dos_unitnum.s +++ b/src/dos_m65/dos_unitnum.s @@ -6,10 +6,13 @@ dos_UNITNUM: + jsr dos_ENTER + ; Check if memory content is not damaged jsr dos_MEMCHK - bcs dos_UNITNUM_none + bcs dos_UNITNUM_fail + lda REG_A ; Check what kind of device was requested @@ -22,12 +25,11 @@ dos_UNITNUM: ; FALLTROUGH -dos_UNITNUM_none: +dos_UNITNUM_fail: lda #$00 - sec - rts + jmp dos_EXIT_A_SEC dos_UNITNUM_sdcard: @@ -42,13 +44,12 @@ dos_UNITNUM_floppy: dos_UNITNUM_ramdisk: lda UNIT_RAMDISK - bra dos_UNITNUM_common + + ; FALLTROUGH dos_UNITNUM_common: cmp #$00 - beq dos_UNITNUM_none - - clc - rts + beq dos_UNITNUM_fail + jmp dos_EXIT_A diff --git a/src/dos_m65/dos_unitset.s b/src/dos_m65/dos_unitset.s index 9ef2326b..2de4eebe 100644 --- a/src/dos_m65/dos_unitset.s +++ b/src/dos_m65/dos_unitset.s @@ -6,6 +6,8 @@ dos_UNITSET: + jsr dos_ENTER + ; Check if memory content is not damaged jsr dos_MEMCHK @@ -18,14 +20,13 @@ dos_UNITSET: cmp #$00 beq dos_UNITSET_sdcard - ; XXX devioces below are not implemented yet + ; XXX devices below are not implemented yet ; cmp #$01 ; beq dos_UNITSET_floppy ; cmp #$02 ; beq dos_UNITSET_ramdisk - sec - rts + jmp dos_EXIT_SEC dos_UNITSET_sdcard: @@ -45,7 +46,4 @@ dos_UNITSET_ramdisk: stx UNIT_RAMDISK - ; FALLTROUGH - - clc - rts + jmp dos_EXIT diff --git a/src/dos_m65/dos_vectable_dev.s b/src/dos_m65/dos_vectab_dev.s similarity index 80% rename from src/dos_m65/dos_vectable_dev.s rename to src/dos_m65/dos_vectab_dev.s index 7881735f..d11f837c 100644 --- a/src/dos_m65/dos_vectable_dev.s +++ b/src/dos_m65/dos_vectab_dev.s @@ -4,14 +4,14 @@ ; -dos_cmd_OPEN_vectable: +dos_cmd_OPEN_vectab: !word dev_sd_cmd_OPEN !word dev_fd_cmd_OPEN !word dev_rd_cmd_OPEN -dos_cmd_CLOSE_vectable: +dos_cmd_CLOSE_vectab: !word dev_sd_cmd_CLOSE !word dev_fd_cmd_CLOSE diff --git a/src/dos_m65/msg_acptr.s b/src/dos_m65/msg_acptr.s new file mode 100644 index 00000000..431cea6f --- /dev/null +++ b/src/dos_m65/msg_acptr.s @@ -0,0 +1,86 @@ + +; +; Implementation of ACPTR command. For detailed description see 'm65dos_bridge.s' file. +; + + +msg_ACPTR: + + jsr dos_ENTER + + ; Check if there is a talker active + + ldx IDX1_TALKER + bmi msg_ACPTR_fail + + ; Check if active channel is status one + + lda XX_CHANNEL, X + cmp #$0F + beq msg_ACPTR_status + + ; XXX providde implementation for non-status channels + + jmp msg_ACPTR_fail + +msg_ACPTR_status: + + ldx IDX2_TALKER + jmp (msg_ACPTR_status_vectab, X) + +msg_ACPTR_status_SD: ; get next byte of status - SD card + + ldx SD_STATUS_IDX + inc SD_STATUS_IDX + lda SD_STATUS_STR,x + bra msg_ACPTR_status_got + +msg_ACPTR_status_FD: ; get next byte of status - floppy + + ldx FD_STATUS_IDX + inc FD_STATUS_IDX + lda FD_STATUS_STR,x + bra msg_ACPTR_status_got + +msg_ACPTR_status_RD: ; get next byte of status - ram disk + + ldx RD_STATUS_IDX + inc RD_STATUS_IDX + lda RD_STATUS_STR,x + + ; FALLTROUGH + +msg_ACPTR_status_got: + + sta TBTCNT ; byte return + beq msg_ACPTR_reset_status + + jmp dos_EXIT + +msg_ACPTR_fail: + + ; XXX set error code + + jmp dos_EXIT_SEC + +msg_ACPTR_reset_status: + + lda IDX1_TALKER + jsr dos_status_00 + + ; FALLTROUGH + +msg_ACPTR_eoi: + + jsr kernalstatus_EOI + jmp dos_EXIT_SEC + + + +; Vector tables for jumps + +msg_ACPTR_status_vectab: + + !word msg_ACPTR_status_SD + !word msg_ACPTR_status_FD + !word msg_ACPTR_status_RD diff --git a/src/dos_m65/msg_ciout.s b/src/dos_m65/msg_ciout.s new file mode 100644 index 00000000..e62e376d --- /dev/null +++ b/src/dos_m65/msg_ciout.s @@ -0,0 +1,74 @@ + +; +; Implementation of ACPTR command. For detailed description see 'm65dos_bridge.s' file. +; + + +msg_CIOUT: + + jsr dos_ENTER + + ; Check operation mode + + ldx IDX1_LISTENER + lda XX_MODE, x + + cmp #$01 + bne @1 + + ; Receiving command or file name + + ldx IDX2_TALKER + jmp (msg_CIOUT_cmdfn_vectab, X) +@1: + ; XXX handle cases of transferring data + + jmp dos_EXIT_SEC + + + + + +; Receiving command/file name + +msg_CIOUT_cmdfn_SD: ; get next byte of status - SD card + + ldx SD_CMDFN_IDX + sta SD_CMDFN_IDX,x + inx + bpl @1 + ldx #$7F +@1: + lda #$00 + sta SD_CMDFN_IDX,x + jmp dos_EXIT + +msg_CIOUT_cmdfn_FD: ; get next byte of status - floppy + + ldx FD_CMDFN_IDX + sta FD_CMDFN_IDX,x + inx + bpl @1 + ldx #$7F +@1: + lda #$00 + sta FD_CMDFN_IDX,x + jmp dos_EXIT + +msg_CIOUT_cmdfn_RD: ; get next byte of status - ram disk + + ldx RD_CMDFN_IDX + sta RD_CMDFN_IDX,x + inx + bpl @1 + ldx #$7F +@1: + lda #$00 + sta RD_CMDFN_IDX,x + jmp dos_EXIT + +msg_CIOUT_cmdfn_vectab: + + !word msg_CIOUT_cmdfn_SD + !word msg_CIOUT_cmdfn_FD + !word msg_CIOUT_cmdfn_RD diff --git a/src/dos_m65/msg_listen.s b/src/dos_m65/msg_listen.s new file mode 100644 index 00000000..ee0e2d79 --- /dev/null +++ b/src/dos_m65/msg_listen.s @@ -0,0 +1,54 @@ + +; +; Implementation of LISTEN commands. +; For detailed description see 'm65dos_bridge.s' file. +; + + +msg_LISTEN: + + jsr dos_ENTER + + and #$1F + beq msg_LISTEN_fail ; branch if device 0 (used to denote lack of device) + + cmp UNIT_SDCARD + bne @1 + + ; LISTEN on SD card + + lda #$00 + bra msg_LISTEN_success +@1: + cmp UNIT_FLOPPY + bne @2 + + ; LISTEN on floppy + + lda #$01 + bra msg_LISTEN_success +@2: + cmp UNIT_RAMDISK + bne msg_LISTEN_fail + + ; LISTEN on ram disk + + lda #$02 + + ; FALLTROUGH + +msg_LISTEN_success: + + sta IDX1_LISTENER + asl + sta IDX2_LISTENER + + ; XXX should we reset XX_CMDFN_IDX ? + + jmp dos_EXIT + +msg_LISTEN_fail: + + lda #K_ERR_DEVICE_NOT_FOUND + + jmp dos_EXIT_A_SEC diff --git a/src/dos_m65/msg_second.s b/src/dos_m65/msg_second.s new file mode 100644 index 00000000..febd686e --- /dev/null +++ b/src/dos_m65/msg_second.s @@ -0,0 +1,49 @@ + +; +; Implementation of SECOND command. +; For detailed description see 'm65dos_bridge.s' file. +; + + +msg_SECOND: + + jsr dos_ENTER + + ; First store the channel + + tay + and #$0F ; support channels 0-15, like 1541 drive + + ldx IDX1_LISTENER + bmi msg_SECOND_done ; do nothing if no listener + sta XX_CHANNEL, x ; store channel + + ; Determine command type + + tya + and #$F0 + + cmp #$F0 + beq msg_SECOND_OPEN + cmp #$E0 + beq msg_SECOND_CLOSE + + ; XXX provide implementation + + ; FALLTROUGH + +msg_SECOND_done: + + jmp dos_EXIT + +msg_SECOND_OPEN: + + lda #$00 + sta XX_CMDFN_IDX, x ; reset the index to the command/filename + ldx IDX2_LISTENER + jmp (dos_cmd_OPEN_vectab, x) + +msg_SECOND_CLOSE: + + ldx IDX2_LISTENER + jmp (dos_cmd_CLOSE_vectab, x) diff --git a/src/dos_m65/msg_talk.s b/src/dos_m65/msg_talk.s new file mode 100644 index 00000000..24381ecb --- /dev/null +++ b/src/dos_m65/msg_talk.s @@ -0,0 +1,52 @@ + +; +; Implementation of TALK commands. +; For detailed description see 'm65dos_bridge.s' file. +; + + +msg_TALK: + + jsr dos_ENTER + + and #$1F + beq msg_TALK_fail ; branch if device 0 (used to denote lack of device) + + cmp UNIT_SDCARD + bne @1 + + ; TALK on SD card + + lda #$00 + bra msg_TALK_success +@1: + cmp UNIT_FLOPPY + bne @2 + + ; TALK on floppy + + lda #$01 + bra msg_TALK_success +@2: + cmp UNIT_RAMDISK + bne msg_TALK_fail + + ; TALK on ram disk + + lda #$02 + + ; FALLTROUGH + +msg_TALK_success: + + sta IDX1_TALKER + asl + sta IDX2_TALKER + + jmp dos_EXIT + +msg_TALK_fail: + + lda #K_ERR_DEVICE_NOT_FOUND + + jmp dos_EXIT_A_SEC diff --git a/src/dos_m65/msg_tksa.s b/src/dos_m65/msg_tksa.s new file mode 100644 index 00000000..9df0a4ca --- /dev/null +++ b/src/dos_m65/msg_tksa.s @@ -0,0 +1,22 @@ + +; +; Implementation of TKSA commands. +; For detailed description see 'm65dos_bridge.s' file. +; + + +msg_TKSA: + + jsr dos_ENTER + + and #$0F ; support channels 0-15, like 1541 drive + + ldx IDX1_TALKER + bmi msg_TKSA_done ; do nothing if no taalker + sta XX_CHANNEL, x ; store channel + + ; FALLTROUGH + +msg_TKSA_done: + + jmp dos_EXIT diff --git a/src/dos_m65/msg_unlsn_untlk.s b/src/dos_m65/msg_unlsn_untlk.s new file mode 100644 index 00000000..a61a7993 --- /dev/null +++ b/src/dos_m65/msg_unlsn_untlk.s @@ -0,0 +1,25 @@ + +; +; Implementation of UNLSN/UNTLK messages. +; For detailed description see 'm65dos_bridge.s' file. +; + + +msg_UNLSN: + + jsr dos_ENTER + + lda #$FF + sta IDX1_LISTENER + sta IDX2_LISTENER + + jmp dos_EXIT + +msg_UNTLK: + + jsr dos_ENTER + + sta IDX1_TALKER + sta IDX2_TALKER + + jmp dos_EXIT From 61e2c7f5e505ee3fa250b0e46abf07cb6452b6a4 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sat, 13 Feb 2021 17:46:50 +0100 Subject: [PATCH 209/257] fixed regressions due to rework --- src/dos_m65/dos_unitchk.s | 1 + src/dos_m65/msg_acptr.s | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/dos_m65/dos_unitchk.s b/src/dos_m65/dos_unitchk.s index ad5dc9a4..16317d41 100644 --- a/src/dos_m65/dos_unitchk.s +++ b/src/dos_m65/dos_unitchk.s @@ -12,6 +12,7 @@ dos_UNITCHK: jsr dos_MEMCHK bcs dos_UNITCHK_fail + lda REG_A ; Check for unit diff --git a/src/dos_m65/msg_acptr.s b/src/dos_m65/msg_acptr.s index 431cea6f..44d13ea3 100644 --- a/src/dos_m65/msg_acptr.s +++ b/src/dos_m65/msg_acptr.s @@ -55,7 +55,7 @@ msg_ACPTR_status_got: sta TBTCNT ; byte return beq msg_ACPTR_reset_status - jmp dos_EXIT + jmp dos_EXIT_A msg_ACPTR_fail: @@ -73,7 +73,7 @@ msg_ACPTR_reset_status: msg_ACPTR_eoi: jsr kernalstatus_EOI - jmp dos_EXIT_SEC + jmp dos_EXIT From 578be0bcc8bc2a5039b4945cfb09bb3aeeac44e3 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 14 Feb 2021 12:07:10 +0100 Subject: [PATCH 210/257] work towards directory reading in CBDOS --- src/dos_m65/,aliases_dos.s | 29 +++++++++ src/dos_m65/assets/dos_error_strings.s | 4 +- src/dos_m65/assets/dos_parts_dir.s | 33 ++++++++++ src/dos_m65/dev_floppy/dev_fd_cmd_open.s | 6 ++ src/dos_m65/dev_floppy/dev_fd_cmd_read.s | 12 ++++ src/dos_m65/dev_floppy/dev_fd_init.s | 4 ++ src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s | 6 ++ src/dos_m65/dev_ramdisk/dev_rd_cmd_read.s | 12 ++++ src/dos_m65/dev_ramdisk/dev_rd_init.s | 4 ++ src/dos_m65/dev_sdcard/dev_sd_cmd_open.s | 40 +++++++++++++ src/dos_m65/dev_sdcard/dev_sd_cmd_read.s | 12 ++++ src/dos_m65/dev_sdcard/dev_sd_init.s | 4 ++ src/dos_m65/dos_init.s | 12 ++++ src/dos_m65/dos_memchk.s | 18 ++++++ src/dos_m65/msg_acptr.s | 73 +++++++++++++++++++++-- src/dos_m65/msg_ciout.s | 16 ++++- tools/generate_strings.cc | 2 +- 17 files changed, 277 insertions(+), 10 deletions(-) create mode 100644 src/dos_m65/assets/dos_parts_dir.s create mode 100644 src/dos_m65/dev_floppy/dev_fd_cmd_read.s create mode 100644 src/dos_m65/dev_ramdisk/dev_rd_cmd_read.s create mode 100644 src/dos_m65/dev_sdcard/dev_sd_cmd_read.s diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index 5c40c77a..011b88cf 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -35,8 +35,37 @@ !addr IDX1_TALKER = $8012 ; talker idx, >=$80 = none !addr IDX2_TALKER = $8013 ; talker idx * 2, >=$80 = none - for calling routines via vector table + ; Various temporary data + + !addr XX_DIR_PHASE = $8014 ; directory output phase, values deponds on device driver + !addr SD_DIR_PHASE = $8014 ; - SD card + !addr FD_DIR_PHASE = $8015 ; - floppy + !addr RD_DIR_PHASE = $8016 ; - ram disk + + + ; Free space: $8014-$8063 + !addr SD_ACPTR_helper = $8052 ; subroutine in RAM to read a byte + !addr code_LDA_01 = $8052 ; - LDA instruction + !addr SD_ACPTR_PTR = $8053 ; - 2 bytes; address in buffer, SD card + !addr code_RTS_01 = $8055 ; - RTS instruction + + !addr FD_ACPTR_helper = $8056 ; subroutine in RAM to read a byte + !addr code_LDA_02 = $8056 ; - LDA instruction + !addr FD_ACPTR_PTR = $8057 ; - 2 bytes; address in buffer, floppy + !addr code_RTS_02 = $8059 ; - RTS instruction + + !addr RD_ACPTR_helper = $805A ; subroutine in RAM to read a byte + !addr code_LDA_03 = $805A ; - LDA instruction + !addr RD_ACPTR_PTR = $805B ; - 2 bytes; address in buffer, ram disk + !addr code_RTS_03 = $805D ; - RTS instruction + + !addr XX_ACPTR_LEN = $805E ; 2 bytes - length of data left for ACPTR + !addr SD_ACPTR_LEN = $805E ; - SD card + !addr FD_ACPTR_LEN = $8060 ; - floppy + !addr RD_ACPTR_LEN = $8062 ; - ram disk + !addr XX_MODE = $8064 ; current mode (0 = none, 1 = receiving command/file name) !addr SD_MODE = $8064 ; - SD card !addr FD_MODE = $8065 ; - floppy diff --git a/src/dos_m65/assets/dos_error_strings.s b/src/dos_m65/assets/dos_error_strings.s index 2c72cfc6..922d9dfa 100644 --- a/src/dos_m65/assets/dos_error_strings.s +++ b/src/dos_m65/assets/dos_error_strings.s @@ -9,7 +9,7 @@ dos_err_init_sdcard: - !pet "73,m65 dos sdcard,00,00", 0 + !pet "73,m65 dos sd card,00,00", 0 dos_err_init_floppy: @@ -25,7 +25,7 @@ dos_err_init_ramdisk: dos_err_00: ; not an error - !pet "ok", 0 + !pet " ok", 0 dos_err_01: ; not an error diff --git a/src/dos_m65/assets/dos_parts_dir.s b/src/dos_m65/assets/dos_parts_dir.s new file mode 100644 index 00000000..c9929dfb --- /dev/null +++ b/src/dos_m65/assets/dos_parts_dir.s @@ -0,0 +1,33 @@ + +; +; Data used to generate directory in CBM BASIC format +; + +dir_hdr: ; 32 bytes - header + + !byte $01, $08 ; program location + !byte $01, $01 ; link to the next line - dummy, will be regenerated by BASIC + !byte $00, $00 ; line number 0 + !byte $12, $22 ; reverse mode, quote + !pet " " ; space for disk/directory name + !byte $22, $20 ; quote, space + !pet "00 2a" ; default ID, disk format + !byte $00 ; end of the line + +dir_hdr_sd: ; 32 bytes - header + + !byte $01, $08 ; program location + !byte $01, $01 ; link to the next line - dummy, will be regenerated by BASIC + !byte $00, $00 ; line number 0 + !byte $12, $22 ; reverse mode, quote + !pet "SD CARD " ; space for disk/directory name + !byte $22, $20 ; quote, space + !pet "fat32" ; filesystem + !byte $00 ; end of the line + +dir_end: ; 19 bytes + + !byte $01, $01 ; link to the next line - dummy, will be regenerated by BASIC + !byte $00, $00 ; line number 0 + !pet "blocks free." + !byte $00, $00, $00 ; end of the line, end of program marker diff --git a/src/dos_m65/dev_floppy/dev_fd_cmd_open.s b/src/dos_m65/dev_floppy/dev_fd_cmd_open.s index eeca8192..1358ab93 100644 --- a/src/dos_m65/dev_floppy/dev_fd_cmd_open.s +++ b/src/dos_m65/dev_floppy/dev_fd_cmd_open.s @@ -9,3 +9,9 @@ dev_fd_cmd_OPEN: ; XXX provide implementation jmp dos_EXIT_SEC + +dev_fd_cmd_OPEN_EOI: + + ; XXX provide implementation + + jmp dos_EXIT diff --git a/src/dos_m65/dev_floppy/dev_fd_cmd_read.s b/src/dos_m65/dev_floppy/dev_fd_cmd_read.s new file mode 100644 index 00000000..1ef268af --- /dev/null +++ b/src/dos_m65/dev_floppy/dev_fd_cmd_read.s @@ -0,0 +1,12 @@ + +; +; Read more data into the buffer +; + + +dev_fd_cmd_READ: + + ; XXX provide implementation + + sec ; mark EOI + rts diff --git a/src/dos_m65/dev_floppy/dev_fd_init.s b/src/dos_m65/dev_floppy/dev_fd_init.s index fbaddd33..09791d41 100644 --- a/src/dos_m65/dev_floppy/dev_fd_init.s +++ b/src/dos_m65/dev_floppy/dev_fd_init.s @@ -12,6 +12,10 @@ dev_fd_init: stx FD_STATUS_IDX stx FD_CMDFN_IDX stx FD_MODE + stx FD_ACPTR_LEN+0 + stx FD_ACPTR_LEN+1 + stx FD_ACPTR_PTR+0 + stx FD_ACPTR_PTR+1 dex @1: inx diff --git a/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s b/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s index 46eceb62..50d2c5f7 100644 --- a/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s +++ b/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s @@ -9,3 +9,9 @@ dev_rd_cmd_OPEN: ; XXX provide implementation jmp dos_EXIT_SEC + +dev_rd_cmd_OPEN_EOI: + + ; XXX provide implementation + + jmp dos_EXIT diff --git a/src/dos_m65/dev_ramdisk/dev_rd_cmd_read.s b/src/dos_m65/dev_ramdisk/dev_rd_cmd_read.s new file mode 100644 index 00000000..36a95300 --- /dev/null +++ b/src/dos_m65/dev_ramdisk/dev_rd_cmd_read.s @@ -0,0 +1,12 @@ + +; +; Read more data into the buffer +; + + +dev_rd_cmd_READ: + + ; XXX provide implementation + + sec ; mark EOI + rts diff --git a/src/dos_m65/dev_ramdisk/dev_rd_init.s b/src/dos_m65/dev_ramdisk/dev_rd_init.s index 352cf003..fbe87e3b 100644 --- a/src/dos_m65/dev_ramdisk/dev_rd_init.s +++ b/src/dos_m65/dev_ramdisk/dev_rd_init.s @@ -12,6 +12,10 @@ dev_rd_init: stx RD_STATUS_IDX stx RD_CMDFN_IDX stx RD_MODE + stx RD_ACPTR_LEN+0 + stx RD_ACPTR_LEN+1 + stx RD_ACPTR_PTR+0 + stx RD_ACPTR_PTR+1 dex @1: inx diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s index b104f0ba..25a0575a 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s @@ -10,3 +10,43 @@ dev_sd_cmd_OPEN: sta SD_MODE jmp dos_EXIT + +dev_sd_cmd_OPEN_EOI: + + ; XXX this dispatcher is temporary + + ; XXX add support for second card + + lda SD_CMDFN_BUF + cmp '$' + beq dev_sd_cmd_OPEN_dir + + ; XXX implement for file names + + jmp dos_EXIT_SEC + + +dev_sd_cmd_OPEN_dir: + + ; XXX add support for filtering + + ; Initialize 1st directory phase - header + + lda #$01 + sta SD_DIR_PHASE + + ; Provide pointer and length of the header + + lda #$20 + sta SD_ACPTR_PTR+0 + lda #$00 + sta SD_ACPTR_PTR+1 + + lda #dir_hdr_sd + sta SD_ACPTR_PTR+1 + + ; End + + jmp dos_EXIT diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s new file mode 100644 index 00000000..302f7142 --- /dev/null +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s @@ -0,0 +1,12 @@ + +; +; Read more data into the buffer +; + + +dev_sd_cmd_READ: + + ; XXX provide implementation + + sec ; mark EOI + rts diff --git a/src/dos_m65/dev_sdcard/dev_sd_init.s b/src/dos_m65/dev_sdcard/dev_sd_init.s index cf47aa11..95b0f144 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_init.s +++ b/src/dos_m65/dev_sdcard/dev_sd_init.s @@ -12,6 +12,10 @@ dev_sd_init: stx SD_STATUS_IDX stx SD_CMDFN_IDX stx SD_MODE + stx SD_ACPTR_LEN+0 + stx SD_ACPTR_LEN+1 + stx SD_ACPTR_PTR+0 + stx SD_ACPTR_PTR+1 dex @1: inx diff --git a/src/dos_m65/dos_init.s b/src/dos_m65/dos_init.s index 53784393..66a81d8c 100644 --- a/src/dos_m65/dos_init.s +++ b/src/dos_m65/dos_init.s @@ -44,6 +44,18 @@ dos_INIT: jsr dev_fd_init jsr dev_rd_init + ; Initialize helper code in RAM + + lda #$AD ; LDA opcode, absolute + sta code_LDA_01 + sta code_LDA_02 + sta code_LDA_03 + + lda #$60 ; RTS opcode + sta code_RTS_01 + sta code_RTS_02 + sta code_RTS_03 + ; Exit DOS context jmp dos_EXIT diff --git a/src/dos_m65/dos_memchk.s b/src/dos_m65/dos_memchk.s index 683a33a5..f646228b 100644 --- a/src/dos_m65/dos_memchk.s +++ b/src/dos_m65/dos_memchk.s @@ -16,6 +16,24 @@ dos_MEMCHK: dex bpl @1 + ; Check if helper code is undamaged + + lda #$AD + cmp code_LDA_01 + bne @fail + cmp code_LDA_02 + bne @fail + cmp code_LDA_03 + bne @fail + + lda #$60 + cmp code_RTS_01 + bne @fail + cmp code_RTS_02 + bne @fail + cmp code_RTS_03 + bne @fail + clc rts diff --git a/src/dos_m65/msg_acptr.s b/src/dos_m65/msg_acptr.s index 44d13ea3..1d521567 100644 --- a/src/dos_m65/msg_acptr.s +++ b/src/dos_m65/msg_acptr.s @@ -11,7 +11,7 @@ msg_ACPTR: ; Check if there is a talker active ldx IDX1_TALKER - bmi msg_ACPTR_fail + bmi msg_ACPTR_fail_no_talker ; Check if active channel is status one @@ -19,9 +19,65 @@ msg_ACPTR: cmp #$0F beq msg_ACPTR_status - ; XXX providde implementation for non-status channels + ; XXX add support for read contexts (multiple channels) - jmp msg_ACPTR_fail + ; Not a status channel - check if we have something to read out + + ldx IDX2_TALKER + lda XX_ACPTR_LEN+0,x + ora XX_ACPTR_LEN+1,x + beq msg_ACPTR_fail_no_data + + ; Read a byte of data from the buffer + + jmp (msg_ACPTR_read_vectab, X) + +msg_ACPTR_read_SD: + + ; Read and return one byte + + jsr SD_ACPTR_helper + sta TBTCNT + + ; Increment pointer, decrement length + + inc SD_ACPTR_PTR+0 + bne @1 + inc SD_ACPTR_PTR+1 +@1: + dec SD_ACPTR_LEN+0 + lda SD_ACPTR_LEN+0 + cmp #$FF + bne @2 + dec SD_ACPTR_LEN+1 +@2: + ; If new length is 0, try to read next block of data + + ora SD_ACPTR_LEN+1 + bne @3 + jsr dev_sd_cmd_READ + bcc @3 + jsr kernalstatus_EOI +@3: + jmp dos_EXIT + + +msg_ACPTR_read_FD: + + ; XXX provide implementation + + +msg_ACPTR_read_RD: + + ; XXX provide implementation + + +msg_ACPTR_fail_no_data: + + ; XXX What should be the reaction when trying to read and no data is present? + + sta TBTCNT + bra msg_ACPTR_EOI msg_ACPTR_status: @@ -57,7 +113,7 @@ msg_ACPTR_status_got: jmp dos_EXIT_A -msg_ACPTR_fail: +msg_ACPTR_fail_no_talker: ; XXX set error code @@ -70,13 +126,12 @@ msg_ACPTR_reset_status: ; FALLTROUGH -msg_ACPTR_eoi: +msg_ACPTR_EOI: jsr kernalstatus_EOI jmp dos_EXIT - ; Vector tables for jumps msg_ACPTR_status_vectab: @@ -84,3 +139,9 @@ msg_ACPTR_status_vectab: !word msg_ACPTR_status_SD !word msg_ACPTR_status_FD !word msg_ACPTR_status_RD + +msg_ACPTR_read_vectab: + + !word msg_ACPTR_read_SD + !word msg_ACPTR_read_FD + !word msg_ACPTR_read_RD diff --git a/src/dos_m65/msg_ciout.s b/src/dos_m65/msg_ciout.s index e62e376d..3885020c 100644 --- a/src/dos_m65/msg_ciout.s +++ b/src/dos_m65/msg_ciout.s @@ -7,10 +7,12 @@ msg_CIOUT: jsr dos_ENTER + php ; Check operation mode ldx IDX1_LISTENER + bmi msg_CIOUT_fail lda XX_MODE, x cmp #$01 @@ -18,14 +20,20 @@ msg_CIOUT: ; Receiving command or file name - ldx IDX2_TALKER + ldx IDX2_LISTENER jmp (msg_CIOUT_cmdfn_vectab, X) @1: ; XXX handle cases of transferring data + plp jmp dos_EXIT_SEC +msg_CIOUT_fail: + ; XXX should we set status? + lda #K_ERR_DEVICE_NOT_FOUND + + jmp dos_EXIT_A_SEC @@ -41,6 +49,8 @@ msg_CIOUT_cmdfn_SD: ; get next byte of status - SD card @1: lda #$00 sta SD_CMDFN_IDX,x + plp + +bcs dev_sd_cmd_OPEN_EOI ; if EOI - execute command jmp dos_EXIT msg_CIOUT_cmdfn_FD: ; get next byte of status - floppy @@ -53,6 +63,8 @@ msg_CIOUT_cmdfn_FD: ; get next byte of status - floppy @1: lda #$00 sta FD_CMDFN_IDX,x + plp + +bcs dev_fd_cmd_OPEN_EOI ; if EOI - execute command jmp dos_EXIT msg_CIOUT_cmdfn_RD: ; get next byte of status - ram disk @@ -65,6 +77,8 @@ msg_CIOUT_cmdfn_RD: ; get next byte of status - ram disk @1: lda #$00 sta RD_CMDFN_IDX,x + plp + +bcs dev_rd_cmd_OPEN_EOI ; if EOI - execute command jmp dos_EXIT msg_CIOUT_cmdfn_vectab: diff --git a/tools/generate_strings.cc b/tools/generate_strings.cc index 424bed0a..78191819 100644 --- a/tools/generate_strings.cc +++ b/tools/generate_strings.cc @@ -1224,7 +1224,7 @@ void DataSet::generateConfigDepStrings() // CBDOS features - featureStrM65 += "CBDOS : SDCARD "; + featureStrM65 += "CBDOS : SD CARD "; // Keyboard support features From 8fdeda81dee50a9a8359058cc5e99cd73fdaedd1 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 14 Feb 2021 13:51:20 +0100 Subject: [PATCH 211/257] CBDOS fixes --- src/dos_m65/dev_sdcard/dev_sd_cmd_open.s | 6 +++--- src/dos_m65/dos_imports.s | 2 ++ src/dos_m65/msg_ciout.s | 16 ++++++++++------ 3 files changed, 15 insertions(+), 9 deletions(-) diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s index 25a0575a..5a043e60 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s @@ -18,7 +18,7 @@ dev_sd_cmd_OPEN_EOI: ; XXX add support for second card lda SD_CMDFN_BUF - cmp '$' + cmp #'$' beq dev_sd_cmd_OPEN_dir ; XXX implement for file names @@ -38,9 +38,9 @@ dev_sd_cmd_OPEN_dir: ; Provide pointer and length of the header lda #$20 - sta SD_ACPTR_PTR+0 + sta SD_ACPTR_LEN+0 lda #$00 - sta SD_ACPTR_PTR+1 + sta SD_ACPTR_LEN+1 lda # Date: Sun, 14 Feb 2021 14:49:57 +0100 Subject: [PATCH 212/257] DOS Wedge now prints our empty SD card directory --- src/dos_m65/assets/dos_parts_dir.s | 2 +- src/dos_m65/dev_sdcard/dev_sd_cmd_read.s | 22 +++++++++++++++++++++- src/dos_m65/msg_acptr.s | 2 ++ 3 files changed, 24 insertions(+), 2 deletions(-) diff --git a/src/dos_m65/assets/dos_parts_dir.s b/src/dos_m65/assets/dos_parts_dir.s index c9929dfb..a1af128b 100644 --- a/src/dos_m65/assets/dos_parts_dir.s +++ b/src/dos_m65/assets/dos_parts_dir.s @@ -20,7 +20,7 @@ dir_hdr_sd: ; 32 bytes - header !byte $01, $01 ; link to the next line - dummy, will be regenerated by BASIC !byte $00, $00 ; line number 0 !byte $12, $22 ; reverse mode, quote - !pet "SD CARD " ; space for disk/directory name + !pet "sd card " ; space for disk/directory name !byte $22, $20 ; quote, space !pet "fat32" ; filesystem !byte $00 ; end of the line diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s index 302f7142..941614f4 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s @@ -6,7 +6,27 @@ dev_sd_cmd_READ: - ; XXX provide implementation + ; XXX provide implementation for regular files + + lda SD_DIR_PHASE + cmp #$01 + beq dev_sd_cmd_READ_dir_blocksfree sec ; mark EOI rts + + +dev_sd_cmd_READ_dir_blocksfree: + + lda #$13 + sta SD_ACPTR_LEN+0 + lda #$00 + sta SD_ACPTR_LEN+1 + + lda #dir_end + sta SD_ACPTR_PTR+1 + + clc + rts diff --git a/src/dos_m65/msg_acptr.s b/src/dos_m65/msg_acptr.s index 1d521567..032700c5 100644 --- a/src/dos_m65/msg_acptr.s +++ b/src/dos_m65/msg_acptr.s @@ -38,6 +38,7 @@ msg_ACPTR_read_SD: jsr SD_ACPTR_helper sta TBTCNT + sta REG_A ; Increment pointer, decrement length @@ -77,6 +78,7 @@ msg_ACPTR_fail_no_data: ; XXX What should be the reaction when trying to read and no data is present? sta TBTCNT + sta REG_A bra msg_ACPTR_EOI msg_ACPTR_status: From eec5a0680bc0100432ee8cef93267bb91778f4d9 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 14 Feb 2021 15:23:12 +0100 Subject: [PATCH 213/257] small CBDOS tweaks --- src/aliases/,aliases_ram_lowmem.s | 2 +- src/dos_m65/dev_sdcard/dev_sd_cmd_open.s | 15 +++++++++------ src/dos_m65/dev_sdcard/dev_sd_cmd_read.s | 7 +++++++ src/kernal/iec_fast/m65dos_check.s | 2 +- src/kernal/iec_fast/m65dos_detect.s | 2 +- 5 files changed, 19 insertions(+), 9 deletions(-) diff --git a/src/aliases/,aliases_ram_lowmem.s b/src/aliases/,aliases_ram_lowmem.s index cdce7464..ed03d9c9 100644 --- a/src/aliases/,aliases_ram_lowmem.s +++ b/src/aliases/,aliases_ram_lowmem.s @@ -291,7 +291,7 @@ !set IEC_BURST = 3 } !ifdef CONFIG_MB_M65 { - !set IEC_ROMDOS = 4 + !set IEC_CBDOS = 4 } diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s index 5a043e60..6ea7212b 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s @@ -28,14 +28,12 @@ dev_sd_cmd_OPEN_EOI: dev_sd_cmd_OPEN_dir: - ; XXX add support for filtering + ; Reset status to OK - ; Initialize 1st directory phase - header + lda #$00 + jsr dos_status_00 - lda #$01 - sta SD_DIR_PHASE - - ; Provide pointer and length of the header + ; Provide pointer to the header lda #$20 sta SD_ACPTR_LEN+0 @@ -47,6 +45,11 @@ dev_sd_cmd_OPEN_dir: lda #>dir_hdr_sd sta SD_ACPTR_PTR+1 + ; Set directory phase to 'file name' + + lda #$01 + sta SD_DIR_PHASE + ; End jmp dos_EXIT diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s index 941614f4..ea24bbb9 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s @@ -18,6 +18,8 @@ dev_sd_cmd_READ: dev_sd_cmd_READ_dir_blocksfree: + ; Set pointer to '0 BLOCKS FREE.' line + lda #$13 sta SD_ACPTR_LEN+0 lda #$00 @@ -28,5 +30,10 @@ dev_sd_cmd_READ_dir_blocksfree: lda #>dir_end sta SD_ACPTR_PTR+1 + ; Mark end of directory + + lda #$FF + sta SD_DIR_PHASE + clc rts diff --git a/src/kernal/iec_fast/m65dos_check.s b/src/kernal/iec_fast/m65dos_check.s index 0b287ea9..15c4729c 100644 --- a/src/kernal/iec_fast/m65dos_check.s +++ b/src/kernal/iec_fast/m65dos_check.s @@ -10,7 +10,7 @@ m65dos_check: pha lda IECPROTO - cmp #IEC_ROMDOS + cmp #IEC_CBDOS beq @1 pla diff --git a/src/kernal/iec_fast/m65dos_detect.s b/src/kernal/iec_fast/m65dos_detect.s index 2cb5fed4..d9b6d017 100644 --- a/src/kernal/iec_fast/m65dos_detect.s +++ b/src/kernal/iec_fast/m65dos_detect.s @@ -15,7 +15,7 @@ m65dos_detect: jsr m65dos_unitchk bcs @1 - lda #IEC_ROMDOS + lda #IEC_CBDOS sta IECPROTO @1: pla From 67e9be437277d284c18b5c4690e61abea6f76e2e Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 14 Feb 2021 16:19:00 +0100 Subject: [PATCH 214/257] fixed LOAD command for CBDOS --- src/kernal/iec/load_iec.s | 17 +++++++++ src/kernal/iec_fast/m65dos_load.s | 57 +++++++++++++++++++++++++++++++ 2 files changed, 74 insertions(+) create mode 100644 src/kernal/iec_fast/m65dos_load.s diff --git a/src/kernal/iec/load_iec.s b/src/kernal/iec/load_iec.s index 8210267d..e006b001 100644 --- a/src/kernal/iec/load_iec.s +++ b/src/kernal/iec/load_iec.s @@ -7,6 +7,9 @@ ; +; XXX This is suspiciously complicated, most likely something is really wrong with the IEC support + + !ifdef CONFIG_IEC { @@ -57,6 +60,11 @@ load_iec: jsr TALK bcs load_iec_error +!ifdef CONFIG_MB_M65 { + jsr m65dos_check + +bcc m65dos_load_part ; branch if device is handeld by internal DOS +} + !ifdef HAS_IEC_BURST { jsr burst_advertise } @@ -83,6 +91,10 @@ load_iec: jsr load_iec_get_addr_byte sta EAL+1 +!ifdef CONFIG_MB_M65 { + load_iec_m65cont: +} + ; If secondary address is 0, override EAL with STAL lda SA @@ -126,6 +138,11 @@ load_iec: load_iec_loop: +!ifdef CONFIG_MB_M65 { + jsr m65dos_check + +bcc m65dos_load_loop ; branch if device is handeld by internal DOS +} + ; We are now ready to receive bytes !ifdef CONFIG_IEC_JIFFYDOS { jsr iec_rx_dispatch diff --git a/src/kernal/iec_fast/m65dos_load.s b/src/kernal/iec_fast/m65dos_load.s new file mode 100644 index 00000000..d2716c61 --- /dev/null +++ b/src/kernal/iec_fast/m65dos_load.s @@ -0,0 +1,57 @@ +;; #LAYOUT# M65 KERNAL_0 #TAKE +;; #LAYOUT# * * #IGNORE + +; +; MEGA65 pseudo-IEC internal DOS support - part of the LOAD routine +; + + +m65dos_load_part: + + ; Open channel for loading + + lda #$60 + jsr m65dos_tksa + + jsr m65dos_get_addr_byte + sta EAL+0 + + jsr m65dos_get_addr_byte + sta EAL+1 + + jmp load_iec_m65cont + +m65dos_get_addr_byte: + + jsr m65dos_acptr + bcs @1 + lda IOSTATUS + and #K_STS_EOI + bne @1 + lda TBTCNT + rts +@1: + pla + pla + + jmp load_iec_file_not_found + +m65dos_load_loop: + + jsr m65dos_acptr + + ; Handle the byte (store in memory / verify) + jsr lvs_handle_byte_load_verify + +bcs load_iec_error + + ; Advance pointer to data; it is OK if it advances past $FFFF, + ; one autostart technique does exactly this + inw EAL+0 + + ; Check for EOI - if so, this was the last byte + bit IOSTATUS + bvc m65dos_load_loop + + ; FALLTROUGH + + jmp load_iec_loop_end From 906ec22834af875408b956a03222d4f344eeb33b Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 14 Feb 2021 16:54:03 +0100 Subject: [PATCH 215/257] initial work towards reading SD card directory --- src/dos_m65/dev_sdcard/dev_sd_cmd_open.s | 9 +++++++++ src/dos_m65/dev_sdcard/dev_sd_cmd_read.s | 22 +++++++++++++++++++++- src/dos_m65/dev_sdcard/dev_sd_init.s | 12 +++++++++++- 3 files changed, 41 insertions(+), 2 deletions(-) diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s index 6ea7212b..e235aa71 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s @@ -28,6 +28,15 @@ dev_sd_cmd_OPEN_EOI: dev_sd_cmd_OPEN_dir: + ; XXX + + ; .X = file descriptor + ; .Y = page of memory for output + + ; lda #$11 ; dos_opendir + ; sta HTRAP00 + ; +nop + ; Reset status to OK lda #$00 diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s index ea24bbb9..a7183873 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s @@ -15,6 +15,20 @@ dev_sd_cmd_READ: sec ; mark EOI rts +dev_sd_cmd_READ_dir: + + ; Dirent structure: + ; - 4 bytes - inode + ; - 2 bytes - ('off' - not sure what's this) + ; - 4 bytes - ('reclen' - is it file size?) + ; - 2 bytes - type + + ; .X = file descriptor + ; .Y = page of memory for output + + ; lda #$12 ; dos_readdir + ; sta HTRAP00 + ; +nop dev_sd_cmd_READ_dir_blocksfree: @@ -32,8 +46,14 @@ dev_sd_cmd_READ_dir_blocksfree: ; Mark end of directory - lda #$FF + lda #$00 sta SD_DIR_PHASE + ; .X = file descriptor + + ; lda #$13 ; dos_closedir + ; sta HTRAP00 + ; +nop + clc rts diff --git a/src/dos_m65/dev_sdcard/dev_sd_init.s b/src/dos_m65/dev_sdcard/dev_sd_init.s index 95b0f144..75f1b8b8 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_init.s +++ b/src/dos_m65/dev_sdcard/dev_sd_init.s @@ -6,7 +6,7 @@ dev_sd_init: - ; Copy status string + ; Copy initial status string ldx #$00 stx SD_STATUS_IDX @@ -23,6 +23,16 @@ dev_sd_init: sta SD_STATUS_STR,x bne @1 + ; Close all the files in the hypervisor, go to root directory + + lda #$22 ; dos_closeall + sta HTRAP00 + +nop + + lda #$36 ; dos_cdrootdir + sta HTRAP00 + +nop + ; End of initialization rts From f8c8e71f9f4e6b9ada292852e3d8b21016cc24b9 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 14 Feb 2021 20:34:37 +0100 Subject: [PATCH 216/257] first attempts to read dirent structure --- src/dos_m65/,aliases_dos.s | 2 + src/dos_m65/dev_sdcard/dev_sd_cmd_open.s | 37 +------ src/dos_m65/dev_sdcard/dev_sd_cmd_read.s | 47 +-------- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 123 ++++++++++++++++++++++ 4 files changed, 129 insertions(+), 80 deletions(-) create mode 100644 src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index 011b88cf..ff23b011 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -94,3 +94,5 @@ !addr SD_CMDFN_BUF = $8100 ; buffer for command and/or file name, 128 bytes, SD card !addr FD_CMDFN_BUF = $8180 ; buffer for command and/or file name, 128 bytes, floppy !addr RD_CMDFN_BUF = $8200 ; buffer for command and/or file name, 128 bytes, ram disk + + !addr SD_DIRENT = $8280 ; 256 byte buffer for 'dirent' structure diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s index e235aa71..ea54784d 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s @@ -19,46 +19,11 @@ dev_sd_cmd_OPEN_EOI: lda SD_CMDFN_BUF cmp #'$' - beq dev_sd_cmd_OPEN_dir + +beq fs_hvsr_read_dir_open ; XXX implement for file names jmp dos_EXIT_SEC -dev_sd_cmd_OPEN_dir: - ; XXX - - ; .X = file descriptor - ; .Y = page of memory for output - - ; lda #$11 ; dos_opendir - ; sta HTRAP00 - ; +nop - - ; Reset status to OK - - lda #$00 - jsr dos_status_00 - - ; Provide pointer to the header - - lda #$20 - sta SD_ACPTR_LEN+0 - lda #$00 - sta SD_ACPTR_LEN+1 - - lda #dir_hdr_sd - sta SD_ACPTR_PTR+1 - - ; Set directory phase to 'file name' - - lda #$01 - sta SD_DIR_PHASE - - ; End - - jmp dos_EXIT diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s index a7183873..4a44e46e 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s @@ -10,50 +10,9 @@ dev_sd_cmd_READ: lda SD_DIR_PHASE cmp #$01 - beq dev_sd_cmd_READ_dir_blocksfree + +beq fs_hvsr_read_dir + cmp #$02 + +beq fs_hvsr_read_dir_blocksfree sec ; mark EOI rts - -dev_sd_cmd_READ_dir: - - ; Dirent structure: - ; - 4 bytes - inode - ; - 2 bytes - ('off' - not sure what's this) - ; - 4 bytes - ('reclen' - is it file size?) - ; - 2 bytes - type - - ; .X = file descriptor - ; .Y = page of memory for output - - ; lda #$12 ; dos_readdir - ; sta HTRAP00 - ; +nop - -dev_sd_cmd_READ_dir_blocksfree: - - ; Set pointer to '0 BLOCKS FREE.' line - - lda #$13 - sta SD_ACPTR_LEN+0 - lda #$00 - sta SD_ACPTR_LEN+1 - - lda #dir_end - sta SD_ACPTR_PTR+1 - - ; Mark end of directory - - lda #$00 - sta SD_DIR_PHASE - - ; .X = file descriptor - - ; lda #$13 ; dos_closedir - ; sta HTRAP00 - ; +nop - - clc - rts diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s new file mode 100644 index 00000000..70bf51e2 --- /dev/null +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -0,0 +1,123 @@ + +; +; Hypervisor virtual filesystem - reading directory +; + + +fs_hvsr_read_dir_open: + + ; Read dirent structure into $1000 and then copy it to SD_DIRENT + ; Starting at $1000 VIC sees chargen, so this should be a safe place + ; Content of the original memory location will be preserved + + jsr fs_hvsr_dirent_swap + + ldx #$00 ; file descriptor; we use $00 for reading directory + ldy #$10 ; target page number + + lda #$11 ; dos_opendir + sta HTRAP00 + +nop + + ; XXX handle read errors + + jsr fs_hvsr_dirent_swap + + ; Reset status to OK + + lda #$00 + jsr dos_status_00 + + ; Provide pointer to the header + + lda #$20 + sta SD_ACPTR_LEN+0 + lda #$00 + sta SD_ACPTR_LEN+1 + + lda #dir_hdr_sd + sta SD_ACPTR_PTR+1 + + ; Set directory phase to 'file name' + + lda #$01 + sta SD_DIR_PHASE + + ; End + + jmp dos_EXIT + +fs_hvsr_read_dir: + + jsr fs_hvsr_dirent_swap + + ldx #$00 ; file descriptor; we use $00 for reading directory + ldy #$10 ; target page number + + lda #$12 ; dos_readdir + sta HTRAP00 + +nop + + ; XXX handle read errors + + sta $400 + stx $401 + + jsr fs_hvsr_dirent_swap + + + jmp fs_hvsr_read_dir_blocksfree ; XXX temporary + + ; Dirent structure: + ; - 4 bytes - inode + ; - 2 bytes - ('off' - not sure what's this) + ; - 4 bytes - ('reclen' - is it file size?) + ; - 2 bytes - type + +fs_hvsr_read_dir_blocksfree: + + ; Set pointer to '0 BLOCKS FREE.' line + + lda #$13 + sta SD_ACPTR_LEN+0 + lda #$00 + sta SD_ACPTR_LEN+1 + + lda #dir_end + sta SD_ACPTR_PTR+1 + + ; Mark end of directory + + lda #$00 + sta SD_DIR_PHASE + + ; .X = file descriptor + + ; lda #$13 ; dos_closedir + ; sta HTRAP00 + ; +nop + + clc + rts + + +; +; Helper routines +; + +fs_hvsr_dirent_swap: + + ldx #$00 +@1: + lda $1000, x + ldy SD_DIRENT, x + sta SD_DIRENT, x + sty $1000, x + inx + bne @1 + + rts From bdc5dc1360df522db6dc860a6e8a3a9a2f4f53af Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 14 Feb 2021 21:54:47 +0100 Subject: [PATCH 217/257] more work on reading SD card directory --- src/dos_m65/,aliases_dos.s | 2 + src/dos_m65/assets/dos_parts_dir.s | 19 ++++ src/dos_m65/dev_sdcard/dev_sd_init.s | 1 + src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 107 ++++++++++++++++------ 4 files changed, 100 insertions(+), 29 deletions(-) diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index ff23b011..9a7ec1e6 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -96,3 +96,5 @@ !addr RD_CMDFN_BUF = $8200 ; buffer for command and/or file name, 128 bytes, ram disk !addr SD_DIRENT = $8280 ; 256 byte buffer for 'dirent' structure + !addr SD_DIR_DESC = $8380 ; file descriptor for reading directory + diff --git a/src/dos_m65/assets/dos_parts_dir.s b/src/dos_m65/assets/dos_parts_dir.s index a1af128b..bdb7be75 100644 --- a/src/dos_m65/assets/dos_parts_dir.s +++ b/src/dos_m65/assets/dos_parts_dir.s @@ -31,3 +31,22 @@ dir_end: ; 19 bytes !byte $00, $00 ; line number 0 !pet "blocks free." !byte $00, $00, $00 ; end of the line, end of program marker + +; File types / extensions + +dir_ext_01: !pet "seq" ; SEQ +dir_ext_02: !pet "prg" ; PRG +dir_ext_03: !pet "usr" ; USR +dir_ext_04: !pet "rel" ; REL +dir_ext_05: !pet "dir" ; directory +dir_ext_06: !pet "d67" ; CBM 2040 (DOS 1) - disk image +dir_ext_07: !pet "d64" ; CBM 1541 / 2031 / 3040 / 4040 - disk image +dir_ext_08: !pet "d71" ; CBM 1571 - disk image +dir_ext_09: !pet "d81" ; CBM 1581 - disk image +dir_ext_0A: !pet "d80" ; CBM 8050 - disk image +dir_ext_0B: !pet "d81" ; CBM 8250 / 1001 - disk image +dir_ext_0C: !pet "d90" ; CBM D9060 / D9090 - hard disk image +dir_ext_0D: !pet "d1m" ; CMD FD 2000 / 4000 - disk image (DD) +dir_ext_0E: !pet "d2m" ; CMD FD 2000 / 4000 - disk image (HD) +dir_ext_0F: !pet "d2m" ; CMD FD 4000 - disk image (ED) +dir_ext_10: !pet "dhd" ; CMD HD - hard disk image diff --git a/src/dos_m65/dev_sdcard/dev_sd_init.s b/src/dos_m65/dev_sdcard/dev_sd_init.s index 75f1b8b8..2eafa48b 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_init.s +++ b/src/dos_m65/dev_sdcard/dev_sd_init.s @@ -16,6 +16,7 @@ dev_sd_init: stx SD_ACPTR_LEN+1 stx SD_ACPTR_PTR+0 stx SD_ACPTR_PTR+1 + stx SD_DIR_PHASE dex @1: inx diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index 70bf51e2..5b20fbf3 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -6,22 +6,15 @@ fs_hvsr_read_dir_open: - ; Read dirent structure into $1000 and then copy it to SD_DIRENT - ; Starting at $1000 VIC sees chargen, so this should be a safe place - ; Content of the original memory location will be preserved + ; Open the directory - jsr fs_hvsr_dirent_swap - - ldx #$00 ; file descriptor; we use $00 for reading directory - ldy #$10 ; target page number - - lda #$11 ; dos_opendir + lda #$12 ; dos_opendir sta HTRAP00 +nop ; XXX handle read errors - jsr fs_hvsr_dirent_swap + sta SD_DIR_DESC ; store directory descriptor XXX invent better name ; Reset status to OK @@ -51,31 +44,71 @@ fs_hvsr_read_dir_open: fs_hvsr_read_dir: - jsr fs_hvsr_dirent_swap + ; Read dirent structure into $1000 and then copy it to SD_DIRENT + ; Starting at $1000 VIC sees chargen, so this should be a safe place + ; Content of the original memory location will be preserved - ldx #$00 ; file descriptor; we use $00 for reading directory - ldy #$10 ; target page number + jsr fs_hvsr_dirent_prepare - lda #$12 ; dos_readdir + ldx SD_DIR_DESC ; directory descriptor + ldy #$10 ; target page number + + lda #$13 ; dos_readdir sta HTRAP00 +nop - ; XXX handle read errors - - sta $400 - stx $401 - jsr fs_hvsr_dirent_swap + ; If nothing to read, output 'blocks free' + + bcc fs_hvsr_read_dir_blocksfree + + ; Dirent structure - important fields: + ; - $00-$3F - file name + ; - $40 - file name length + ; - $55 - file type and attributes + + ; Validate entry + + ; X check for directory! + + lda SD_DIRENT+$40 + sec + sbc #$04 ; strip 4 bytes - for dot and extension + sta SD_DIRENT+$40 + bmi fs_hvsr_read_dir ; if name too short, try next entry + beq fs_hvsr_read_dir ; if name too short, try next entry + cmp #$11 + bcs fs_hvsr_read_dir ; if stripped name is 17 characters or longer, try the next entry + sta SD_DIRENT+$40 ; store corrected file name length + + ; Detect file type (+64 for read-only, +128 = damaged) + ; 0 = not supported + ; 1 = SEQ + ; 2 = PRG + ; 3 = USR + ; 4 = REL + ; 5 = DIR + ; 6 = D67 ; CBM 2040 (DOS 1) - disk image + ; 6 = D64 ; CBM 1541 / 2031 / 3040 / 4040 - disk image + ; 7 = D71 ; CBM 1571 - disk image + ; 8 = D81 ; CBM 1581 - disk image + ; 9 = D80 ; CBM 8050 - disk image + ; 10 = D81 ; CBM 8250 / 1001 - disk image + ; 11 = D90 ; CBM D9060 / D9090 - hard disk image + ; 12 = D1M ; CMD FD 2000 / 4000 - disk image (DD) + ; 13 = D2M ; CMD FD 2000 / 4000 - disk image (HD) + ; 14 = D2M ; CMD FD 4000 - disk image (ED) + ; 15 = DHD ; CMD HD - hard disk image + + + ; Try to prepare output row + + + ; XXX provide proper implementation here jmp fs_hvsr_read_dir_blocksfree ; XXX temporary - ; Dirent structure: - ; - 4 bytes - inode - ; - 2 bytes - ('off' - not sure what's this) - ; - 4 bytes - ('reclen' - is it file size?) - ; - 2 bytes - type - fs_hvsr_read_dir_blocksfree: ; Set pointer to '0 BLOCKS FREE.' line @@ -95,11 +128,12 @@ fs_hvsr_read_dir_blocksfree: lda #$00 sta SD_DIR_PHASE - ; .X = file descriptor + ; Close the directory within the hypervisor XXX maybe move it to close routine - ; lda #$13 ; dos_closedir - ; sta HTRAP00 - ; +nop + ldx SD_DIR_DESC + lda #$14 ; dos_closedir + sta HTRAP00 + +nop clc rts @@ -109,8 +143,22 @@ fs_hvsr_read_dir_blocksfree: ; Helper routines ; +fs_hvsr_dirent_prepare: + + ldx #$00 + txa +@1: + ldy $1000, x + sty SD_DIRENT, x + sta $1000, x + inx + bne @1 + + rts + fs_hvsr_dirent_swap: + php ldx #$00 @1: lda $1000, x @@ -120,4 +168,5 @@ fs_hvsr_dirent_swap: inx bne @1 + plp rts From d79c1041e66ccfdc3c1cb7ce03d2fc10c1ebd205 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 14 Feb 2021 22:23:20 +0100 Subject: [PATCH 218/257] added filename validation --- src/dos_m65/assets/dos_parts_dir.s | 2 +- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 52 ++++++++++++++--------- 2 files changed, 34 insertions(+), 20 deletions(-) diff --git a/src/dos_m65/assets/dos_parts_dir.s b/src/dos_m65/assets/dos_parts_dir.s index bdb7be75..c33290c3 100644 --- a/src/dos_m65/assets/dos_parts_dir.s +++ b/src/dos_m65/assets/dos_parts_dir.s @@ -48,5 +48,5 @@ dir_ext_0B: !pet "d81" ; CBM 8250 / 1001 - disk image dir_ext_0C: !pet "d90" ; CBM D9060 / D9090 - hard disk image dir_ext_0D: !pet "d1m" ; CMD FD 2000 / 4000 - disk image (DD) dir_ext_0E: !pet "d2m" ; CMD FD 2000 / 4000 - disk image (HD) -dir_ext_0F: !pet "d2m" ; CMD FD 4000 - disk image (ED) +dir_ext_0F: !pet "d4m" ; CMD FD 4000 - disk image (ED) dir_ext_10: !pet "dhd" ; CMD HD - hard disk image diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index 5b20fbf3..b2bde33f 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -57,7 +57,9 @@ fs_hvsr_read_dir: sta HTRAP00 +nop + php jsr fs_hvsr_dirent_swap + plp ; If nothing to read, output 'blocks free' @@ -68,9 +70,37 @@ fs_hvsr_read_dir: ; - $40 - file name length ; - $55 - file type and attributes - ; Validate entry + ; Validate/fix characters in file name - ; X check for directory! + ldx SD_DIRENT+$40 + +@lp1: + + lda SD_DIRENT,x + cmp #$22 + beq fs_hvsr_read_dir ; quotation mark is illegal + cmp #$2A + beq fs_hvsr_read_dir ; asterisk is illegal, it is used for filtering + cmp #$20 + bcc fs_hvsr_read_dir ; control characters are not allowed + cmp #$5B + bcc @lp1_next ; up to PETSCII 'Z' is OK + cmp #$61 + bcc fs_hvsr_read_dir ; some characters are not allowed + cmp #$7B + bcs fs_hvsr_read_dir ; PETSCII-art and control characters are illegal + clc + sbc #$20 ; make everything the same case + sta SD_DIRENT,x + +@lp1_next: + + dex + bpl @lp1 + + ; Validate file name length + + ; XXX check for directory! lda SD_DIRENT+$40 sec @@ -83,24 +113,8 @@ fs_hvsr_read_dir: sta SD_DIRENT+$40 ; store corrected file name length ; Detect file type (+64 for read-only, +128 = damaged) - ; 0 = not supported - ; 1 = SEQ - ; 2 = PRG - ; 3 = USR - ; 4 = REL - ; 5 = DIR - ; 6 = D67 ; CBM 2040 (DOS 1) - disk image - ; 6 = D64 ; CBM 1541 / 2031 / 3040 / 4040 - disk image - ; 7 = D71 ; CBM 1571 - disk image - ; 8 = D81 ; CBM 1581 - disk image - ; 9 = D80 ; CBM 8050 - disk image - ; 10 = D81 ; CBM 8250 / 1001 - disk image - ; 11 = D90 ; CBM D9060 / D9090 - hard disk image - ; 12 = D1M ; CMD FD 2000 / 4000 - disk image (DD) - ; 13 = D2M ; CMD FD 2000 / 4000 - disk image (HD) - ; 14 = D2M ; CMD FD 4000 - disk image (ED) - ; 15 = DHD ; CMD HD - hard disk image + ; XXX detect image ; Try to prepare output row From ca54482c08f26de96b667f415eb131dde076c111 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 15 Feb 2021 20:07:31 +0100 Subject: [PATCH 219/257] more work on SD card directory display --- src/dos_m65/assets/dos_parts_dir.s | 23 ++++--- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 82 +++++++++++++++++++++-- 2 files changed, 88 insertions(+), 17 deletions(-) diff --git a/src/dos_m65/assets/dos_parts_dir.s b/src/dos_m65/assets/dos_parts_dir.s index c33290c3..deb45823 100644 --- a/src/dos_m65/assets/dos_parts_dir.s +++ b/src/dos_m65/assets/dos_parts_dir.s @@ -39,14 +39,15 @@ dir_ext_02: !pet "prg" ; PRG dir_ext_03: !pet "usr" ; USR dir_ext_04: !pet "rel" ; REL dir_ext_05: !pet "dir" ; directory -dir_ext_06: !pet "d67" ; CBM 2040 (DOS 1) - disk image -dir_ext_07: !pet "d64" ; CBM 1541 / 2031 / 3040 / 4040 - disk image -dir_ext_08: !pet "d71" ; CBM 1571 - disk image -dir_ext_09: !pet "d81" ; CBM 1581 - disk image -dir_ext_0A: !pet "d80" ; CBM 8050 - disk image -dir_ext_0B: !pet "d81" ; CBM 8250 / 1001 - disk image -dir_ext_0C: !pet "d90" ; CBM D9060 / D9090 - hard disk image -dir_ext_0D: !pet "d1m" ; CMD FD 2000 / 4000 - disk image (DD) -dir_ext_0E: !pet "d2m" ; CMD FD 2000 / 4000 - disk image (HD) -dir_ext_0F: !pet "d4m" ; CMD FD 4000 - disk image (ED) -dir_ext_10: !pet "dhd" ; CMD HD - hard disk image +; dir_ext_06: !pet "tap" ; tape image +; dir_ext_07: !pet "d67" ; CBM 2040 (DOS 1) - disk image +; dir_ext_08: !pet "d64" ; CBM 1541 / 2031 / 3040 / 4040 - disk image +; dir_ext_09: !pet "d71" ; CBM 1571 - disk image +; dir_ext_0A: !pet "d81" ; CBM 1581 - disk image +; dir_ext_0B: !pet "d80" ; CBM 8050 - disk image +; dir_ext_0C: !pet "d81" ; CBM 8250 / 1001 - disk image +; dir_ext_0D: !pet "d90" ; CBM D9060 / D9090 - hard disk image +; dir_ext_0E: !pet "d1m" ; CMD FD 2000 / 4000 - disk image (DD) +; dir_ext_0F: !pet "d2m" ; CMD FD 2000 / 4000 - disk image (HD) +; dir_ext_10: !pet "d4m" ; CMD FD 4000 - disk image (ED) +; dir_ext_11: !pet "dhd" ; CMD HD - hard disk image diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index b2bde33f..14332c85 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -63,11 +63,12 @@ fs_hvsr_read_dir: ; If nothing to read, output 'blocks free' - bcc fs_hvsr_read_dir_blocksfree + +bcc fs_hvsr_read_dir_blocksfree ; Dirent structure - important fields: ; - $00-$3F - file name ; - $40 - file name length + ; - $51-$54 - file length ; - $55 - file type and attributes ; Validate/fix characters in file name @@ -98,6 +99,8 @@ fs_hvsr_read_dir: dex bpl @lp1 + inc $D020 + ; Validate file name length ; XXX check for directory! @@ -111,17 +114,85 @@ fs_hvsr_read_dir: cmp #$11 bcs fs_hvsr_read_dir ; if stripped name is 17 characters or longer, try the next entry sta SD_DIRENT+$40 ; store corrected file name length + tax ; Detect file type (+64 for read-only, +128 = damaged) - ; XXX detect image + lda SD_DIRENT, x + cmp #$2E + bne fs_hvsr_read_dir ; 3-character extension is required! - ; Try to prepare output row + ; XXX temporary; detect file type by extension instead + ; Try to prepare output row, starting from SD_DIRENT+$80 - ; XXX provide proper implementation here + lda #$01 ; link to the next line - dummy, will be regenerated by BASIC + sta SD_DIRENT+$80 + sta SD_DIRENT+$81 + lda #$00 ; XXX calculate length in blocks instead + sta SD_DIRENT+$82 + sta SD_DIRENT+$83 - jmp fs_hvsr_read_dir_blocksfree ; XXX temporary + ldx #$04 ; XXX put correct amount of spaces instead + lda #' ' + sta SD_DIRENT+$80, x + inx + sta SD_DIRENT+$80, x + + lda #$22 ; opening quote + sta SD_DIRENT+$80, x + + ldy #$FF ; put file name + +@lp2: + + inx + iny + lda SD_DIRENT, y + sta SD_DIRENT+$80,x + + bne @lp2 + inx + + lda #$22 ; closing quote + sta SD_DIRENT+$80, x + inx + + lda #' ' ; XXX put correct amount of spaces instead + sta SD_DIRENT+$80, x + inx + sta SD_DIRENT+$80, x + inx + + ; XXX put read-only mark if needed + + ldy #$03 ; XXX select proper file type instead + lda dir_ext_01+0, y + sta SD_DIRENT+$80, x + inx + lda dir_ext_01+1, y + sta SD_DIRENT+$80, x + inx + lda dir_ext_01+2, y + sta SD_DIRENT+$80, x + inx + + ; No 'damaged' mark is needed here; put ending 0 and provide pointer + + lda #$00 + sta SD_DIRENT+$80, x + inx + + stx SD_ACPTR_LEN+0 + sta SD_ACPTR_LEN+1 + + lda #<(SD_DIRENT+$80) + sta SD_ACPTR_PTR+0 + lda #>(SD_DIRENT+$80) + sta SD_ACPTR_PTR+1 + + clc + rts fs_hvsr_read_dir_blocksfree: @@ -152,7 +223,6 @@ fs_hvsr_read_dir_blocksfree: clc rts - ; ; Helper routines ; From 86d91e224cd4ff125619ccde368e1b0a4d0eacc8 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 15 Feb 2021 20:45:41 +0100 Subject: [PATCH 220/257] removed some unnecessary code --- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index 14332c85..a550d8f2 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -57,9 +57,7 @@ fs_hvsr_read_dir: sta HTRAP00 +nop - php - jsr fs_hvsr_dirent_swap - plp + jsr fs_hvsr_dirent_swap ; processor status is preserved ; If nothing to read, output 'blocks free' From 992829c60abdf80a9033a06fe6f1c9c52a4e0135 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 15 Feb 2021 21:13:23 +0100 Subject: [PATCH 221/257] fixed memory damage in CBDOS --- src/dos_m65/dos_memchk.s | 7 +++++++ src/dos_m65/dos_unitchk.s | 10 +++++----- src/dos_m65/dos_unitnum.s | 11 ++++++----- src/dos_m65/dos_unitset.s | 10 +++++----- 4 files changed, 23 insertions(+), 15 deletions(-) diff --git a/src/dos_m65/dos_memchk.s b/src/dos_m65/dos_memchk.s index f646228b..cde237bb 100644 --- a/src/dos_m65/dos_memchk.s +++ b/src/dos_m65/dos_memchk.s @@ -6,6 +6,9 @@ dos_MEMCHK: + pha + phx + ; Check for magic string ldx #$04 @@ -34,10 +37,14 @@ dos_MEMCHK: cmp code_RTS_03 bne @fail + plx + pla clc rts @fail: + plx + pla sec rts diff --git a/src/dos_m65/dos_unitchk.s b/src/dos_m65/dos_unitchk.s index 16317d41..610f617d 100644 --- a/src/dos_m65/dos_unitchk.s +++ b/src/dos_m65/dos_unitchk.s @@ -6,13 +6,13 @@ dos_UNITCHK: - jsr dos_ENTER - - ; Check if memory content is not damaged + ; Before the start make sure memory content is not damaged jsr dos_MEMCHK - bcs dos_UNITCHK_fail - lda REG_A + bcc @ok + rts +@ok: + jsr dos_ENTER ; Check for unit diff --git a/src/dos_m65/dos_unitnum.s b/src/dos_m65/dos_unitnum.s index dbdc3c99..3acd1a4e 100644 --- a/src/dos_m65/dos_unitnum.s +++ b/src/dos_m65/dos_unitnum.s @@ -6,13 +6,14 @@ dos_UNITNUM: - jsr dos_ENTER - - ; Check if memory content is not damaged + ; Before the start make sure memory content is not damaged jsr dos_MEMCHK - bcs dos_UNITNUM_fail - lda REG_A + bcc @ok + lda #$00 ; failure + rts +@ok: + jsr dos_ENTER ; Check what kind of device was requested diff --git a/src/dos_m65/dos_unitset.s b/src/dos_m65/dos_unitset.s index 2de4eebe..e57c29eb 100644 --- a/src/dos_m65/dos_unitset.s +++ b/src/dos_m65/dos_unitset.s @@ -6,14 +6,14 @@ dos_UNITSET: - jsr dos_ENTER - - ; Check if memory content is not damaged + ; Before the start make sure memory content is not damaged jsr dos_MEMCHK - bcc @1 + bcc @ok rts -@1: +@ok: + jsr dos_ENTER + ; XXX do not allow illegal device numbers... above 30 or below 8 ? ; Check what kind of device was requested From 0b5f2dcf2a5c09af438e01b2542cad543cdb47be Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 15 Feb 2021 22:18:37 +0100 Subject: [PATCH 222/257] SD card directory display starts working --- src/dos_m65/dev_sdcard/dev_sd_init.s | 2 +- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 12 ++++++------ 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/dos_m65/dev_sdcard/dev_sd_init.s b/src/dos_m65/dev_sdcard/dev_sd_init.s index 2eafa48b..865ff955 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_init.s +++ b/src/dos_m65/dev_sdcard/dev_sd_init.s @@ -30,7 +30,7 @@ dev_sd_init: sta HTRAP00 +nop - lda #$36 ; dos_cdrootdir + lda #$3C ; dos_cdrootdir sta HTRAP00 +nop diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index a550d8f2..ba648a57 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -53,7 +53,7 @@ fs_hvsr_read_dir: ldx SD_DIR_DESC ; directory descriptor ldy #$10 ; target page number - lda #$13 ; dos_readdir + lda #$14 ; dos_readdir sta HTRAP00 +nop @@ -72,6 +72,7 @@ fs_hvsr_read_dir: ; Validate/fix characters in file name ldx SD_DIRENT+$40 + dex @lp1: @@ -97,8 +98,6 @@ fs_hvsr_read_dir: dex bpl @lp1 - inc $D020 - ; Validate file name length ; XXX check for directory! @@ -131,6 +130,9 @@ fs_hvsr_read_dir: sta SD_DIRENT+$82 sta SD_DIRENT+$83 + ldx SD_DIRENT+$40 ; make sure file name is terminated by 0 + sta SD_DIRENT, x + ldx #$04 ; XXX put correct amount of spaces instead lda #' ' sta SD_DIRENT+$80, x @@ -148,9 +150,7 @@ fs_hvsr_read_dir: iny lda SD_DIRENT, y sta SD_DIRENT+$80,x - bne @lp2 - inx lda #$22 ; closing quote sta SD_DIRENT+$80, x @@ -214,7 +214,7 @@ fs_hvsr_read_dir_blocksfree: ; Close the directory within the hypervisor XXX maybe move it to close routine ldx SD_DIR_DESC - lda #$14 ; dos_closedir + lda #$16 ; dos_closedir sta HTRAP00 +nop From 230c20a7d0dc5606f4049e45a8d78724c3a8787f Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 15 Feb 2021 23:59:02 +0100 Subject: [PATCH 223/257] more CBDOS directory work, can now detect read-only files --- src/dos_m65/assets/dos_parts_dir.s | 36 +++++----- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 86 +++++++++++++++++++---- 2 files changed, 90 insertions(+), 32 deletions(-) diff --git a/src/dos_m65/assets/dos_parts_dir.s b/src/dos_m65/assets/dos_parts_dir.s index deb45823..a1805c31 100644 --- a/src/dos_m65/assets/dos_parts_dir.s +++ b/src/dos_m65/assets/dos_parts_dir.s @@ -34,20 +34,22 @@ dir_end: ; 19 bytes ; File types / extensions -dir_ext_01: !pet "seq" ; SEQ -dir_ext_02: !pet "prg" ; PRG -dir_ext_03: !pet "usr" ; USR -dir_ext_04: !pet "rel" ; REL -dir_ext_05: !pet "dir" ; directory -; dir_ext_06: !pet "tap" ; tape image -; dir_ext_07: !pet "d67" ; CBM 2040 (DOS 1) - disk image -; dir_ext_08: !pet "d64" ; CBM 1541 / 2031 / 3040 / 4040 - disk image -; dir_ext_09: !pet "d71" ; CBM 1571 - disk image -; dir_ext_0A: !pet "d81" ; CBM 1581 - disk image -; dir_ext_0B: !pet "d80" ; CBM 8050 - disk image -; dir_ext_0C: !pet "d81" ; CBM 8250 / 1001 - disk image -; dir_ext_0D: !pet "d90" ; CBM D9060 / D9090 - hard disk image -; dir_ext_0E: !pet "d1m" ; CMD FD 2000 / 4000 - disk image (DD) -; dir_ext_0F: !pet "d2m" ; CMD FD 2000 / 4000 - disk image (HD) -; dir_ext_10: !pet "d4m" ; CMD FD 4000 - disk image (ED) -; dir_ext_11: !pet "dhd" ; CMD HD - hard disk image +dir_types: + + !pet "seq", $00 ; SEQ + !pet "prg", $00 ; PRG + !pet "usr", $00 ; USR + !pet "rel", $00 ; REL + !pet "dir", $00 ; directory +; !pet "tap", $00 ; tape image +; !pet "d67", $00 ; CBM 2040 (DOS 1) - disk image +; !pet "d64", $00 ; CBM 1541 / 2031 / 3040 / 4040 - disk image +; !pet "d71", $00 ; CBM 1571 - disk image +; !pet "d81", $00 ; CBM 1581 - disk image +; !pet "d80", $00 ; CBM 8050 - disk image +; !pet "d81", $00 ; CBM 8250 / 1001 - disk image +; !pet "d90", $00 ; CBM D9060 / D9090 - hard disk image +; !pet "d1m", $00 ; CMD FD 2000 / 4000 - disk image (DD) +; !pet "d2m", $00 ; CMD FD 2000 / 4000 - disk image (HD) +; !pet "d4m", $00 ; CMD FD 4000 - disk image (ED) +; !pet "dhd", $00 ; CMD HD - hard disk image diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index ba648a57..9be04389 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -67,7 +67,25 @@ fs_hvsr_read_dir: ; - $00-$3F - file name ; - $40 - file name length ; - $51-$54 - file length - ; - $55 - file type and attributes + ; - $55-$56 - file type ($10 = dir, $20 = regular) and attributes ($01 for read-only) + + ; Drop some strange (unknown) file types + + lda SD_DIRENT+$55 + bne fs_hvsr_read_dir + + ; Retrieve read-only status, store mark in SD_DIRENT+$FE + + lda SD_DIRENT+$56 + and #$01 + bne @rdonly + lda #$00 + +skip_2_bytes_trash_nvz + +@rdonly: + + lda #'<' + sta SD_DIRENT+$FF ; Validate/fix characters in file name @@ -98,9 +116,36 @@ fs_hvsr_read_dir: dex bpl @lp1 - ; Validate file name length + ; Determine type (file/directory), store marker offset in SD_DIRENT+$FE - ; XXX check for directory! + lda SD_DIRENT+$56 + and #$FE + + ; XXX code below does not work + ;cmp #$20 + ;beq @cklen_file ; branch on file + ;cmp #$10 + ;bne fs_hvsr_read_dir ; this type is unknown + + bra @cklen_file ; XXX temporary + +@cklen_dir: + + ; Validate file name length (directories) + + lda SD_DIRENT+$40 + beq fs_hvsr_read_dir + cmp #$11 + bcs fs_hvsr_read_dir + + ; Set type offset for directory in SD_DIRENT+$FF + + lda #$10 + bra @all_prepared + +@cklen_file: + + ; Validate file name length (regular files) lda SD_DIRENT+$40 sec @@ -113,15 +158,19 @@ fs_hvsr_read_dir: sta SD_DIRENT+$40 ; store corrected file name length tax - ; Detect file type (+64 for read-only, +128 = damaged) + ; Detect file type lda SD_DIRENT, x cmp #$2E - bne fs_hvsr_read_dir ; 3-character extension is required! + +bne fs_hvsr_read_dir ; 3-character extension is required! - ; XXX temporary; detect file type by extension instead + lda #$04 ; XXX temporary; detect file type by extension instead - ; Try to prepare output row, starting from SD_DIRENT+$80 +@all_prepared: + + sta SD_DIRENT+$FF ; store offset to file type in SD_DIRENT+$FF + + ; Prepare output entry, starting from SD_DIRENT+$80 lda #$01 ; link to the next line - dummy, will be regenerated by BASIC sta SD_DIRENT+$80 @@ -162,20 +211,27 @@ fs_hvsr_read_dir: sta SD_DIRENT+$80, x inx - ; XXX put read-only mark if needed + ; No 'damaged' mark make sense for this filesystem - ldy #$03 ; XXX select proper file type instead - lda dir_ext_01+0, y + ldy SD_DIRENT+$FF ; put file type + +@lp3: + + lda dir_types, y + beq @lp3_done sta SD_DIRENT+$80, x inx - lda dir_ext_01+1, y - sta SD_DIRENT+$80, x - inx - lda dir_ext_01+2, y + iny + bra @lp3 + +@lp3_done: + + lda SD_DIRENT+$FE ; read-only mark (if needed) + beq @skipro sta SD_DIRENT+$80, x inx - ; No 'damaged' mark is needed here; put ending 0 and provide pointer +@skipro: lda #$00 sta SD_DIRENT+$80, x From 1ec13590204a9f6422c4f328b9e27482d5343207 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 16 Feb 2021 00:21:07 +0100 Subject: [PATCH 224/257] can now distinguish files from directories --- src/dos_m65/assets/dos_parts_dir.s | 2 +- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 22 ++++++++++++---------- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/src/dos_m65/assets/dos_parts_dir.s b/src/dos_m65/assets/dos_parts_dir.s index a1805c31..648ec0a8 100644 --- a/src/dos_m65/assets/dos_parts_dir.s +++ b/src/dos_m65/assets/dos_parts_dir.s @@ -28,7 +28,7 @@ dir_hdr_sd: ; 32 bytes - header dir_end: ; 19 bytes !byte $01, $01 ; link to the next line - dummy, will be regenerated by BASIC - !byte $00, $00 ; line number 0 + !byte $FF, $FF ; line number 65535 (for SD2IEC compatibility) !pet "blocks free." !byte $00, $00, $00 ; end of the line, end of program marker diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index 9be04389..bf171661 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -85,7 +85,7 @@ fs_hvsr_read_dir: @rdonly: lda #'<' - sta SD_DIRENT+$FF + sta SD_DIRENT+$FE ; Validate/fix characters in file name @@ -116,18 +116,18 @@ fs_hvsr_read_dir: dex bpl @lp1 - ; Determine type (file/directory), store marker offset in SD_DIRENT+$FE + ; Determine type (file/directory), store marker offset in SD_DIRENT+$FF lda SD_DIRENT+$56 and #$FE - - ; XXX code below does not work - ;cmp #$20 - ;beq @cklen_file ; branch on file - ;cmp #$10 - ;bne fs_hvsr_read_dir ; this type is unknown + beq @cklen_file ; XXX temporary workaround for XEMU - bra @cklen_file ; XXX temporary + and #$20 + bne @cklen_file ; branch on file + + lda SD_DIRENT+$56 + and #$10 + beq fs_hvsr_read_dir ; this type is unknown @cklen_dir: @@ -250,7 +250,9 @@ fs_hvsr_read_dir: fs_hvsr_read_dir_blocksfree: - ; Set pointer to '0 BLOCKS FREE.' line + ; Set pointer to '65535 BLOCKS FREE.' line + + ; XXX determine free space lda #$13 sta SD_ACPTR_LEN+0 From 18d7434668e4c5a25158ae4334789bcdd9efd332 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 16 Feb 2021 06:37:42 +0100 Subject: [PATCH 225/257] SD care directory works (sans file sizes) --- src/dos_m65/assets/dos_parts_dir.s | 31 +++++++---- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 67 ++++++++++++++++++++--- 2 files changed, 77 insertions(+), 21 deletions(-) diff --git a/src/dos_m65/assets/dos_parts_dir.s b/src/dos_m65/assets/dos_parts_dir.s index 648ec0a8..0c7efbc7 100644 --- a/src/dos_m65/assets/dos_parts_dir.s +++ b/src/dos_m65/assets/dos_parts_dir.s @@ -41,15 +41,22 @@ dir_types: !pet "usr", $00 ; USR !pet "rel", $00 ; REL !pet "dir", $00 ; directory -; !pet "tap", $00 ; tape image -; !pet "d67", $00 ; CBM 2040 (DOS 1) - disk image -; !pet "d64", $00 ; CBM 1541 / 2031 / 3040 / 4040 - disk image -; !pet "d71", $00 ; CBM 1571 - disk image -; !pet "d81", $00 ; CBM 1581 - disk image -; !pet "d80", $00 ; CBM 8050 - disk image -; !pet "d81", $00 ; CBM 8250 / 1001 - disk image -; !pet "d90", $00 ; CBM D9060 / D9090 - hard disk image -; !pet "d1m", $00 ; CMD FD 2000 / 4000 - disk image (DD) -; !pet "d2m", $00 ; CMD FD 2000 / 4000 - disk image (HD) -; !pet "d4m", $00 ; CMD FD 4000 - disk image (ED) -; !pet "dhd", $00 ; CMD HD - hard disk image + +; File types below are not mandatory + + !pet "tap", $00 ; tape image + !pet "d67", $00 ; CBM 2040 (DOS 1) - disk image + !pet "d64", $00 ; CBM 1541 / 2031 / 3040 / 4040 - disk image + !pet "d71", $00 ; CBM 1571 - disk image + !pet "d81", $00 ; CBM 1581 - disk image + !pet "d80", $00 ; CBM 8050 - disk image + !pet "d81", $00 ; CBM 8250 / 1001 - disk image + !pet "d90", $00 ; CBM D9060 / D9090 - hard disk image + !pet "d1m", $00 ; CMD FD 2000 / 4000 - disk image (DD) + !pet "d2m", $00 ; CMD FD 2000 / 4000 - disk image (HD) + !pet "d4m", $00 ; CMD FD 4000 - disk image (ED) + !pet "dhd", $00 ; CMD HD - hard disk image + !pet "rom", $00 ; rom image + !pet "m65", $00 ; MEGA65 utility + +dir_types__end: diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index bf171661..4148bccf 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -4,6 +4,9 @@ ; +; XXX optimize the flow; we do not need 256-byte SD_DIRENT buffer, directory entries can be constructed directly + + fs_hvsr_read_dir_open: ; Open the directory @@ -120,7 +123,7 @@ fs_hvsr_read_dir: lda SD_DIRENT+$56 and #$FE - beq @cklen_file ; XXX temporary workaround for XEMU + beq @cklen_file ; workaround for older hypervisors and #$20 bne @cklen_file ; branch on file @@ -164,11 +167,49 @@ fs_hvsr_read_dir: cmp #$2E +bne fs_hvsr_read_dir ; 3-character extension is required! - lda #$04 ; XXX temporary; detect file type by extension instead + inx + ldy #$00 + +@lpdetect: + + lda SD_DIRENT+0, x + cmp dir_types+0, y + bne @lpdetect_next + + lda SD_DIRENT+1, x + cmp dir_types+1, y + bne @lpdetect_next + + lda SD_DIRENT+2, x + cmp dir_types+2, y + beq @lpdetect_found + +@lpdetect_next: + + iny + iny + iny + iny + cpy #(dir_types__end - dir_types) + bcc @lpdetect + + jmp fs_hvsr_read_dir ; file extension not detected + +@lpdetect_found: + + cpy #$10 + +beq fs_hvsr_read_dir ; file extension 'DIR' does not mean this is a directory + tya @all_prepared: sta SD_DIRENT+$FF ; store offset to file type in SD_DIRENT+$FF + cmp #$14 + bcc @noforcedro + lda #'<' ; for some file types, force the read-only flag + sta SD_DIRENT+$FE + +@noforcedro: ; Prepare output entry, starting from SD_DIRENT+$80 @@ -187,6 +228,9 @@ fs_hvsr_read_dir: sta SD_DIRENT+$80, x inx sta SD_DIRENT+$80, x + inx + sta SD_DIRENT+$80, x + inx lda #$22 ; opening quote sta SD_DIRENT+$80, x @@ -205,26 +249,31 @@ fs_hvsr_read_dir: sta SD_DIRENT+$80, x inx - lda #' ' ; XXX put correct amount of spaces instead - sta SD_DIRENT+$80, x - inx + lda #' ' ; put spaces for indentation + ldy SD_DIRENT+$40 + +@lp3: + sta SD_DIRENT+$80, x inx + iny + cpy #$11 + bcc @lp3 ; No 'damaged' mark make sense for this filesystem ldy SD_DIRENT+$FF ; put file type -@lp3: +@lp4: lda dir_types, y - beq @lp3_done + beq @lp4_done sta SD_DIRENT+$80, x inx iny - bra @lp3 + bra @lp4 -@lp3_done: +@lp4_done: lda SD_DIRENT+$FE ; read-only mark (if needed) beq @skipro From 9d082366abb71116e0025374a79c443a9f8efb80 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 16 Feb 2021 16:43:02 +0100 Subject: [PATCH 226/257] started work on file size handling in CBDOS --- Makefile | 4 ++-- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 27 +++++++++++++++-------- src/dos_m65/utils/util_dir_filesize.s | 9 ++++++++ 3 files changed, 29 insertions(+), 11 deletions(-) create mode 100644 src/dos_m65/utils/util_dir_filesize.s diff --git a/Makefile b/Makefile index 07d5800e..bea33050 100644 --- a/Makefile +++ b/Makefile @@ -65,8 +65,8 @@ SRCDIR_DOS_M65 = $(SRCDIR_COMMON) \ src/dos_m65/assets \ src/dos_m65/dev_floppy \ src/dos_m65/dev_ramdisk \ - src/dos_m65/dev_sdcard - + src/dos_m65/dev_sdcard \ + src/dos_m65/utils SRCDIR_MON_M65 = $(SRCDIR_COMMON) \ src/mon_m65 diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index 4148bccf..f8d04c80 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -69,13 +69,8 @@ fs_hvsr_read_dir: ; Dirent structure - important fields: ; - $00-$3F - file name ; - $40 - file name length - ; - $51-$54 - file length - ; - $55-$56 - file type ($10 = dir, $20 = regular) and attributes ($01 for read-only) - - ; Drop some strange (unknown) file types - - lda SD_DIRENT+$55 - bne fs_hvsr_read_dir + ; - $52-$55 - file length + ; - $56-$57 - file type ($10 = dir, $20 = regular) and attributes ($01 for read-only) ; Retrieve read-only status, store mark in SD_DIRENT+$FE @@ -216,14 +211,28 @@ fs_hvsr_read_dir: lda #$01 ; link to the next line - dummy, will be regenerated by BASIC sta SD_DIRENT+$80 sta SD_DIRENT+$81 - lda #$00 ; XXX calculate length in blocks instead + + lda SD_DIRENT+$53 ; XXX calculate length in blocks instead sta SD_DIRENT+$82 + lda SD_DIRENT+$54 sta SD_DIRENT+$83 + bra @len_done ; XXX if size above 9999, force maximum possible length + +@len_max: + + lda #<9999 + sta SD_DIRENT+$82 + lda #>9999 + sta SD_DIRENT+$83 + +@len_done: + ldx SD_DIRENT+$40 ; make sure file name is terminated by 0 + lda #$00 sta SD_DIRENT, x - ldx #$04 ; XXX put correct amount of spaces instead + ldx #$04 ; XXX put correct amount of spaces depending on number size lda #' ' sta SD_DIRENT+$80, x inx diff --git a/src/dos_m65/utils/util_dir_filesize.s b/src/dos_m65/utils/util_dir_filesize.s new file mode 100644 index 00000000..a9f94386 --- /dev/null +++ b/src/dos_m65/utils/util_dir_filesize.s @@ -0,0 +1,9 @@ + +; Adapt the file size for displaying in a directory list + + +util_dir_filesize: + + ; XXX provide implementation + + rts From c9aaa7b1ac4b4c829dbb4262045f475a61547dd6 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 16 Feb 2021 17:55:29 +0100 Subject: [PATCH 227/257] CBDOS directory output tweaks --- src/dos_m65/,aliases_dos.s | 17 +++-- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 44 +++++------ src/dos_m65/utils/util_dir_filesize.s | 92 ++++++++++++++++++++++- 3 files changed, 123 insertions(+), 30 deletions(-) diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index 9a7ec1e6..528acf34 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -35,16 +35,19 @@ !addr IDX1_TALKER = $8012 ; talker idx, >=$80 = none !addr IDX2_TALKER = $8013 ; talker idx * 2, >=$80 = none - for calling routines via vector table + ; Parameters for utilities + + !addr PAR_FSIZE_BLOCKS = $8014 ; 2 bytes - file size in blocks + !addr PAR_FSIZE_BYTES = $8016 ; 4 bytes - file size in bytes + ; Various temporary data - !addr XX_DIR_PHASE = $8014 ; directory output phase, values deponds on device driver - !addr SD_DIR_PHASE = $8014 ; - SD card - !addr FD_DIR_PHASE = $8015 ; - floppy - !addr RD_DIR_PHASE = $8016 ; - ram disk + !addr XX_DIR_PHASE = $801A ; directory output phase, values deponds on device driver + !addr SD_DIR_PHASE = $801A ; - SD card + !addr FD_DIR_PHASE = $801B ; - floppy + !addr RD_DIR_PHASE = $801C ; - ram disk - - - ; Free space: $8014-$8063 + ; Free space: $801D-$8063 !addr SD_ACPTR_helper = $8052 ; subroutine in RAM to read a byte !addr code_LDA_01 = $8052 ; - LDA instruction diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index f8d04c80..f4963269 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -212,34 +212,36 @@ fs_hvsr_read_dir: sta SD_DIRENT+$80 sta SD_DIRENT+$81 - lda SD_DIRENT+$53 ; XXX calculate length in blocks instead - sta SD_DIRENT+$82 - lda SD_DIRENT+$54 - sta SD_DIRENT+$83 - - bra @len_done ; XXX if size above 9999, force maximum possible length - -@len_max: - - lda #<9999 - sta SD_DIRENT+$82 - lda #>9999 - sta SD_DIRENT+$83 - -@len_done: - ldx SD_DIRENT+$40 ; make sure file name is terminated by 0 lda #$00 sta SD_DIRENT, x - ldx #$04 ; XXX put correct amount of spaces depending on number size + lda SD_DIRENT+$52 ; calculate file length in blocks to display + sta PAR_FSIZE_BYTES+0 + lda SD_DIRENT+$53 + sta PAR_FSIZE_BYTES+1 + lda SD_DIRENT+$54 + sta PAR_FSIZE_BYTES+2 + lda SD_DIRENT+$55 + sta PAR_FSIZE_BYTES+3 + + jsr util_dir_filesize_bytes + + lda PAR_FSIZE_BLOCKS+0 + sta SD_DIRENT+$82 + lda PAR_FSIZE_BLOCKS+1 + sta SD_DIRENT+$83 + lda #' ' + ldx #$04 ; indent number of blocks +@lpindent1: + dey + bmi @lpindent1_done sta SD_DIRENT+$80, x inx - sta SD_DIRENT+$80, x - inx - sta SD_DIRENT+$80, x - inx + bra @lpindent1 + +@lpindent1_done: lda #$22 ; opening quote sta SD_DIRENT+$80, x diff --git a/src/dos_m65/utils/util_dir_filesize.s b/src/dos_m65/utils/util_dir_filesize.s index a9f94386..ed399b90 100644 --- a/src/dos_m65/utils/util_dir_filesize.s +++ b/src/dos_m65/utils/util_dir_filesize.s @@ -2,8 +2,96 @@ ; Adapt the file size for displaying in a directory list -util_dir_filesize: +util_dir_filesize_bytes: ; preserves .X - ; XXX provide implementation + ; Convert file size in bytes (32-bit value) to blocks, afterwards + ; continue processing in 'util_dir_filesize_blocks' + ; XXX temporary - calculate size in 254-byte blocks + + lda PAR_FSIZE_BYTES+1 + sta PAR_FSIZE_BLOCKS+0 + lda PAR_FSIZE_BYTES+2 + sta PAR_FSIZE_BLOCKS+1 + + ; FALLTROUGH + +util_dir_filesize_blocks: ; preserves .X + + ; Take file size in blocks (16-bit value), clip to max 9999, + ; return in .Y the amount of spaces needed for indentation + + lda PAR_FSIZE_BLOCKS+1 + cmp #>9999 + beq @cmp_9999_p2 + bcs util_dir_filesize_max + bcc @size_ok + +@cmp_9999_p2: + + lda PAR_FSIZE_BLOCKS+0 + cmp #<9999 + bcs util_dir_filesize_max + +@size_ok: + + lda PAR_FSIZE_BLOCKS+1 + beq @size_123 + +@size_34: ; file size is 256 or above (3 or 4 digits) + + cmp #>1000 + beq @cmp_1000_p2 + bcs util_dir_filesize_4 + bra util_dir_filesize_3 + +@cmp_1000_p2: + + lda PAR_FSIZE_BLOCKS+0 + cmp #<1000 + bcs util_dir_filesize_4 + bra util_dir_filesize_3 + +@size_123: ; file size is 255 or below (1, 2, or 3 digits) + + lda PAR_FSIZE_BLOCKS+0 + cmp #10 + bcs util_dir_filesize_23 + + ; FALLTROUGH + +util_dir_filesize_1: ; file size needs 1 digit + + ldy #$03 + rts + +util_dir_filesize_23: ; file size needs 2 or 3 digits, size in .A + + cmp #100 + bcs util_dir_filesize_3 + + ; FALLTROUGH + +util_dir_filesize_2: ; file size needs 2 digits + + ldy #$02 + rts + +util_dir_filesize_3: ; file size needs 3 digits + + ldy #$01 + rts + +util_dir_filesize_max: + + lda #<9999 + sta PAR_FSIZE_BLOCKS+0 + lda #>9999 + sta PAR_FSIZE_BLOCKS+1 + + ; FALLTROUGH + +util_dir_filesize_4: ; file size needs 4 digits + + ldy #$00 rts From 9466b5cca5223c818d72535dc9830f80a3556168 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 16 Feb 2021 20:38:03 +0100 Subject: [PATCH 228/257] added missing check --- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index f4963269..64587fcb 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -97,6 +97,8 @@ fs_hvsr_read_dir: beq fs_hvsr_read_dir ; quotation mark is illegal cmp #$2A beq fs_hvsr_read_dir ; asterisk is illegal, it is used for filtering + cmp #$3F + beq fs_hvsr_read_dir ; the question mark - in the MS-DOS world it is illegal cmp #$20 bcc fs_hvsr_read_dir ; control characters are not allowed cmp #$5B From 1e0f1eeb920c165d1bbc652a868c590ac5b19f78 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 16 Feb 2021 21:47:26 +0100 Subject: [PATCH 229/257] finished code to calculate number of blocks in CBDOS --- src/dos_m65/,disabled/sdcard_helpers.s | 93 -------- src/dos_m65/,disabled/sdcard_init.s | 243 --------------------- src/dos_m65/,disabled/sdcard_readsector.s | 97 -------- src/dos_m65/,disabled/sdcard_reset.s | 32 --- src/dos_m65/,disabled/sdcard_wait.s | 26 --- src/dos_m65/,disabled/sdcard_writesector.s | 175 --------------- src/dos_m65/utils/util_dir_filesize.s | 93 +++++++- 7 files changed, 89 insertions(+), 670 deletions(-) delete mode 100644 src/dos_m65/,disabled/sdcard_helpers.s delete mode 100644 src/dos_m65/,disabled/sdcard_init.s delete mode 100644 src/dos_m65/,disabled/sdcard_readsector.s delete mode 100644 src/dos_m65/,disabled/sdcard_reset.s delete mode 100644 src/dos_m65/,disabled/sdcard_wait.s delete mode 100644 src/dos_m65/,disabled/sdcard_writesector.s diff --git a/src/dos_m65/,disabled/sdcard_helpers.s b/src/dos_m65/,disabled/sdcard_helpers.s deleted file mode 100644 index 053af35f..00000000 --- a/src/dos_m65/,disabled/sdcard_helpers.s +++ /dev/null @@ -1,93 +0,0 @@ - -; -; Various helper routines for SD card support -; - -; Based on https://github.com/MEGA65/mega65-libc/blob/master/cc65/src/sdcard.c - - - -; -; Sets read/write address -; -; Input: CARD_SECNUM, CARD_IS_SDHC -; Output: Carry set = error -; Preserves: .X, .Y, .Z -; - -sdcard_set_addr: - - bit CARD_IS_SDHC - bpl sdcard_set_addr_sdsc - -sdcard_set_addr_sdhc: - - lda CARD_SECNUM+0 - sta SD_ADDR+0 - lda CARD_SECNUM+1 - sta SD_ADDR+1 - lda CARD_SECNUM+2 - sta SD_ADDR+2 - lda CARD_SECNUM+3 - sta SD_ADDR+3 - - ; FALLTROUGH - -sdcard_set_addr_done: - - clc - rts - -sdcard_set_addr_sdsc: - - ; Multiply sector number by 512 - - lda #$00 - sta SD_ADDR+0 - clc - lda CARD_SECNUM+0 - rol - sta SD_ADDR+1 - lda CARD_SECNUM+1 - rol - sta SD_ADDR+2 - lda CARD_SECNUM+2 - rol - sta SD_ADDR+3 - bcs sdcard_helper_fail ; branch if sector number too large for SD card - lda CARD_SECNUM+3 - beq sdcard_set_addr_done ; do not branch if sector number too large for SD card - - ; FALLTROUGH - -sdcard_helper_fail: - - sec - rts - - -; -; Wait till card is ready -; -; Input: none -; Output: Carry set = error -; Preserves: .Y, .Z - -sdcard_wait_ready: - - ; XXX if card does not get ready, try to reset it - - lda SD_CTL - ; Sometimes we see this result, i.e., sdcard.vhdl thinks it is done, - ; but sdcardio.vhdl thinks not. This means a read error. - cmp #$01 - beq sdcard_helper_fail - tax - and #$40 - bne sdcard_helper_fail - txa - and #$03 - bne sdcard_wait_ready - - clc - rts diff --git a/src/dos_m65/,disabled/sdcard_init.s b/src/dos_m65/,disabled/sdcard_init.s deleted file mode 100644 index 7103ca38..00000000 --- a/src/dos_m65/,disabled/sdcard_init.s +++ /dev/null @@ -1,243 +0,0 @@ - -; -; Initialize memory card, determine it's type and size -; - -; Based on https://github.com/MEGA65/mega65-libc/blob/master/cc65/src/sdcard.c - - - -; XXX finish the routine - - -sdcard_init: - - ; Initialize most important variables - - lda #$00 - sta CARD_IS_SDHC - - lda #SD_SECBUF_0 - sta CARD_BUFPNT1+0 - sta CARD_BUFPNT2+0 - lda #SD_SECBUF_1 - sta CARD_BUFPNT1+1 - inc - sta CARD_BUFPNT2+1 - lda #SD_SECBUF_2 - sta CARD_BUFPNT1+2 - sta CARD_BUFPNT2+2 - lda #SD_SECBUF_3 - sta CARD_BUFPNT1+3 - sta CARD_BUFPNT2+3 - - ; Reset the card - - jsr sdcard_reset - - ; Try to read first sector to see if card is operable - - lda #$00 - sta SD_ADDR+0 - sta SD_ADDR+1 - sta SD_ADDR+2 - sta SD_ADDR+3 - - jsr sdcard_init_read - bcs sdcard_init_getsize_fail ; if failure, mark card as not operable and quit - - ; Work out if this is SD or SDHC card - SD cards can't read at non-sector aligned addresses - - lda #$02 - sta SD_ADDR+0 - lda #$00 - sta SD_ADDR+1 - sta SD_ADDR+2 - sta SD_ADDR+3 - - jsr sdcard_init_read - - lda SD_CTL - beq sdcard_init_sdsc - - ; FALLTROUGH - -sdcard_init_sdhc: - - lda #$80 - sta CARD_IS_SDHC - - bra sdcard_init_getsize - -sdcard_init_sdsc: - - lda #$00 - sta CARD_IS_SDHC - lda #CARD_CMD_SDHC_OFF ; $40 - use byte addressing - sta SD_CTL - - ; FALLTROUGH - -sdcard_init_getsize: - - ; Work out size of SD card in a safe way - ; (binary search of sector numbers is NOT safe for some reason. - ; It frequently reports bigger than the size of the card) - - ; step (and first sector) = 16*2048 - - sta CARD_TMP_STEP+0 - sta CARD_SECNUM+0 - sta CARD_TMP_STEP+2 - sta CARD_SECNUM+2 - sta CARD_TMP_STEP+3 - sta CARD_SECNUM+3 - lda #$08 - sta CARD_TMP_STEP+1 - sta CARD_SECNUM+1 - - ; FALLTROUGH - -sdcard_init_getsize_read: - - ; Try to read sector - - jsr sdcard_readsector - bcc sdcard_init_getsize_next ; XXX original code checks PEEK(sd_ctl)&0x63;... - - ; Failed to read - restore card state and sector number - - jsr sdcard_reset - - sec - lda CARD_SECNUM+0 - sbc CARD_TMP_STEP+0 - sta CARD_SECNUM+0 - lda CARD_SECNUM+1 - sbc CARD_TMP_STEP+1 - sta CARD_SECNUM+1 - lda CARD_SECNUM+2 - sbc CARD_TMP_STEP+2 - sta CARD_SECNUM+2 - lda CARD_SECNUM+3 - sbc CARD_TMP_STEP+3 - sta CARD_SECNUM+3 - - ; Divide step by 2, skip bytes which are always 0 - - clc - ; ror CARD_TMP_STEP+3 - ; ror CARD_TMP_STEP+2 - ror CARD_TMP_STEP+1 - ror CARD_TMP_STEP+0 - - ; FALLTROUGH - -sdcard_init_getsize_next: - - ; Increment sector number by step - - clc - lda CARD_SECNUM+0 - adc CARD_TMP_STEP+0 - sta CARD_SECNUM+0 - lda CARD_SECNUM+1 - adc CARD_TMP_STEP+1 - sta CARD_SECNUM+1 - lda CARD_SECNUM+2 - adc CARD_TMP_STEP+2 - sta CARD_SECNUM+2 - lda CARD_SECNUM+3 - adc CARD_TMP_STEP+3 - sta CARD_SECNUM+3 - - ; If sector number is 0 - report failure - - lda CARD_SECNUM+0 - ora CARD_SECNUM+1 - ora CARD_SECNUM+2 - ora CARD_SECNUM+3 - beq sdcard_init_getsize_fail - - ; If step is 0 - this is the end, we know maximum size - - lda CARD_TMP_STEP+0 - ora CARD_TMP_STEP+1 - ora CARD_TMP_STEP+2 - ora CARD_TMP_STEP+3 - beq sdcard_init_getsize_done - - ; Check sector number, should be below $10:$00:$00:$00 - - lda CARD_SECNUM+3 - and #$F0 - bne sdcard_init_getsize_read - - ; It is not - report maximum size - - lda #$FF - sta CARD_SECNUM+0 - sta CARD_SECNUM+1 - sta CARD_SECNUM+2 - lda #$0F - sta CARD_SECNUM+3 - - ; FALLTROUGH - -sdcard_init_getsize_done: - - ; Return sector number as maximum readable sector - - lda CARD_SECNUM+0 - sta CARD_SIZE+0 - lda CARD_SECNUM+1 - sta CARD_SIZE+1 - lda CARD_SECNUM+2 - sta CARD_SIZE+2 - lda CARD_SECNUM+3 - sta CARD_SIZE+3 - - clc - rts - -sdcard_init_getsize_fail: - - ; XXX mark card as inoperable - - sec - rts - - - -; -; Helper routines -; - - -sdcard_init_read: - - ; Trigger read - - lda #CARD_CMD_READ ; $02 - sta SD_CTL - - ; Wait for result - - ldx #90 -@1: - jsr sdcard_wait_16000_usec - lda SD_CTL - and #$03 - beq @2 - dex - bne @1 - - ; Read failed - - sec - rts -@2: - ;; Success - - clc - rts diff --git a/src/dos_m65/,disabled/sdcard_readsector.s b/src/dos_m65/,disabled/sdcard_readsector.s deleted file mode 100644 index c2523185..00000000 --- a/src/dos_m65/,disabled/sdcard_readsector.s +++ /dev/null @@ -1,97 +0,0 @@ - -; -; Reads the sector from the SD card -; - -; Based on https://github.com/MEGA65/mega65-libc/blob/master/cc65/src/sdcard.c - - -; XXX provide documentation - - -sdcard_readsector: - - ; XXX check if card initialized and operable - - ; Set read address - - jsr sdcard_set_addr - bcs sdcard_readsector_fail - - ; FALLTROUGH - -sdcard_readsector_read: - - ; Set number of retries - - lda #$0A - sta CARD_TMP_RETRIES - - ; FALLTROUGH - -sdcard_readsector_try_loop: - - ; Wait till card is ready - - jsr sdcard_wait_ready - bcs sdcard_readsector_fail - - ; Read command - - lda #CARD_CMD_READ ; $02 - sta SD_CTL - - ; Wait for command completion - - jsr sdcard_wait_ready - bcs sdcard_readsector_fail - - lda SD_CTL - and #$67 - bne sdcard_readsector_copy_data - - jsr sdcard_reset - dec CARD_TMP_RETRIES - bne sdcard_readsector_try_loop - - ; FALLTROUGH - -sdcard_readsector_fail: - - sec - rts - - -; -; Helper routines -; - -sdcard_readsector_copy_data: - - ; XXX use DMAgic for this - - phz - phx - - ldx #$00 - ldz #$00 - -@1: - lda [CARD_BUFPNT],z - sta CARD_BUF,x - inc CARD_BUFPNT+1 - lda [CARD_BUFPNT],z - sta CARD_BUF+$100,x - dec CARD_BUFPNT+1 - - inz - inx - bne @1 - - ; Restore registers and quit - - plx - plz - - clc - rts diff --git a/src/dos_m65/,disabled/sdcard_reset.s b/src/dos_m65/,disabled/sdcard_reset.s deleted file mode 100644 index 244233bf..00000000 --- a/src/dos_m65/,disabled/sdcard_reset.s +++ /dev/null @@ -1,32 +0,0 @@ - -; -; Resets the SD card -; - -; Based on https://github.com/MEGA65/mega65-libc/blob/master/cc65/src/sdcard.c - - - -sdcard_reset: - - ldx #CARD_CMD_SDHC_OFF ; $40 - stx SD_CTL - ldy #CARD_CMD_RESET ; $00 - sty SD_CTL - ldy #CARD_CMD_END_RESET ; $01 - sty SD_CTL - - ; Wait till SD card resets -@1: - lda SD_CTL - and #$03 - bne @1 - - ; For SDHC card set appropriate mode - - bit CARD_IS_SDHC - bpl @2 - ldx #CARD_CMD_SDHC_ON ; $41 - stx SD_CTL -@2: - rts diff --git a/src/dos_m65/,disabled/sdcard_wait.s b/src/dos_m65/,disabled/sdcard_wait.s deleted file mode 100644 index 59f89cb7..00000000 --- a/src/dos_m65/,disabled/sdcard_wait.s +++ /dev/null @@ -1,26 +0,0 @@ - - - -sdcard_wait_16000_usec: - - ; Uses VIC-II raster register; wait time is not exactly precise, but should be - ; a good approximation - - phx - pha - - ldx #$FF - - ; XXX wait below is same as in KKERNAL, wait_x_lines - consider importing and reusing - lda VIC_RASTER -@1: - cmp VIC_RASTER - beq @1 - lda VIC_RASTER - dex - bne @1 - - pla - plx - - rts diff --git a/src/dos_m65/,disabled/sdcard_writesector.s b/src/dos_m65/,disabled/sdcard_writesector.s deleted file mode 100644 index e4e1ac25..00000000 --- a/src/dos_m65/,disabled/sdcard_writesector.s +++ /dev/null @@ -1,175 +0,0 @@ - -; -; Writes the sector to the SD card -; - -; Based on https://github.com/MEGA65/mega65-libc/blob/master/cc65/src/sdcard.c - - -; XXX finish, provide documentation - - -sdcard_writesector: - - ; XXX check if card initialized and operable - - lda SD_CTL - and #$03 - bne sdcard_writesector ; XXX add a timer here - - ; End reset XXX is this needed? should this be done for sector reading too? - - lda #CARD_CMD_END_RESET ; $01 - sta SD_CTL - - ; Set write address - - jsr sdcard_set_addr - bcs sdcard_writesector_fail - - ; FALLTROUGH - -sdcard_writesector_write: - - ; Set number of retries - - lda #$0A - sta CARD_TMP_RETRIES - - ; FALLTROUGH - -sdcard_writesector_try_loop: - - jsr sdcard_writesector_copy_data - - ; Wait till card is ready - - jsr sdcard_wait_ready - bcs sdcard_writesector_fail - - ; Write command - - lda #CARD_CMD_WRITE ; $03 - sta SD_CTL - - ; Wait for command completion - - jsr sdcard_wait_ready - bcs sdcard_writesector_fail - - ; Check result - - lda SD_CTL - and #$67 - bne sdcard_writesector_verify - - ; Write failed - retry - - jsr sdcard_reset - dec CARD_TMP_RETRIES - bne sdcard_writesector_try_loop - - ; FALLTROUGH - -sdcard_writesector_fail: - - sec - rts - -sdcard_writesector_verify: - - ; There is a bug in the SD controller; you have to read between writes, - ; or it gets really upset - -@1: - lda SD_CTL - and #$03 - bne @1 - - lda #CARD_CMD_READ ; $02 - sta SD_CTL - -@2: - lda SD_CTL - and #$03 - beq @2 - -@3: ; XXX deduplicate this ppart - lda SD_CTL - and #$03 - bne @3 - - ; FALLTROUGH - -sdcard_writesector_verify_loop: - - ; Compare buffers - - phx - phz - - ldx #$00 - ldz #$00 - - lda [CARD_BUFPNT1],z - cmp CARD_BUF, x - bne sdcard_writesector_verify_fail - - lda [CARD_BUFPNT2],z - cmp CARD_BUF+$100, x - bne sdcard_writesector_verify_fail - - inz - inx - bne sdcard_writesector_verify_loop - - ; FALLTROUGH - -sdcard_writesector_verify_success: - - plz - plx - - clc - rts - -sdcard_writesector_verify_fail: - - plz - plx - - sec - rts - - -; -; Helper routines -; - -sdcard_writesector_copy_data: - - ; XXX use DMAgic for this - - phz - phx - - ldx #$00 - ldz #$00 - -@1: - lda CARD_BUF,x - sta [CARD_BUFPNT1],z - lda CARD_BUF+$100,x - sta [CARD_BUFPNT2],z - - inz - inx - bne @1 - - ; Restore registers and quit - - plx - plz - - clc - rts diff --git a/src/dos_m65/utils/util_dir_filesize.s b/src/dos_m65/utils/util_dir_filesize.s index ed399b90..ee8c4f2c 100644 --- a/src/dos_m65/utils/util_dir_filesize.s +++ b/src/dos_m65/utils/util_dir_filesize.s @@ -7,13 +7,75 @@ util_dir_filesize_bytes: ; preserves .X ; Convert file size in bytes (32-bit value) to blocks, afterwards ; continue processing in 'util_dir_filesize_blocks' - ; XXX temporary - calculate size in 254-byte blocks - - lda PAR_FSIZE_BYTES+1 - sta PAR_FSIZE_BLOCKS+0 + ; Start from handling some large values + + lda PAR_FSIZE_BYTES+3 + +bne util_dir_filesize_max ; file over 16MB size lda PAR_FSIZE_BYTES+2 + inc + +beq util_dir_filesize_max ; file over 8MB size + + ; Set initial size as 0 blocks + + lda #$00 + sta PAR_FSIZE_BLOCKS+0 sta PAR_FSIZE_BLOCKS+1 + ; Calculate number of blocks + + ldy #$03 + +@lp: + + lda PAR_FSIZE_BYTES+2 + cmp util_dir_cmptab_hi,y + bcc @lp_next + bne @lp_adc_sbc + lda PAR_FSIZE_BYTES+1 + cmp util_dir_cmptab_mi,y + bcc @lp_next + bne @lp_adc_sbc + lda PAR_FSIZE_BYTES+0 + cmp util_dir_cmptab_lo,y + bcc @lp_next + +@lp_adc_sbc: + + clc + lda PAR_FSIZE_BLOCKS+0 + adc util_dir_addtab_lo,y + sta PAR_FSIZE_BLOCKS+0 + lda PAR_FSIZE_BLOCKS+1 + adc util_dir_addtab_hi,y + sta PAR_FSIZE_BLOCKS+1 + + sec + lda PAR_FSIZE_BYTES+0 + sbc util_dir_cmptab_lo, y + sta PAR_FSIZE_BYTES+0 + lda PAR_FSIZE_BYTES+1 + sbc util_dir_cmptab_mi, y + sta PAR_FSIZE_BYTES+1 + lda PAR_FSIZE_BYTES+2 + sbc util_dir_cmptab_hi, y + sta PAR_FSIZE_BYTES+2 + + bra @lp + +@lp_next: + + dey + bpl @lp + + ; Correct for bytes not filling in the whole block + + lda PAR_FSIZE_BYTES+0 + beq util_dir_filesize_blocks + + inc PAR_FSIZE_BLOCKS+0 + bne util_dir_filesize_blocks + inc PAR_FSIZE_BLOCKS+1 + ; FALLTROUGH util_dir_filesize_blocks: ; preserves .X @@ -95,3 +157,26 @@ util_dir_filesize_4: ; file size needs 4 digits ldy #$00 rts + + +; Tables for calculating blocks from bytes + +util_dir_addtab_hi: + + !byte $00, $00 ; 2 next bytes same as in 'lo' table + +util_dir_addtab_lo: + + !byte $01, $10, $00, $00 + +util_dir_cmptab_hi: + + !byte ^(254), ^(254 * 16), ^(254 * 16 * 16), ^(254 * 16 * 16 * 16), ^(254 * 16 * 16 * 16 * 16) + +util_dir_cmptab_mi: + + !byte >(254), >(254 * 16), >(254 * 16 * 16), >(254 * 16 * 16 * 16), >(254 * 16 * 16 * 16 * 16) + +util_dir_cmptab_lo: + + !byte <(254), <(254 * 16), <(254 * 16 * 16), <(254 * 16 * 16 * 16), <(254 * 16 * 16 * 16 * 16) From e98520d8054a4c5fab0b476d97f8a3a9cead74b6 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 16 Feb 2021 22:27:17 +0100 Subject: [PATCH 230/257] updated documentation --- STATUS.md | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/STATUS.md b/STATUS.md index c4f1f877..0a357245 100644 --- a/STATUS.md +++ b/STATUS.md @@ -101,6 +101,7 @@ The following ROM features are currently missing: | :----------------: | :------: | :------------------------------------------------: | | standard | DONE | | | JiffyDOS | PARTIAL | LOAD needs improvement for better performance | +| ELoad v1 | NOT DONE | | | DolphinDOS | DONE | | | CIA burst mod | NOT DONE | | | MEGA65 burst | NOT DONE | | @@ -125,10 +126,11 @@ The following ROM features are currently missing:
-| Driver | Status | Remarks | -| :----------------: | :------: | :-------------------------------------------------------------------------: | -| internal floppy | NOT DONE | try to reuse https://github.com/commanderx16/x16-rom/tree/master/dos | -| SD card access | NOT DONE | tryy to reuse https://github.com/commanderx16/x16-rom/tree/master/dos/fat32 | +| Driver | Status | Remarks | +| :----------------: | :------: | :------------------------------------------------: | +| SD card | PARTIAL | work-in-progress | +| floppy drive | NOT DONE | | +| ram disk | NOT DONE | |
From 45ad2ebe6d8c22c69135599504777a41807f7513 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 17 Feb 2021 17:46:06 +0100 Subject: [PATCH 231/257] preparation for more general error handling in CBDOS --- src/dos_m65/,aliases_dos.s | 26 ++- src/dos_m65/assets/dos_error_strings.s | 156 ----------------- src/dos_m65/assets/dos_parts_dir.s | 2 +- src/dos_m65/assets/dos_status_strings.s | 184 +++++++++++++++++++++ src/dos_m65/dev_floppy/dev_fd_init.s | 2 +- src/dos_m65/dev_ramdisk/dev_rd_init.s | 2 +- src/dos_m65/dev_sdcard/dev_sd_init.s | 2 +- src/dos_m65/dev_sdcard/fs_hvsr_open_file.s | 12 ++ src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 6 +- src/dos_m65/dos_error.s | 2 +- src/dos_m65/dos_init.s | 4 + src/dos_m65/utils/util_status.s | 122 ++++++++++++++ 12 files changed, 347 insertions(+), 173 deletions(-) delete mode 100644 src/dos_m65/assets/dos_error_strings.s create mode 100644 src/dos_m65/assets/dos_status_strings.s create mode 100644 src/dos_m65/dev_sdcard/fs_hvsr_open_file.s create mode 100644 src/dos_m65/utils/util_status.s diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index 528acf34..63254ee4 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -35,19 +35,28 @@ !addr IDX1_TALKER = $8012 ; talker idx, >=$80 = none !addr IDX2_TALKER = $8013 ; talker idx * 2, >=$80 = none - for calling routines via vector table + ; Helper subroutines to fetch data + + !addr code_LDA_nnnn_Y = $8014 ; - LDA nnnn, Y instruction + !addr par_LDA_nnnn_Y = $8015 ; - 2 bytes; address in buffer, ram disk + !addr code_RTS_04 = $8017 ; - RTS instruction + ; Parameters for utilities - !addr PAR_FSIZE_BLOCKS = $8014 ; 2 bytes - file size in blocks - !addr PAR_FSIZE_BYTES = $8016 ; 4 bytes - file size in bytes + !addr PAR_TRACK = $8018 ; track number for status/error + !addr PAR_SECTOR = $8019 ; sector number for status/error + + !addr PAR_FSIZE_BYTES = $801A ; 4 bytes - file size in bytes + !addr PAR_FSIZE_BLOCKS = $801E ; 2 bytes - file size in blocks ; Various temporary data - !addr XX_DIR_PHASE = $801A ; directory output phase, values deponds on device driver - !addr SD_DIR_PHASE = $801A ; - SD card - !addr FD_DIR_PHASE = $801B ; - floppy - !addr RD_DIR_PHASE = $801C ; - ram disk + !addr XX_DIR_PHASE = $8020 ; directory output phase, values deponds on device driver, but 0 = not reading + !addr SD_DIR_PHASE = $8020 ; - SD card + !addr FD_DIR_PHASE = $8021 ; - floppy + !addr RD_DIR_PHASE = $8022 ; - ram disk - ; Free space: $801D-$8063 + ; Free space: $8023-$8063 !addr SD_ACPTR_helper = $8052 ; subroutine in RAM to read a byte !addr code_LDA_01 = $8052 ; - LDA instruction @@ -99,5 +108,4 @@ !addr RD_CMDFN_BUF = $8200 ; buffer for command and/or file name, 128 bytes, ram disk !addr SD_DIRENT = $8280 ; 256 byte buffer for 'dirent' structure - !addr SD_DIR_DESC = $8380 ; file descriptor for reading directory - + !addr SD_DESC = $8380 ; current file descriptor diff --git a/src/dos_m65/assets/dos_error_strings.s b/src/dos_m65/assets/dos_error_strings.s deleted file mode 100644 index 922d9dfa..00000000 --- a/src/dos_m65/assets/dos_error_strings.s +++ /dev/null @@ -1,156 +0,0 @@ - -; -; DOS error codes and strings -; - - -; XXX get rid of unnecessary error messages - - -dos_err_init_sdcard: - - !pet "73,m65 dos sd card,00,00", 0 - -dos_err_init_floppy: - - !pet "73,m65 dos floppy,00,00", 0 - -dos_err_init_ramdisk: - - !pet "73,m65 dos ram disk,00,00", 0 - - -; List compiled from various manuals (CBM 1571, CBM 1581, CMD FD4000, MSD Super Disk, IDE64) - - -dos_err_00: ; not an error - - !pet " ok", 0 - -dos_err_01: ; not an error - - !pet "files scratched", 0 - -dos_err_02: ; not an error - - !pet "partition selected", 0 - -dos_err_20: ; header not found -dos_err_21: ; no data addres mark -dos_err_22: ; block not found -dos_err_23: ; data error -dos_err_27: ; header error - - !pet "read error", 0 - -dos_err_25: - - !pet "write error", 0 - -dos_err_26: - - !pet "write protect on", 0 - -dos_err_29: - - !pet "disk changed", 0 - -dos_err_30: ; invalid characters in command -dos_err_31: ; unrecognized command -dos_err_32: ; command too long -dos_err_33: ; illegal file name -dos_err_34: ; missing file name - - !pet "syntax error", 0 - -dos_err_39: - - !pet "file not found", 0 - -dos_err_49: ; disk formatted, but format not supported - - !pet "invalid format", 0 - -dos_err_50: - - !pet "record not present", 0 - -dos_err_51: - - !pet "overflow in record", 0 - -dos_err_52: - - !pet "file too large", 0 - -dos_err_60: - - !pet "write file open", 0 - -dos_err_61: - - !pet "file not open", 0 - -dos_err_62: - - !pet "file not found", 0 - -dos_err_63: - - !pet "file exists", 0 - -dos_err_64: - - !pet "file type mismatch", 0 - -dos_err_65: - - !pet "no block", 0 - -dos_err_66: - - !pet "illegal track and sector", 0 - -dos_err_67: - - !pet "illegal system t or s", 0 - -dos_err_70: - - !pet "no channel", 0 - -dos_err_71: - - !pet "directory error", 0 - -dos_err_72: - - !pet "partition full", 0 - -dos_err_73: - - !pet "dos mismatch", 0 - -dos_err_74: - - !pet "drive not ready", 0 - -dos_err_75: - - !pet "format error", 0 - -dos_err_76: - - !pet "controller error", 0 - -dos_err_77: - - !pet "selected partition illegal", 0 - -dos_err_78: - - !pet "system error", 0 - -dos_err_79: ; SD2IEC compatible - - !pet "image invalid", 0 diff --git a/src/dos_m65/assets/dos_parts_dir.s b/src/dos_m65/assets/dos_parts_dir.s index 0c7efbc7..a81e9e89 100644 --- a/src/dos_m65/assets/dos_parts_dir.s +++ b/src/dos_m65/assets/dos_parts_dir.s @@ -28,7 +28,7 @@ dir_hdr_sd: ; 32 bytes - header dir_end: ; 19 bytes !byte $01, $01 ; link to the next line - dummy, will be regenerated by BASIC - !byte $FF, $FF ; line number 65535 (for SD2IEC compatibility) + !byte $00, $00 ; line number 0 (blocks available) !pet "blocks free." !byte $00, $00, $00 ; end of the line, end of program marker diff --git a/src/dos_m65/assets/dos_status_strings.s b/src/dos_m65/assets/dos_status_strings.s new file mode 100644 index 00000000..8c89421e --- /dev/null +++ b/src/dos_m65/assets/dos_status_strings.s @@ -0,0 +1,184 @@ + +; +; DOS error codes and strings +; + + +; XXX get rid of unnecessary error messages + + +dos_sts_init_sdcard: + + !pet "73,m65 dos sd card,00,00", 0 + +dos_sts_init_floppy: + + !pet "73,m65 dos floppy,00,00", 0 + +dos_sts_init_ramdisk: + + !pet "73,m65 dos ram disk,00,00", 0 + + +; List compiled from various manuals (CBM 1571, CBM 1581, CMD FD4000, MSD Super Disk, IDE64) + +dos_sts_00: ; not an error + + !pet " ok", 0 + +dos_sts_01: ; not an error + + !pet "files scratched", 0 + +dos_sts_02: ; not an error + + !pet "partition selected", 0 + +dos_sts_20: ; header not found +dos_sts_21: ; no data addres mark +dos_sts_22: ; block not found +dos_sts_23: ; data error +dos_sts_27: ; header error + + !pet "read error", 0 + +dos_sts_25: + + !pet "write error", 0 + +dos_sts_26: + + !pet "write protect on", 0 + +dos_sts_29: + + !pet "disk changed", 0 + +dos_sts_30: ; invalid characters in command +dos_sts_31: ; unrecognized command +dos_sts_32: ; command too long +dos_sts_33: ; illegal file name +dos_sts_34: ; missing file name + + !pet "syntax error", 0 + +dos_sts_39: + + !pet "file not found", 0 + +dos_sts_49: ; disk formatted, but format not supported + + !pet "invalid format", 0 + +dos_sts_50: + + !pet "record not present", 0 + +dos_sts_51: + + !pet "overflow in record", 0 + +dos_sts_52: + + !pet "file too large", 0 + +dos_sts_60: + + !pet "write file open", 0 + +dos_sts_61: + + !pet "file not open", 0 + +dos_sts_62: + + !pet "file not found", 0 + +dos_sts_63: + + !pet "file exists", 0 + +dos_sts_64: + + !pet "file type mismatch", 0 + +dos_sts_65: + + !pet "no block", 0 + +dos_sts_66: + + !pet "illegal track and sector", 0 + +dos_sts_67: + + !pet "illegal system t or s", 0 + +dos_sts_70: + + !pet "no channel", 0 + +dos_sts_71: + + !pet "directory error", 0 + +dos_sts_72: + + !pet "partition full", 0 + +dos_sts_73: + + !pet "dos mismatch", 0 + +dos_sts_74: + + !pet "drive not ready", 0 + +dos_sts_75: + + !pet "format error", 0 + +dos_sts_76: + + !pet "controller error", 0 + +dos_sts_77: + + !pet "selected partition illegal", 0 + +dos_sts_78: + + !pet "system error", 0 + +dos_sts_79: ; SD2IEC compatible + + !pet "image invalid", 0 + +dos_sts_XX: ; Open ROMs specific - unspecified error + + !pet "internal error", 0 + + +dos_sts_tab_lo: + + !byte dos_sts_00, >dos_sts_01, >dos_sts_02, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX + !byte >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX + !byte >dos_sts_20, >dos_sts_21, >dos_sts_22, >dos_sts_23, >dos_sts_XX, >dos_sts_25, >dos_sts_26, >dos_sts_27, >dos_sts_XX, >dos_sts_29 + !byte >dos_sts_30, >dos_sts_31, >dos_sts_32, >dos_sts_33, >dos_sts_34, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_39 + !byte >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_49 + !byte >dos_sts_50, >dos_sts_51, >dos_sts_52, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX, >dos_sts_XX + !byte >dos_sts_60, >dos_sts_61, >dos_sts_62, >dos_sts_63, >dos_sts_64, >dos_sts_65, >dos_sts_66, >dos_sts_67, >dos_sts_XX, >dos_sts_XX + !byte >dos_sts_70, >dos_sts_71, >dos_sts_72, >dos_sts_73, >dos_sts_74, >dos_sts_75, >dos_sts_76, >dos_sts_77, >dos_sts_78, >dos_sts_79 + !byte >dos_sts_XX diff --git a/src/dos_m65/dev_floppy/dev_fd_init.s b/src/dos_m65/dev_floppy/dev_fd_init.s index 09791d41..501bcc61 100644 --- a/src/dos_m65/dev_floppy/dev_fd_init.s +++ b/src/dos_m65/dev_floppy/dev_fd_init.s @@ -19,7 +19,7 @@ dev_fd_init: dex @1: inx - lda dos_err_init_floppy,x + lda dos_sts_init_floppy,x sta FD_STATUS_STR,x bne @1 diff --git a/src/dos_m65/dev_ramdisk/dev_rd_init.s b/src/dos_m65/dev_ramdisk/dev_rd_init.s index fbe87e3b..e7be8d2c 100644 --- a/src/dos_m65/dev_ramdisk/dev_rd_init.s +++ b/src/dos_m65/dev_ramdisk/dev_rd_init.s @@ -19,7 +19,7 @@ dev_rd_init: dex @1: inx - lda dos_err_init_ramdisk,x + lda dos_sts_init_ramdisk,x sta RD_STATUS_STR,x bne @1 diff --git a/src/dos_m65/dev_sdcard/dev_sd_init.s b/src/dos_m65/dev_sdcard/dev_sd_init.s index 865ff955..526e5d3a 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_init.s +++ b/src/dos_m65/dev_sdcard/dev_sd_init.s @@ -20,7 +20,7 @@ dev_sd_init: dex @1: inx - lda dos_err_init_sdcard,x + lda dos_sts_init_sdcard,x sta SD_STATUS_STR,x bne @1 diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_open_file.s b/src/dos_m65/dev_sdcard/fs_hvsr_open_file.s new file mode 100644 index 00000000..cab06208 --- /dev/null +++ b/src/dos_m65/dev_sdcard/fs_hvsr_open_file.s @@ -0,0 +1,12 @@ + +; +; Hypervisor virtual filesystem - opening the file +; + + +fs_hvsr_read_file_open: + + ; XXX provide implementation + + sec + rts diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index 64587fcb..27579f34 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -17,7 +17,7 @@ fs_hvsr_read_dir_open: ; XXX handle read errors - sta SD_DIR_DESC ; store directory descriptor XXX invent better name + sta SD_DESC ; store directory descriptor XXX invent better name ; Reset status to OK @@ -53,7 +53,7 @@ fs_hvsr_read_dir: jsr fs_hvsr_dirent_prepare - ldx SD_DIR_DESC ; directory descriptor + ldx SD_DESC ; directory descriptor ldy #$10 ; target page number lda #$14 ; dos_readdir @@ -333,7 +333,7 @@ fs_hvsr_read_dir_blocksfree: ; Close the directory within the hypervisor XXX maybe move it to close routine - ldx SD_DIR_DESC + ldx SD_DESC lda #$16 ; dos_closedir sta HTRAP00 +nop diff --git a/src/dos_m65/dos_error.s b/src/dos_m65/dos_error.s index d8859e04..a02fc3fe 100644 --- a/src/dos_m65/dos_error.s +++ b/src/dos_m65/dos_error.s @@ -41,7 +41,7 @@ dos_status_00: ; OK @1: inx iny - lda dos_err_00, y + lda dos_sts_00, y beq @2 sta XX_STATUS_STR, x bra @1 diff --git a/src/dos_m65/dos_init.s b/src/dos_m65/dos_init.s index 66a81d8c..4654eda5 100644 --- a/src/dos_m65/dos_init.s +++ b/src/dos_m65/dos_init.s @@ -51,10 +51,14 @@ dos_INIT: sta code_LDA_02 sta code_LDA_03 + lda #$B9 ; LDA nnnn, y opcode + sta code_LDA_nnnn_Y + lda #$60 ; RTS opcode sta code_RTS_01 sta code_RTS_02 sta code_RTS_03 + sta code_RTS_04 ; Exit DOS context diff --git a/src/dos_m65/utils/util_status.s b/src/dos_m65/utils/util_status.s new file mode 100644 index 00000000..4a4e0bf9 --- /dev/null +++ b/src/dos_m65/utils/util_status.s @@ -0,0 +1,122 @@ + +; Set current status or error + + +; XXX add code for handling the LEDs + + +; .A = status to set + +util_status_SD: + + ldx #$00 + stx SD_STATUS_IDX ; set first byte of status to read + ldx $00 ; offset to status buffer + bra util_status_common + +util_status_FD: + + ldx #$00 + stx FD_STATUS_IDX ; set first byte of status to read + ldx $20 ; offset to status buffer + bra util_status_common + +util_status_RD: + + ldx #$00 + stx RD_STATUS_IDX ; set first byte of status to read + ldx $40 ; offset to status buffer + + ; FALLLTROUGH + +util_status_common: + + ; Store the error number + + taz + jsr util_status_store_number + jsr util_status_store_comma + + ; Store the status / error string + + tza ; prepare helper routine + tay + lda dos_sts_tab_lo, y + sta par_LDA_nnnn_Y+0 + lda dos_sts_tab_hi, y + sta par_LDA_nnnn_Y+1 + + ldy #$00 ; copy the string +@lp: + jsr code_LDA_nnnn_Y + bne @lp_end + sta XX_STATUS_STR, x + iny + inx + bra @lp + +@lp_end: + + ; Store track and sector + + lda PAR_TRACK + jsr util_status_store_number + jsr util_status_store_comma + lda PAR_SECTOR + jsr util_status_store_number + + ; Mark end of status and quit + + lda #$00 + sta XX_STATUS_STR, x + rts + +util_status_store_comma: + + ldy #',' + sty XX_STATUS_STR, x + inx + rts + +util_status_store_number: + + ; Check if number to store is 200 or above + + cmp #200 + bcc @store_00_199 + ldy #'2' + sty XX_STATUS_STR, x + inx + sec + sbc #200 + bra @store_00_99 + +@store_00_199: ; number to store is within 00-199 range + + cmp #100 + bcc @store_00_99 + ldy #'1' + sty XX_STATUS_STR, x + inx + sec + sbc #100 + +@store_00_99: ; number to store is within 00-99 range - separate digits + + ldy #'0' +@lp: + cmp #10 + bcc @store_finalize + iny + sec + sbc #10 + bra @lp + +@store_finalize: ; first digit to store in .Y, second in .A + + sty XX_STATUS_STR, x + inx + sta XX_STATUS_STR, x + inx + + rts From d0ead5d970052467a38fec1445f48566cea71f62 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 17 Feb 2021 18:48:23 +0100 Subject: [PATCH 232/257] old code removal in CBDOS, bugfixes --- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 4 +- src/dos_m65/dos_error.s | 82 ----------------------- src/dos_m65/msg_acptr.s | 13 +++- src/dos_m65/utils/util_status.s | 13 ++-- 4 files changed, 22 insertions(+), 90 deletions(-) delete mode 100644 src/dos_m65/dos_error.s diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index 27579f34..e450a0dc 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -22,7 +22,9 @@ fs_hvsr_read_dir_open: ; Reset status to OK lda #$00 - jsr dos_status_00 + sta PAR_TRACK + sta PAR_SECTOR + jsr util_status_SD ; Provide pointer to the header diff --git a/src/dos_m65/dos_error.s b/src/dos_m65/dos_error.s deleted file mode 100644 index a02fc3fe..00000000 --- a/src/dos_m65/dos_error.s +++ /dev/null @@ -1,82 +0,0 @@ - -; -; Set current error or status -; - - -; XXX add methods for remaining codes -; XXX size-optimize this, move some parts into subroutines - - -; .A = 0 for SD card, 1 for FDD, 2 for RAM disk - -dos_status_00: ; OK - - ; Set status byte pointer to the beginning - - tax - lda #$00 - sta XX_STATUS_IDX, x - - ; Set .X to offset from XX_STATUS_STR - - lda dos_status_offset, x - tax - - ; Store '00,' - - lda #'0' - sta XX_STATUS_STR, x - inx - sta XX_STATUS_STR, x - inx - lda #',' - sta XX_STATUS_STR, x - inx - - ; Store 'OK' - - dex - ldy #$FF -@1: - inx - iny - lda dos_sts_00, y - beq @2 - sta XX_STATUS_STR, x - bra @1 -@2: - ; Store ',00,00' - - lda #',' - sta XX_STATUS_STR, x - inx - lda #'0' - sta XX_STATUS_STR, x - inx - sta XX_STATUS_STR, x - inx - lda #',' - sta XX_STATUS_STR, x - inx - lda #'0' - sta XX_STATUS_STR, x - inx - sta XX_STATUS_STR, x - inx - - ; Store 0 (mark end of the status) - - lda #$00 - sta XX_STATUS_STR, x - - ; End - - rts - - - - -dos_status_offset: - - !byte $00,$20,$40 diff --git a/src/dos_m65/msg_acptr.s b/src/dos_m65/msg_acptr.s index 032700c5..0d73ae4d 100644 --- a/src/dos_m65/msg_acptr.s +++ b/src/dos_m65/msg_acptr.s @@ -123,8 +123,11 @@ msg_ACPTR_fail_no_talker: msg_ACPTR_reset_status: - lda IDX1_TALKER - jsr dos_status_00 + ldx IDX2_TALKER + lda #$00 + sta PAR_TRACK + sta PAR_SECTOR + jsr (msg_ACPTR_set_status_vectab, x) ; FALLTROUGH @@ -147,3 +150,9 @@ msg_ACPTR_read_vectab: !word msg_ACPTR_read_SD !word msg_ACPTR_read_FD !word msg_ACPTR_read_RD + +msg_ACPTR_set_status_vectab: + + !word util_status_SD + !word util_status_FD + !word util_status_RD diff --git a/src/dos_m65/utils/util_status.s b/src/dos_m65/utils/util_status.s index 4a4e0bf9..126f7a96 100644 --- a/src/dos_m65/utils/util_status.s +++ b/src/dos_m65/utils/util_status.s @@ -11,21 +11,21 @@ util_status_SD: ldx #$00 stx SD_STATUS_IDX ; set first byte of status to read - ldx $00 ; offset to status buffer + ldx #$00 ; offset to status buffer bra util_status_common util_status_FD: ldx #$00 stx FD_STATUS_IDX ; set first byte of status to read - ldx $20 ; offset to status buffer + ldx #$20 ; offset to status buffer bra util_status_common util_status_RD: ldx #$00 stx RD_STATUS_IDX ; set first byte of status to read - ldx $40 ; offset to status buffer + ldx #$40 ; offset to status buffer ; FALLLTROUGH @@ -49,7 +49,7 @@ util_status_common: ldy #$00 ; copy the string @lp: jsr code_LDA_nnnn_Y - bne @lp_end + beq @lp_end sta XX_STATUS_STR, x iny inx @@ -59,6 +59,7 @@ util_status_common: ; Store track and sector + jsr util_status_store_comma lda PAR_TRACK jsr util_status_store_number jsr util_status_store_comma @@ -112,10 +113,12 @@ util_status_store_number: sbc #10 bra @lp -@store_finalize: ; first digit to store in .Y, second in .A +@store_finalize: ; first digit to store in .Y, second in .A (need no add '0') sty XX_STATUS_STR, x inx + clc + adc #'0' sta XX_STATUS_STR, x inx From 53ab124dbc083fb4d43a45a5c433c9c0bb59f6fc Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 17 Feb 2021 19:14:17 +0100 Subject: [PATCH 233/257] one more directory handling fix --- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index e450a0dc..f13fe773 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -107,10 +107,18 @@ fs_hvsr_read_dir: bcc @lp1_next ; up to PETSCII 'Z' is OK cmp #$61 bcc fs_hvsr_read_dir ; some characters are not allowed + cmp #$7E + bne @lp1_1 + lda #$A6 ; replace tilde / pi with something more sane + bra @lp1_store_next +@lp1_1: cmp #$7B bcs fs_hvsr_read_dir ; PETSCII-art and control characters are illegal clc sbc #$20 ; make everything the same case + +@lp1_store_next: + sta SD_DIRENT,x @lp1_next: @@ -153,10 +161,10 @@ fs_hvsr_read_dir: sec sbc #$04 ; strip 4 bytes - for dot and extension sta SD_DIRENT+$40 - bmi fs_hvsr_read_dir ; if name too short, try next entry - beq fs_hvsr_read_dir ; if name too short, try next entry + +bmi fs_hvsr_read_dir ; if name too short, try next entry + +beq fs_hvsr_read_dir ; if name too short, try next entry cmp #$11 - bcs fs_hvsr_read_dir ; if stripped name is 17 characters or longer, try the next entry + +bcs fs_hvsr_read_dir ; if stripped name is 17 characters or longer, try the next entry sta SD_DIRENT+$40 ; store corrected file name length tax From 8eb40537ab944cea56459877a5dc5fca49b2f71b Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 18 Feb 2021 16:28:48 +0100 Subject: [PATCH 234/257] work towards wildcard support and file loading in CBDOS --- src/dos_m65/,aliases_dos.s | 27 +- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 2 +- .../dev_sdcard/fs_hvsr_util_nextdirentry.s | 241 ++++++++++++++++++ 3 files changed, 263 insertions(+), 7 deletions(-) create mode 100644 src/dos_m65/dev_sdcard/fs_hvsr_util_nextdirentry.s diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index 63254ee4..dc3512f1 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -7,6 +7,13 @@ ; - additional 16KB RAM is reserved for DOS too ($14000-$17FFF), and can be banked-in if needed + ; + ; Temporary storage locations + ; + + !addr FS_HVSR_DIRENT = $1000 + + ; ; Page start+0 ; @@ -41,7 +48,7 @@ !addr par_LDA_nnnn_Y = $8015 ; - 2 bytes; address in buffer, ram disk !addr code_RTS_04 = $8017 ; - RTS instruction - ; Parameters for utilities + ; Parameters for utilities/helkpers !addr PAR_TRACK = $8018 ; track number for status/error !addr PAR_SECTOR = $8019 ; sector number for status/error @@ -49,14 +56,18 @@ !addr PAR_FSIZE_BYTES = $801A ; 4 bytes - file size in bytes !addr PAR_FSIZE_BLOCKS = $801E ; 2 bytes - file size in blocks + !addr PAR_FTYPE = $801F ; bits 0-5 - type, bits 6-7 - protected, closed + !addr PAR_FNAME = $8020 ; 16 bytes - filename, filled with $A0 + !addr PAR_FPATTERN = $8030 ; 16 bytes - pattern to match, filled with $A0 + ; Various temporary data - !addr XX_DIR_PHASE = $8020 ; directory output phase, values deponds on device driver, but 0 = not reading - !addr SD_DIR_PHASE = $8020 ; - SD card - !addr FD_DIR_PHASE = $8021 ; - floppy - !addr RD_DIR_PHASE = $8022 ; - ram disk + !addr XX_DIR_PHASE = $8040 ; directory output phase, values deponds on device driver, but 0 = not reading + !addr SD_DIR_PHASE = $8040 ; - SD card + !addr FD_DIR_PHASE = $8041 ; - floppy + !addr RD_DIR_PHASE = $8042 ; - ram disk - ; Free space: $8023-$8063 + ; Free space: $8043-$8063 !addr SD_ACPTR_helper = $8052 ; subroutine in RAM to read a byte !addr code_LDA_01 = $8052 ; - LDA instruction @@ -103,6 +114,10 @@ !addr FD_STATUS_STR = $80A0 ; status string for floppy drive, terminated by 0 !addr RD_STATUS_STR = $80D0 ; status string for ram disk, terminated by 0 + ; + ; Further pages + ; + !addr SD_CMDFN_BUF = $8100 ; buffer for command and/or file name, 128 bytes, SD card !addr FD_CMDFN_BUF = $8180 ; buffer for command and/or file name, 128 bytes, floppy !addr RD_CMDFN_BUF = $8200 ; buffer for command and/or file name, 128 bytes, ram disk diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index f13fe773..762f7f42 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -322,7 +322,7 @@ fs_hvsr_read_dir: fs_hvsr_read_dir_blocksfree: - ; Set pointer to '65535 BLOCKS FREE.' line + ; Set pointer to 'BLOCKS FREE.' line ; XXX determine free space diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_util_nextdirentry.s b/src/dos_m65/dev_sdcard/fs_hvsr_util_nextdirentry.s new file mode 100644 index 00000000..b2b1eb1e --- /dev/null +++ b/src/dos_m65/dev_sdcard/fs_hvsr_util_nextdirentry.s @@ -0,0 +1,241 @@ + +; +; Hypervisor virtual filesystem - helper routine to get the next directory entry +; + + +; Fills-in: PAR_FNAME, PAR_FTYPE, PAR_FSIZE_BYTES + +; NOTE: overrides page pointed by FS_HVSR_DIRENT! + + +; XXX work-in-progress, this should be used within directory reading code + +fs_hvsr_util_nextdirentry: + + ; Clear the page which will be used + + ldx #$00 + txa + +@lpclear: + + sta FS_HVSR_DIRENT, x + inx + bne @lpclear + + ; Ask the hypervisor to read the next dirent structure + + ldx SD_DESC ; directory descriptor XXX rename to FS_HVSR_DESC + ldy #>FS_HVSR_DIRENT ; target page number + + lda #$14 ; dos_readdir + sta HTRAP00 + +nop + + +bcc @fail + + ; Reading entry succeeded, try to decode it. Important dirent fileds: + + ; - $00-$3F - file name + ; - $40 - file name length + ; - $52-$55 - file length + ; - $56-$57 - file type ($10 = dir, $20 = regular) and attributes ($01 for read-only) + + ; + ; Preprocess/validate the filename + ; + + ldx FS_HVSR_DIRENT+$40 ; file name length + beq fs_hvsr_util_nextdirentry ; do not even try for empty file name + cmp #20 + bcs fs_hvsr_util_nextdirentry ; if longer than 16 characters + dot + extension - also skip this one + dex + +@lpname: + + lda FS_HVSR_DIRENT,x + cmp #$22 + beq fs_hvsr_util_nextdirentry ; quotation mark is illegal + cmp #$2A + beq fs_hvsr_util_nextdirentry ; asterisk is illegal, it is used for filtering + cmp #$3F + beq fs_hvsr_util_nextdirentry ; the question mark - in the MS-DOS world it is illegal + cmp #$20 + bcc fs_hvsr_util_nextdirentry ; control characters are not allowed + cmp #$5B + bcc @lpname_next ; up to PETSCII 'Z' is OK + cmp #$61 + bcc fs_hvsr_util_nextdirentry ; some characters are not allowed + cmp #$7E + bne @lpname_1 + lda #$A6 ; replace tilde / pi with something more sane + bra @lpname_store_next + +@lpname_1: + + cmp #$7B + bcs fs_hvsr_util_nextdirentry ; PETSCII-art and control characters are illegal + clc + sbc #$20 ; make everything the same case + +@lpname_store_next: + + sta FS_HVSR_DIRENT,x ; use this when file name has to be adapted + +@lpname_next: + + dex + bpl @lpname + + ; + ; Determine type (file/directory) + ; + + lda FS_HVSR_DIRENT+$56 + tax + and #$FE + beq @entity_file ; workaround for older hypervisors + + and #$20 + bne @entity_file ; branch on file + + txa + and #$10 + beq fs_hvsr_util_nextdirentry ; this type is unknown + +@entity_dir: + + ; Once again validate the name length, with more precise information + + lda FS_HVSR_DIRENT+$40 + cmp #$11 + bcs fs_hvsr_util_nextdirentry ; skip entry if file name longer than 16 characters + + ; Set the type to directory + + lda #$05 + bra @detect_attributes + +@entity_file: + + ; Once again validate the name length, with more precise information + + lda FS_HVSR_DIRENT+$40 + sec + sbc #$04 ; strip 4 bytes - for dot and extension + bmi fs_hvsr_util_nextdirentry ; if name too short, try next entry + beq fs_hvsr_util_nextdirentry ; if name too short, try next entry + sta FS_HVSR_DIRENT+$40 ; store corrected file name length + tax + + ; Make sure there is a dot marking the start of a 3-byte extension + + lda FS_HVSR_DIRENT, x + cmp #$2E + +bne fs_hvsr_util_nextdirentry + + ; + ; Detect file type by extension + ; + + inx + ldy #$00 + +@lpext: + + lda FS_HVSR_DIRENT+0, x + cmp dir_types+0, y + bne @lpext_next + + lda FS_HVSR_DIRENT+1, x + cmp dir_types+1, y + bne @lpext_next + + lda FS_HVSR_DIRENT+2, x + cmp dir_types+2, y + beq @lpext_found + +@lpext_next: + + iny + iny + iny + iny + cpy #(dir_types__end - dir_types) + bcc @lpext + + jmp fs_hvsr_util_nextdirentry ; file extension not detected + +@lpext_found: + + cpy #$10 + +beq fs_hvsr_util_nextdirentry ; file extension 'DIR' does not mean this is a directory + tya + + asr ; convert the result to CBM-compatible value + asr + inc + + cmp #$06 ; mark some file types (not SEQ/PRG/USR/REL/DIR) as read-only + bcc @detect_attributes + ora #$40 + +@detect_attributes: + + ora #$80 ; mark the file as closed, FAT32 does not have a 'not closed' attribute + sta PAR_FTYPE + + lda FS_HVSR_DIRENT+$56 ; also apply read-only attribute from FAT32 + and #$01 + beq @copy_size + + lda PAR_FTYPE + ora #$40 + sta PAR_FTYPE + +@copy_size: + + ; Copy the file size + + ldx #$03 + +@lpsize: + + lda FS_HVSR_DIRENT+$52,x ; copy file size in byytes + sta PAR_FSIZE_BYTES,x + dex + bpl @lpsize + +@copy_name: + + ; Last, but not least - copy file name + + lda #$A0 ; fill-in empty bytes with $A0, to simulate CBM file system + ldx #$0F + +@lpname_cpy: + + cpx FS_HVSR_DIRENT+$40 + bcs @lpname_fill + lda FS_HVSR_DIRENT, x + +@lpname_fill: + + sta PAR_FNAME,x + dex + bpl @lpname_cpy + + ; All done + + clc + rts + +@fail: + + ; Reading next entry failed, this is the end + + ; XXX check error code + + sec + rts From 6ece4cbaf39690da11f330d20233a94b14da59ad Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 22 Feb 2021 18:39:42 +0100 Subject: [PATCH 235/257] more modularization in CBDOS, SD card directory display temporarily broken --- src/dos_m65/,aliases_dos.s | 9 +- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 299 ++++++---------------- 2 files changed, 85 insertions(+), 223 deletions(-) diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index dc3512f1..b4717c43 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -122,5 +122,10 @@ !addr FD_CMDFN_BUF = $8180 ; buffer for command and/or file name, 128 bytes, floppy !addr RD_CMDFN_BUF = $8200 ; buffer for command and/or file name, 128 bytes, ram disk - !addr SD_DIRENT = $8280 ; 256 byte buffer for 'dirent' structure - !addr SD_DESC = $8380 ; current file descriptor + !addr XX_DIR_ENTRY = $8280 ; directory entry in BASIC format + !addr SD_DIR_ENTRY = $8280 ; - SD card + !addr FD_DIR_ENTRY = $82B0 ; - floppy + !addr RD_DIR_ENTRY = $82E0 ; - ram disk + + !addr SD_MEMSHADOW = $8310 ; 256 byte buffer for preserving original memory content + !addr SD_DESC = $8410 ; current file descriptor diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index 762f7f42..c7909470 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -49,272 +49,130 @@ fs_hvsr_read_dir_open: fs_hvsr_read_dir: - ; Read dirent structure into $1000 and then copy it to SD_DIRENT + ; Read dirent structure into $1000, process it, restore the memory content. ; Starting at $1000 VIC sees chargen, so this should be a safe place - ; Content of the original memory location will be preserved - jsr fs_hvsr_dirent_prepare - - ldx SD_DESC ; directory descriptor - ldy #$10 ; target page number - - lda #$14 ; dos_readdir - sta HTRAP00 - +nop - - jsr fs_hvsr_dirent_swap ; processor status is preserved + jsr fs_hvsr_direntmem_prepare + jsr fs_hvsr_util_nextdirentry + jsr fs_hvsr_direntmem_restore ; processor status is preserved ; If nothing to read, output 'blocks free' +bcc fs_hvsr_read_dir_blocksfree - ; Dirent structure - important fields: - ; - $00-$3F - file name - ; - $40 - file name length - ; - $52-$55 - file length - ; - $56-$57 - file type ($10 = dir, $20 = regular) and attributes ($01 for read-only) - - ; Retrieve read-only status, store mark in SD_DIRENT+$FE - - lda SD_DIRENT+$56 - and #$01 - bne @rdonly - lda #$00 - +skip_2_bytes_trash_nvz - -@rdonly: - - lda #'<' - sta SD_DIRENT+$FE - - ; Validate/fix characters in file name - - ldx SD_DIRENT+$40 - dex - -@lp1: - - lda SD_DIRENT,x - cmp #$22 - beq fs_hvsr_read_dir ; quotation mark is illegal - cmp #$2A - beq fs_hvsr_read_dir ; asterisk is illegal, it is used for filtering - cmp #$3F - beq fs_hvsr_read_dir ; the question mark - in the MS-DOS world it is illegal - cmp #$20 - bcc fs_hvsr_read_dir ; control characters are not allowed - cmp #$5B - bcc @lp1_next ; up to PETSCII 'Z' is OK - cmp #$61 - bcc fs_hvsr_read_dir ; some characters are not allowed - cmp #$7E - bne @lp1_1 - lda #$A6 ; replace tilde / pi with something more sane - bra @lp1_store_next -@lp1_1: - cmp #$7B - bcs fs_hvsr_read_dir ; PETSCII-art and control characters are illegal - clc - sbc #$20 ; make everything the same case - -@lp1_store_next: - - sta SD_DIRENT,x - -@lp1_next: - - dex - bpl @lp1 - - ; Determine type (file/directory), store marker offset in SD_DIRENT+$FF - - lda SD_DIRENT+$56 - and #$FE - beq @cklen_file ; workaround for older hypervisors - - and #$20 - bne @cklen_file ; branch on file - - lda SD_DIRENT+$56 - and #$10 - beq fs_hvsr_read_dir ; this type is unknown - -@cklen_dir: - - ; Validate file name length (directories) - - lda SD_DIRENT+$40 - beq fs_hvsr_read_dir - cmp #$11 - bcs fs_hvsr_read_dir - - ; Set type offset for directory in SD_DIRENT+$FF - - lda #$10 - bra @all_prepared - -@cklen_file: - - ; Validate file name length (regular files) - - lda SD_DIRENT+$40 - sec - sbc #$04 ; strip 4 bytes - for dot and extension - sta SD_DIRENT+$40 - +bmi fs_hvsr_read_dir ; if name too short, try next entry - +beq fs_hvsr_read_dir ; if name too short, try next entry - cmp #$11 - +bcs fs_hvsr_read_dir ; if stripped name is 17 characters or longer, try the next entry - sta SD_DIRENT+$40 ; store corrected file name length - tax - - ; Detect file type - - lda SD_DIRENT, x - cmp #$2E - +bne fs_hvsr_read_dir ; 3-character extension is required! - - inx - ldy #$00 - -@lpdetect: - - lda SD_DIRENT+0, x - cmp dir_types+0, y - bne @lpdetect_next - - lda SD_DIRENT+1, x - cmp dir_types+1, y - bne @lpdetect_next - - lda SD_DIRENT+2, x - cmp dir_types+2, y - beq @lpdetect_found - -@lpdetect_next: - - iny - iny - iny - iny - cpy #(dir_types__end - dir_types) - bcc @lpdetect - - jmp fs_hvsr_read_dir ; file extension not detected - -@lpdetect_found: - - cpy #$10 - +beq fs_hvsr_read_dir ; file extension 'DIR' does not mean this is a directory - tya - -@all_prepared: - - sta SD_DIRENT+$FF ; store offset to file type in SD_DIRENT+$FF - cmp #$14 - bcc @noforcedro - lda #'<' ; for some file types, force the read-only flag - sta SD_DIRENT+$FE - -@noforcedro: - - ; Prepare output entry, starting from SD_DIRENT+$80 - - lda #$01 ; link to the next line - dummy, will be regenerated by BASIC - sta SD_DIRENT+$80 - sta SD_DIRENT+$81 - - ldx SD_DIRENT+$40 ; make sure file name is terminated by 0 - lda #$00 - sta SD_DIRENT, x - - lda SD_DIRENT+$52 ; calculate file length in blocks to display - sta PAR_FSIZE_BYTES+0 - lda SD_DIRENT+$53 - sta PAR_FSIZE_BYTES+1 - lda SD_DIRENT+$54 - sta PAR_FSIZE_BYTES+2 - lda SD_DIRENT+$55 - sta PAR_FSIZE_BYTES+3 + ; Otherwise, convert the file length from bytes to blocks to display jsr util_dir_filesize_bytes - lda PAR_FSIZE_BLOCKS+0 - sta SD_DIRENT+$82 - lda PAR_FSIZE_BLOCKS+1 - sta SD_DIRENT+$83 + ; Prepare output entry, starting from XX_DIR_ENTRY + initial offset - lda #' ' - ldx #$04 ; indent number of blocks -@lpindent1: - dey - bmi @lpindent1_done - sta SD_DIRENT+$80, x + ldx #$00 ; offset for SD card unit + + lda #$01 ; link to the next line - dummy, will be regenerated by BASIC + sta XX_DIR_ENTRY, x + inx + sta XX_DIR_ENTRY, x inx - bra @lpindent1 -@lpindent1_done: + lda PAR_FSIZE_BLOCKS+0 ; store number of blocks + sta XX_DIR_ENTRY, x + inx + lda PAR_FSIZE_BLOCKS+1 + sta XX_DIR_ENTRY, x + inx + + lda #' ' ; indent file name + +@lp1: + dey + bmi @lp1_done + sta XX_DIR_ENTRY, x + inx + bra @lp1 + +@lp1_done: lda #$22 ; opening quote - sta SD_DIRENT+$80, x + sta XX_DIR_ENTRY, x ldy #$FF ; put file name @lp2: - inx iny - lda SD_DIRENT, y - sta SD_DIRENT+$80,x - bne @lp2 + lda PAR_FNAME, y + cmp #$A0 + beq @lp2_done + sta XX_DIR_ENTRY, x + inx + bra @lp2 + +@lp2_done: lda #$22 ; closing quote - sta SD_DIRENT+$80, x + sta XX_DIR_ENTRY, x inx - lda #' ' ; put spaces for indentation - ldy SD_DIRENT+$40 + ldy #$10 ; put spaces for indentation @lp3: - sta SD_DIRENT+$80, x + lda #' ' + sta XX_DIR_ENTRY, x inx - iny - cpy #$11 - bcc @lp3 - ; No 'damaged' mark make sense for this filesystem + dey + lda PAR_FNAME, y + cmp #$A0 + beq @lp3 - ldy SD_DIRENT+$FF ; put file type + lda PAR_FTYPE ; put 'damaged' mark if needed + bmi @damaged + lda #' ' + +skip_2_bytes_trash_nvz + +@damaged: + + lda #'*' + sta XX_DIR_ENTRY, x + inx + + lda PAR_FTYPE ; put file type + and #$3F + dec + asl + asl + tay @lp4: lda dir_types, y beq @lp4_done - sta SD_DIRENT+$80, x + sta XX_DIR_ENTRY, x inx iny bra @lp4 @lp4_done: - lda SD_DIRENT+$FE ; read-only mark (if needed) + lda PAR_FTYPE ; read-only mark (if needed) + and #$40 beq @skipro - sta SD_DIRENT+$80, x + sta XX_DIR_ENTRY, x inx @skipro: - lda #$00 - sta SD_DIRENT+$80, x + lda #$00 ; put end of the line + sta XX_DIR_ENTRY, x inx stx SD_ACPTR_LEN+0 sta SD_ACPTR_LEN+1 - lda #<(SD_DIRENT+$80) + lda #<(XX_DIR_ENTRY) sta SD_ACPTR_PTR+0 - lda #>(SD_DIRENT+$80) + lda #>(XX_DIR_ENTRY) sta SD_ACPTR_PTR+1 clc @@ -355,30 +213,29 @@ fs_hvsr_read_dir_blocksfree: ; Helper routines ; -fs_hvsr_dirent_prepare: +fs_hvsr_direntmem_prepare: ldx #$00 - txa @1: ldy $1000, x - sty SD_DIRENT, x - sta $1000, x + sty SD_MEMSHADOW, x inx bne @1 rts -fs_hvsr_dirent_swap: +fs_hvsr_direntmem_restore: php + ldx #$00 @1: - lda $1000, x - ldy SD_DIRENT, x - sta SD_DIRENT, x + ldy SD_MEMSHADOW, x sty $1000, x inx bne @1 + bne @1 + plp rts From 17833d69127f61115a49044015e1e20818bdcb42 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 22 Feb 2021 20:56:09 +0100 Subject: [PATCH 236/257] some fixes after reqork --- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index c7909470..b602b3a0 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -94,6 +94,7 @@ fs_hvsr_read_dir: lda #$22 ; opening quote sta XX_DIR_ENTRY, x + inx ldy #$FF ; put file name @@ -103,6 +104,8 @@ fs_hvsr_read_dir: lda PAR_FNAME, y cmp #$A0 beq @lp2_done + cpy #$10 + beq @lp2_done sta XX_DIR_ENTRY, x inx bra @lp2 From 6b89e796969c3cdfd0bb5faee050a99a96ac2838 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 22 Feb 2021 21:30:56 +0100 Subject: [PATCH 237/257] fix for improper register being checked --- src/dos_m65/dev_sdcard/fs_hvsr_util_nextdirentry.s | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_util_nextdirentry.s b/src/dos_m65/dev_sdcard/fs_hvsr_util_nextdirentry.s index b2b1eb1e..c4e32f96 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_util_nextdirentry.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_util_nextdirentry.s @@ -48,7 +48,7 @@ fs_hvsr_util_nextdirentry: ldx FS_HVSR_DIRENT+$40 ; file name length beq fs_hvsr_util_nextdirentry ; do not even try for empty file name - cmp #20 + cpx #20 bcs fs_hvsr_util_nextdirentry ; if longer than 16 characters + dot + extension - also skip this one dex From fd76edf8008a3f778b341f2830c8c1445cadec41 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 22 Feb 2021 21:38:47 +0100 Subject: [PATCH 238/257] fixed improper condition --- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index b602b3a0..d9afbb4e 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -58,7 +58,7 @@ fs_hvsr_read_dir: ; If nothing to read, output 'blocks free' - +bcc fs_hvsr_read_dir_blocksfree + +bcs fs_hvsr_read_dir_blocksfree ; Otherwise, convert the file length from bytes to blocks to display From 9c6e6b03724d6d377a730e43a826d1be81ff070d Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 22 Feb 2021 22:04:53 +0100 Subject: [PATCH 239/257] another post-rework fix --- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index d9afbb4e..a28fe70c 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -120,14 +120,17 @@ fs_hvsr_read_dir: @lp3: - lda #' ' - sta XX_DIR_ENTRY, x - inx - dey lda PAR_FNAME, y cmp #$A0 - beq @lp3 + bne @lp3_done + + lda #' ' + sta XX_DIR_ENTRY, x + inx + bra @lp3 + +@lp3_done: lda PAR_FTYPE ; put 'damaged' mark if needed bmi @damaged @@ -161,6 +164,7 @@ fs_hvsr_read_dir: lda PAR_FTYPE ; read-only mark (if needed) and #$40 beq @skipro + lda #'<' sta XX_DIR_ENTRY, x inx From 282fba5288936fdf86137abd8d61c604fcf35e47 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Mon, 22 Feb 2021 22:56:55 +0100 Subject: [PATCH 240/257] directory seems to be working correctly again --- src/dos_m65/,aliases_dos.s | 16 ++++++++-------- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 8 ++++---- .../dev_sdcard/fs_hvsr_util_nextdirentry.s | 6 ++++-- 3 files changed, 16 insertions(+), 14 deletions(-) diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index b4717c43..7c15c96a 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -56,18 +56,18 @@ !addr PAR_FSIZE_BYTES = $801A ; 4 bytes - file size in bytes !addr PAR_FSIZE_BLOCKS = $801E ; 2 bytes - file size in blocks - !addr PAR_FTYPE = $801F ; bits 0-5 - type, bits 6-7 - protected, closed - !addr PAR_FNAME = $8020 ; 16 bytes - filename, filled with $A0 - !addr PAR_FPATTERN = $8030 ; 16 bytes - pattern to match, filled with $A0 + !addr PAR_FTYPE = $8020 ; bits 0-5 - type, bits 6-7 - protected, closed + !addr PAR_FNAME = $8021 ; 16 bytes - filename, filled with $A0 + !addr PAR_FPATTERN = $8031 ; 16 bytes - pattern to match, filled with $A0 ; Various temporary data - !addr XX_DIR_PHASE = $8040 ; directory output phase, values deponds on device driver, but 0 = not reading - !addr SD_DIR_PHASE = $8040 ; - SD card - !addr FD_DIR_PHASE = $8041 ; - floppy - !addr RD_DIR_PHASE = $8042 ; - ram disk + !addr XX_DIR_PHASE = $8041 ; directory output phase, values deponds on device driver, but 0 = not reading + !addr SD_DIR_PHASE = $8041 ; - SD card + !addr FD_DIR_PHASE = $8042 ; - floppy + !addr RD_DIR_PHASE = $8043 ; - ram disk - ; Free space: $8043-$8063 + ; Free space: $8044-$8063 !addr SD_ACPTR_helper = $8052 ; subroutine in RAM to read a byte !addr code_LDA_01 = $8052 ; - LDA instruction diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index a28fe70c..b087371d 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -133,13 +133,13 @@ fs_hvsr_read_dir: @lp3_done: lda PAR_FTYPE ; put 'damaged' mark if needed - bmi @damaged - lda #' ' + bmi @closed + lda #'*' +skip_2_bytes_trash_nvz -@damaged: +@closed: - lda #'*' + lda #' ' sta XX_DIR_ENTRY, x inx diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_util_nextdirentry.s b/src/dos_m65/dev_sdcard/fs_hvsr_util_nextdirentry.s index c4e32f96..5db911a3 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_util_nextdirentry.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_util_nextdirentry.s @@ -173,8 +173,10 @@ fs_hvsr_util_nextdirentry: +beq fs_hvsr_util_nextdirentry ; file extension 'DIR' does not mean this is a directory tya - asr ; convert the result to CBM-compatible value - asr + clc + ror + clc + ror inc cmp #$06 ; mark some file types (not SEQ/PRG/USR/REL/DIR) as read-only From 2b7f0d41eb9fa85e48bacfcb2a0aa1200d4621e8 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 23 Feb 2021 22:32:27 +0100 Subject: [PATCH 241/257] work towards directory filtering in CBDOS --- src/dos_m65/dev_sdcard/dev_sd_cmd_open.s | 28 ++++++++++++++++++++++- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 6 +++++ src/dos_m65/utils/util_dir_filter.s | 28 +++++++++++++++++++++++ 3 files changed, 61 insertions(+), 1 deletion(-) create mode 100644 src/dos_m65/utils/util_dir_filter.s diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s index ea54784d..d1f154ae 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s @@ -19,11 +19,37 @@ dev_sd_cmd_OPEN_EOI: lda SD_CMDFN_BUF cmp #'$' - +beq fs_hvsr_read_dir_open + beq dev_sd_cmd_OPEN_dir ; XXX implement for file names jmp dos_EXIT_SEC +dev_sd_cmd_OPEN_dir: + ; XXX this should be moved to common part + + ; Erase filter pattern for the directory + + ldy #$0F + lda #$A0 +@lp1: + sta PAR_FPATTERN, y + dey + bpl @lp1 + + ; Copy the filter from command + + ldy #$00 +@lp2: + lda SD_MODE, y + beq @lp2_end + sta PAR_FPATTERN, y + iny + cpy #$10 + bne @lp2_end + +@lp2_end: + + jmp fs_hvsr_read_dir_open diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index b087371d..9d9467d9 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -60,6 +60,12 @@ fs_hvsr_read_dir: +bcs fs_hvsr_read_dir_blocksfree + ; Check if file name matches the filter + + ; XXX debug this + ; jsr util_dir_filter + ; bne fs_hvsr_read_dir ; if does not match, try the next entry + ; Otherwise, convert the file length from bytes to blocks to display jsr util_dir_filesize_bytes diff --git a/src/dos_m65/utils/util_dir_filter.s b/src/dos_m65/utils/util_dir_filter.s new file mode 100644 index 00000000..9e20041b --- /dev/null +++ b/src/dos_m65/utils/util_dir_filter.s @@ -0,0 +1,28 @@ + +; Check if file name matches the filter (if so - Zero flag set) + + +util_dir_filter: + + lda PAR_FPATTERN + cmp #$A0 + beq @done ; branch if no filter + + ldy #$00 + +@lp1: + + lda PAR_FPATTERN, y + cmp #'*' + beq @done ; branch on wildcard + + cmp PAR_FNAME, y + bne @done ; branch if does not match + + iny + cpy #$10 + bne @lp1 ; next iteration if maximum length not reached + +@done: + + rts From 22a575453930272245d7f20d1fad5fb72237c539 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Tue, 23 Feb 2021 22:49:52 +0100 Subject: [PATCH 242/257] bugfixes --- src/dos_m65/dev_sdcard/dev_sd_cmd_open.s | 2 +- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 5 ++--- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s index d1f154ae..313cf2cc 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s @@ -43,7 +43,7 @@ dev_sd_cmd_OPEN_dir: ldy #$00 @lp2: - lda SD_MODE, y + lda SD_CMDFN_BUF+1, y beq @lp2_end sta PAR_FPATTERN, y iny diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index 9d9467d9..c7d9abf6 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -62,9 +62,8 @@ fs_hvsr_read_dir: ; Check if file name matches the filter - ; XXX debug this - ; jsr util_dir_filter - ; bne fs_hvsr_read_dir ; if does not match, try the next entry + jsr util_dir_filter + bne fs_hvsr_read_dir ; if does not match, try the next entry ; Otherwise, convert the file length from bytes to blocks to display From cb16d5d15cf646b820736505934a284e2a3c65ac Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 24 Feb 2021 18:44:18 +0100 Subject: [PATCH 243/257] started MEGA65 speed handling rework, always run IEC code with disabled badlines --- src/,,config_mega65.s | 1 - src/aliases/,aliases_config.s | 1 + src/kernal/board_m65/mega65_iec_slow_fast.s | 45 --------- src/kernal/board_m65/mega65_speed.s | 105 ++++++++++++++++++++ src/kernal/errors.s | 4 +- src/kernal/iec/iec_return.s | 4 +- src/kernal/iec/iec_rx_byte.s | 12 +-- src/kernal/iec/iec_turnaround_to_listen.s | 4 +- src/kernal/iec/iec_tx_byte.s | 8 +- src/kernal/iec/iec_tx_command.s | 4 +- src/kernal/iec_fast/dolphindos_load.s | 8 +- src/kernal/iec_fast/jiffydos_load.s | 12 +-- src/kernal/iec_fast/jiffydos_wait_line.s | 4 + 13 files changed, 136 insertions(+), 76 deletions(-) delete mode 100644 src/kernal/board_m65/mega65_iec_slow_fast.s create mode 100644 src/kernal/board_m65/mega65_speed.s diff --git a/src/,,config_mega65.s b/src/,,config_mega65.s index 6dcd28d8..37bca28b 100644 --- a/src/,,config_mega65.s +++ b/src/,,config_mega65.s @@ -30,7 +30,6 @@ ;; #CONFIG# IEC_DOLPHINDOS NO ;; #CONFIG# IEC_DOLPHINDOS_FAST NO ;; #CONFIG# IEC_JIFFYDOS NO ; fastloaders do not work on MEGA65 yet! -;; #CONFIG# IEC_JIFFYDOS_BLANK NO ;; #CONFIG# IEC_BURST_M65 NO ; please keep disabled for now diff --git a/src/aliases/,aliases_config.s b/src/aliases/,aliases_config.s index 5d00e55f..eaffde27 100644 --- a/src/aliases/,aliases_config.s +++ b/src/aliases/,aliases_config.s @@ -112,6 +112,7 @@ !ifdef CONFIG_MB_MEGA65 { !ifdef CONFIG_IEC_BURST_CIA1 { !error "Do not use CONFIG_IEC_BURST_CIA1 options for MEGA65 motherboard, CONFIG_IEC_BURST_M65 instead" } !ifdef CONFIG_IEC_BURST_CIA2 { !error "Do not use CONFIG_IEC_BURST_CIA2 options for MEGA65 motherboard, CONFIG_IEC_BURST_M65 instead" } + !ifdef IEC_JIFFYDOS_BLANK { !error "Do not use IEC_JIFFYDOS_BLANK option for MEGA65 motherboard, it is not needed" } !ifndef CONFIG_DOS_WEDGE { !error "MEGA65 build requires CONFIG_DOS_WEDGE" } } !ifndef CONFIG_MB_MEGA65 { diff --git a/src/kernal/board_m65/mega65_iec_slow_fast.s b/src/kernal/board_m65/mega65_iec_slow_fast.s deleted file mode 100644 index 310df6e3..00000000 --- a/src/kernal/board_m65/mega65_iec_slow_fast.s +++ /dev/null @@ -1,45 +0,0 @@ -;; #LAYOUT# M65 KERNAL_0 #TAKE -;; #LAYOUT# * * #IGNORE - -; -; Checks if system is in MEGA65 native mode; if so, switches CPU speed to fast/slow - for IEC routines; -; Alters only status bits, all remaining registers preserved -; - -!ifdef CONFIG_IEC { - - -m65_iec_slow: - - jsr M65_MODEGET - bcs m65_iec_fast_slow_done - - ; Switch CPU speed - - pha - lda VIC_CTRLB - and #%10111111 - bra m65_iec_fast_slow_common - -m65_iec_fast: - - jsr M65_MODEGET - bcs m65_iec_fast_slow_done - - pha - lda VIC_CTRLB - ora #%01000000 - - ; FALLTROUGH - -m65_iec_fast_slow_common: - - sta VIC_CTRLB - pla - - ; FALLTROUGH - -m65_iec_fast_slow_done: - - rts -} diff --git a/src/kernal/board_m65/mega65_speed.s b/src/kernal/board_m65/mega65_speed.s new file mode 100644 index 00000000..3c274ca3 --- /dev/null +++ b/src/kernal/board_m65/mega65_speed.s @@ -0,0 +1,105 @@ +;; #LAYOUT# M65 KERNAL_0 #TAKE +;; #LAYOUT# * * #IGNORE + +; +; Checks if system is in MEGA65 native mode; if so, switches CPU speed to fast/slow for IO routines +; Alters only status bits, all remaining registers preserved +; + +; Entry points: +; - m65_speed_iec - at the start of IEC operations +; - m65_speed_tape_cbdos - at the start of tape or CBDOS operations +; - m65_speed_restore - restore current mode standard speed, hide VIC-IV for compatibility mode + + +!ifdef CONFIG_IEC { + +m65_speed_iec: + + ; If compatibility mode, unlock VIC-IV + + jsr M65_MODEGET + pha + bcc @1 + jsr viciv_unhide +@1: + ; Switch CPU speed to approx. 1 MHz + + lda #%01000000 + trb VIC_CTRLB + + ; Disable badlines and slow interrupt emulation + + lda #$00 + sta MISC_EMU + + ; Return + + pla + rts +} + + +m65_speed_tape_cbdos: + + ; If compatibility mode, unlock VIC-IV + + jsr M65_MODEGET + pha + bcc @1 + jsr viciv_unhide +@1: + ; Just set the maximum possible speed + + pha + bra m65_speed_restore_native + + + +m65_speed_restore: + + ; Restore proper speed depending on the mode + + jsr M65_MODEGET + pha + bcc m65_speed_restore_native + + ; FALLTROUGH + +m65_speed_restore_compat: + + ; C64 compatibility mode - approx 1 MHz, badlines and slow interrupts enabled + + lda #%01000000 + trb VIC_CTRLB + + ; FALLTROUGH + +m65_speed_ME_compat: + + ; Reenable badlines and slow interrupt emulation + + lda #$03 + sta MISC_EMU + + ; Hide the VIC-IV + + sta VIC_KEY + + ; Return + + pla + rts + +m65_speed_restore_native: + + ; Native mode - maximum speed + + lda #%01000000 + tsb VIC_CTRLB + + ; All the special speed modes disable badlines and slow interrupts, + ; so there is no need to restore them + + pla + rts diff --git a/src/kernal/errors.s b/src/kernal/errors.s index 917317d7..0f4bc83a 100644 --- a/src/kernal/errors.s +++ b/src/kernal/errors.s @@ -91,8 +91,8 @@ kernalerror_TOP_MEM_RS232: lda #K_ERR_TOP_MEM_RS232 !ifdef CONFIG_MB_M65 { - ; If in native mode, switch back to fast mode - jsr m65_iec_fast + ; Restore the proper speed + jsr m65_speed_restore } sec rts diff --git a/src/kernal/iec/iec_return.s b/src/kernal/iec/iec_return.s index bf9972f7..c80323b7 100644 --- a/src/kernal/iec/iec_return.s +++ b/src/kernal/iec/iec_return.s @@ -26,8 +26,8 @@ iec_return_success: +plx_trash_a !ifdef CONFIG_MB_M65 { - ; If in native mode, switch back to fast mode - jsr m65_iec_fast + ; Restore the proper speed + jsr m65_speed_restore } ; Report success diff --git a/src/kernal/iec/iec_rx_byte.s b/src/kernal/iec/iec_rx_byte.s index fc565c85..61a7329c 100644 --- a/src/kernal/iec/iec_rx_byte.s +++ b/src/kernal/iec/iec_rx_byte.s @@ -17,8 +17,8 @@ iec_rx_dispatch: !ifdef CONFIG_MB_M65 { - ; If in native mode, switch to 1 MHz - jsr m65_iec_slow + ; Ensure 1 Mhz mode and disabled badlines + jsr m65_speed_iec } lda IECPROTO @@ -33,8 +33,8 @@ iec_rx_dispatch: iec_rx_byte: !ifdef CONFIG_MB_M65 { !ifndef CONFIG_IEC_JIFFYDOS { - ; If in native mode, switch to 1 MHz - jsr m65_iec_slow + ; Ensure 1 Mhz mode and disabled badlines + jsr m65_speed_iec } } ; Store .X and .Y on the stack - preserve them @@ -161,8 +161,8 @@ iec_rx_acknowledge: iec_rx_end: !ifdef CONFIG_MB_M65 { - ; If in native mode, switch back to fast mode - jsr m65_iec_fast + ; Restore the proper speed + jsr m65_speed_restore } +ply_trash_a diff --git a/src/kernal/iec/iec_turnaround_to_listen.s b/src/kernal/iec/iec_turnaround_to_listen.s index dd3971bd..861d7385 100644 --- a/src/kernal/iec/iec_turnaround_to_listen.s +++ b/src/kernal/iec/iec_turnaround_to_listen.s @@ -21,8 +21,8 @@ iec_turnaround_to_listen: sei !ifdef CONFIG_MB_M65 { - ; If in native mode, switch to 1 MHz - jsr m65_iec_slow + ; Ensure 1 Mhz mode and disabled badlines + jsr m65_speed_iec } ; Pull DATA, release CLK and ATN (we are not sending commands) diff --git a/src/kernal/iec/iec_tx_byte.s b/src/kernal/iec/iec_tx_byte.s index feb4b112..93c42625 100644 --- a/src/kernal/iec/iec_tx_byte.s +++ b/src/kernal/iec/iec_tx_byte.s @@ -20,8 +20,8 @@ iec_tx_dispatch: php ; preserve C flag for EOI indication !ifdef CONFIG_MB_M65 { - ; If in native mode, switch to 1 MHz - jsr m65_iec_slow + ; Ensure 1 Mhz mode and disabled badlines + jsr m65_speed_iec } lda IECPROTO @@ -41,9 +41,9 @@ iec_tx_dispatch: iec_tx_byte: !ifdef CONFIG_MB_M65 { !ifndef CONFIG_IEC_JIFFYDOS { - ; If in native mode, switch to 1 MHz + ; Ensure 1 Mhz mode and disabled badlines php - jsr m65_iec_slow + jsr m65_speed_iec plp } } diff --git a/src/kernal/iec/iec_tx_command.s b/src/kernal/iec/iec_tx_command.s index a6b5bc0e..3e4a223d 100644 --- a/src/kernal/iec/iec_tx_command.s +++ b/src/kernal/iec/iec_tx_command.s @@ -39,8 +39,8 @@ iec_tx_command: ; and transmits a byte !ifdef CONFIG_MB_M65 { - ; If in native mode, switch to 1 MHz - jsr m65_iec_slow + ; Ensure 1 Mhz mode and disabled badlines + jsr m65_speed_iec } clc ; Carry flag set is used for EOI mark jmp iec_tx_common diff --git a/src/kernal/iec_fast/dolphindos_load.s b/src/kernal/iec_fast/dolphindos_load.s index 7a8edd07..4785c0e6 100644 --- a/src/kernal/iec_fast/dolphindos_load.s +++ b/src/kernal/iec_fast/dolphindos_load.s @@ -29,8 +29,8 @@ dolphindos_load: } !ifdef CONFIG_MB_M65 { - ; If in native mode, switch to 1 MHz - jsr m65_iec_slow + ; Ensure 1 Mhz mode and disabled badlines + jsr m65_speed_iec } ; FALLTROUGH @@ -115,8 +115,8 @@ dolphindos_load_no_eoi: dolphindos_load_end: !ifdef CONFIG_MB_M65 { - ; If in native mode, switch back to fast mode - jsr m65_iec_fast + ; Restore the proper speed + jsr m65_speed_restore } ; Update EAL clc diff --git a/src/kernal/iec_fast/jiffydos_load.s b/src/kernal/iec_fast/jiffydos_load.s index 12c59179..6b9dabd7 100644 --- a/src/kernal/iec_fast/jiffydos_load.s +++ b/src/kernal/iec_fast/jiffydos_load.s @@ -87,10 +87,6 @@ jiffydos_load: ; A trick to shorten EAL update time ldy #$FF -!ifdef CONFIG_MB_M65 { - ; If in native mode, switch to 1 MHz - jsr m65_iec_fast -} ; FALLTROUGH jiffydos_load_loop_esc: @@ -195,8 +191,8 @@ jiffydos_load_end: ldy #$FF !ifdef CONFIG_MB_M65 { - ; If in native mode, switch to 1 MHz - jsr m65_iec_slow + ; Ensure 1 Mhz mode and disabled badlines + jsr m65_speed_iec } ; FALLTROUGH @@ -280,8 +276,8 @@ jiffydos_load_loop: jiffydos_load_end: !ifdef CONFIG_MB_M65 { - ; If in native mode, switch back to fast mode - jsr m65_iec_fast + ; Restore the proper speed + jsr m65_speed_restore } ; Save last byte tax diff --git a/src/kernal/iec_fast/jiffydos_wait_line.s b/src/kernal/iec_fast/jiffydos_wait_line.s index 0fa92846..dbfb4356 100644 --- a/src/kernal/iec_fast/jiffydos_wait_line.s +++ b/src/kernal/iec_fast/jiffydos_wait_line.s @@ -13,6 +13,8 @@ jiffydos_wait_line: +!ifdef CONFIG_MB_M65 { ; MEGA65 does not need to wait, but has to waste few cycles + ; One might try to optimize the code by checking for disabled screen ; (bit 4 of VIC_SCROLY); problem: VIC checks this bit only once per frame: ; - https://www.lemon64.com/forum/viewtopic.php?t=56582 @@ -31,5 +33,7 @@ jiffydos_wait_line: jiffydos_wait_line_done: +} + rts } From b21ba971f95a5ba4b80a5d2098fca3dee1b341e6 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 24 Feb 2021 19:08:51 +0100 Subject: [PATCH 244/257] CBDOS now works in compatibility mode too --- src/dos_m65/dos_enter_exit.s | 14 +++++++++----- src/dos_m65/dos_imports.s | 2 ++ src/dos_m65/dos_init.s | 17 ++++++++++++++--- src/kernal/board_m65/mega65_speed.s | 25 +++++++++++++++---------- 4 files changed, 40 insertions(+), 18 deletions(-) diff --git a/src/dos_m65/dos_enter_exit.s b/src/dos_m65/dos_enter_exit.s index 12b524fe..f05635e9 100644 --- a/src/dos_m65/dos_enter_exit.s +++ b/src/dos_m65/dos_enter_exit.s @@ -5,6 +5,10 @@ dos_ENTER: ; enter DOS context + php + jsr m65_speed_tape_cbdos + plp + sta REG_A stx REG_X sty REG_Y @@ -26,12 +30,8 @@ dos_EXIT: ; exit DOS context with Carry clear dos_EXIT_common: - ldz REG_Z - ldy REG_Y - ldx REG_X lda REG_A - - rts + bra dos_EXIT_A_common dos_EXIT_A_SEC: ; exit DOS context with Carry set, return .A @@ -51,4 +51,8 @@ dos_EXIT_A_common: ldy REG_Y ldx REG_X + php + jsr m65_speed_restore + plp + rts diff --git a/src/dos_m65/dos_imports.s b/src/dos_m65/dos_imports.s index 00e611ae..825cd530 100644 --- a/src/dos_m65/dos_imports.s +++ b/src/dos_m65/dos_imports.s @@ -10,3 +10,5 @@ ;; #ALIAS# kernalstatus_EOI = KERNAL_0.kernalstatus_EOI ;; #ALIAS# kernalstatus_DEVICE_NOT_FOUND = KERNAL_0.kernalstatus_DEVICE_NOT_FOUND +;; #ALIAS# m65_speed_tape_cbdos = KERNAL_0.m65_speed_tape_cbdos +;; #ALIAS# m65_speed_restore = KERNAL_0.m65_speed_restore diff --git a/src/dos_m65/dos_init.s b/src/dos_m65/dos_init.s index 4654eda5..93397519 100644 --- a/src/dos_m65/dos_init.s +++ b/src/dos_m65/dos_init.s @@ -10,7 +10,12 @@ dos_INIT: - jsr dos_ENTER + ; Safer version of 'dos_ENTER' - does not affect speed related registers + + sta REG_A + stx REG_X + sty REG_Y + stz REG_Z ; Set the magic string 'CBDOS' @@ -60,6 +65,12 @@ dos_INIT: sta code_RTS_03 sta code_RTS_04 - ; Exit DOS context + ; Safer version of 'dos_EXIT' - does not affect speed related registers - jmp dos_EXIT + clc + ldz REG_Z + ldy REG_Y + ldx REG_X + lda REG_A + + rts diff --git a/src/kernal/board_m65/mega65_speed.s b/src/kernal/board_m65/mega65_speed.s index 3c274ca3..537671b0 100644 --- a/src/kernal/board_m65/mega65_speed.s +++ b/src/kernal/board_m65/mega65_speed.s @@ -30,13 +30,7 @@ m65_speed_iec: ; Disable badlines and slow interrupt emulation - lda #$00 - sta MISC_EMU - - ; Return - - pla - rts + bra m65_speed_tape_cbdos_ME } @@ -49,11 +43,22 @@ m65_speed_tape_cbdos: bcc @1 jsr viciv_unhide @1: - ; Just set the maximum possible speed + ; Set the maximum possible speed - pha - bra m65_speed_restore_native + lda #%01000000 + tsb VIC_CTRLB + ; FALLTROUGH + +m65_speed_tape_cbdos_ME: + + ; Disable badlines and slow interrupt emulation + + lda #$00 + sta MISC_EMU + + pla + rts m65_speed_restore: From 50da880ffcde556a68bc571110d908c8542758db Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 24 Feb 2021 21:11:41 +0100 Subject: [PATCH 245/257] code size optimization --- src/kernal/board_m65/mega65_imports_1.s | 3 ++ src/kernal/board_m65/mega65_tape_fast_cpu.s | 31 --------------------- src/kernal/tape/tape_common_screen.s | 19 +++---------- src/kernal/tape/tape_head_align.s | 2 +- 4 files changed, 8 insertions(+), 47 deletions(-) delete mode 100644 src/kernal/board_m65/mega65_tape_fast_cpu.s diff --git a/src/kernal/board_m65/mega65_imports_1.s b/src/kernal/board_m65/mega65_imports_1.s index fdad4bb5..1d5fd086 100644 --- a/src/kernal/board_m65/mega65_imports_1.s +++ b/src/kernal/board_m65/mega65_imports_1.s @@ -40,6 +40,9 @@ ;; #ALIAS# viciv_hotregs_on = KERNAL_0.viciv_hotregs_on ;; #ALIAS# viciv_hotregs_off = KERNAL_0.viciv_hotregs_off +;; #ALIAS# m65_speed_tape_cbdos = KERNAL_0.m65_speed_tape_cbdos +;; #ALIAS# m65_speed_restore = KERNAL_0.m65_speed_restore + ;; #ALIAS# m65_clr_magictstr = KERNAL_0.m65_clr_magictstr ;; #ALIAS# m65_scrtab_txtwidth = KERNAL_0.m65_scrtab_txtwidth ;; #ALIAS# m65_scrtab_txtheight = KERNAL_0.m65_scrtab_txtheight diff --git a/src/kernal/board_m65/mega65_tape_fast_cpu.s b/src/kernal/board_m65/mega65_tape_fast_cpu.s deleted file mode 100644 index 0be56175..00000000 --- a/src/kernal/board_m65/mega65_tape_fast_cpu.s +++ /dev/null @@ -1,31 +0,0 @@ -;; #LAYOUT# M65 KERNAL_1 #TAKE -;; #LAYOUT# * * #IGNORE - -; -; Tape helper routine -; -; - unlocks VIC-IV -; - switches CPU to fast processing mode and disables badlines -; - stores previous VIC_CTRLB in NXTBIN -; - -!ifdef HAS_TAPE { - - -tape_fast_cpu: - - jsr M65_MODEGET - bcc @1 - - jsr viciv_unhide -@1: - lda VIC_CTRLB - ora #%01000000 - sta VIC_CTRLB - sta NXTBIT - - lda #$00 - sta MISC_EMU - - rts -} diff --git a/src/kernal/tape/tape_common_screen.s b/src/kernal/tape/tape_common_screen.s index 51e251cd..715af440 100644 --- a/src/kernal/tape/tape_common_screen.s +++ b/src/kernal/tape/tape_common_screen.s @@ -22,20 +22,9 @@ tape_screen_on_motor_off: !ifdef CONFIG_MB_M65 { - jsr M65_MODEGET - bcc @1 + ; Restore standard CPU speed settings - ; For compatibility mode, restore normal speed settings and hide VIC-IV - - lda #$03 - sta MISC_EMU - - lda NXTBIT - sta VIC_CTRLB - - sta VIC_KEY -@1: - rts + jmp m65_speed_restore } else ifdef CONFIG_MB_U64 { @@ -64,12 +53,12 @@ tape_screen_off_motor_on: !ifdef CONFIG_MB_M65 { - ; On MEGA65 we need to switch banks everytim we retrieve byte to be stored in memory, + ; On MEGA65 we need to switch banks everytime we retrieve byte to be stored in memory, ; additionally we perform advanced tape speed autocallibration - this is all too expensive ; to be handled by 1 MHz CPU - so in case of compatibility mode, switch CPU to fast speed ; (and disable badlines, so we will not have to blank the screen) - jsr tape_fast_cpu + jsr m65_speed_tape_cbdos } else ifdef CONFIG_MB_U64 { diff --git a/src/kernal/tape/tape_head_align.s b/src/kernal/tape/tape_head_align.s index 2c3144e9..92c678ea 100644 --- a/src/kernal/tape/tape_head_align.s +++ b/src/kernal/tape/tape_head_align.s @@ -48,7 +48,7 @@ tape_head_align: ; Switch CPU to fast mode !ifdef CONFIG_MB_M65 { - jsr tape_fast_cpu + jsr m65_speed_tape_cbdos } !ifdef CONFIG_MB_U64 { From 567dfe6da0ba16e03dcf71b33c0808ddf1276e67 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 24 Feb 2021 21:37:47 +0100 Subject: [PATCH 246/257] CBDOS command reception bugfix --- src/dos_m65/msg_ciout.s | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/dos_m65/msg_ciout.s b/src/dos_m65/msg_ciout.s index 525213e5..e1539f70 100644 --- a/src/dos_m65/msg_ciout.s +++ b/src/dos_m65/msg_ciout.s @@ -48,8 +48,8 @@ msg_CIOUT_cmdfn_SD: ; get next byte of status - SD card bpl @1 ldx #$7F @1: - sta SD_CMDFN_IDX - lda #$00 + stx SD_CMDFN_IDX + lda #$A0 sta SD_CMDFN_BUF,x plp +bcs dev_sd_cmd_OPEN_EOI ; if EOI - execute command @@ -63,8 +63,8 @@ msg_CIOUT_cmdfn_FD: ; get next byte of status - floppy bpl @1 ldx #$7F @1: - sta FD_CMDFN_IDX - lda #$00 + stx FD_CMDFN_IDX + lda #$A0 sta FD_CMDFN_BUF,x plp +bcs dev_fd_cmd_OPEN_EOI ; if EOI - execute command @@ -78,8 +78,8 @@ msg_CIOUT_cmdfn_RD: ; get next byte of status - ram disk bpl @1 ldx #$7F @1: - sta RD_CMDFN_IDX - lda #$00 + stx RD_CMDFN_IDX + lda #$A0 sta RD_CMDFN_BUF,x plp +bcs dev_rd_cmd_OPEN_EOI ; if EOI - execute command From fcb10335a925d071ace30b66b56ef8c57a5aae97 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 24 Feb 2021 21:43:14 +0100 Subject: [PATCH 247/257] CBDOS directory filtering works now --- src/dos_m65/dev_sdcard/dev_sd_cmd_open.s | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s index 313cf2cc..02148279 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s @@ -44,11 +44,12 @@ dev_sd_cmd_OPEN_dir: ldy #$00 @lp2: lda SD_CMDFN_BUF+1, y + cmp #$A0 beq @lp2_end sta PAR_FPATTERN, y iny cpy #$10 - bne @lp2_end + bne @lp2 @lp2_end: From 22cf6128b9b794b0ce65928d7624fc97a4806fd1 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Wed, 24 Feb 2021 22:33:21 +0100 Subject: [PATCH 248/257] some work towards PRG file loading via CBDOS --- src/dos_m65/dev_sdcard/dev_sd_cmd_open.s | 58 ++++++++++------- src/dos_m65/dev_sdcard/fs_hvsr_open_file.s | 12 ---- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 3 - src/dos_m65/dev_sdcard/fs_hvsr_read_file.s | 72 ++++++++++++++++++++++ 4 files changed, 108 insertions(+), 37 deletions(-) delete mode 100644 src/dos_m65/dev_sdcard/fs_hvsr_open_file.s create mode 100644 src/dos_m65/dev_sdcard/fs_hvsr_read_file.s diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s index 02148279..a5680640 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s @@ -15,22 +15,7 @@ dev_sd_cmd_OPEN_EOI: ; XXX this dispatcher is temporary - ; XXX add support for second card - - lda SD_CMDFN_BUF - cmp #'$' - beq dev_sd_cmd_OPEN_dir - - ; XXX implement for file names - - jmp dos_EXIT_SEC - - -dev_sd_cmd_OPEN_dir: - - ; XXX this should be moved to common part - - ; Erase filter pattern for the directory + ; Erase filter pattern XXX this should be moved to common part ldy #$0F lda #$A0 @@ -39,18 +24,47 @@ dev_sd_cmd_OPEN_dir: dey bpl @lp1 - ; Copy the filter from command + ; XXX add support for second card + + lda SD_CMDFN_BUF + cmp #'$' + beq dev_sd_cmd_OPEN_dir + + ; FALLTROUGH + +dev_sd_cmd_OPEN_file: + + ; Copy the filter from command XXX this should be moved to common part and deduplicated with directory opening ldy #$00 -@lp2: - lda SD_CMDFN_BUF+1, y +@lp1: + lda SD_CMDFN_BUF, y cmp #$A0 - beq @lp2_end + beq @lp1_end sta PAR_FPATTERN, y iny cpy #$10 - bne @lp2 + bne @lp1 -@lp2_end: +@lp1_end: + + jmp fs_hvsr_read_file_open + + +dev_sd_cmd_OPEN_dir: + + ; Copy the filter from command XXX this should be moved to common part and deduplicated with file opening + + ldy #$00 +@lp1: + lda SD_CMDFN_BUF+1, y + cmp #$A0 + beq @lp1_end + sta PAR_FPATTERN, y + iny + cpy #$10 + bne @lp1 + +@lp1_end: jmp fs_hvsr_read_dir_open diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_open_file.s b/src/dos_m65/dev_sdcard/fs_hvsr_open_file.s deleted file mode 100644 index cab06208..00000000 --- a/src/dos_m65/dev_sdcard/fs_hvsr_open_file.s +++ /dev/null @@ -1,12 +0,0 @@ - -; -; Hypervisor virtual filesystem - opening the file -; - - -fs_hvsr_read_file_open: - - ; XXX provide implementation - - sec - rts diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index c7d9abf6..554e2086 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -4,9 +4,6 @@ ; -; XXX optimize the flow; we do not need 256-byte SD_DIRENT buffer, directory entries can be constructed directly - - fs_hvsr_read_dir_open: ; Open the directory diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s new file mode 100644 index 00000000..e4dcc5c1 --- /dev/null +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s @@ -0,0 +1,72 @@ + +; +; Hypervisor virtual filesystem - opening the file +; + + +fs_hvsr_read_file_open: + + ; Open the directory + + lda #$12 ; dos_opendir + sta HTRAP00 + +nop + + ; XXX handle read errors + + sta SD_DESC ; store directory descriptor XXX invent better name + + ; Reset status to OK + + lda #$00 + sta PAR_TRACK + sta PAR_SECTOR + jsr util_status_SD + + ; XXX deduplicate part above with opening directory + + ; Read dirent structures into $1000, find the first matching file + ; Starting at $1000 VIC sees chargen, so this should be a safe place + + jsr fs_hvsr_direntmem_prepare + +@lp_find: + + jsr fs_hvsr_util_nextdirentry ; fetch the next file name + +bcs fs_hvsr_file_not_found + + ; Only accept files of type 'PRG' + + lda PAR_FTYPE + and #%10111111 + cmp #$02 + bne @lp_find + + ; Check if file name matches the filter + + jsr util_dir_filter + bne @lp_find ; if does not match, try the next entry + + ; Found the file - load it + + ; XXX provide implementation + + + + clc + rts + +fs_hvsr_file_not_found: + + jsr fs_hvsr_direntmem_restore ; restore $1000 memory content + + ldx SD_DESC + lda #$16 ; dos_closedir + sta HTRAP00 + +nop + + lda #39 ; file not found error + jsr util_status_SD + + sec + rts From 00dd3bc5db09623c0359c439966b49a5f422580a Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 25 Feb 2021 19:12:44 +0100 Subject: [PATCH 249/257] CBDOS now properly reports 'file not open' --- src/dos_m65/dev_sdcard/fs_hvsr_read_file.s | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s index e4dcc5c1..0f8ad418 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s @@ -53,8 +53,8 @@ fs_hvsr_read_file_open: - clc - rts + jmp dos_EXIT + fs_hvsr_file_not_found: @@ -68,5 +68,4 @@ fs_hvsr_file_not_found: lda #39 ; file not found error jsr util_status_SD - sec - rts + jmp dos_EXIT_SEC From 1de5af7cb4fd6eaa73f440a90285d1ed86bcc40c Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Thu, 25 Feb 2021 20:00:14 +0100 Subject: [PATCH 250/257] small CBDOS cleanup --- src/dos_m65/dev_floppy/dev_fd_cmd_open.s | 2 +- src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s | 2 +- src/dos_m65/dev_sdcard/dev_sd_cmd_close.s | 2 +- src/dos_m65/dev_sdcard/dev_sd_cmd_open.s | 2 +- src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s | 2 +- src/dos_m65/dev_sdcard/fs_hvsr_read_file.s | 5 +++-- src/dos_m65/dos_enter_exit.s | 16 ++++++++-------- src/dos_m65/dos_unitchk.s | 2 +- src/dos_m65/dos_unitnum.s | 4 ++-- src/dos_m65/dos_unitset.s | 2 +- src/dos_m65/msg_acptr.s | 6 +++--- src/dos_m65/msg_ciout.s | 8 ++++---- src/dos_m65/msg_listen.s | 4 ++-- src/dos_m65/msg_second.s | 2 +- src/dos_m65/msg_talk.s | 4 ++-- src/dos_m65/msg_tksa.s | 2 +- src/dos_m65/msg_unlsn_untlk.s | 4 ++-- 17 files changed, 35 insertions(+), 34 deletions(-) diff --git a/src/dos_m65/dev_floppy/dev_fd_cmd_open.s b/src/dos_m65/dev_floppy/dev_fd_cmd_open.s index 1358ab93..8029650e 100644 --- a/src/dos_m65/dev_floppy/dev_fd_cmd_open.s +++ b/src/dos_m65/dev_floppy/dev_fd_cmd_open.s @@ -14,4 +14,4 @@ dev_fd_cmd_OPEN_EOI: ; XXX provide implementation - jmp dos_EXIT + jmp dos_EXIT_CLC diff --git a/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s b/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s index 50d2c5f7..4e2b436e 100644 --- a/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s +++ b/src/dos_m65/dev_ramdisk/dev_rd_cmd_open.s @@ -14,4 +14,4 @@ dev_rd_cmd_OPEN_EOI: ; XXX provide implementation - jmp dos_EXIT + jmp dos_EXIT_CLC diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_close.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_close.s index af8ca747..9d0c23da 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_close.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_close.s @@ -8,4 +8,4 @@ dev_sd_cmd_CLOSE: ; XXX provide implementation - jmp dos_EXIT + jmp dos_EXIT_CLC diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s index a5680640..0d75c87b 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s @@ -9,7 +9,7 @@ dev_sd_cmd_OPEN: lda #$01 ; mode: receive command or file name sta SD_MODE - jmp dos_EXIT + jmp dos_EXIT_CLC dev_sd_cmd_OPEN_EOI: diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s index 554e2086..91bb422e 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_dir.s @@ -42,7 +42,7 @@ fs_hvsr_read_dir_open: ; End - jmp dos_EXIT + jmp dos_EXIT_CLC fs_hvsr_read_dir: diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s index 0f8ad418..ae50062c 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s @@ -53,7 +53,7 @@ fs_hvsr_read_file_open: - jmp dos_EXIT + jmp dos_EXIT_CLC fs_hvsr_file_not_found: @@ -68,4 +68,5 @@ fs_hvsr_file_not_found: lda #39 ; file not found error jsr util_status_SD - jmp dos_EXIT_SEC + lda #K_ERR_FILE_NOT_FOUND + jmp dos_EXIT_SEC_A diff --git a/src/dos_m65/dos_enter_exit.s b/src/dos_m65/dos_enter_exit.s index f05635e9..a44c681e 100644 --- a/src/dos_m65/dos_enter_exit.s +++ b/src/dos_m65/dos_enter_exit.s @@ -20,32 +20,32 @@ dos_ENTER: ; enter DOS context dos_EXIT_SEC: ; exit DOS context with Carry set sec - bra dos_EXIT_common + bra dos_EXIT -dos_EXIT: ; exit DOS context with Carry clear +dos_EXIT_CLC: ; exit DOS context with Carry clear clc ; FALLTROUGH -dos_EXIT_common: +dos_EXIT: lda REG_A - bra dos_EXIT_A_common + bra dos_EXIT_A -dos_EXIT_A_SEC: ; exit DOS context with Carry set, return .A +dos_EXIT_SEC_A: ; exit DOS context with Carry set, return .A sec - bra dos_EXIT_A_common + bra dos_EXIT_A -dos_EXIT_A: ; exit DOS context with Carry clear, return .A +dos_EXIT_CLC_A: ; exit DOS context with Carry clear, return .A clc ; FALLTROUGH -dos_EXIT_A_common: +dos_EXIT_A: ldz REG_Z ldy REG_Y diff --git a/src/dos_m65/dos_unitchk.s b/src/dos_m65/dos_unitchk.s index 610f617d..b14c09f9 100644 --- a/src/dos_m65/dos_unitchk.s +++ b/src/dos_m65/dos_unitchk.s @@ -47,4 +47,4 @@ dos_UNITCHK_ramdisk: lda #$02 - jmp dos_EXIT_A + jmp dos_EXIT_CLC_A diff --git a/src/dos_m65/dos_unitnum.s b/src/dos_m65/dos_unitnum.s index 3acd1a4e..06857073 100644 --- a/src/dos_m65/dos_unitnum.s +++ b/src/dos_m65/dos_unitnum.s @@ -30,7 +30,7 @@ dos_UNITNUM_fail: lda #$00 - jmp dos_EXIT_A_SEC + jmp dos_EXIT_SEC_A dos_UNITNUM_sdcard: @@ -53,4 +53,4 @@ dos_UNITNUM_common: cmp #$00 beq dos_UNITNUM_fail - jmp dos_EXIT_A + jmp dos_EXIT_CLC_A diff --git a/src/dos_m65/dos_unitset.s b/src/dos_m65/dos_unitset.s index e57c29eb..a82e6316 100644 --- a/src/dos_m65/dos_unitset.s +++ b/src/dos_m65/dos_unitset.s @@ -46,4 +46,4 @@ dos_UNITSET_ramdisk: stx UNIT_RAMDISK - jmp dos_EXIT + jmp dos_EXIT_CLC diff --git a/src/dos_m65/msg_acptr.s b/src/dos_m65/msg_acptr.s index 0d73ae4d..e3bffd87 100644 --- a/src/dos_m65/msg_acptr.s +++ b/src/dos_m65/msg_acptr.s @@ -60,7 +60,7 @@ msg_ACPTR_read_SD: bcc @3 jsr kernalstatus_EOI @3: - jmp dos_EXIT + jmp dos_EXIT_CLC msg_ACPTR_read_FD: @@ -113,7 +113,7 @@ msg_ACPTR_status_got: sta TBTCNT ; byte return beq msg_ACPTR_reset_status - jmp dos_EXIT_A + jmp dos_EXIT_CLC_A msg_ACPTR_fail_no_talker: @@ -134,7 +134,7 @@ msg_ACPTR_reset_status: msg_ACPTR_EOI: jsr kernalstatus_EOI - jmp dos_EXIT + jmp dos_EXIT_CLC ; Vector tables for jumps diff --git a/src/dos_m65/msg_ciout.s b/src/dos_m65/msg_ciout.s index e1539f70..56ec372a 100644 --- a/src/dos_m65/msg_ciout.s +++ b/src/dos_m65/msg_ciout.s @@ -34,7 +34,7 @@ msg_CIOUT_fail: ; XXX should we set status? lda #K_ERR_DEVICE_NOT_FOUND - jmp dos_EXIT_A_SEC + jmp dos_EXIT_SEC_A @@ -53,7 +53,7 @@ msg_CIOUT_cmdfn_SD: ; get next byte of status - SD card sta SD_CMDFN_BUF,x plp +bcs dev_sd_cmd_OPEN_EOI ; if EOI - execute command - jmp dos_EXIT + jmp dos_EXIT_CLC msg_CIOUT_cmdfn_FD: ; get next byte of status - floppy @@ -68,7 +68,7 @@ msg_CIOUT_cmdfn_FD: ; get next byte of status - floppy sta FD_CMDFN_BUF,x plp +bcs dev_fd_cmd_OPEN_EOI ; if EOI - execute command - jmp dos_EXIT + jmp dos_EXIT_CLC msg_CIOUT_cmdfn_RD: ; get next byte of status - ram disk @@ -83,7 +83,7 @@ msg_CIOUT_cmdfn_RD: ; get next byte of status - ram disk sta RD_CMDFN_BUF,x plp +bcs dev_rd_cmd_OPEN_EOI ; if EOI - execute command - jmp dos_EXIT + jmp dos_EXIT_CLC msg_CIOUT_cmdfn_vectab: diff --git a/src/dos_m65/msg_listen.s b/src/dos_m65/msg_listen.s index ee0e2d79..b8c3f3a8 100644 --- a/src/dos_m65/msg_listen.s +++ b/src/dos_m65/msg_listen.s @@ -45,10 +45,10 @@ msg_LISTEN_success: ; XXX should we reset XX_CMDFN_IDX ? - jmp dos_EXIT + jmp dos_EXIT_CLC msg_LISTEN_fail: lda #K_ERR_DEVICE_NOT_FOUND - jmp dos_EXIT_A_SEC + jmp dos_EXIT_SEC_A diff --git a/src/dos_m65/msg_second.s b/src/dos_m65/msg_second.s index febd686e..c0481254 100644 --- a/src/dos_m65/msg_second.s +++ b/src/dos_m65/msg_second.s @@ -34,7 +34,7 @@ msg_SECOND: msg_SECOND_done: - jmp dos_EXIT + jmp dos_EXIT_CLC msg_SECOND_OPEN: diff --git a/src/dos_m65/msg_talk.s b/src/dos_m65/msg_talk.s index 24381ecb..28bb56e2 100644 --- a/src/dos_m65/msg_talk.s +++ b/src/dos_m65/msg_talk.s @@ -43,10 +43,10 @@ msg_TALK_success: asl sta IDX2_TALKER - jmp dos_EXIT + jmp dos_EXIT_CLC msg_TALK_fail: lda #K_ERR_DEVICE_NOT_FOUND - jmp dos_EXIT_A_SEC + jmp dos_EXIT_SEC_A diff --git a/src/dos_m65/msg_tksa.s b/src/dos_m65/msg_tksa.s index 9df0a4ca..018a0f62 100644 --- a/src/dos_m65/msg_tksa.s +++ b/src/dos_m65/msg_tksa.s @@ -19,4 +19,4 @@ msg_TKSA: msg_TKSA_done: - jmp dos_EXIT + jmp dos_EXIT_CLC diff --git a/src/dos_m65/msg_unlsn_untlk.s b/src/dos_m65/msg_unlsn_untlk.s index a61a7993..5bf9030b 100644 --- a/src/dos_m65/msg_unlsn_untlk.s +++ b/src/dos_m65/msg_unlsn_untlk.s @@ -13,7 +13,7 @@ msg_UNLSN: sta IDX1_LISTENER sta IDX2_LISTENER - jmp dos_EXIT + jmp dos_EXIT_CLC msg_UNTLK: @@ -22,4 +22,4 @@ msg_UNTLK: sta IDX1_TALKER sta IDX2_TALKER - jmp dos_EXIT + jmp dos_EXIT_CLC From b7f579525b40bb3803ca5d80751ea0dfd4468f01 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 28 Feb 2021 16:05:32 +0100 Subject: [PATCH 251/257] written code for reading file from SD card, not tested yet --- src/aliases/,aliases_hardware_m65.s | 1 + src/dos_m65/,aliases_dos.s | 5 +- src/dos_m65/dev_sdcard/dev_sd_cmd_open.s | 3 + src/dos_m65/dev_sdcard/dev_sd_cmd_read.s | 4 +- src/dos_m65/dev_sdcard/fs_hvsr_read_file.s | 82 +++++++++++++++++++++- 5 files changed, 91 insertions(+), 4 deletions(-) diff --git a/src/aliases/,aliases_hardware_m65.s b/src/aliases/,aliases_hardware_m65.s index 59333d43..4c5126e4 100644 --- a/src/aliases/,aliases_hardware_m65.s +++ b/src/aliases/,aliases_hardware_m65.s @@ -48,6 +48,7 @@ !addr SD_CTL = $D680 !addr SD_ADDR = $D681 ; 4 bytes + !addr SD_BUFCTL = $D689 !addr SD_ERRCODE = $D6DA ; SD card sector buffer, $FFFD6E00 diff --git a/src/dos_m65/,aliases_dos.s b/src/dos_m65/,aliases_dos.s index 7c15c96a..8a11c5f6 100644 --- a/src/dos_m65/,aliases_dos.s +++ b/src/dos_m65/,aliases_dos.s @@ -128,4 +128,7 @@ !addr RD_DIR_ENTRY = $82E0 ; - ram disk !addr SD_MEMSHADOW = $8310 ; 256 byte buffer for preserving original memory content - !addr SD_DESC = $8410 ; current file descriptor + !addr SD_FILEBUF = $8410 ; 512 byte buffer for file reading + + !addr SD_DESC = $8610 ; current file descriptor + diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s index 0d75c87b..17a34318 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_open.s @@ -53,6 +53,9 @@ dev_sd_cmd_OPEN_file: dev_sd_cmd_OPEN_dir: + lda #$02 ; mode: read directory + sta SD_MODE + ; Copy the filter from command XXX this should be moved to common part and deduplicated with file opening ldy #$00 diff --git a/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s b/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s index 4a44e46e..9852d5b0 100644 --- a/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s +++ b/src/dos_m65/dev_sdcard/dev_sd_cmd_read.s @@ -6,7 +6,9 @@ dev_sd_cmd_READ: - ; XXX provide implementation for regular files + lda SD_MODE + cmp #$03 + +beq fs_hvsr_read_file lda SD_DIR_PHASE cmp #$01 diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s index ae50062c..37360e07 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s @@ -49,12 +49,90 @@ fs_hvsr_read_file_open: ; Found the file - load it - ; XXX provide implementation + jsr fs_hvsr_direntmem_restore ; restore $1000 memory content + lda #$18 ; dos_openfile + sta HTRAP00 + +nop + ; XXX check error code - jmp dos_EXIT_CLC + ; XXX check for errors + ; Read the first 512-byte chunk + + lda #$03 ; mode: read file + sta SD_MODE + + jsr fs_hvsr_read_file + jmp dos_EXIT + +fs_hvsr_read_file: + + ; Read chunk of data to SD card buffer + + lda #$1A ; dos_readfile + sta HTRAP00 + +nop + + ; XXX check error code + + ; Store number of bytes read + + stx SD_ACPTR_LEN+0 + sty SD_ACPTR_LEN+1 + + ; Check if any data was read + + lda SD_ACPTR_LEN+0 + ora SD_ACPTR_LEN+0 + bne @copy + + lda #$20 ; dos_closefile + sta HTRAP00 + +nop + + lda #$00 + sec + rts + +@copy: + + ; Set pointer to new data + + lda #SD_FILEBUF + sta SD_ACPTR_PTR+1 + + ; Copy data to SD_FILEBUF + + lda #%10000000 ; select SD card buffer + tsb SD_BUFCTL + + lda #$02 + sta DMA_ADDRBANK ; $D702 + lda #$00 + sta DMA_ADDRMB ; $D704 + + lda #>(@dmalist-$4000) + sta DMA_ADDRMSB ; $D701 + lda #<(@dmalist-$4000) + sta DMA_ETRIG ; $D705 + + clc + rts + +@dmalist: + + !byte $0A ; use F018A list format (it is shorter by 1 byte) + !byte $80, $FF ; src. address is $FFxxxxx + !byte $81, $00 ; dst. address is $00xxxxx + !byte $00 ; end of options + !byte $00 ; operation: COPY + !word $0200 ; data size if 512 bytes + !byte $00, $6E, $0D ; src. addr is $xxD6E00 + !byte SD_FILEBUF - $80, $01 ; dst. addr is $xx1xxxx (internal buffer) fs_hvsr_file_not_found: From e166b8ee256c5430137640862e6fa109c8916fbe Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 28 Feb 2021 16:18:03 +0100 Subject: [PATCH 252/257] fixed some problems with loading files from SD card --- src/dos_m65/dev_sdcard/fs_hvsr_read_file.s | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s index 37360e07..a5057856 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s @@ -35,11 +35,11 @@ fs_hvsr_read_file_open: jsr fs_hvsr_util_nextdirentry ; fetch the next file name +bcs fs_hvsr_file_not_found - ; Only accept files of type 'PRG' + ; Only accept files of type 'PRG', properly closed lda PAR_FTYPE and #%10111111 - cmp #$02 + cmp #$82 bne @lp_find ; Check if file name matches the filter @@ -57,8 +57,6 @@ fs_hvsr_read_file_open: ; XXX check error code - ; XXX check for errors - ; Read the first 512-byte chunk lda #$03 ; mode: read file @@ -71,6 +69,7 @@ fs_hvsr_read_file: ; Read chunk of data to SD card buffer + ldx SD_DESC lda #$1A ; dos_readfile sta HTRAP00 +nop From e497cd2905f1e072e0b48658837403f263ce4fce Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 28 Feb 2021 16:30:38 +0100 Subject: [PATCH 253/257] added register name --- src/zvm_m65/zvm_cputest.s | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/zvm_m65/zvm_cputest.s b/src/zvm_m65/zvm_cputest.s index b23a84f9..94601f4d 100644 --- a/src/zvm_m65/zvm_cputest.s +++ b/src/zvm_m65/zvm_cputest.s @@ -54,7 +54,7 @@ ZVM_cputest: ; Select SD card buffer lda #$80 - tsb $D689 ; XXX invent name for the register + tsb SD_BUFCTL ; Prepare pointers From 2958ec6d3aa54225650c6d13fb5fca6a9cc46318 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 28 Feb 2021 16:42:31 +0100 Subject: [PATCH 254/257] fix for end of file check in CBDOS --- src/dos_m65/dev_sdcard/fs_hvsr_read_file.s | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s index a5057856..6c8bed1f 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s @@ -83,7 +83,7 @@ fs_hvsr_read_file: ; Check if any data was read - lda SD_ACPTR_LEN+0 + tya ora SD_ACPTR_LEN+0 bne @copy From a4af1042ea7e7e2aa7808aa461df5e9271c7f997 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 28 Feb 2021 17:10:06 +0100 Subject: [PATCH 255/257] loading files from SD card works now --- src/dos_m65/dev_sdcard/fs_hvsr_read_file.s | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s b/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s index 6c8bed1f..61977c37 100644 --- a/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s +++ b/src/dos_m65/dev_sdcard/fs_hvsr_read_file.s @@ -131,7 +131,9 @@ fs_hvsr_read_file: !byte $00 ; operation: COPY !word $0200 ; data size if 512 bytes !byte $00, $6E, $0D ; src. addr is $xxD6E00 - !byte SD_FILEBUF - $80, $01 ; dst. addr is $xx1xxxx (internal buffer) + !byte <(SD_FILEBUF - $8000) + !byte >(SD_FILEBUF - $8000) + !byte $01 ; dst. addr is $xx1xxxx (internal buffer) fs_hvsr_file_not_found: From a0da4ebed1058509266cfaa1c2e7f11e75b51481 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 28 Feb 2021 17:23:45 +0100 Subject: [PATCH 256/257] updated binaries --- bin/basic_generic.rom | Bin 8192 -> 8192 bytes bin/basic_generic_crt.rom | Bin 8192 -> 8192 bytes bin/basic_ultimate64.rom | Bin 8192 -> 8192 bytes bin/extrom_generic_crt.crt | Bin 32896 -> 32896 bytes bin/kernal_generic.rom | Bin 8192 -> 8192 bytes bin/kernal_generic_crt.rom | Bin 8192 -> 8192 bytes bin/kernal_ultimate64.rom | Bin 8192 -> 8192 bytes bin/mega65.rom | Bin 131072 -> 131072 bytes bin/mega65_orfont.rom | Bin 131072 -> 131072 bytes 9 files changed, 0 insertions(+), 0 deletions(-) diff --git a/bin/basic_generic.rom b/bin/basic_generic.rom index 7238590707a8f05d80af13940f2ff057207d7635..a25f8f71bdc57563f3cd6df00501f40bb21d5c41 100644 GIT binary patch delta 70 zcmZp0XmHrDmWk=))6MId>exWEKBpR!@X4nOm=&fz^ymN*t1=Y$wkX`1oWcDFB=5r` UAk1uJWHC8jJ_yL4yjk8C02iAavj6}9 delta 70 zcmZp0XmHrDmWk=$_s#2>>exWEKBpR!@WJm3m=&fz^ymN*t1=Y$wkRB%oWcDFB=5r` UAk1uNWHvcoJ_yL4yjk8C0325w&Hw-a diff --git a/bin/basic_generic_crt.rom b/bin/basic_generic_crt.rom index 164de140ac19227f387e2569e62f016064abac8e..3bbe6e029662619dba580718d1893b87a09906f5 100644 GIT binary patch delta 95 zcmZp0XmHqI&BB`eQbGLrW(SsAoJ>GkhOd{A?cbZF8x;O+UeCXVQTE>(AN%(TrtcLT omqHoh&!LQ-*PAN@WjGm?H&2y1&cbYDWHC8jJ_u;aQLIGKR73|}uJ+mkm-Hz+*Wyq50e?u8i_@% diff --git a/bin/basic_ultimate64.rom b/bin/basic_ultimate64.rom index 1e141fc89022198dfa8429a57067159206a59791..343bb505f6ee2c1c303345e3ee962406c0b788c2 100644 GIT binary patch delta 74 zcmZp0XmHrj$i#N?=^|N$;K_{a!kcF?ePLyknB31XkLl#o&H9{XOh9^aI`?M~H-=}P Z0Heg_-!h3z%tl5QljG%sK(d?VeE}MU91j2h delta 74 zcmZp0XmHrj$i!CieUYp}@MK1I;mxy{zOXW~Oz!8H$5irtvp%O86Of*q&ixt0jp3Om Zz{s-sw@e}vv!RjMtsu~a foFM!0Ou@6*Sy}`I`s>Od`jatsu~a foFM!0OqsLTSy}`I=IhEJ=94#GG69*hYF-v1Ud|t< diff --git a/bin/kernal_generic.rom b/bin/kernal_generic.rom index 2a298fb79c708f1580f188914b19702919f919f5..69d5ba3831f860f90f81088193d9fa63b59e2681 100644 GIT binary patch delta 2285 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zaq}BxIKgwF5f6S1*4AKc4c69RZ4K7eV6EOijSO{iY+29Mk&YR2GtcB>W`~`r!OSu{ z^8_;!?M&!=U>-N|d9pEc%+7p?nNRJ^8O+SLGfwHiAUiV+Gp&E}1+2l$_jbmZPR?*z z`DY8~n-w$2&P>Yy=6oZsS&x}d?aY}BGR{e1XZ#ibbN?o9wgNLHcIE(PUa~V}CiyoB zbSD+;A(nEdPyPGPL_@`}$Kal_Ws)Jh)g*BkFM56_@|xqwYBV3P~j3Y> zn-*;I2p97Rn>@lMkFd!jZ1M=3Ji;arpTs1c${}S(2Rn-FD77Q9qr#3_4M&U{(s42A*d!gBEXO9xvB`35vK*T% z$0p0M$#QJ+7B+bco4kch-ohqtVUxG8$y?Y2hAg<3>v@f9a1TEg!8SWSvg2JlUbo{> zJKBdVxc6Cy2lw=owtn(aKY6#Gyxvb9ZQbf_AJkwCFV^o{Oipz=772g$(j2MpTuhF4 zgVlwX{4T2E5rBT2ntaXWSmb8Pm9{R%Mg}z*`d6btrO1~IETw=eC1c66Qv8?TQp`&R zmckqTwUiP16T?e!NgIUD0nx{1d z{ztW43qw3ejUR7#54jC)kPi0f!F=;z9-b-rCUUO!P4rT)|tAW1epCzD;gY>wKPc?8r8>E9a4(6K&^QgO>l z8O*v4X8i}VXfPW%m>sNzCJs`=Yg444Y+x$~siBpF`R2jAJ|vr*Gn5MerNiKmqiuy8 dn3|})fmgxiY%y`ij From e78cbd18165c876cfb67ff8008051ef5fd07c548 Mon Sep 17 00:00:00 2001 From: FeralChild64 Date: Sun, 28 Feb 2021 20:49:00 +0100 Subject: [PATCH 257/257] updated documentation, explained all similarities >3 --- STATUS.md | 2 +- doc/Development.md | 2 ++ strings/0FDAA2 | 3 +++ strings/11D029EF8D11D0AD | 3 +++ strings/20D0F790 | 3 +++ strings/6020D0F7 | 3 +++ 6 files changed, 15 insertions(+), 1 deletion(-) create mode 100644 strings/0FDAA2 create mode 100644 strings/11D029EF8D11D0AD create mode 100644 strings/20D0F790 create mode 100644 strings/6020D0F7 diff --git a/STATUS.md b/STATUS.md index 0a357245..392ef05c 100644 --- a/STATUS.md +++ b/STATUS.md @@ -128,7 +128,7 @@ The following ROM features are currently missing: | Driver | Status | Remarks | | :----------------: | :------: | :------------------------------------------------: | -| SD card | PARTIAL | work-in-progress | +| SD card | PARTIAL | work-in-progress, can already load files | | floppy drive | NOT DONE | | | ram disk | NOT DONE | | diff --git a/doc/Development.md b/doc/Development.md index a1b33f45..e0e458de 100644 --- a/doc/Development.md +++ b/doc/Development.md @@ -186,6 +186,8 @@ Last, but not least - the `#TAKE-HIGH` is intended to be used for BASIC routines ### MEGA65 computer-based DOS +Both the internal DOS and all the IEC operations leave with CPU speed set to 1 MHz (in case of legacy compatibility mode) or 40 MHz (in case of native mode). Also the fast interrupts and badline emulation is set according to the mode. + TODO ### CPU-specific optimizations diff --git a/strings/0FDAA2 b/strings/0FDAA2 new file mode 100644 index 00000000..f01e7906 --- /dev/null +++ b/strings/0FDAA2 @@ -0,0 +1,3 @@ +part of floating point constants pi/2 and one of the sine calculation coefficients + +In the opriginal ROMs this sequence occurs within two floating point constants, one is a very common: PI/2. Mathematical fact, not a human creation - not copyrightable. diff --git a/strings/11D029EF8D11D0AD b/strings/11D029EF8D11D0AD new file mode 100644 index 00000000..7d989654 --- /dev/null +++ b/strings/11D029EF8D11D0AD @@ -0,0 +1,3 @@ +$D011 + AND #$EF + STA $D011 + LDA (address not included in similarity) + +Simple set of instructions manipulating bits in a documented hardware register. Trivial - not copyrightable. diff --git a/strings/20D0F790 b/strings/20D0F790 new file mode 100644 index 00000000..0db5b173 --- /dev/null +++ b/strings/20D0F790 @@ -0,0 +1,3 @@ +JSR $F7D0 + BCC (offset not included in similarity) + +Jump to a subroutine + decision based on result (Carry flag) - trivial, not copyrightable. diff --git a/strings/6020D0F7 b/strings/6020D0F7 new file mode 100644 index 00000000..22427489 --- /dev/null +++ b/strings/6020D0F7 @@ -0,0 +1,3 @@ +RTS + JSR $F7D0 + +End of a routine + a single instruction. Trivial - not copyrightable.