chris
05e4b67858
The copy loop wrote each byte with STA RRNET_RX_TX_DATA,X, and an indexed store reads its address first. Reads of RxTxData take the bytes of a received frame (AN181), so on a real CS8900A each byte sent took one of a frame the program had started reading. The loop now stores to the port's low or high byte by address, as ip65's and Contiki's drivers do; reads stay indexed, which read once.
304 lines
5.9 KiB
ArmAsm
304 lines
5.9 KiB
ArmAsm
;; #LAYOUT# STD * #TAKE
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;; #LAYOUT# * * #IGNORE
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;
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; The network entries of the Arnitech jump table (mc64 only, arnitech's ADR 0027): whole
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; Ethernet frames through the CS8900A at the RR-Net socket, polled, from the Destination
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; Address to the end of the data, without the CRC. The chip is found by its Product ID, so
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; the routines find an RR-Net on any C64 that has one. Register semantics are the CS8900A
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; datasheet's (Cirrus Logic DS271F5) and its 8-bit mode's (AN181).
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;
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; SAL holds the pointer to the frame or buffer, EAL the bytes left, as LOAD and SAVE use them.
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;
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!ifdef CONFIG_ARNITECH_CONTROLLER {
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; PacketPage addresses, all but the Product ID's in page $01
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CS_PRODUCT_ID = $630E ; at $0000, low byte first
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CS_RX_CFG = $02 ; bit 6 Skip_1
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CS_RX_CTL = $04
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CS_LINE_CTL = $12
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CS_SELF_CTL = $14 ; bit 6 RESET
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CS_RX_EVENT = $24 ; bit 8 RxOK
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CS_SELF_ST = $36 ; bit 7 INITD
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CS_BUS_ST = $38 ; bit 7 TxBidErr, bit 8 Rdy4TxNOW
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CS_IA = $58 ; Individual Address, $0158-$015D
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CS_RX_CTL_VALUE = $0D05 ; RxOKA, IndividualA, BroadcastA
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CS_LINE_VALUE = $00D3 ; SerRxON, SerTxON
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CS_TX_AFTER_ALL = $C0 ; TxCMD: start once the whole frame is in the chip
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NET_NONE_WAITING = $00
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NET_NO_CARD = $01
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NET_NO_ROOM = $02
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NET_LENGTH_REFUSED = $03
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NET_TOO_LONG = $04
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;
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; NET_INIT, $FF0C: see ff00.arnitech_jumptable.s
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;
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arnitech_net_init:
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jsr arnitech_net_probe
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bcs @2
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lda #CS_SELF_CTL
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jsr arnitech_net_point
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lda #$40 ; RESET, which points the PacketPage pointer at $0000
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sta RRNET_PP_DATA
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lda #CS_SELF_ST
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jsr arnitech_net_point
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@1:
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lda RRNET_PP_DATA
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bpl @1 ; until INITD
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+phy_trash_a
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lda #CS_RX_CTL
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ldx #<CS_RX_CTL_VALUE
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ldy #>CS_RX_CTL_VALUE
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jsr arnitech_net_write
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lda #CS_LINE_CTL
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ldx #<CS_LINE_VALUE
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ldy #>CS_LINE_VALUE
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jsr arnitech_net_write
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+ply_trash_a
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clc
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@2:
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rts
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;
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; NET_MAC, $FF0F: see ff00.arnitech_jumptable.s
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;
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arnitech_net_mac:
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stx SAL+0
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sty SAL+1
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jsr arnitech_net_probe
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bcs @2
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ldy #$00
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@1:
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tya
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ora #CS_IA ; $58, $5A, $5C
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jsr arnitech_net_point
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lda RRNET_PP_DATA+0
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sta (SAL), y
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iny
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lda RRNET_PP_DATA+1
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sta (SAL), y
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iny
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cpy #$06
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bne @1
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clc
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@2:
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rts
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;
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; NET_SEND, $FF12: see ff00.arnitech_jumptable.s
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;
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arnitech_net_send:
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jsr arnitech_net_args
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lda #NET_NO_CARD
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bcs arnitech_net_done
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lda #CS_TX_AFTER_ALL ; TxCMD, which the high byte's write gives the chip
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sta RRNET_TX_CMD+0
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lda #$00
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sta RRNET_TX_CMD+1
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lda EAL+0 ; TxLength: the bid, at the high byte's write
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sta RRNET_TX_LENGTH+0
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lda EAL+1
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sta RRNET_TX_LENGTH+1
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lda #CS_BUS_ST
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jsr arnitech_net_point
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lda RRNET_PP_DATA+0
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bmi @1 ; TxBidErr
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lda RRNET_PP_DATA+1
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lsr ; Rdy4TxNOW into carry
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lda #NET_NO_ROOM
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bcc arnitech_net_fail
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clv ; memory to chip
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jmp arnitech_net_copy ; carry clear
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@1:
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lda #NET_LENGTH_REFUSED
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; FALLTROUGH
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arnitech_net_fail:
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sec
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; FALLTROUGH
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arnitech_net_done:
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rts
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;
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; NET_RECV, $FF15: see ff00.arnitech_jumptable.s
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;
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arnitech_net_recv:
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jsr arnitech_net_args
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lda #NET_NO_CARD
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bcs arnitech_net_done
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lda #CS_RX_EVENT
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jsr arnitech_net_point
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lda RRNET_PP_DATA+1 ; reading the event clears it
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lsr ; RxOK into carry
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lda #NET_NONE_WAITING
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bcc arnitech_net_fail
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lda RRNET_RX_TX_DATA+1 ; RxStatus, high byte first, not needed
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lda RRNET_RX_TX_DATA+0
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ldx RRNET_RX_TX_DATA+1 ; RxLength, high byte first
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lda RRNET_RX_TX_DATA+0
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cpx EAL+1
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bne @1
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cmp EAL+0
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beq @2
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@1:
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bcs @3 ; longer than the buffer
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@2:
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sta EAL+0
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stx EAL+1
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pha
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txa
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pha
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bit arnitech_net_copy_end ; an RTS, $60: sets V, chip to memory
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jsr arnitech_net_copy
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pla
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tay
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pla
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tax
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clc
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rts
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@3:
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lda #CS_RX_CFG
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jsr arnitech_net_point
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lda RRNET_PP_DATA+0
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ora #$40 ; Skip_1: the frame is dropped
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sta RRNET_PP_DATA+0
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lda #NET_TOO_LONG
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bne arnitech_net_fail ; branch always
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;
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; The pointer from the zero page address in A into SAL, the length in X/Y into EAL, and the
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; chip probed. Out: carry clear if it answers.
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;
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arnitech_net_args:
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stx EAL+0
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sty EAL+1
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tax
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lda $00, x
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sta SAL+0
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lda $01, x
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sta SAL+1
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; FALLTROUGH
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;
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; Whether the chip answers: its Product ID at PacketPage $0000. Out: carry clear if it does.
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; X and Y are kept.
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;
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arnitech_net_probe:
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lda #$00
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sta RRNET_PP_POINTER+0
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sta RRNET_PP_POINTER+1
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lda RRNET_PP_DATA+0
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cmp #<CS_PRODUCT_ID
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bne @1
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lda RRNET_PP_DATA+1
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cmp #>CS_PRODUCT_ID
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bne @1
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clc
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rts
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@1:
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sec
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rts
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;
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; PacketPage register $01xx, xx in A, written with X (low byte) and Y (high byte)
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;
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arnitech_net_write:
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jsr arnitech_net_point
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stx RRNET_PP_DATA+0
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sty RRNET_PP_DATA+1
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rts
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;
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; The PacketPage pointer at $01xx, xx in A. X and Y are kept.
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;
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arnitech_net_point:
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sta RRNET_PP_POINTER+0
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lda #$01
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sta RRNET_PP_POINTER+1
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rts
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;
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; EAL bytes between the chip's receive and transmit data port and SAL: from the chip with V
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; set, to it with V clear. Even bytes go through the port's low byte, odd ones through its
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; high byte. Out: carry clear.
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;
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arnitech_net_copy:
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ldy #$00
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@1:
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lda EAL+0
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ora EAL+1
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beq @4
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tya
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and #$01
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tax
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bvs @2
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lda (SAL), y
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cpx #$01 ; plain stores: an indexed one reads the port
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beq @7 ; first, which takes a byte of a received frame
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sta RRNET_RX_TX_DATA+0
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bvc @3 ; branch always
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@7:
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sta RRNET_RX_TX_DATA+1
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bvc @3 ; branch always
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@2:
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lda RRNET_RX_TX_DATA, x
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sta (SAL), y
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@3:
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iny
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bne @5
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inc SAL+1
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@5:
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lda EAL+0
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bne @6
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dec EAL+1
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@6:
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dec EAL+0
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jmp @1
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@4:
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clc
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arnitech_net_copy_end:
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rts
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}
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