99 lines
2.1 KiB
ArmAsm
99 lines
2.1 KiB
ArmAsm
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;
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; Z80 instruction implementation - RLC
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;
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!macro Z80_RLC_REGn .REGn {
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clc
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bbr7 .REGn, @1
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sec
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@1:
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rol .REGn
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ldx .REGn
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bra Z80_common_RLC
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}
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!macro Z80_RLC_VIA_HL {
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+Z80_FETCH_VIA_HL
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tax
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rol
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txa
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rol
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+Z80_STORE_BACK_VIA_HL
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bra Z80_common_RLC_VIA
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}
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!macro Z80_RLC_VIA_IXY_d {
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lda [PTR_IXY_d] ,z
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tax
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rol
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txa
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rol
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; FALLTROUGH
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}
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!macro Z80_RLC_VIA_IXY_d_REGn .REGn {
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lda [PTR_IXY_d] ,z
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tax
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rol
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txa
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rol
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sta .REGn
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bra Z80_common_RLC_VIA_IXY_d
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}
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Z80_instr_CB_00: +Z80_RLC_REGn REG_B ; RLC B
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Z80_instr_CB_01: +Z80_RLC_REGn REG_C ; RLC C
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Z80_instr_CB_02: +Z80_RLC_REGn REG_D ; RLC D
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Z80_instr_CB_03: +Z80_RLC_REGn REG_E ; RLC E
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Z80_instr_CB_04: +Z80_RLC_REGn REG_H ; RLC H
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Z80_instr_CB_05: +Z80_RLC_REGn REG_L ; RLC L
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Z80_instr_CB_07: +Z80_RLC_REGn REG_A ; RLC A
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Z80_instr_CB_06: +Z80_RLC_VIA_HL ; RLC (HL)
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Z80_instr_xDCB_06: +Z80_RLC_VIA_IXY_d ; RLC (IXY+d)
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; FALLTROUGH
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Z80_common_RLC_VIA_IXY_d:
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sta [PTR_IXY_d],z
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; FALLTROUGH
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Z80_common_RLC_VIA:
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tax
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; FALLTROUGH
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Z80_common_RLC:
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lda z80_ftable_IN_OR_XOR, x
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sta REG_F
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+bcc ZVM_next
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+Z80_PUT_1_CF
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jmp ZVM_next
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Z80_illeg_xDCB_00: +Z80_RLC_VIA_IXY_d_REGn REG_B ; RLC (IXY+d),B
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Z80_illeg_xDCB_01: +Z80_RLC_VIA_IXY_d_REGn REG_C ; RLC (IXY+d),C
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Z80_illeg_xDCB_02: +Z80_RLC_VIA_IXY_d_REGn REG_D ; RLC (IXY+d),D
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Z80_illeg_xDCB_03: +Z80_RLC_VIA_IXY_d_REGn REG_E ; RLC (IXY+d),E
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Z80_illeg_xDCB_04: +Z80_RLC_VIA_IXY_d_REGn REG_H ; RLC (IXY+d),H
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Z80_illeg_xDCB_05: +Z80_RLC_VIA_IXY_d_REGn REG_L ; RLC (IXY+d),L
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Z80_illeg_xDCB_07: +Z80_RLC_VIA_IXY_d_REGn REG_A ; RLC (IXY+d),A
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