122 lines
2.8 KiB
ArmAsm
122 lines
2.8 KiB
ArmAsm
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//
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// Official Kernal routine, described in:
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//
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// - [RG64] C64 Programmer's Reference Guide - page 285
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// - [CM64] Compute's Mapping the Commodore 64 - page 238
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//
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// CPU registers that has to be preserved (see [RG64]): none
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//
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IOINIT:
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// Set $00/$01 port mode and value
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// We want BASIC and KERNAL ROMs mapped, and datasette motor off
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// (https://www.c64-wiki.com/wiki/Zeropage)
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// XXX - Work around VICE bug: Writing $00 before $01 results in rubbish in $01
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// after. https://sourceforge.net/p/vice-emu/bugs/1057/
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lda #$27
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ldx #$2F
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sta CPU_R6510
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stx CPU_D6510
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// Silence the SID chips, depending on the configuration
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#if !CONFIG_SID_D4XX
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lda SID_SIGVOL
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and #$F0
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sta SID_SIGVOL
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#endif // !CONFIG_SID_D4XX
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#if CONFIG_SID_D4XX || CONFIG_SID_D5XX
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ldy #$00
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!:
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#if CONFIG_SID_D4XX
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lda SID_SIGVOL, Y
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and #$F0
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sta SID_SIGVOL, Y
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#endif // CONFIG_SID_D4XX
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#if CONFIG_SID_D5XX
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// SIDs under $D5xx
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lda SID_SIGVOL + $100, Y
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and #$F0
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sta SID_SIGVOL + $100, Y
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#endif // CONFIG_SID_D4XX
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tya
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clc
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adc #$20
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tay
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bne !-
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#endif // CONFIG_SID_D4XX || CONFIG_SID_D5XX
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#if CONFIG_SID_2ND
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lda SID_SIGVOL - __SID_BASE + CONFIG_SID_2ND_ADDRESS
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and #$F0
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sta SID_SIGVOL - __SID_BASE + CONFIG_SID_2ND_ADDRESS
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#endif // CONFIG_SID_2ND
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#if CONFIG_SID_3RD
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lda SID_SIGVOL - __SID_BASE + CONFIG_SID_3RD_ADDRESS
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and #$F0
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sta SID_SIGVOL - __SID_BASE + CONFIG_SID_3RD_ADDRESS
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#endif // CONFIG_SID_3RD
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// Initialize CIAs
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// XXX: calibrate TOD for both CIA's, see here: https://codebase64.org/doku.php?id=base:efficient_tod_initialisation
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// Enable CIA1 IRQ and ~50Hz timer (https://csdb.dk/forums/?roomid=11&topicid=69037)
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// First disable IRQ generation for both CIA's
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lda #$7F
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sta CIA2_ICR
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sta CIA1_ICR
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// Set timer interval to ~1/60th of a second
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// (This value was calculated by running a custom IRQ handler on a C64
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// with original KERNAL, and writing the values of $DC04/5 to the screen
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// in the IRQ handler to see roughly what value the timers must be set to)
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// ldy #<16380
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// ldx #>16380
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// PAL C64 (https://codebase64.org/doku.php?id=base:cpu_clocking),
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// is clocked at 0.985248 MHz, so that 1/60s is 16421 CPU cycles
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ldy #<16421
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ldx #>16421
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sty CIA1_TIMALO
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stx CIA1_TIMAHI
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// Enable timer interrupt
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lda #$81
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sta CIA1_ICR
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// Enable timer A to run continuously (http://codebase64.org/doku.php?id=base:timerinterrupts)
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lda #$11
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sta CIA1_CRA
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lda CIA1_ICR
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// Setup the CIA1 for reading the keyboard - 'POKE 56322, 0' on original ROMs proves this
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// is done during initialization, not during the interrupt
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ldx #$FF
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stx CIA1_DDRA // output
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inx // $00
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stx CIA1_DDRB // input
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// Value checked on original ROM
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stx CIA2_DDRA
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// Set DDR on CIA2 for IEC bus, VIC-II banking
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lda #$3F
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sta CIA2_DDRA
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// Set IEC bus to its initial idle state
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jmp iec_set_idle
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