188 lines
6.2 KiB
ArmAsm
188 lines
6.2 KiB
ArmAsm
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;
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; Z80 CPU state/emulation data
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;
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!addr z80_cpustate__start = $02
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!addr REG_AF = $02 ; 2 bytes - combined register
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!addr REG_F = REG_AF+0 ; - flag register
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!addr REG_A = REG_AF+1 ; - accumulator
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!addr REG_BC = $04 ; 2 bytes - combined register
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!addr REG_C = REG_BC+0
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!addr REG_B = REG_BC+1
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!addr REG_BC_EXT = $06 ; 2 bytes - helper for faster access via BC in bank 1
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!addr REG_DE = $08 ; 2 bytes - combined register
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!addr REG_E = REG_DE+0
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!addr REG_D = REG_DE+1
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!addr REG_DE_EXT = $0A ; 2 bytes - helper for faster access via DE in bank 1
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!addr REG_HL = $0C ; 2 bytes - combined register
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!addr REG_L = REG_HL+0
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!addr REG_H = REG_HL+1
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!addr REG_HL_EXT = $0E ; 2 bytes - helper for faster access via HL in bank 1
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!addr REG_SHADOW = $10 ; 8 bytes - shadow registers
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!addr REG_F_SH = REG_SHADOW+0
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!addr REG_A_SH = REG_SHADOW+1
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!addr REG_C_SH = REG_SHADOW+2
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!addr REG_B_SH = REG_SHADOW+3
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!addr REG_E_SH = REG_SHADOW+4
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!addr REG_D_SH = REG_SHADOW+5
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!addr REG_L_SH = REG_SHADOW+6
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!addr REG_H_SH = REG_SHADOW+7
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!addr REG_SP = $18 ; 2 bytes - stack pointer
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!addr REG_SP_EXT = $1A ; 2 bytes - helper for faster access via SP in bank 1
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!addr REG_PC = $1C ; 2 bytes - sprogram counter
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!addr REG_PC_EXT = $1E ; 2 bytes - helper for faster access via PC in bank 1
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!addr REG_IX = $20 ; 2 bytes - index register
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!addr REG_IXL = REG_IX+0
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!addr REG_IXH = REG_IX+1
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!addr REG_IY = $22 ; 2 bytes - index register
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!addr REG_IYL = REG_IY+0
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!addr REG_IYH = REG_IY+1
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!addr REG_IFF1 = $24 ; 1 byte - interrupt flip-flop flag 1
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!addr REG_IFF2 = $25 ; 1 byte - interrupt flip-flop flag 2
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!addr REG_R06 = $26 ; 1 byte - refresh counter, bits 0-6 (bit 7 is garbage)
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!addr REG_R7 = $27 ; 1 byte - refresh counter, bit 7 (bits 0-6 are garbage)
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!addr REG_I = $28 ; 1 byte - interrupt vector base
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!addr BANK_ID = $29 ; 1 byte - currently selected memory bank
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!addr z80_cpustate__end = $29
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;
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; Z80 emulation temporary area
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;
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!addr PTR_IXY_d = $2A ; 4 bytes - calculated address IX+d / IY+d
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!addr PTR_DATA = $2E ; 4 bytes - calculated data source address
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!addr ADDR_IO = $32 ; 2 bytes - address for fetching/storing the IO
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!addr REG_TMP1 = $34 ; 1 byte - emulation-specific temporary storage
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!addr REG_TMP2 = $35 ; 1 byte - emulation-specific temporary storage
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; $36 ; for now free till $3F (inclusive)
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;
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; BIOS data
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;
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!addr VEC_MOVE_fetch = $40 ; 2 bytes - vector to byte fetch routine, for BIOS routine MOVE
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!addr VEC_MOVE_store = $42 ; 2 bytes - vector to byte store routine, for BIOS routine MOVE
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!addr VEC_DISKIO_store = $44 ; 2 bytes - vector to byte store routine, for BIOS disk I/O operations
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;
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; Constant/macros definitions
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;
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; Masks for Z80 flag (F) register
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!set Z80_SF = %10000000 ; sign
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!set Z80_ZF = %01000000 ; zero
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!set Z80_YF = %00100000 ; bit 5 result
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!set Z80_HF = %00010000 ; half carry
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!set Z80_XF = %00001000 ; bit 3 result
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!set Z80_PF = %00000100 ; parity
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!set Z80_VF = %00000100 ; overflow
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!set Z80_NF = %00000010 ; subtract
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!set Z80_CF = %00000001 ; carry
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; Macros to set/reset flags - to avoid mistakes
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!macro Z80_PUT_1_SF { smb7 REG_F }
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!macro Z80_PUT_0_SF { rmb7 REG_F }
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!macro Z80_PUT_1_ZF { smb6 REG_F }
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!macro Z80_PUT_0_ZF { rmb6 REG_F }
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!macro Z80_PUT_1_YF { smb5 REG_F }
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!macro Z80_PUT_0_YF { rmb5 REG_F }
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!macro Z80_PUT_1_HF { smb4 REG_F }
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!macro Z80_PUT_0_HF { rmb4 REG_F }
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!macro Z80_PUT_1_XF { smb3 REG_F }
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!macro Z80_PUT_0_XF { rmb3 REG_F }
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!macro Z80_PUT_1_PF { smb2 REG_F }
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!macro Z80_PUT_0_PF { rmb2 REG_F }
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!macro Z80_PUT_1_VF { smb2 REG_F }
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!macro Z80_PUT_0_VF { rmb2 REG_F }
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!macro Z80_PUT_1_NF { smb1 REG_F }
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!macro Z80_PUT_0_NF { rmb1 REG_F }
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!macro Z80_PUT_1_CF { smb0 REG_F }
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!macro Z80_PUT_0_CF { rmb0 REG_F }
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;
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; Macros to abstract memory access
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;
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!macro Z80_FETCH_VIA_PC_INC { ; fetch to .A from (PC), increment PC afterwards
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lda [REG_PC], z
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inw REG_PC
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}
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!macro Z80_FETCH_STACK { ; fetch to .A - stack POP operation
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lda [REG_SP], z
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inw REG_SP
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}
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!macro Z80_STORE_STACK { ; store .A - stack PUSH operation
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dew REG_SP
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sta [REG_SP], z
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}
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!macro Z80_FETCH_VIA_BC { ; fetch to .A from (BC)
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lda [REG_BC], z
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}
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!macro Z80_STORE_VIA_BC { ; store .A to (BC)
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sta [REG_BC], z
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}
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!macro Z80_FETCH_VIA_DE { ; fetch to .A from (DE)
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lda [REG_DE], z
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}
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!macro Z80_STORE_VIA_DE { ; store .A to (DE)
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sta [REG_DE], z
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}
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!macro Z80_FETCH_VIA_HL { ; fetch to .A from (HL)
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lda [REG_HL], z
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}
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!macro Z80_STORE_VIA_HL { ; store .A to (HL)
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sta [REG_HL], z
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}
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!macro Z80_STORE_BACK_VIA_HL { ; store .A to (HL) when instruction already used Z80_FETCH_VIA_HL
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sta [REG_HL], z
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}
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; XXX turn vectors below into macros
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!addr VEC_fetch_via_IX_d = $52
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!addr VEC_fetch_via_IY_d = $54
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!addr VEC_store_via_IX_d = $56
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!addr VEC_store_via_IY_d = $58
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!addr VEC_fetch_via_nn = $5A
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!addr VEC_store_via_nn = $5C
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!addr VEC_fetch_via_plus1 = $5E
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!addr VEC_store_via_plus1 = $60 ; XXX jump to next directly?
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!addr VEC_xchng_stack_lo = $62
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!addr VEC_xchng_stack_hi = $64
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