99 lines
2.1 KiB
ArmAsm
99 lines
2.1 KiB
ArmAsm
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;
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; Z80 instruction implementation - RLC
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;
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!macro Z80_RRC_REGn .REGn {
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clc
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bbr0 .REGn, @1
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sec
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@1:
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ror .REGn
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ldx .REGn
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bra Z80_common_RRC
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}
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!macro Z80_RRC_VIA_HL {
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+Z80_FETCH_VIA_HL
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tax
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ror
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txa
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ror
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+Z80_STORE_BACK_VIA_HL
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bra Z80_common_RRC_VIA
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}
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!macro Z80_RRC_VIA_IXY_d {
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lda [PTR_IXY_d] ,z
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tax
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ror
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txa
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ror
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; FALLTROUGH
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}
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!macro Z80_RRC_VIA_IXY_d_REGn .REGn {
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lda [PTR_IXY_d] ,z
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tax
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ror
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txa
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ror
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sta .REGn
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bra Z80_common_RRC_VIA_IXY_d
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}
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Z80_instr_CB_08: +Z80_RRC_REGn REG_B ; RRC B
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Z80_instr_CB_09: +Z80_RRC_REGn REG_C ; RRC C
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Z80_instr_CB_0A: +Z80_RRC_REGn REG_D ; RRC D
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Z80_instr_CB_0B: +Z80_RRC_REGn REG_E ; RRC E
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Z80_instr_CB_0C: +Z80_RRC_REGn REG_H ; RRC H
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Z80_instr_CB_0D: +Z80_RRC_REGn REG_L ; RRC L
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Z80_instr_CB_0F: +Z80_RRC_REGn REG_A ; RRC A
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Z80_instr_CB_0E: +Z80_RRC_VIA_HL ; RRC (HL)
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Z80_instr_xDCB_0E: +Z80_RRC_VIA_IXY_d ; RRC (IXY+d)
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; FALLTROUGH
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Z80_common_RRC_VIA_IXY_d:
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sta [PTR_IXY_d],z
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; FALLTROUGH
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Z80_common_RRC_VIA:
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tax
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; FALLTROUGH
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Z80_common_RRC:
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lda z80_ftable_IN_OR_XOR, x
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sta REG_F
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+bcc ZVM_next
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+Z80_PUT_1_CF
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jmp ZVM_next
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Z80_illeg_xDCB_08: +Z80_RRC_VIA_IXY_d_REGn REG_B ; RRC (IXY+d),B
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Z80_illeg_xDCB_09: +Z80_RRC_VIA_IXY_d_REGn REG_C ; RRC (IXY+d),C
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Z80_illeg_xDCB_0A: +Z80_RRC_VIA_IXY_d_REGn REG_D ; RRC (IXY+d),D
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Z80_illeg_xDCB_0B: +Z80_RRC_VIA_IXY_d_REGn REG_E ; RRC (IXY+d),E
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Z80_illeg_xDCB_0C: +Z80_RRC_VIA_IXY_d_REGn REG_H ; RRC (IXY+d),H
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Z80_illeg_xDCB_0D: +Z80_RRC_VIA_IXY_d_REGn REG_L ; RRC (IXY+d),L
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Z80_illeg_xDCB_0F: +Z80_RRC_VIA_IXY_d_REGn REG_A ; RRC (IXY+d),A
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