251 lines
3.9 KiB
ArmAsm
251 lines
3.9 KiB
ArmAsm
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//
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// Provide pseudocommands (and other goodies) to make CPU optimizations easier
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//
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#if CONFIG_CPU_WDC_65C02 || CONFIG_CPU_CSG_65CE02 || CONFIG_CPU_CSG_4510 || CONFIG_CPU_M65_45GS02 || CONFIG_CPU_WDC_65816
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.cpu _65c02
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#define HAS_OPCODES_65C02
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#define HAS_BCD_SAFE_INTERRUPTS
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#endif
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#if CONFIG_CPU_CSG_65CE02 || CONFIG_CPU_CSG_4510 || CONFIG_CPU_M65_45GS02
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#define HAS_OPCODES_65CE02
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#endif
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#if CONFIG_CPU_CSG_4510 || CONFIG_CPU_M65_45GS02
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#define HAS_OPCODES_4510
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#endif
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#if CONFIG_CPU_M65_45GS02
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#define HAS_OPCODES_45GS02
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#endif
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#if CONFIG_CPU_WDC_65816
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#define HAS_OPCODES_65816
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#endif
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//
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// These are not exactly for optimization - but to encourage proper usage of panic screen
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//
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.pseudocommand panic code
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{
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// If case no panic screen is used, we can skip providing error codes within Kernal
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#if CONFIG_PANIC_SCREEN || !SEGMENT_KERNAL
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lda code
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#endif
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jmp ($E4B7)
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}
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//
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// Trick to skip a 2-byte instruction
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//
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.pseudocommand skip_2_bytes_trash_nvz { .byte $2C }
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//
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// Memory mapping for C65 and Mega65
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//
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#if HAS_OPCODES_4510
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.pseudocommand map { .byte $5C }
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.pseudocommand eom { .byte $EA }
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#endif
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//
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// Some additional 65CE02 instructions
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//
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#if HAS_OPCODES_65CE02
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// .B register support
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.pseudocommand tab { .byte $5B }
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.pseudocommand tba { .byte $7B }
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// .Z register support
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.pseudocommand inz { .byte $1B }
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.pseudocommand dez { .byte $3B }
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.pseudocommand phz { .byte $DB }
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.pseudocommand plz { .byte $FB }
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.pseudocommand taz { .byte $4B }
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.pseudocommand tza { .byte $6B }
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// 16-bit data processing
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.pseudocommand dew addr
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{
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.var arg = addr.getValue()
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.if (arg > $FF) .error "DEW requires zeropage address"
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.byte $C3, arg
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}
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.pseudocommand inw addr
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{
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.var arg = addr.getValue()
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.if (arg > $FF) .error "INW requires zeropage address"
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.byte $E3, arg
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}
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#endif
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//
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// Stack manipulation - some CPUs will leave .A unchanged, some will use it as temporary storage, so consider .A trashed
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//
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.pseudocommand phx_trash_a
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{
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#if HAS_OPCODES_65C02
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phx
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#else
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txa
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pha
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#endif
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}
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.pseudocommand phy_trash_a
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{
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#if HAS_OPCODES_65C02
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phy
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#else
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tya
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pha
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#endif
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}
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.pseudocommand plx_trash_a
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{
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#if HAS_OPCODES_65C02
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plx
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#else
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pla
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tax
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#endif
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}
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.pseudocommand ply_trash_a
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{
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#if HAS_OPCODES_65C02
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ply
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#else
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pla
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tay
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#endif
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}
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//
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// Branches with far offsets, substitutes by Bxx + JMP for CPUs not supporting the instruction
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//
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.pseudocommand bcs_16 dst
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{
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#if HAS_OPCODES_65CE02
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.var offset = mod($10000 + dst.getValue() - *, $10000) -2
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.byte $B3, mod(offset, $100), floor(offset / $100)
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#else
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bcc __l
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jmp dst
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__l:
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#endif
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}
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.pseudocommand bcc_16 dst
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{
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#if HAS_OPCODES_65CE02
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.var offset = mod($10000 + dst.getValue() - *, $10000) -2
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.byte $93, mod(offset, $100), floor(offset / $100)
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#else
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bcs __l
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jmp dst
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__l:
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#endif
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}
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.pseudocommand beq_16 dst
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{
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#if HAS_OPCODES_65CE02
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.var offset = mod($10000 + dst.getValue() - *, $10000) -2
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.byte $F3, mod(offset, $100), floor(offset / $100)
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#else
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bne __l
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jmp dst
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__l:
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#endif
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}
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.pseudocommand bne_16 dst
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{
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#if HAS_OPCODES_65CE02
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.var offset = mod($10000 + dst.getValue() - *, $10000) -2
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.byte $D3, mod(offset, $100), floor(offset / $100)
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#else
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beq __l
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jmp dst
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__l:
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#endif
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}
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.pseudocommand bmi_16 dst
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{
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#if HAS_OPCODES_65CE02
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.var offset = mod($10000 + dst.getValue() - *, $10000) -2
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.byte $33, mod(offset, $100), floor(offset / $100)
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#else
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bpl __l
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jmp dst
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__l:
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#endif
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}
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.pseudocommand bpl_16 dst
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{
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#if HAS_OPCODES_65CE02
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.var offset = mod($10000 + dst.getValue() - *, $10000) -2
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.byte $13, mod(offset, $100), floor(offset / $100)
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#else
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bmi __l
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jmp dst
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__l:
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#endif
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}
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.pseudocommand bvc_16 dst
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{
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#if HAS_OPCODES_65CE02
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.var offset = mod($10000 + dst.getValue() - *, $10000) -2
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.byte $53, mod(offset, $100), floor(offset / $100)
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#else
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bvs __l
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jmp dst
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__l:
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#endif
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}
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.pseudocommand bvs_16 dst
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{
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#if HAS_OPCODES_65CE02
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.var offset = mod($10000 + dst.getValue() - *, $10000) -2
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.byte $73, mod(offset, $100), floor(offset / $100)
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#else
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bvc __l
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jmp dst
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__l:
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#endif
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}
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