27 lines
894 B
ArmAsm
27 lines
894 B
ArmAsm
// #LAYOUT# STD * #TAKE
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// #LAYOUT# * KERNAL_0 #TAKE
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// #LAYOUT# * * #IGNORE
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//
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// Values for IRQ generation timer - original idea was:
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//
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// (This value was calculated by running a custom IRQ handler on a C64
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// with original KERNAL, and writing the values of $DC04/5 to the screen
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// in the IRQ handler to see roughly what value the timers must be set to)
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// ldy #<16380
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// ldx #>16380
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// Current values selected on the following assumptions:
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//
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// PAL C64 (https://codebase64.org/doku.php?id=base:cpu_clocking),
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// is clocked at 0.985248 MHz, so that 1/60s is 16421 ($4025) CPU cycles
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//
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// NTSC C64 (https://codebase64.org/doku.php?id=base:cpu_clocking),
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// is clocked at 1.022727 MHz, so that 1/60s is 17045 ($4295) CPU cycles
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irq_timing_lo: // low bytes
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.byte <17045 // NTSC
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.byte <16421 // PAL
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