84 lines
2.1 KiB
ArmAsm
84 lines
2.1 KiB
ArmAsm
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;
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; Z80 instruction implementation - SLL
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;
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!macro Z80_SLL_REGn .REGn {
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sec
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rol .REGn
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ldx .REGn
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bra Z80_common_SLL
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}
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!macro Z80_SLL_VIA_HL {
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+Z80_FETCH_VIA_HL
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sec
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rol
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+Z80_STORE_BACK_VIA_HL
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bra Z80_common_SLL_VIA
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}
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!macro Z80_SLL_VIA_IXY_d {
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lda [PTR_IXY_d] ,z
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sec
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rol
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; FALLTROUGH
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}
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!macro Z80_SLL_VIA_IXY_d_REGn .REGn {
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lda [PTR_IXY_d] ,z
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sec
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rol
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sta .REGn
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bra Z80_common_SLL_VIA_IXY_d
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}
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Z80_illeg_CB_30: +Z80_SLL_REGn REG_B ; SLL B
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Z80_illeg_CB_31: +Z80_SLL_REGn REG_C ; SLL C
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Z80_illeg_CB_32: +Z80_SLL_REGn REG_D ; SLL D
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Z80_illeg_CB_33: +Z80_SLL_REGn REG_E ; SLL E
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Z80_illeg_CB_34: +Z80_SLL_REGn REG_H ; SLL H
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Z80_illeg_CB_35: +Z80_SLL_REGn REG_L ; SLL L
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Z80_illeg_CB_37: +Z80_SLL_REGn REG_A ; SLL A
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Z80_illeg_CB_36: +Z80_SLL_VIA_HL ; SLL (HL)
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Z80_illeg_xDCB_36: +Z80_SLL_VIA_IXY_d ; SLL (IXY+d)
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; FALLTROUGH
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Z80_common_SLL_VIA_IXY_d:
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sta [PTR_IXY_d],z
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; FALLTROUGH
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Z80_common_SLL_VIA:
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tax
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; FALLTROUGH
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Z80_common_SLL:
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lda z80_ftable_IN_OR_XOR, x
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sta REG_F
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+bcc ZVM_next
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+Z80_PUT_1_CF
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jmp ZVM_next
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Z80_illeg_xDCB_30: +Z80_SLL_VIA_IXY_d_REGn REG_B ; SLL (IXY+d),B
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Z80_illeg_xDCB_31: +Z80_SLL_VIA_IXY_d_REGn REG_C ; SLL (IXY+d),C
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Z80_illeg_xDCB_32: +Z80_SLL_VIA_IXY_d_REGn REG_D ; SLL (IXY+d),D
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Z80_illeg_xDCB_33: +Z80_SLL_VIA_IXY_d_REGn REG_E ; SLL (IXY+d),E
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Z80_illeg_xDCB_34: +Z80_SLL_VIA_IXY_d_REGn REG_H ; SLL (IXY+d),H
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Z80_illeg_xDCB_35: +Z80_SLL_VIA_IXY_d_REGn REG_L ; SLL (IXY+d),L
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Z80_illeg_xDCB_37: +Z80_SLL_VIA_IXY_d_REGn REG_A ; SLL (IXY+d),A
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