107 lines
2.1 KiB
ArmAsm
107 lines
2.1 KiB
ArmAsm
;; Receive a byte from the IEC bus.
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;; reference http://www.zimmers.net/anonftp/pub/cbm/programming/serial-bus.pdf
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;; page 11.
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iec_rx_byte:
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inc $062f
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;; First, we wait for the talker to release the CLK line.
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jsr iec_wait_for_clock_release
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inc $0630
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;; We then release the data line
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;; (We can use this routine, since we weren't holding CLK, anyway)
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jsr iec_release_clk_and_data
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inc $0631
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;; Wait for talker to assert CLK.
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;; If >200usec, then it is EOI and we have to assert the
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;; DATA line for 60 usec to tell the TALKER that we have
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;; acknowledged the EOI.
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ldx #20
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iec_rx_clk_wait:
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;; Loop takes 11 usec, so ~20 iterations for 200usec timeout
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lda $dd00
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bpl +
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dex
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bpl iec_rx_clk_wait
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inc $0632
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;; EOI timeout: So pulse DATA line for 60 usec
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jsr iec_assert_data
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jsr iec_wait60us
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jsr iec_release_clk_and_data
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;; Assert some kind of flag so that we know if it was EOI = the last byte on offer
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;; And still wait for CLK to be asserted
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;; XXX - This will cause periodic EOI pulses if the sender takes too long.
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;; That is probably ok.
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ldx #$7f
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jmp iec_rx_clk_wait
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*
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inc $0633
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;; CLK is now low. Latch input bits in on rising edge
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;; of CLK, eight times for eight bits.
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ldx #7
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lda #$00
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php
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iec_rx_bit_loop:
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inc $0634
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;; Wait for CLK to release
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jsr iec_wait_for_clock_release
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inc $0635
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;; DATA now has the next bit, but inverted.
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;; DATA is in bit6, which is a bit annoying.
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;; But we can clock it out with two ROL instructions
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;; so that it is in C. We can then ROL it into the
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;; partial data byte
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;; Move data bit into C flag
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LDA $DD00
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ROL
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ROL
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;; Pull it into the data byte
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pla
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ROL
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eor #$01 ; Invert the data bit
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pha
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;; Wait for CLK to re-assert
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jsr iec_wait_for_clock_assert
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inc $0636
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;; More bits?
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dex
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bpl iec_rx_bit_loop
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inc $0637
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;; Then we must within 1000usec acknowledge the frame by
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;; asserting DATA. At this point, CLK is asserted by the
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;; talker and DATA by us, i.e., we are ready to receive
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;; the next byte. (p11).
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jsr iec_assert_data
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;; Retreive the received byte
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PLA
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;; Return no-error
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CLC
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RTS
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