51 lines
1.7 KiB
ArmAsm
51 lines
1.7 KiB
ArmAsm
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!addr REG_A = $02 ; 8-bit accumulator
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!addr REG_F = $03 ; 8-bit flag register
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!addr REG_B = $04 ; general purpose 8-bit registers
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!addr REG_C = $05
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!addr REG_D = $06
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!addr REG_E = $07
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!addr REG_H = $08
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!addr REG_L = $09
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!addr REG_A_SH = $0A ; shadow registers
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!addr REG_F_SH = $0B
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!addr REG_C_SH = $0C
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!addr REG_B_SH = $0D
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!addr REG_E_SH = $0E
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!addr REG_D_SH = $0F
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!addr REG_L_SH = $10
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!addr REG_H_SH = $11
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!addr REG_IX = $12 ; 16-bit index register
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!addr REG_IY = $14 ; 16-bit index register
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!addr REG_SP = $16 ; 16-bit stack pointer
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!addr REG_PC = $18 ; 16-bit program counter
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!addr REG_I = $1A ; 8-bit interrupt vector base
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!addr REG_R06 = $1B ; refresh counter, bits 0-6 (bit 7 is garbage)
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!addr REG_R7 = $1C ; refresh counter, bit 7 (bits 0-6 are 0's)
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!addr VEC_fetch_opcode = $60
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!addr VEC_fetch_value = $62
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!addr VEC_fetch_stack = $64
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!addr VEC_store_stack = $66
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!addr VEC_fetch_via_HL = $68
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!addr VEC_store_via_HL = $6A
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!addr VEC_fetch_via_IX_d = $6C
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!addr VEC_fetch_via_IY_d = $6E
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!addr VEC_store_via_IX_d = $70
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!addr VEC_store_via_IY_d = $72
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!addr VEC_fetch_via_nn = $74
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!addr VEC_store_via_nn = $76
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; Masks for Z80 flag (F) register
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!set Z80FLG_S = %10000000 ; sign
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!set Z80FLG_Z = %01000000 ; zero
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!set Z80FLG_H = %00010000 ; half carry
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!set Z80FLG_P = %00000100 ; parity
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!set Z80FLG_O = %00000100 ; overflow
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!set Z80FLG_A = %00000010 ; add/subtract
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!set Z80FLG_C = %00000001 ; carry
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