188 lines
4.5 KiB
ArmAsm
188 lines
4.5 KiB
ArmAsm
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;
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; Names of hardware registers - names from C64 Programmer's Reference Guide, sometimes slightly modified
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;
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!ifdef CONFIG_PLATFORM_COMMODORE_64 {
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; CPU memory registers
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!addr CPU_D6510 = $00
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!addr CPU_R6510 = $01
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; VIC-II registers
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!addr __VIC_BASE = $D000 ; base address of the chip
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!addr VIC_SP0X = $D000
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!addr VIC_SP0Y = $D001
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!addr VIC_SP1X = $D002
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!addr VIC_SP1Y = $D003
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!addr VIC_SP2X = $D004
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!addr VIC_SP2Y = $D005
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!addr VIC_SP3X = $D006
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!addr VIC_SP3Y = $D007
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!addr VIC_SP4X = $D008
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!addr VIC_SP4Y = $D009
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!addr VIC_SP5X = $D00A
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!addr VIC_SP5Y = $D00B
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!addr VIC_SP6X = $D00C
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!addr VIC_SP6Y = $D00D
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!addr VIC_SP7X = $D00E
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!addr VIC_SP7Y = $D00F
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!addr VIC_MSIGX = $D010
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!addr VIC_SCROLY = $D011
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!addr VIC_RASTER = $D012
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!addr VIC_LPENX = $D013
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!addr VIC_LPENY = $D014
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!addr VIC_SPENA = $D015
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!addr VIC_SCROLX = $D016
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!addr VIC_YXPAND = $D017
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!addr VIC_YMCSB = $D018
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!addr VIC_IRQ = $D019
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!addr VIC_IRQMSK = $D01A
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!addr VIC_SPBGPR = $D01B
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!addr VIC_SPMC = $D01C
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!addr VIC_XXPAND = $D01D
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!addr VIC_SPSPCL = $D01E
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!addr VIC_SPBGCL = $D01F
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!addr VIC_EXTCOL = $D020
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!addr VIC_BGCOL0 = $D021
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!addr VIC_BGCOL1 = $D022
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!addr VIC_BGCOL2 = $D023
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!addr VIC_BGCOL3 = $D024
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!addr VIC_SPMC0 = $D025
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!addr VIC_SPMC1 = $D026
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!addr VIC_SP0COL = $D027
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!addr VIC_SP1COL = $D028
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!addr VIC_SP2COL = $D029
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!addr VIC_SP3COL = $D02A
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!addr VIC_SP4COL = $D02B
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!addr VIC_SP5COL = $D02C
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!addr VIC_SP6COL = $D02D
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!addr VIC_SP7COL = $D02E
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!ifndef CONFIG_MB_M65 { !ifndef CONFIG_MB_U64 {
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!addr VIC_XSCAN = $D02F ; C128 only
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!addr VIC_CLKRATE = $D030 ; C128 only
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} }
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!ifdef CONFIG_MB_U64 {
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; Ultimate 64 registers
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!addr U64_TURBOBIT = $D030 ; 0 = 1 MHz + badlines, 1 = settings from menu
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!addr U64_TURBOCTL = $D031 ; bit 0-3 = CPU speed (index), bit 7 = disable badlines, $FF = not available
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}
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; SID registers
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!addr __SID_BASE = $D400 ; base address of the chip
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!addr SID_FRELO1 = $D400
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!addr SID_FREHI1 = $D401
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!addr SID_PWLO1 = $D402
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!addr SID_PWHI1 = $D403
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!addr SID_VCREG1 = $D404
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!addr SID_ATDCY1 = $D405
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!addr SID_SUREL1 = $D406
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!addr SID_FRELO2 = $D407
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!addr SID_FREHI2 = $D408
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!addr SID_PWLO2 = $D409
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!addr SID_PWHI2 = $D40A
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!addr SID_VCREG2 = $D40B
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!addr SID_ATDCY2 = $D40C
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!addr SID_SUREL2 = $D40D
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!addr SID_FRELO3 = $D40E
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!addr SID_FREHI3 = $D40F
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!addr SID_PWLO3 = $D410
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!addr SID_PWHI3 = $D411
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!addr SID_VCREG3 = $D412
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!addr SID_ATDCY3 = $D413
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!addr SID_SUREL3 = $D414
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!addr SID_CUTLO = $D415
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!addr SID_CUTHI = $D416
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!addr SID_RESON = $D417
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!addr SID_SIGVOL = $D418
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!addr SID_POTX = $D419
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!addr SID_POTY = $D41A
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!addr SID_RANDOM = $D41B
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!addr SID_ENV3 = $D41C
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; Color COLOR_RAM
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!addr COLOR_RAM = $D800
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; CIA #1 registers
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!addr __CIA1_BASE = $DC00 ; base address of the chip
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!addr CIA1_PRA = $DC00
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!addr CIA1_PRB = $DC01
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!addr CIA1_DDRA = $DC02
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!addr CIA1_DDRB = $DC03
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!addr CIA1_TIMALO = $DC04
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!addr CIA1_TIMAHI = $DC05
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!addr CIA1_TIMBLO = $DC06
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!addr CIA1_TIMBHI = $DC07
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!addr CIA1_TODTEN = $DC08
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!addr CIA1_TODSEC = $DC09
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!addr CIA1_TODMIN = $DC0A
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!addr CIA1_TODHRS = $DC0B
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!addr CIA1_SDR = $DC0C
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!addr CIA1_ICR = $DC0D
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!addr CIA1_CRA = $DC0E
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!addr CIA1_CRB = $DC0F
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; CIA #2 registers
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!addr __CIA2_BASE = $DD00 ; base address of the chip
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!addr CIA2_PRA = $DD00 ; VIC bank switching and IEC port
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!addr CIA2_PRB = $DD01
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!addr CIA2_DDRA = $DD02
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!addr CIA2_DDRB = $DD03
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!addr CIA2_TIMALO = $DD04
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!addr CIA2_TIMAHI = $DD05
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!addr CIA2_TIMBLO = $DD06
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!addr CIA2_TIMBHI = $DD07
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!addr CIA2_TODTEN = $DD08
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!addr CIA2_TODSEC = $DD09
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!addr CIA2_TODMIN = $DD0A
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!addr CIA2_TODHRS = $DD0B
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!addr CIA2_SDR = $DD0C
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!addr CIA2_ICR = $DD0D
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!addr CIA2_CRA = $DD0E
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!addr CIA2_CRB = $DD0F
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; CIA #2 helper bits - IEC bus
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!set BIT_CIA2_PRA_ATN_OUT = $08 ; 1 - low (pulled), 0 - high (released)
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!set BIT_CIA2_PRA_CLK_OUT = $10 ; 1 - low (pulled), 0 - high (released)
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!set BIT_CIA2_PRA_DAT_OUT = $20 ; 1 - low (pulled), 0 - high (released)
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!set BIT_CIA2_PRA_CLK_IN = $40 ; 0 - low (pulled), 1 - high (released)
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!set BIT_CIA2_PRA_DAT_IN = $80 ; 0 - low (pulled), 1 - high (released)
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; SuperCPU registers
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!ifndef CONFIG_MB_M65 {
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!addr SCPU_SPEED_NORMAL = $D07A
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!addr SCPU_SPEED_TURBO = $D07B
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}
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}
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