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changed CPU speed handling for MEGA65

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This commit is contained in:
FeralChild64 committed 2020-10-11 20:56:30 +02:00
1 parent 121f49b763
commit 47b9676ca9
12 files changed
+142 -22
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src/kernal/board_m65/mega65_iec_slow_fast.s
+45
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@@ -0,0 +1,45 @@
;; #LAYOUT# M65 KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
;
; Checks if system is in MEGA65 native mode; if so, switches CPU speed to fast/slow - for IEC routines;
; Alters only status bits, all remaining registers preserved
;
!ifdef CONFIG_IEC {
m65_iec_slow:
jsr M65_MODEGET
bcs m65_iec_fast_slow_done
; Switch CPU speed
pha
lda VIC_CTRLB
and #%10111111
bra m65_iec_fast_slow_common
m65_iec_fast:
jsr M65_MODEGET
bcs m65_iec_fast_slow_done
pha
lda VIC_CTRLB
ora #%01000000
; FALLTROUGH
m65_iec_fast_slow_common:
sta VIC_CTRLB
pla
; FALLTROUGH
m65_iec_fast_slow_done:
rts
}
src/kernal/board_m65/mega65_viciv_init.s
+3 -3
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@@ -17,10 +17,10 @@ viciv_init:
lda #$00
sta MISC_EMU
; Set misc VIC-IV flags
; Set VIC-IV CTRL registers
lda #%01000000 ; enable C65 character set
sta VIC_CTRLA
lda #%01000000 ; enable C65 character set
jsr mega65_viciv_setctrl_AC ; also initialize remaining CTRLA / CTRLC bits; CTRLB will be set by screen editor
; Disable hot registers
src/kernal/board_m65/mega65_viciv_setctrl_AC.s
+18
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@@ -0,0 +1,18 @@
;; #LAYOUT# M65 KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
;
; Helper routine for setting VIC-IV control registers A and C
;
mega65_viciv_setctrl_AC:
sta VIC_CTRLA
lda VIC_CTRLC
and #%01101000
ora #%01000000 ; make C65/C128 fast modes switch to max MEGA65 CPU speed
sta VIC_CTRLC
rts
src/kernal/board_m65/mega65_viciv_shutdown.s
+2 -6
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@@ -20,12 +20,8 @@ viciv_shutdown:
; Set misc VIC-IV flags
lda #%00000000
sta VIC_CTRLA ; enable C64 character set
sta VIC_CTRLB ; disable extended resolution and attributes
lda VIC_CTRLC
and #%00101000 ; disable fast mode and various VIC-IV extensions
sta VIC_CTRLC
sta VIC_CTRLB ; disable extended resolution and attributes, disable 3.5 MHz mode
jsr mega65_viciv_setctrl_AC ; enable C64 character set, initialize remaining CTRLA / CTRLC bits
; Reenable hot registers
src/kernal/errors.s
+4
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@@ -90,5 +90,9 @@ kernalerror_TOP_MEM_RS232:
lda #K_ERR_TOP_MEM_RS232
!ifdef CONFIG_MB_M65 {
; If in native mode, switch back to fast mode
jsr m65_iec_fast
}
sec
rts
src/kernal/extapi_m65/mega65_modeset.s
+3 -3
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@@ -25,7 +25,7 @@ m65_mode64:
jsr viciv_shutdown
jsr vicii_init
; Switch CPU speed back to normal
; Switch CPU speed to normal
lda #$40
sta CPU_D6510
@@ -42,9 +42,9 @@ m65_mode65:
sei
; Switch CPU speed to fast
; Switch CPU speed to normal; VIC-IV register will be used to set the maximum one
lda #$41
lda #$40
sta CPU_D6510
; Set the magic string to mark native mode
src/kernal/iec/iec_return.s
+10
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@@ -20,9 +20,16 @@ iec_return_success:
; BSOUR is certainly not valid anymore
lda #$00
sta C3PO
; Restore registers
+ply_trash_a
+plx_trash_a
!ifdef CONFIG_MB_M65 {
; If in native mode, switch back to fast mode
jsr m65_iec_fast
}
; Report success
clc
rts
@@ -31,12 +38,15 @@ iec_return_DEVICE_NOT_FOUND:
; Set IEC line to normal idle state
jsr iec_set_idle
; BSOUR is certainly not valid anymore
lda #$00
sta C3PO
; Restore registers
+ply_trash_a
+plx_trash_a
; Report error
jmp kernalerror_DEVICE_NOT_FOUND
}
src/kernal/iec/iec_rx_byte.s
+17 -2
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@@ -16,6 +16,11 @@
iec_rx_dispatch:
!ifdef CONFIG_MB_M65 {
; If in native mode, switch to 1 MHz
jsr m65_iec_slow
}
lda IECPROTO
cmp #IEC_JIFFY
+beq jiffydos_rx_byte
@@ -27,6 +32,11 @@ iec_rx_dispatch:
iec_rx_byte:
!ifdef CONFIG_MB_M65 { !ifndef CONFIG_IEC_JIFFYDOS {
; If in native mode, switch to 1 MHz
jsr m65_iec_slow
} }
; Store .X and .Y on the stack - preserve them
+phx_trash_a
+phy_trash_a
@@ -60,7 +70,7 @@ iec_rx_byte:
; For DolphinDOS just fetch the byte from parallel port
lda CIA2_PRB
pha
jmp iec_rx_acknowledge
+bra iec_rx_acknowledge
iec_rx_no_dolphindos:
@@ -124,7 +134,7 @@ iec_rx_clk_wait2:
jsr kernalstatus_EOI
pla
jmp iec_rx_end
+bra iec_rx_end
@2:
; More bits?
dex
@@ -150,6 +160,11 @@ iec_rx_acknowledge:
iec_rx_end:
!ifdef CONFIG_MB_M65 {
; If in native mode, switch back to fast mode
jsr m65_iec_fast
}
+ply_trash_a
+plx_trash_a
lda TBTCNT
src/kernal/iec/iec_tx_byte.s
+13 -2
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@@ -18,6 +18,12 @@
iec_tx_dispatch:
php ; preserve C flag for EOI indication
!ifdef CONFIG_MB_M65 {
; If in native mode, switch to 1 MHz
jsr m65_iec_slow
}
lda IECPROTO
cmp #IEC_JIFFY
bne @1
@@ -34,6 +40,11 @@ iec_tx_dispatch:
iec_tx_byte:
!ifdef CONFIG_MB_M65 { !ifndef CONFIG_IEC_JIFFYDOS {
; If in native mode, switch to 1 MHz
jsr m65_iec_slow
} }
; Store .X and .Y on the stack - preserve them
+phx_trash_a
+phy_trash_a
@@ -84,7 +95,7 @@ iec_tx_common:
jsr iec_pull_clk_release_data_oneshot
; Finish the flow
jmp iec_tx_common_finalize
+bra iec_tx_common_finalize
iec_tx_no_dolphindos:
@@ -122,7 +133,7 @@ iec_tx_common_sendbit:
; Bit is 0
jsr iec_release_clk_pull_data
jmp iec_tx_common_bit_is_sent
+bra iec_tx_common_bit_is_sent
@4:
; Bit is 1
jsr iec_release_clk_data
src/kernal/iec_fast/dolphindos_load.s
+11 -2
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@@ -27,6 +27,11 @@ dolphindos_load:
ora #BIT_CIA2_PRA_DAT_OUT
sta TBTCNT ; pull DATA
}
!ifdef CONFIG_MB_M65 {
; If in native mode, switch to 1 MHz
jsr m65_iec_slow
}
; FALLTROUGH
dolphindos_load_loop:
@@ -80,7 +85,7 @@ dolphindos_load_loop:
sta IECPROTO
; End of load loop
jmp load_iec_loop_end
+bra load_iec_loop_end
dolphindos_load_no_eoi:
@@ -103,12 +108,16 @@ dolphindos_load_no_eoi:
iny
bne dolphindos_load_loop
inc EAL+1
jmp dolphindos_load_loop
+bra dolphindos_load_loop
!ifndef CONFIG_IEC_DOLPHINDOS_FAST {
dolphindos_load_end:
!ifdef CONFIG_MB_M65 {
; If in native mode, switch back to fast mode
jsr m65_iec_fast
}
; Update EAL
clc
jsr iec_update_EAL_by_Y
src/kernal/iec_fast/jiffydos_load.s
+13 -1
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@@ -80,6 +80,10 @@ jiffydos_load:
; A trick to shorten EAL update time
ldy #$FF
!ifdef CONFIG_MB_M65 {
; If in native mode, switch to 1 MHz
jsr m65_iec_fast
}
; FALLTROUGH
jiffydos_load_loop_esc:
@@ -180,6 +184,10 @@ jiffydos_load_end:
; A trick to shorten EAL update time
ldy #$FF
!ifdef CONFIG_MB_M65 {
; If in native mode, switch to 1 MHz
jsr m65_iec_slow
}
; FALLTROUGH
jiffydos_load_loop:
@@ -257,10 +265,14 @@ jiffydos_load_loop:
cpy #$FF
bne jiffydos_load_loop
inc EAL+1
jmp jiffydos_load_loop
+bra jiffydos_load_loop
jiffydos_load_end:
!ifdef CONFIG_MB_M65 {
; If in native mode, switch back to fast mode
jsr m65_iec_fast
}
; Save last byte
tax
src/kernal/screen_m65/mega65_screen_tables_misc.s
+3 -3
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@@ -4,9 +4,9 @@
m65_scrtab_vic_ctrlb: ; parameters for VIC control register B
!byte %00100000 ; 40x25 + extended attributes
!byte %10100000 ; 80x25 + extended attributes
!byte %10101000 ; 80x50 + extended attributes
!byte %01100000 ; 40x25 + extended attributes + VFAST
!byte %11100000 ; 80x25 + extended attributes + VFAST
!byte %11101000 ; 80x50 + extended attributes + VFAST
m65_scrtab_colviewmax_lo: ; maximum allowed color viewport start - low byte