code size optimization
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b21ba971f9
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4 files changed
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@@ -40,6 +40,9 @@
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;; #ALIAS# viciv_hotregs_on = KERNAL_0.viciv_hotregs_on
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;; #ALIAS# viciv_hotregs_off = KERNAL_0.viciv_hotregs_off
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;; #ALIAS# m65_speed_tape_cbdos = KERNAL_0.m65_speed_tape_cbdos
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;; #ALIAS# m65_speed_restore = KERNAL_0.m65_speed_restore
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;; #ALIAS# m65_clr_magictstr = KERNAL_0.m65_clr_magictstr
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;; #ALIAS# m65_scrtab_txtwidth = KERNAL_0.m65_scrtab_txtwidth
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;; #ALIAS# m65_scrtab_txtheight = KERNAL_0.m65_scrtab_txtheight
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@@ -1,31 +0,0 @@
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;; #LAYOUT# M65 KERNAL_1 #TAKE
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;; #LAYOUT# * * #IGNORE
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;
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; Tape helper routine
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;
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; - unlocks VIC-IV
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; - switches CPU to fast processing mode and disables badlines
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; - stores previous VIC_CTRLB in NXTBIN
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;
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!ifdef HAS_TAPE {
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tape_fast_cpu:
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jsr M65_MODEGET
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bcc @1
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jsr viciv_unhide
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@1:
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lda VIC_CTRLB
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ora #%01000000
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sta VIC_CTRLB
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sta NXTBIT
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lda #$00
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sta MISC_EMU
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rts
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}
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@@ -22,20 +22,9 @@ tape_screen_on_motor_off:
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!ifdef CONFIG_MB_M65 {
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jsr M65_MODEGET
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bcc @1
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; Restore standard CPU speed settings
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; For compatibility mode, restore normal speed settings and hide VIC-IV
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lda #$03
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sta MISC_EMU
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lda NXTBIT
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sta VIC_CTRLB
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sta VIC_KEY
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@1:
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rts
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jmp m65_speed_restore
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} else ifdef CONFIG_MB_U64 {
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@@ -64,12 +53,12 @@ tape_screen_off_motor_on:
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!ifdef CONFIG_MB_M65 {
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; On MEGA65 we need to switch banks everytim we retrieve byte to be stored in memory,
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; On MEGA65 we need to switch banks everytime we retrieve byte to be stored in memory,
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; additionally we perform advanced tape speed autocallibration - this is all too expensive
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; to be handled by 1 MHz CPU - so in case of compatibility mode, switch CPU to fast speed
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; (and disable badlines, so we will not have to blank the screen)
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jsr tape_fast_cpu
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jsr m65_speed_tape_cbdos
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} else ifdef CONFIG_MB_U64 {
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@@ -48,7 +48,7 @@ tape_head_align:
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; Switch CPU to fast mode
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!ifdef CONFIG_MB_M65 {
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jsr tape_fast_cpu
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jsr m65_speed_tape_cbdos
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}
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!ifdef CONFIG_MB_U64 {
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