code size optimization

This commit is contained in:
FeralChild64 committed 2021-02-24 21:11:41 +01:00
1 parent b21ba971f9
commit 50da880ffc
4 files changed
+8 -47

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+3
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@@ -40,6 +40,9 @@
;; #ALIAS# viciv_hotregs_on = KERNAL_0.viciv_hotregs_on
;; #ALIAS# viciv_hotregs_off = KERNAL_0.viciv_hotregs_off
;; #ALIAS# m65_speed_tape_cbdos = KERNAL_0.m65_speed_tape_cbdos
;; #ALIAS# m65_speed_restore = KERNAL_0.m65_speed_restore
;; #ALIAS# m65_clr_magictstr = KERNAL_0.m65_clr_magictstr
;; #ALIAS# m65_scrtab_txtwidth = KERNAL_0.m65_scrtab_txtwidth
;; #ALIAS# m65_scrtab_txtheight = KERNAL_0.m65_scrtab_txtheight
@@ -1,31 +0,0 @@
;; #LAYOUT# M65 KERNAL_1 #TAKE
;; #LAYOUT# * * #IGNORE
;
; Tape helper routine
;
; - unlocks VIC-IV
; - switches CPU to fast processing mode and disables badlines
; - stores previous VIC_CTRLB in NXTBIN
;
!ifdef HAS_TAPE {
tape_fast_cpu:
jsr M65_MODEGET
bcc @1
jsr viciv_unhide
@1:
lda VIC_CTRLB
ora #%01000000
sta VIC_CTRLB
sta NXTBIT
lda #$00
sta MISC_EMU
rts
}
+4 -15
View File
@@ -22,20 +22,9 @@ tape_screen_on_motor_off:
!ifdef CONFIG_MB_M65 {
jsr M65_MODEGET
bcc @1
; Restore standard CPU speed settings
; For compatibility mode, restore normal speed settings and hide VIC-IV
lda #$03
sta MISC_EMU
lda NXTBIT
sta VIC_CTRLB
sta VIC_KEY
@1:
rts
jmp m65_speed_restore
} else ifdef CONFIG_MB_U64 {
@@ -64,12 +53,12 @@ tape_screen_off_motor_on:
!ifdef CONFIG_MB_M65 {
; On MEGA65 we need to switch banks everytim we retrieve byte to be stored in memory,
; On MEGA65 we need to switch banks everytime we retrieve byte to be stored in memory,
; additionally we perform advanced tape speed autocallibration - this is all too expensive
; to be handled by 1 MHz CPU - so in case of compatibility mode, switch CPU to fast speed
; (and disable badlines, so we will not have to blank the screen)
jsr tape_fast_cpu
jsr m65_speed_tape_cbdos
} else ifdef CONFIG_MB_U64 {
+1 -1
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@@ -48,7 +48,7 @@ tape_head_align:
; Switch CPU to fast mode
!ifdef CONFIG_MB_M65 {
jsr tape_fast_cpu
jsr m65_speed_tape_cbdos
}
!ifdef CONFIG_MB_U64 {