code size optimization

src/kernal/board_m65/mega65_imports_1.s

@@ -40,6 +40,9 @@
 ;; #ALIAS# viciv_hotregs_on                = KERNAL_0.viciv_hotregs_on
 ;; #ALIAS# viciv_hotregs_off               = KERNAL_0.viciv_hotregs_off
 
+;; #ALIAS# m65_speed_tape_cbdos            = KERNAL_0.m65_speed_tape_cbdos
+;; #ALIAS# m65_speed_restore               = KERNAL_0.m65_speed_restore
+
 ;; #ALIAS# m65_clr_magictstr               = KERNAL_0.m65_clr_magictstr
 ;; #ALIAS# m65_scrtab_txtwidth             = KERNAL_0.m65_scrtab_txtwidth
 ;; #ALIAS# m65_scrtab_txtheight            = KERNAL_0.m65_scrtab_txtheight

src/kernal/board_m65/mega65_tape_fast_cpu.s

@@ -1,31 +0,0 @@
-;; #LAYOUT# M65 KERNAL_1 #TAKE
-;; #LAYOUT# *   *        #IGNORE
-
-;
-; Tape helper routine
-;
-; - unlocks VIC-IV
-; - switches CPU to fast processing mode and disables badlines
-; - stores previous VIC_CTRLB in NXTBIN
-;
-
-!ifdef HAS_TAPE {
-
-
-tape_fast_cpu:
-
-	jsr M65_MODEGET
-	bcc @1
-	
-	jsr viciv_unhide
-@1:
-	lda VIC_CTRLB
-	ora #%01000000
-	sta VIC_CTRLB
-	sta NXTBIT
-
-	lda #$00
-	sta MISC_EMU
-
-	rts
-}