added first CPU specific optimizations

This commit is contained in:
FeralChild64 committed 2019-09-24 17:24:32 +02:00
1 parent 5b2c28b281
commit 55e2512fe2
12 files changed
+198 -7

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+37
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@@ -13,6 +13,37 @@ Note however, that features do not came for free - enabling them needs some addi
Sane defaults are already present - different for each target.
## Processor instruction set
### `CONFIG_CPU_MOS_6502`
Choose if your CPU only supports the original MOS Technology 6502 instruction set, like:
* MOS 6510 - used in the Commodore 64
* MOS 8500 - used in the Commodore 64C
* MOS 8502 - used in the Commodore 128
If unsure - select this one.
### `CONFIG_CPU_WDC_65C02`
Choose if your CPU supports the Western Design Center 65C02 instruction set, like:
* WDC 65C02 - used in the Turbo Master accelerator
* CSG 65CE02
* CSG 4510 - used in the Commodore 65 prototypes
It enables some speed/size code optimizations. Warning - this is untested!
### `#define CONFIG_CPU_WDC_65816`
Choose if your CPU supports the 16-bit Western Design Center 65816 instruction set, like:
* WDC 65C816 - used in the Flash 8 accelerator
* WDC 65C816S - used in the SuperCPU accelerator
It enables some speed/size code optimizations. Warning - this is untested!
## Memory models
Different layouts of memory are possible - but they can be selected at compile time only.
@@ -56,3 +87,9 @@ Each of them needs a couple of bytes in KERNAL segment - but they can share some
If enabled, a simple DOS wedge is available from the direct mode - supports `@<drive_number>`, `@<command>`, `@$`, `@$<params>` and `@` commands.
Feature needs about 330 bytes in BASIC segment.
### `CONFIG_BCD_SAFE_INTERRUPTS`
On the most widespread CPUs the D flag is not cleared upon entering interrupts. Since the original Kernal does not clear it either, it's not safe to use BCD processor mode without disabling the interrupts first. This option makes sure the D flag is disabled at the start of the interrupt - this allows some optimizations in the code.
Feature needs 2 bytes in KERNAL segmment (for CPUs needing the patch), but at the same time allows optimizations allowing to gain some more bytes. If unsure - enable.
+5
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@@ -4,6 +4,10 @@
//
#define CONFIG_CPU_MOS_6502
// #define CONFIG_CPU_WDC_65C02
// #define CONFIG_CPU_WDC_65816
#define CONFIG_MEMORY_MODEL_38K
// #define CONFIG_MEMORY_MODEL_60K
@@ -17,3 +21,4 @@
// #define CONFIG_SID_D5XX
#define CONFIG_DOS_WEDGE
#define CONFIG_BCD_SAFE_INTERRUPTS
+5
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@@ -4,6 +4,10 @@
//
#define CONFIG_CPU_MOS_6502
// #define CONFIG_CPU_WDC_65C02
// #define CONFIG_CPU_WDC_65816
// #define CONFIG_MEMORY_MODEL_38K
#define CONFIG_MEMORY_MODEL_60K
@@ -17,3 +21,4 @@
// #define CONFIG_SID_D5XX
#define CONFIG_DOS_WEDGE
#define CONFIG_BCD_SAFE_INTERRUPTS
+5
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@@ -4,6 +4,10 @@
//
#define CONFIG_CPU_MOS_6502
// #define CONFIG_CPU_WDC_65C02
// #define CONFIG_CPU_WDC_65816
#define CONFIG_MEMORY_MODEL_38K
// #define CONFIG_MEMORY_MODEL_60K
@@ -17,3 +21,4 @@
#define CONFIG_SID_D5XX
#define CONFIG_DOS_WEDGE
#define CONFIG_BCD_SAFE_INTERRUPTS
+61
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@@ -0,0 +1,61 @@
// Various configuration dependent aliases/macros/checks
// Check that memory model configuration is correct
{
.var selected = 0;
#if CONFIG_MEMORY_MODEL_38K
.eval selected++
#endif
#if CONFIG_MEMORY_MODEL_60K
.eval selected++
#endif
.if (selected != 1) .error "Please select exactly one CONFIG_MEMORY_MODEL_* option"
}
// Check that processor configuration is correct
{
.var selected = 0;
#if CONFIG_CPU_MOS_6502
.eval selected++
#endif
#if CONFIG_CPU_WDC_65C02
.eval selected++
#endif
#if CONFIG_CPU_WDC_65816
.eval selected++
#endif
.if (selected != 1) .error "Please select exactly one CONFIG_CPU_* option"
}
// Handle processor configuration
#if CONFIG_CPU_WDC_65C02 || CONFIG_CPU_WDC_65816
#define HAS_BCD_SAFE_INTERRUPTS
#define HAS_BCD_SAFE_RESET
.pseudocommand phx { .byte $DA }
.pseudocommand phy { .byte $5A }
.pseudocommand plx { .byte $FA }
.pseudocommand ply { .byte $7A }
#endif
// Handle misc configuration entrues
#if CONFIG_BCD_SAFE_INTERRUPTS
#define HAS_BCD_SAFE_INTERRUPTS
#endif
+29 -1
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@@ -139,7 +139,13 @@ printf_retreat:
rts
printf_printhexbyte:
// Print the hex value in .A as two digits, idea by Haubitze
// Print the hex value in .A as two digits
#if HAS_BCD_SAFE_INTERRUPTS
// Idea by Haubitze
sed
pha
lsr
@@ -155,3 +161,25 @@ printf_printhexbyte:
adc #$30
cld
jmp JCHROUT
#else
pha
lsr
lsr
lsr
lsr
ora #$30
cmp #$3A
bcc !+
adc #6
!: jsr JCHROUT
pla
and #$0f
ora #$30
cmp #$3A
bcc !+
adc #6
!: jmp JCHROUT
#endif
@@ -11,10 +11,16 @@ return_from_interrupt:
// Restore registers and return
// Sequence according to Compute's Mapping the 64 p73
#if CONFIG_CPU_MOS_6502
pla
tay
pla
tax
#else
ply
plx
#endif
pla
rti
@@ -6,10 +6,15 @@ default_nmi_handler:
// Save registers, sequence according to Compute's Mapping the Commodore 64, page 73
pha
#if CONFIG_CPU_MOS_6502
txa
pha
tya
pha
#else
phx
phy
#endif
// XXX: RS-232 support is not implemented
+8 -1
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@@ -10,12 +10,19 @@ irq_handler:
// Save registers, sequence according to Compute's Mapping the Commodore 64, page 73
pha
#if CONFIG_CPU_MOS_6502
txa
pha
tya
pha
#else
phx
phy
#endif
cld // clear decimal flag, to prevent possible problems
#if CONFIG_CPU_MOS_6502 && CONFIG_BCD_SAFE_INTERRUPTS
cld // clear decimal flag to allow using it without disabling interrupts
#endif
// Check if caused by BRK
tsx
+4 -1
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@@ -2,7 +2,10 @@
nmi_handler:
sei // don't allow IRQ to interfere, see https://www.c64-wiki.com/wiki/Interrupt
cld // clear decimal flag, to prevent possible problems
#if CONFIG_CPU_MOS_6502 && CONFIG_BCD_SAFE_INTERRUPTS
cld // clear decimal flag to allow using it without disabling interrupts
#endif
// Call interrupt routine (only if initialised)
pha
+29 -1
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@@ -139,7 +139,13 @@ printf_retreat:
rts
printf_printhexbyte:
// Print the hex value in .A as two digits, idea by Haubitze
// Print the hex value in .A as two digits
#if HAS_BCD_SAFE_INTERRUPTS
// Idea by Haubitze
sed
pha
lsr
@@ -155,3 +161,25 @@ printf_printhexbyte:
adc #$30
cld
jmp JCHROUT
#else
pha
lsr
lsr
lsr
lsr
ora #$30
cmp #$3A
bcc !+
adc #6
!: jsr JCHROUT
pla
and #$0f
ora #$30
cmp #$3A
bcc !+
adc #6
!: jmp JCHROUT
#endif
+4 -3
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@@ -5,9 +5,10 @@
reset_entry:
// The GPL program at https://github.com/Klaus2m5/6502_65C02_functional_tests/blob/master/6502_functional_test.a65
// uses the following initial reset sequence
// affirmed by c64 PRG p269
cld
// uses the following initial reset sequence, affirmed by c64 PRG p269
#if !HAS_BCD_SAFE_RESET
cld // for CPUs having undefined D flag after reset
#endif
ldx #$FF
txs
sei