added first CPU specific optimizations
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@@ -13,6 +13,37 @@ Note however, that features do not came for free - enabling them needs some addi
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Sane defaults are already present - different for each target.
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## Processor instruction set
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### `CONFIG_CPU_MOS_6502`
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Choose if your CPU only supports the original MOS Technology 6502 instruction set, like:
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* MOS 6510 - used in the Commodore 64
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* MOS 8500 - used in the Commodore 64C
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* MOS 8502 - used in the Commodore 128
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If unsure - select this one.
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### `CONFIG_CPU_WDC_65C02`
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Choose if your CPU supports the Western Design Center 65C02 instruction set, like:
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* WDC 65C02 - used in the Turbo Master accelerator
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* CSG 65CE02
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* CSG 4510 - used in the Commodore 65 prototypes
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It enables some speed/size code optimizations. Warning - this is untested!
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### `#define CONFIG_CPU_WDC_65816`
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Choose if your CPU supports the 16-bit Western Design Center 65816 instruction set, like:
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* WDC 65C816 - used in the Flash 8 accelerator
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* WDC 65C816S - used in the SuperCPU accelerator
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It enables some speed/size code optimizations. Warning - this is untested!
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## Memory models
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Different layouts of memory are possible - but they can be selected at compile time only.
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@@ -56,3 +87,9 @@ Each of them needs a couple of bytes in KERNAL segment - but they can share some
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If enabled, a simple DOS wedge is available from the direct mode - supports `@<drive_number>`, `@<command>`, `@$`, `@$<params>` and `@` commands.
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Feature needs about 330 bytes in BASIC segment.
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### `CONFIG_BCD_SAFE_INTERRUPTS`
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On the most widespread CPUs the D flag is not cleared upon entering interrupts. Since the original Kernal does not clear it either, it's not safe to use BCD processor mode without disabling the interrupts first. This option makes sure the D flag is disabled at the start of the interrupt - this allows some optimizations in the code.
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Feature needs 2 bytes in KERNAL segmment (for CPUs needing the patch), but at the same time allows optimizations allowing to gain some more bytes. If unsure - enable.
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