fixed flow desynchronization after JiffyDOS detection

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FeralChild64 committed 2019-11-26 19:28:10 +01:00
1 parent 6f010b8c56
commit 937d152540
3 files changed
+5 -4

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+1 -1
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@@ -317,7 +317,7 @@
#if !CONFIG_IEC_JIFFYDOS
.eval features_str = ADD_FEATURE(features_str, "IEC")
#else
.eval features_str = ADD_FEATURE(features_str, "IEC+JIFFY DEF")
.eval features_str = ADD_FEATURE(features_str, "IEC+JIFFY DEV")
#endif
#endif
+1 -1
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@@ -78,7 +78,7 @@ __jd_check1:
and #%00110000 // clear everything but CLK/DATA
sta CIA2_PRA
// Signal EOI if needed XXX calculate cycles for quicklyy pulling CLK
// Signal EOI if needed XXX calculate cycles for quickly pulling CLK
lda C3PO
ldx IECPROTO
beq iec_tx_byte_jiffydos_wait_eoi
+3 -2
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@@ -78,9 +78,10 @@ iec_jiffydos_detect_loop:
bne iec_jiffydos_detect_loop // 3 cycles if branch
lda #$00 // normal protocol
skip_2_bytes_trash_nvz
beq iec_jiffydos_store_proto // branch always
iec_jiffydos_detected:
jsr iec_wait_for_data_release // guessed from VICE logs
lda #$01 // JiffyDOS protocol
iec_jiffydos_store_proto:
@@ -118,7 +119,7 @@ iec_tx_common_bit_is_sent:
cli
// Give device time to tell if they are busy by pulling DATA
// Give devices time to tell if they are busy by pulling DATA
// They should do it within 1ms
ldx #$FF
!: