IOINIT now silences SID chips, up to 4 supported

Makefile

@@ -23,6 +23,10 @@ TOOL_SIMILARITY    = build/tools/similarity
 
 TOOLS_LIST = $(TOOL_COLLECT_DATA) $(TOOL_COMPRESS_TEXT) $(TOOL_PNGPREPARE) $(TOOL_PREPROCESS) $(TOOL_SIMILARITY)
 
+# GIT commit
+
+GIT_COMMIT:= $(shell git log -1 --pretty='%h' | tr '[:lower:]' '[:upper:]')
+
 # Rules - main
 
 .PHONY: all clean updatebin

STATUS.md

@@ -6,6 +6,7 @@ Here are the features of the Open ROMs not found in the original ROMs from the 8
 * improved keyboard scanning, supports multi-key roll-over and rejection of spurious joystick input
 * joystick (port 1) can be used to move text cursor
 * uses RAM under ROM and I/O: 61436 bytes free
+* cold/warm start silences 4 SID chips - assumes addresses $D400, $D420, $D440, $D460
 * extended `LOAD` command
     * start/end addresses are displayed, in the Final cartridge style
     * command with just the file name tries to use the last device if it's number seems sane; otherwise uses 8
@@ -71,7 +72,7 @@ NOTE: Even the 'DONE' routines won't support features described as missing in on
 | Address   | Name     | Status   |  Remarks                                           |
 | --------- | :------- | :------: | :------------------------------------------------: |
 | `$FF81`   | `CINT`   | DONE     |                                                    |
-| `$FF84`   | `IOINIT` | PARTIAL  | at least SID volume handling is missing            |
+| `$FF84`   | `IOINIT` | DONE     |                                                    |
 | `$FF87`   | `RAMTAS` | DONE     |                                                    |
 | `$FF8A`   | `RESTOR` | DONE     |                                                    |
 | `$FF8D`   | `VECTOR` | DONE     |                                                    |

c64/aliases/,aliases_hardware.s

@@ -5,8 +5,8 @@
 
 	;; CPU memory registers
 
-	.alias CPU_D6510      $0000
-	.alias CPU_R6510      $0001
+	.alias CPU_D6510      $00
+	.alias CPU_R6510      $01
 
 	;; VIC-II registers
 
@@ -60,46 +60,40 @@
 	.alias VIC_SP6COL     $D02D
 	.alias VIC_SP7COL     $D02E
 	
-	;; SID #1 registers
+	;; SID registers
 
-	.alias SID1_FRELO1    $D400
-	.alias SID1_FREHI1    $D401
-	.alias SID1_PWLO1     $D402
-	.alias SID1_PWHI1     $D403
-	.alias SID1_VCREG1    $D404
-	.alias SID1_ATDCY1    $D405
-	.alias SID1_SUREL1    $D406
+	.alias SID_FRELO1    $D400
+	.alias SID_FREHI1    $D401
+	.alias SID_PWLO1     $D402
+	.alias SID_PWHI1     $D403
+	.alias SID_VCREG1    $D404
+	.alias SID_ATDCY1    $D405
+	.alias SID_SUREL1    $D406
 
-	.alias SID1_FRELO2    $D407
-	.alias SID1_FREHI2    $D408
-	.alias SID1_PWLO2     $D409
-	.alias SID1_PWHI2     $D40A
-	.alias SID1_VCREG2    $D40B
-	.alias SID1_ATDCY2    $D40C
-	.alias SID1_SUREL2    $D40D
+	.alias SID_FRELO2    $D407
+	.alias SID_FREHI2    $D408
+	.alias SID_PWLO2     $D409
+	.alias SID_PWHI2     $D40A
+	.alias SID_VCREG2    $D40B
+	.alias SID_ATDCY2    $D40C
+	.alias SID_SUREL2    $D40D
 
-	.alias SID1_FRELO3    $D40E
-	.alias SID1_FREHI3    $D40F
-	.alias SID1_PWLO3     $D410
-	.alias SID1_PWHI3     $D411
-	.alias SID1_VCREG3    $D412
-	.alias SID1_ATDCY3    $D413
-	.alias SID1_SUREL3    $D414
+	.alias SID_FRELO3    $D40E
+	.alias SID_FREHI3    $D40F
+	.alias SID_PWLO3     $D410
+	.alias SID_PWHI3     $D411
+	.alias SID_VCREG3    $D412
+	.alias SID_ATDCY3    $D413
+	.alias SID_SUREL3    $D414
 
-	.alias SID1_CUTLO     $D415
-	.alias SID1_CUTHI     $D416
-	.alias SID1_RESON     $D417
-	.alias SID1_SIGVOL    $D418
-	.alias SID1_POTX      $D419
-	.alias SID1_POTY      $D41A
-	.alias SID1_RANDOM    $D41B
-	.alias SID1_ENV3      $D41C
-
-	;; SID #2, #3, #4 registers
-
-	.alias SID2_SIGVOL    $D438
-	.alias SID3_SIGVOL    $D458
-	.alias SID4_SIGVOL    $D478
+	.alias SID_CUTLO     $D415
+	.alias SID_CUTHI     $D416
+	.alias SID_RESON     $D417
+	.alias SID_SIGVOL    $D418
+	.alias SID_POTX      $D419
+	.alias SID_POTY      $D41A
+	.alias SID_RANDOM    $D41B
+	.alias SID_ENV3      $D41C
 
 	;; CIA #1 registers
 

c64/kernal/fda3.ioinit.s

@@ -15,10 +15,24 @@ ioinit:
 	; (https://www.c64-wiki.com/wiki/Zeropage)
 	;; XXX - Work around VICE bug: Writing $00 before $01 results in rubbish in $01
 	;; after. https://sourceforge.net/p/vice-emu/bugs/1057/
-	LDA #$27
-	LDX #$2F
-	STA $01
-	STX $00
+	lda #$27
+	ldx #$2F
+	sta CPU_R6510
+	stx CPU_D6510
+
+	;; Silence the SID chips
+
+	ldy #$00
+*
+	lda SID_SIGVOL, Y
+	and #$F0
+	sta SID_SIGVOL, Y
+	tya
+	clc
+	adc #$20
+	tay
+	cpy #$80 ; $20 * amount of chips to silence, $80 to silence 4 chips
+	bne -
 
 	;; Enable CIA1 IRQ and ~50Hz timer
 	;; (https://csdb.dk/forums/?roomid=11&topicid=69037)