explained all similarities >3
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$01 + BIT + LDA #$02 + BIT + LDA #$03 + ... + LDA #$09
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Ledder of LDA's and BIT's - a common 6502 space-saving trick to set the CPU register value depending on the jump address and perform common action. Not creative - not copyrightable.
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$18 + CLC + RTS + LDA #$00 + STA (zeropage address does not match)
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End of a routine reporting a success (by clearing Carry) followed by start of another routine, starting from putting 0 into .A register - plus some parts. Trivial - not copyrightable.
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BTW, most of the time the routines are placed in the order determined by algorithm, using a specialized tool (without human intervention), and this order can undergo major changes after a small code modification - and this similarity is most likely caused by the currently determined ROM layout.
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$02 + STA $B9 + RTS
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Routine ending by setting a zeropage variable + plus some part. Trivial - not copyrightable.
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ORA #$80 + STA $6A
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Part of the code setting highest bit in a zeropage variable. Trivial - not copyrightable.
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CLC + RTS + LDA #$00
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End of a routine reporting a success (by clearing Carry) followed by start of another routine, starting from putting 0 into .A register. Trivial - not copyrightable.
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BTW, most of the time the routines are placed in the order determined by algorithm, using a specialized tool (without human intervention), and this order can undergo major changes after a small code modification - and this similarity is most likely caused by the currently determined ROM layout.
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JSR $AD9E (CHRGOT) + JSR (address does not match)
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Call of a well-known subroutine + some part of other instruction. Trivial - not copyrightable.
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$27 + STA $63 + LDA (zeropage address does not match)
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Instruction (accessing well-known zeropage location) + some parts. Trivial - not copyrightable.
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$28 + STA $64 + LDA (zeropage address does not match)
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Instruction (accessing well-known zeropage location) + some parts. Trivial - not copyrightable.
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$30 + BCC (offset matches) + CMP #$3C + BCC (offset does not match)
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Part of code checking whether the valu is within the given range. Not creative - not copyrightable.
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PHA + LDA $63 + PHA
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Part of the code storing several values on stack. Trivial - not copyrightable.
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RTS + LDA #$01 + BIT + LDA
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Routine starting by setting .A to 1 or some other value, depending on entry address (common 6502 trick to save memoryy using BIT instruction). Not creative - not copyrightable.
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RTS + LDA #$01 + BIT + LDA #$00
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Routine starting by setting .A to 0 or 1 depending on entry address (common 6502 trick to save memoryy using BIT instruction). Not creative - not copyrightable.
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RTS + CMP #$22 + BNE (offset does not match)
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Routine starting by comparing accumulator to a predefined value - trivial, not copyrightable.
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RTS + CMP #$22 + BNE (offset matches) + LDA $D4 + EOR (value does not match)
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Part of a routine handling quote flag (QTSW - $D4 on zeropage) depending on quote symbol ($22). Not creative (nothing complicated here and the similarity doesn't even cover the whole flow) - not copyrightable.
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$61 + LDA $65 + STA (zeropage addres does not match)
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Instruction (accessing well-known zeropage location) + some parts. Trivial - not copyrightable.
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$62 + ROR $63 + ROR $64 + ROR $65
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Right-rotate on a multibyte variable (typical 6502 code) - trivial, not copyrightable.
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$62 + ROR $63 + ROR $64 + ROR $65 + ROR $70
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Right-rotate on a multibyte variable (typical 6502 code) - trivial, not copyrightable.
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ADC $35 + STA $35
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Adding a value to a zeropage variable. Trivial - not copyrightable.
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ROR $62 + ROR $63 + ROR $64 + ROR $65
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Rotate-right operation done on a 32-bit value (floating point accumulator mantissa) - trivial, not copyrightable.
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ROR $62 + ROR $63 + ROR $64 + ROR $65 + ROR $70 + RTS + LDA (zeropage address does not match)
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Unrolled loop that performs a simple operation (shift by one bit) on a well-known variable - floating point accumulator mantissa. Plus some p[art of another instruction, from a different subroutine. Not creative and rather trivial - not copyrightable.
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ROR $63 + ROR $64 + ROR $65 + ROR $70
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Right-rotate on a multibyte variable (typical 6502 code) - trivial, not copyrightable.
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PLA + STA $6A + PLA + STA (address does not match)
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Part of sequence storing several values on the stack. Trivial - not copyrightable.
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PLA + STA $6B + PLA + STA (address does not match)
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Part of sequence storing several values on the stack. Trivial - not copyrightable.
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$69 + BNE (skip next instruction) + JMP (address does not match)
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Instruction plus some parts - trivial, not copyrightable.
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STA $35 + STY $36
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Store two CPU registers in a 16-bit zeropage variable (FRESPC). Trivial - not copyrightable.
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STA $65 + STA $64
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Part of the code zeroing a temporary storage on zeropage. Trivial - not copyrightable.
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STA ($F3),Y + DEY + BPL (offset matches)
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Small part of the loop moving screen content. Not creative - not copyrightable.
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LDY #$01 + LDA ($B2),Y + STA (zeropage address does not match)
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Small part of the code (only 2 instructions fully match) fetching multi-byte value via zeropage pointer - trivial, not copyrightable.
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LDY #$04 + LDA ($22),Y + STA (address does not match)
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Small part of the code (only 2 instructions fully match) fetching multi-byte value via zeropage pointer - trivial, not copyrightable.
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LDY #$04 + LDA ($22),Y + STA $65 + DEY + LDA ($22),Y + STA $64 + DEY + LDA ($22),Y + STA $63 + DEY + LDA ($22),Y
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Unrolled loop that performs a simple operation (fetch from memory) on a well-known variable - floating point accumulator. Not creative and rather trivial - not copyrightable.
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LDY #$04 + LDA ($22),Y + STA $6D + DEY + LDA ($22),Y + STA $6C + DEY + LDA ($22),Y + STA $6B + DEY + LDA ($22),Y
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Part of unrolled loop that performs a simple operation (shift by one bit) on a well-known variable - floating point accumulator mantissa. Not creative and rather trivial - not copyrightable.
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LDX #$19 + STX $16
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Store predefined value in a well-known zeropage location. Trivial - not copyrightable.
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LDA $01 + AND #$10 + BEQ (offset does not match)
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Decision based on a state of a bit in a documented hardware register. Trivial - not copyrightable.
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LDA $62 + PHA + LDA (zeropage address does not match)
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Store zeropage variable on stack + some part - trivial, not copyrightable.
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LDA $64 + STA $63
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Small part (2 instructions) of code manipulating a floating code mantissa. Trivial - not copyrightable.
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LDX $2D + LDY $2E
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2 instructions to fetch zeropage variable (VARTAB) for usage by Kernal documented API. Trivial - not copyrightable.
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LDX $3A + INX + BNE (offset does not match)
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Check whether a zeropage variable contains $FF. Trivial - not copyrightable.
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LDX $3A + INX + BEQ (offset does not match)
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Check whether a zeropage variable contains $FF. Trivial - not copyrightable.
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LDA #$EF + LDY #$E2
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2 instructions fetching known zeropage variables. Trivial - not copyrightable.
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$AE + JSR $AD9E (FRMEVL)
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Instruction (calls a well-known routine) + some part. Trivial - not copyrightable.
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$AE + JSR $AD9E (FRMEVL) + JSR (address does not match)
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Instruction (calls a well-known routine) + some parts. Trivial - not copyrightable.
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$B7 + BEQ (offset matches) + JSR (address does not match)
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Instruction + some parts - trivial, not copyrightable.
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CPY $B7 + BEQ (offset matches)
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Decision based on a fact whether CPU register is equal to zeropage variable. Trivial - not copyrightable.
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CPY $D3 + BNE (offset matches)
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Decision based on a fact whether CPU register is equal to zeropage variable. Trivial - not copyrightable.
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$CA + LDY #$00 + LDA (zeropage address does not match), Y
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Instruction + some parts. Trivial - not copyrightable.
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BNE (offset matches) + INY + TYA
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Check for zero in some variable (or CPU register - similarity does not cover this part) + simple register manipulation. Not creative (too small fragment, this can be a piece of various routines) - not copyrightable.
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$F9 + BEQ (offset matches) + JSR (address does not match)
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Instruction + some parts - trivial, not copyrightable.
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$FF followed by several 0's
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Meaningless sequence of bytes, most likely caused by ROM not being full to the last byte. Not copyrightable.
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