chris/open-roms
1
0 Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

started MEGA65 speed handling rework, always run IEC code with disabled badlines

Browse Source
This commit is contained in:
FeralChild64 committed 2021-02-24 18:44:18 +01:00
1 parent 22a5754539
commit cb16d5d15c
13 files changed
+136 -76
Download Patch File Download Diff File Expand all files Collapse all files

No files matched your search

src/,,config_mega65.s
-1
View File
@@ -30,7 +30,6 @@
;; #CONFIG# IEC_DOLPHINDOS NO
;; #CONFIG# IEC_DOLPHINDOS_FAST NO
;; #CONFIG# IEC_JIFFYDOS NO ; fastloaders do not work on MEGA65 yet!
;; #CONFIG# IEC_JIFFYDOS_BLANK NO
;; #CONFIG# IEC_BURST_M65 NO ; please keep disabled for now
src/aliases/,aliases_config.s
+1
View File
@@ -112,6 +112,7 @@
!ifdef CONFIG_MB_MEGA65 {
!ifdef CONFIG_IEC_BURST_CIA1 { !error "Do not use CONFIG_IEC_BURST_CIA1 options for MEGA65 motherboard, CONFIG_IEC_BURST_M65 instead" }
!ifdef CONFIG_IEC_BURST_CIA2 { !error "Do not use CONFIG_IEC_BURST_CIA2 options for MEGA65 motherboard, CONFIG_IEC_BURST_M65 instead" }
!ifdef IEC_JIFFYDOS_BLANK { !error "Do not use IEC_JIFFYDOS_BLANK option for MEGA65 motherboard, it is not needed" }
!ifndef CONFIG_DOS_WEDGE { !error "MEGA65 build requires CONFIG_DOS_WEDGE" }
}
!ifndef CONFIG_MB_MEGA65 {
src/kernal/board_m65/mega65_iec_slow_fast.s
-45
View File
@@ -1,45 +0,0 @@
;; #LAYOUT# M65 KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
;
; Checks if system is in MEGA65 native mode; if so, switches CPU speed to fast/slow - for IEC routines;
; Alters only status bits, all remaining registers preserved
;
!ifdef CONFIG_IEC {
m65_iec_slow:
jsr M65_MODEGET
bcs m65_iec_fast_slow_done
; Switch CPU speed
pha
lda VIC_CTRLB
and #%10111111
bra m65_iec_fast_slow_common
m65_iec_fast:
jsr M65_MODEGET
bcs m65_iec_fast_slow_done
pha
lda VIC_CTRLB
ora #%01000000
; FALLTROUGH
m65_iec_fast_slow_common:
sta VIC_CTRLB
pla
; FALLTROUGH
m65_iec_fast_slow_done:
rts
}
src/kernal/board_m65/mega65_speed.s
+105
View File
@@ -0,0 +1,105 @@
;; #LAYOUT# M65 KERNAL_0 #TAKE
;; #LAYOUT# * * #IGNORE
;
; Checks if system is in MEGA65 native mode; if so, switches CPU speed to fast/slow for IO routines
; Alters only status bits, all remaining registers preserved
;
; Entry points:
; - m65_speed_iec - at the start of IEC operations
; - m65_speed_tape_cbdos - at the start of tape or CBDOS operations
; - m65_speed_restore - restore current mode standard speed, hide VIC-IV for compatibility mode
!ifdef CONFIG_IEC {
m65_speed_iec:
; If compatibility mode, unlock VIC-IV
jsr M65_MODEGET
pha
bcc @1
jsr viciv_unhide
@1:
; Switch CPU speed to approx. 1 MHz
lda #%01000000
trb VIC_CTRLB
; Disable badlines and slow interrupt emulation
lda #$00
sta MISC_EMU
; Return
pla
rts
}
m65_speed_tape_cbdos:
; If compatibility mode, unlock VIC-IV
jsr M65_MODEGET
pha
bcc @1
jsr viciv_unhide
@1:
; Just set the maximum possible speed
pha
bra m65_speed_restore_native
m65_speed_restore:
; Restore proper speed depending on the mode
jsr M65_MODEGET
pha
bcc m65_speed_restore_native
; FALLTROUGH
m65_speed_restore_compat:
; C64 compatibility mode - approx 1 MHz, badlines and slow interrupts enabled
lda #%01000000
trb VIC_CTRLB
; FALLTROUGH
m65_speed_ME_compat:
; Reenable badlines and slow interrupt emulation
lda #$03
sta MISC_EMU
; Hide the VIC-IV
sta VIC_KEY
; Return
pla
rts
m65_speed_restore_native:
; Native mode - maximum speed
lda #%01000000
tsb VIC_CTRLB
; All the special speed modes disable badlines and slow interrupts,
; so there is no need to restore them
pla
rts
src/kernal/errors.s
+2 -2
View File
@@ -91,8 +91,8 @@ kernalerror_TOP_MEM_RS232:
lda #K_ERR_TOP_MEM_RS232
!ifdef CONFIG_MB_M65 {
; If in native mode, switch back to fast mode
jsr m65_iec_fast
; Restore the proper speed
jsr m65_speed_restore
}
sec
rts
src/kernal/iec/iec_return.s
+2 -2
View File
@@ -26,8 +26,8 @@ iec_return_success:
+plx_trash_a
!ifdef CONFIG_MB_M65 {
; If in native mode, switch back to fast mode
jsr m65_iec_fast
; Restore the proper speed
jsr m65_speed_restore
}
; Report success
src/kernal/iec/iec_rx_byte.s
+6 -6
View File
@@ -17,8 +17,8 @@
iec_rx_dispatch:
!ifdef CONFIG_MB_M65 {
; If in native mode, switch to 1 MHz
jsr m65_iec_slow
; Ensure 1 Mhz mode and disabled badlines
jsr m65_speed_iec
}
lda IECPROTO
@@ -33,8 +33,8 @@ iec_rx_dispatch:
iec_rx_byte:
!ifdef CONFIG_MB_M65 { !ifndef CONFIG_IEC_JIFFYDOS {
; If in native mode, switch to 1 MHz
jsr m65_iec_slow
; Ensure 1 Mhz mode and disabled badlines
jsr m65_speed_iec
} }
; Store .X and .Y on the stack - preserve them
@@ -161,8 +161,8 @@ iec_rx_acknowledge:
iec_rx_end:
!ifdef CONFIG_MB_M65 {
; If in native mode, switch back to fast mode
jsr m65_iec_fast
; Restore the proper speed
jsr m65_speed_restore
}
+ply_trash_a
src/kernal/iec/iec_turnaround_to_listen.s
+2 -2
View File
@@ -21,8 +21,8 @@ iec_turnaround_to_listen:
sei
!ifdef CONFIG_MB_M65 {
; If in native mode, switch to 1 MHz
jsr m65_iec_slow
; Ensure 1 Mhz mode and disabled badlines
jsr m65_speed_iec
}
; Pull DATA, release CLK and ATN (we are not sending commands)
src/kernal/iec/iec_tx_byte.s
+4 -4
View File
@@ -20,8 +20,8 @@ iec_tx_dispatch:
php ; preserve C flag for EOI indication
!ifdef CONFIG_MB_M65 {
; If in native mode, switch to 1 MHz
jsr m65_iec_slow
; Ensure 1 Mhz mode and disabled badlines
jsr m65_speed_iec
}
lda IECPROTO
@@ -41,9 +41,9 @@ iec_tx_dispatch:
iec_tx_byte:
!ifdef CONFIG_MB_M65 { !ifndef CONFIG_IEC_JIFFYDOS {
; If in native mode, switch to 1 MHz
; Ensure 1 Mhz mode and disabled badlines
php
jsr m65_iec_slow
jsr m65_speed_iec
plp
} }
src/kernal/iec/iec_tx_command.s
+2 -2
View File
@@ -39,8 +39,8 @@ iec_tx_command:
; and transmits a byte
!ifdef CONFIG_MB_M65 {
; If in native mode, switch to 1 MHz
jsr m65_iec_slow
; Ensure 1 Mhz mode and disabled badlines
jsr m65_speed_iec
}
clc ; Carry flag set is used for EOI mark
jmp iec_tx_common
src/kernal/iec_fast/dolphindos_load.s
+4 -4
View File
@@ -29,8 +29,8 @@ dolphindos_load:
}
!ifdef CONFIG_MB_M65 {
; If in native mode, switch to 1 MHz
jsr m65_iec_slow
; Ensure 1 Mhz mode and disabled badlines
jsr m65_speed_iec
}
; FALLTROUGH
@@ -115,8 +115,8 @@ dolphindos_load_no_eoi:
dolphindos_load_end:
!ifdef CONFIG_MB_M65 {
; If in native mode, switch back to fast mode
jsr m65_iec_fast
; Restore the proper speed
jsr m65_speed_restore
}
; Update EAL
clc
src/kernal/iec_fast/jiffydos_load.s
+4 -8
View File
@@ -87,10 +87,6 @@ jiffydos_load:
; A trick to shorten EAL update time
ldy #$FF
!ifdef CONFIG_MB_M65 {
; If in native mode, switch to 1 MHz
jsr m65_iec_fast
}
; FALLTROUGH
jiffydos_load_loop_esc:
@@ -195,8 +191,8 @@ jiffydos_load_end:
ldy #$FF
!ifdef CONFIG_MB_M65 {
; If in native mode, switch to 1 MHz
jsr m65_iec_slow
; Ensure 1 Mhz mode and disabled badlines
jsr m65_speed_iec
}
; FALLTROUGH
@@ -280,8 +276,8 @@ jiffydos_load_loop:
jiffydos_load_end:
!ifdef CONFIG_MB_M65 {
; If in native mode, switch back to fast mode
jsr m65_iec_fast
; Restore the proper speed
jsr m65_speed_restore
}
; Save last byte
tax
src/kernal/iec_fast/jiffydos_wait_line.s
+4
View File
@@ -13,6 +13,8 @@
jiffydos_wait_line:
!ifdef CONFIG_MB_M65 { ; MEGA65 does not need to wait, but has to waste few cycles
; One might try to optimize the code by checking for disabled screen
; (bit 4 of VIC_SCROLY); problem: VIC checks this bit only once per frame:
; - https://www.lemon64.com/forum/viewtopic.php?t=56582
@@ -31,5 +33,7 @@ jiffydos_wait_line:
jiffydos_wait_line_done:
}
rts
}