docs(arnitech): the controller's code is in the mc64blade build too

ARNITECH_CONTROLLER is on in mc64 and mc64blade, so the headers of the
controller's, the TOD's, and the network's code, the jump table's, and
CONFIG.md no longer say mc64 only.

CONFIG.md

@@ -291,7 +291,7 @@ Feature needs 2 bytes in KERNAL segmment (for CPUs needing the patch), but at th
 
 ### `ARNITECH_CONTROLLER`
 
-For the mc64 computers of arnitech only, whose expansion port holds the Arnitech controller at `$DE80`. IOINIT puts CIA #1's TOD on 50 Hz and, if the controller's signature `"ARNI"` is at `$DE80`, sets the TOD from the controller's clock. The Arnitech jump table at `$FF00` (`src/kernal/arnitech/ff00.arnitech_jumptable.s`) wraps the controller's registers, and sends and receives Ethernet frames through the CS8900A of a Network Card at the RR-Net socket, `$DE02-$DE0F`.
+For the mc64 Computers and Blades of arnitech only, the `mc64` and `mc64blade` configurations, whose expansion port holds the Arnitech controller at `$DE80`. IOINIT puts CIA #1's TOD on 50 Hz and, if the controller's signature `"ARNI"` is at `$DE80`, sets the TOD from the controller's clock. The Arnitech jump table at `$FF00` (`src/kernal/arnitech/ff00.arnitech_jumptable.s`) wraps the controller's registers, and sends and receives Ethernet frames through the CS8900A of a Network Card at the RR-Net socket, `$DE02-$DE0F`.
 
 Feature needs about 450 bytes in KERNAL segment, and the page at `$FF00`. Disable on any other machine.
 

src/kernal/arnitech/arnitech_controller.s

@@ -2,7 +2,7 @@
 ;; #LAYOUT# *   *        #IGNORE
 
 ;
-; The Arnitech controller (mc64 only, arnitech's ADR 0023): its signature and its Slot table
+; The Arnitech controller (mc64 and mc64blade, arnitech's ADR 0023): its signature and its Slot table
 ;
 
 !ifdef CONFIG_ARNITECH_CONTROLLER {

src/kernal/arnitech/arnitech_net.s

@@ -2,10 +2,10 @@
 ;; #LAYOUT# *   *        #IGNORE
 
 ;
-; The network entries of the Arnitech jump table (mc64 only, arnitech's ADR 0027): whole
-; Ethernet frames through the CS8900A at the RR-Net socket, polled, from the Destination
-; Address to the end of the data, without the CRC. The chip is found by its Product ID, so
-; the routines find an RR-Net on any C64 that has one. Register semantics are the CS8900A
+; The network entries of the Arnitech jump table (mc64 and mc64blade, arnitech's ADR 0027):
+; whole Ethernet frames through the CS8900A at the RR-Net socket, polled, from the Destination
+; Address to the end of the data, without the CRC. The chip is found by its Product ID, so the
+; routines find an RR-Net on any C64 that has one. Register semantics are the CS8900A
 ; datasheet's (Cirrus Logic DS271F5) and its 8-bit mode's (AN181).
 ;
 ; SAL holds the pointer to the frame or buffer, EAL the bytes left, as LOAD and SAVE use them.

src/kernal/arnitech/arnitech_tod.s

@@ -2,7 +2,7 @@
 ;; #LAYOUT# *   *        #IGNORE
 
 ;
-; CIA1's TOD from the Arnitech controller's real time (mc64 only, arnitech's ADR 0023)
+; CIA1's TOD from the Arnitech controller's real time (mc64 and mc64blade, arnitech's ADR 0023)
 ;
 ; The controller lays its time out as the TOD reads it, so the copy goes hours first, which stops
 ; the TOD, and tenths last, which starts it. The CIA flips the PM bit when an hour of 12 is

src/kernal/arnitech/ff00.arnitech_jumptable.s

@@ -2,9 +2,10 @@
 ;; #LAYOUT# *   *        #IGNORE
 
 ;
-; The Arnitech jump table (mc64 only): thin wrappers over the Arnitech controller's registers
-; (arnitech's ADR 0023), at fixed addresses. Software finds it by reading "ARNI" at $FF00 with
-; the KERNAL banked in; on any other KERNAL it uses the registers themselves, which work the same.
+; The Arnitech jump table (mc64 and mc64blade): thin wrappers over the Arnitech controller's
+; registers (arnitech's ADR 0023), at fixed addresses. Software finds it by reading "ARNI" at
+; $FF00 with the KERNAL banked in; on any other KERNAL it uses the registers themselves, which
+; work the same.
 ; Entries are only ever added, after the last, with the version and count raised; $FF48-$FF80
 ; stay clear, for the stock IRQ entry, CINT, and the KERNAL revision byte.
 ;