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monitor command 'F' adaptation, not tested yet

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FeralChild64 authored and FeralChild64 committed 2021-01-26 00:03:07 +01:00
1 parent 733943308a
commit f3a9052066
13 files changed
+240 -141
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src/kernal/board_m65/mega65_proxies_monitor.s
+6
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@@ -34,3 +34,9 @@ proxy_M1_memread:
jsr map_NORMAL
lda [Long__TMP], z
bra proxy_M1_end
proxy_M1_memwrite:
jsr map_NORMAL
sta [Long__TMP], z
bra proxy_M1_end
src/mon_m65/,aliases_mon.s
+35 -33
View File
@@ -10,54 +10,56 @@
; * Register storage *
; ********************
!addr Adr_Mode = 2 ; $00 = 64K address, $80 = M65 flat address ; XXX adapt the implementation
!addr PCH = 3
!addr PCL = 4
!addr SR = 5
!addr AC = 6
!addr XR = 7
!addr YR = 8
!addr ZR = 9
!addr BP = 10
!addr SPH = 11
!addr SPL = 12
!addr Addr_Mode = 2 ; $00 = 64K address, $80 = M65 flat address
!addr PCH = 3
!addr PCL = 4
!addr SR = 5
!addr AC = 6
!addr XR = 7
!addr YR = 8
!addr ZR = 9
!addr BP = 10
!addr SPH = 11
!addr SPL = 12
; *******************
; * Other variables *
; *******************
!addr Src_Addr_Mode = 13 ; Addr_Mode for 1st address
!addr Dst_Addr_Mode = 14 ; Addr_Mode for 2nd address
!addr MODE_80 = 15 ; 80 column / 40 volumn flag
; A set of 32 bit variables also used as 32 bit pointer
!addr Long_AC = $10 ; 32 bit accumulator
!addr Long_CT = $14 ; 32 bit counter
!addr Long_PC = $18 ; 32 bit program counter
!addr Long_DA = $1C ; 32 bit data pointer
!addr Long_AC = $10 ; 32 bit accumulator
!addr Long_CT = $14 ; 32 bit counter
!addr Long_PC = $18 ; 32 bit program counter
!addr Long_DA = $1C ; 32 bit data pointer
; Flags are used in BBR BBS instructions
!addr Adr_Flags = $20
!addr Mode_Flags = $21
!addr Op_Code = $22
!addr Op_Flag = $23 ; 7: two operands
!addr Adr_Flags = $20
!addr Mode_Flags = $21
!addr Op_Code = $22
!addr Op_Flag = $23 ; 7: two operands
; 6: long branch
; 5: 32 bit address
; 4: Q register
!addr Op_Size = $24
!addr Dig_Cnt = $25
!addr Buf_Index = $26
!addr Op_Size = $24
!addr Dig_Cnt = $25
!addr Buf_Index = $26
!addr MODE_80 = $27 ; 80 column / 40 volumn flag ; XXX add routine to detect this
!addr SP_Storage = $28 ; location to preserve stack pointer
!addr SP_Storage = $27 ; location to preserve stack pointer
!addr X_Vector = $29 ; monitor exit vector
!addr Ix_Mne = $2B ; index to mnemonics table
!addr Op_Mne = $2C ; 3 bytes for mnemonic
!addr Op_Ix = $2F ; type of constant
!addr Op_Len = $30 ; length of operand
!addr X_Vector = $28 ; monitor exit vector
!addr Ix_Mne = $2A ; index to mnemonics table
!addr Op_Mne = $2B ; 3 bytes for mnemonic
!addr Op_Ix = $2E ; type of constant
!addr Op_Len = $2F ; length of operand
; $31-$63 - free space, unused for now
; $30-$63 - free space, unused for now
!addr Long_TMP = $64 ; temporary pointer, for fetching/storing memory content; has to be the same as Long__TMP in Kernal
!addr Mon_Data = $68 ; 40 bytes, buffer for hunt
!addr Long_TMP = $64 ; temporary pointer, for fetching/storing memory content; has to be the same as Long__TMP in Kernal
!addr Mon_Data = $68 ; 40 bytes, buffer for hunt
src/mon_m65/bsmon.s
+6 -47
View File
@@ -18,7 +18,7 @@ Mon_Call:
; set default addressing mode to 64K
LDA #0
STA Adr_Mode
STA Addr_Mode
; clear register for monitor call
@@ -433,7 +433,7 @@ Mon_Set_Register: ; XXX this needs adaptation
@loop JSR Get_LAC
BCS @exit
LDA Long_AC
STA Adr_Mode,Y
STA Addr_Mode,Y
INY
CPY #9
BCC @loop
@@ -554,7 +554,7 @@ Dump_Row:
Mon_Transfer:
; ***********
JSR Param_Range ; Long_PC = source
JSR Get_Param_Range ; Long_PC = source
LBCS Mon_Error ; Long_CT = count
JSR Get_LAC ; Long_AC = target
LBCS Mon_Error
@@ -587,7 +587,7 @@ Mon_Transfer:
Mon_Compare:
; **********
JSR Param_Range ; Long_PC = source
JSR Get_Param_Range ; Long_PC = source
LBCS Mon_Error ; Long_CT = count
JSR Get_LAC ; Long_AC = target
LBCS Mon_Error
@@ -607,7 +607,7 @@ Mon_Compare:
Mon_Hunt:
; *******
JSR Param_Range ; Long_PC = start
JSR Get_Param_Range ; Long_PC = start
LBCS Mon_Error ; Long_CT = count
LDY #0
JSR Get_Char
@@ -738,23 +738,6 @@ Load_Save:
; STA SA ; and ignore load address from file
; BRA @do
; *******
Mon_Fill:
; *******
JSR Param_Range ; Long_PC = target
LBCS Mon_Error ; Long_CT = count
JSR Get_LAC ; Long_AC = fill byte
LBCS Mon_Error
JSR Print_CR
LDZ #0
@loop LDA Long_AC
STA [Long_PC],Z
JSR Inc_LPC
JSR Dec_LCT
BPL @loop
JMP Main
; ***********
Mon_Assemble:
; ***********
@@ -1680,7 +1663,7 @@ Read_Number: ; XXX obsolete, to be replaced
Print_LPC_Addr: ; prints out the address in PC
; *************
bbr7 Adr_Mode, @short
bbr7 Addr_Mode, @short
lda Long_PC+3
jsr Print_Hex_Low_Digit
@@ -1850,30 +1833,6 @@ Inc_LPC_Page:
Inc_LPC_Page_return
RTS
; **********
Param_Range:
; **********
; read two (address) parameters
; Long_CT = difference (2nd. minus 1st.)
; Long_PC = 1st. parameter
; Long_DA = 2nd. parameter
; carry on exit flags error
JSR Get_LAC ; get 1st. parameter
BCS @error
JSR LAC_To_LPC ; Long_PC = 1st. address
JSR Get_LAC
BCS @error
JSR LAC_To_LDA ; Long_DA = 2nd. address
JSR LAC_Minus_LPC ; Long_CT = range
BCC @error
CLC
RTS
@error SEC
RTS
; ********
Converter:
src/mon_m65/imports.s
+1
View File
@@ -11,6 +11,7 @@
;; #ALIAS# monitor_exit = KERNAL_0.m65_shadow_BZP
;; #ALIAS# monitor_memread_helper = KERNAL_0.proxy_M1_memread
;; #ALIAS# monitor_memwrite_helper = KERNAL_0.proxy_M1_memwrite
;; #ALIAS# CHRIN = KERNAL_0.proxy_M1_CHRIN
;; #ALIAS# CHROUT = KERNAL_0.proxy_M1_CHROUT
src/mon_m65/mon_command_bits.s
+3 -3
View File
@@ -5,10 +5,10 @@
Mon_Bits:
jsr Set_MODE_80
lda Adr_Mode
lda Addr_Mode
pha ; store addressing mode, in case no parameter is given
lda #$00
sta Adr_Mode ; by default use C64-style addressing
sta Addr_Mode ; by default use C64-style addressing
jsr Get_Addr_To_LAC ; get 1st parameter (start address)
beq @nopar
@@ -19,7 +19,7 @@ Mon_Bits:
@nopar:
pla ; retrieve old addressing mode
sta Adr_Mode
sta Addr_Mode
@start:
src/mon_m65/mon_command_disassemble.s
+4 -3
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@@ -1,12 +1,13 @@
; Based on BSM (Bit Shifter's Monitor)
Mon_Disassemble:
lda Adr_Mode
lda Addr_Mode
pha ; store addressing mode, in case no parameter is given
lda #$00
sta Adr_Mode ; by default use C64-style addressing
sta Addr_Mode ; by default use C64-style addressing
jsr Get_Addr_To_LAC ; get 1st parameter (start address)
beq @nopar
@@ -21,7 +22,7 @@ Mon_Disassemble:
@nopar:
pla ; retrieve old addressing mode
sta Adr_Mode
sta Addr_Mode
@norange:
src/mon_m65/mon_command_fill.s
+31
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@@ -0,0 +1,31 @@
; Based on BSM (Bit Shifter's Monitor)
; *******
Mon_Fill:
; *******
jsr Get_Param_Range ; Long_PC = target
+bcs Mon_Error ; Long_CT = count
jsr Get_Addr_To_LAC ; Long_AC = fill byte
+beq Mon_Error
lda Long_AC+1
ora Long_AC+2
ora Long_AC+3
+bne Mon_Error ; only 1 fill byte allowed
jsr Print_CR
ldz #$00
@loop:
lda Long_AC
jsr Put_To_Memory
jsr Inc_LPC
jsr Dec_LCT
bpl @loop
jmp Main
src/mon_m65/mon_command_memory.s
+2 -1
View File
@@ -1,11 +1,12 @@
; Based on BSM (Bit Shifter's Monitor)
Mon_Memory:
jsr Set_MODE_80
lda #$00
sta Adr_Mode ; by default use C64-style addressing
sta Addr_Mode ; by default use C64-style addressing
jsr Get_Addr_To_LAC ; get 1st parameter (start address)
+beq Mon_Error
src/mon_m65/mon_debug.s
+1 -1
View File
@@ -29,7 +29,7 @@ DBG_print_long_pc:
jsr PRIMM
!pet " addr mode : ", 0
lda Adr_Mode
lda Addr_Mode
jsr Print_Hex
jsr PRIMM
src/mon_m65/mon_disabled.s
+1
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@@ -1,6 +1,7 @@
; Based on BSM (Bit Shifter's Monitor) - disabled code
!ifdef DISABLED_DISABLED {
!addr Disk_Track = $XX ; logical track 1 -> 255
src/mon_m65/mon_helper_get_addr_to_lac.s
+2 -1
View File
@@ -1,6 +1,7 @@
; Based on BSM (Bit Shifter's Monitor)
Get_Addr_To_LAC:
phx
@@ -133,7 +134,7 @@ Get_Addr_To_LAC:
@set_long_mode:
lda #$80 ; set addressing mode to long
sta Adr_Mode
sta Addr_Mode
@check_done:
src/mon_m65/mon_helper_get_param_range.s
+42
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@@ -0,0 +1,42 @@
; Based on BSM (Bit Shifter's Monitor)
Get_Param_Range:
; read two (address) parameters
; Long_CT - difference (2nd minus 1st parameter)
; Long_PC - 1st parameter
; Src_Addr_Mode - 1st parameter addressing mode
; Long_DA - 2nd parameter
; Dst_Addr_Mode - 2nd parameter addressing mode
; carry on exit - 2nd parameter lower than 1st one
jsr @get_helper
sta Src_Addr_Mode
jsr LAC_To_LPC ; Long_PC - 1st address
jsr @get_helper
sta Dst_Addr_Mode
jsr LAC_To_LDA ; Long_PC - 2nd address
jsr LAC_Minus_LPC ; Long_CT = range
bcc @error
clc
rts
@error:
sec
rts
@get_helper:
lda #$00
sta Addr_Mode
jsr Get_Addr_To_LAC
beq @error
lda Addr_Mode
rts
src/mon_m65/mon_helper_memory.s
+106 -52
View File
@@ -10,6 +10,74 @@ Get_From_Memory:
; Copy PC + .Z to TMP, set .Z to 0
jsr Get_Put_Memory_Prepare
; Check addressing mode
bbs7 Addr_Mode, @mode_flat
@mode_64k:
lda #$00 ; make sure this is 64K address
sta Long_TMP+2
sta Long_TMP+3
lda Long_TMP+1
bne @read_64k ; branch if no need to handle shadow memory (not zero page)
lda Long_TMP+0
dec
dec
cmp #$8E
bcs @read_64k ; branch if no need to handle shadow memory (0, 1, or above $8F)
@1:
bra @read_shadow
@mode_flat:
lda Long_TMP+3
ora Long_TMP+2
ora Long_TMP+1
bne @read_flat
lda Long_TMP+0
dec
dec
cmp #$8E
bcs @read_flat
bra @1
@read_64k:
bbr7 Long_TMP+1, @read_flat ; below $8000 we do not want to retrieve MAP/EOM banked memory
bra @read
@read_shadow:
jsr Get_Put_Memory_Prepare_Shadow
@read_flat:
jsr monitor_memread_helper
bra Get_Put_Memory_End
@read:
lda (Long_TMP),Z
; FALLTROUGH
Get_Put_Memory_End:
plz
ply
plx
rts
Get_Put_Memory_Prepare:
; Copy PC + .Z to TMP, set .Z to 0
clc
tza
adc Long_PC+0
@@ -26,47 +94,11 @@ Get_From_Memory:
ldz #$00
; Check addressing mode
rts
bbs7 Adr_Mode, @mode_flat
Get_Put_Memory_Prepare_Shadow:
@mode_64k:
lda #$00 ; make sure this is 64K address
sta Long_TMP+2
sta Long_TMP+3
lda Long_TMP+1
bne @read_64k ; branch if no need to handle shadow memory (not zero page)
lda Long_TMP+0
dec
dec
cmp #$8E
bcs @read_64k ; branch if no need to handle shadow memory (0, 1, or above $8F)
@2:
sta Long_TMP+0
bra @read_shadow
@mode_flat:
lda Long_TMP+3
ora Long_TMP+2
ora Long_TMP+1
bne @read_flat
lda Long_TMP+0
dec
dec
cmp #$8E
bcs @read_flat
bra @2
@read_64k:
bbr7 Long_TMP+1, @read_flat ; below $8000 we do not want to retrieve MAP/EOM banked memory
bra @read
@read_shadow:
lda #MEMCONF_SHADOW_BZP_1
sta Long_TMP+1
@@ -75,18 +107,40 @@ Get_From_Memory:
lda #MEMCONF_SHADOW_BZP_3
sta Long_TMP+3
@read_flat:
jsr monitor_memread_helper
bra @end
@read:
lda (Long_TMP),Z
@end:
plz
ply
plx
rts
Put_To_Memory:
phx
phy
phz
pha
; Copy PC + .Z to TMP, set .Z to 0
jsr Get_Put_Memory_Prepare
; Check if address is related to shadow zeropage
lda Long_TMP+1
ora Long_TMP+2
ora Long_TMP+3
beq @write_flat
lda Long_TMP+0
dec
dec
cmp #$8E
bcs @write_flat
@write_shadow:
jsr Get_Put_Memory_Prepare_Shadow
@write_flat:
pla
jsr monitor_memwrite_helper
bra Get_Put_Memory_End