81 lines
2.1 KiB
ArmAsm
81 lines
2.1 KiB
ArmAsm
;; #LAYOUT# STD * #TAKE
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;; #LAYOUT# * KERNAL_0 #TAKE
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;; #LAYOUT# * * #IGNORE
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; Resources describing the C64 reset sequence:
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; https://www.c64-wiki.com/wiki/Reset_(Process)
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hw_entry_reset:
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; The GPL program at https://github.com/Klaus2m5/6502_65C02_functional_tests/blob/master/6502_functional_test.a65
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; uses the similar initial reset sequence, affirmed by c64 PRG p269
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sei ; disable the interrupts, as fast as possible - they are disabled in case of HW reset,
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; but this routine can be also called manually
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cld ; required for all CPUs - due to possibility of manual call
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lda #$00
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sta NMINV+1 ; soft-disable custom NMI interrupt handler
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!ifdef HAS_OPCODES_65CE02 {
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see ; disable extended stack
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}
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ldx #$FF
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txs
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!ifdef CONFIG_MB_M65 {
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jsr m65_reset_part
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}
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!ifdef CONFIG_PLATFORM_COMMODORE_64 {
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; The following routine is based on reading the public KERNAL jumptable routine
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; list, and making unimaginative assumptions about what should be done on reset.
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; Also, https://codebase64.org/doku.php?id=base:assembling_your_own_cart_rom_image was used
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; as it shows example startup sequence, to be followe by cartridge creators
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; C64 PRG p269
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jsr cartridge_check
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bne @1
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jmp (ICART_COLD_START)
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@1:
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; Disable the screen (and set 40 columns) to prevent visual glitches later
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ldx #$28
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stx VIC_SCROLX
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}
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; Initialising IO is obviously required. Also indicated by c64 prg p269.
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jsr JIOINIT
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!ifdef CONFIG_MB_M65 {
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jsr m65_reset_common ; RAMTAS, RESTOR, CINT
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clc
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jsr M65_MODESET ; on MEGA65 go to native mode by default
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} else {
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; Setting up the screen and testing ram is obviously required
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; also affirmed by p269 of c64 prg
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jsr JRAMTAS ; called RANTAM on Codebase64 wiki
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; Resetting IO vectors is obviously required, if we want interrupts to run
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; also affirmed by c64 prg p269
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jsr JRESTOR
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; "Compute's Mapping the 64" p236
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jsr JCINT
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}
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; What do we do when finished? A C64 jumps into the BASIC ROM
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cli ; allow interrupts to happen
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; c64 prg p269
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jmp (IBASIC_COLD_START)
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