reset-related fixes
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@@ -3,8 +3,6 @@
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; Reset (hardware initialization) to be used when Open ROMs is used under hypervisor
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; XXX size-optimize this; share code with regular reset
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m65_hypervisor_reset:
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@@ -13,6 +11,9 @@ m65_hypervisor_reset:
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sei ; disable the interrupts, as fast as possible
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cld ; Kernal is not designed to operate in decimal mode
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lda #$00
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sta NMINV+1 ; soft-disable custom NMI interrupt handler
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; Do not reset the stack (see, ldx #$FF, txs) - we need to know where to return
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jsr m65_reset_part ; init MEGA65 specific hardware, shutdown VIC-IV, clear native mode mark
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@@ -20,9 +21,7 @@ m65_hypervisor_reset:
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stx VIC_SCROLX
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jsr IOINIT_skip_DOS ; better not to initialize DOS under hypervisor, risk of incompatibility
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jsr JRAMTAS
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jsr JRESTOR
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jsr JCINT
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jsr m65_reset_common ; RAMTAS, RESTOR, CINT
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; Restore hypervisor memory mapping and quit
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@@ -42,3 +41,9 @@ m65_hypervisor_reset:
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cli
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rts
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m65_reset_common:
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jsr JRAMTAS
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jsr JRESTOR
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jmp JCINT
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@@ -16,6 +16,9 @@ hw_entry_reset:
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cld ; required for all CPUs - due to possibility of manual call
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lda #$00
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sta NMINV+1 ; soft-disable custom NMI interrupt handler
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!ifdef HAS_OPCODES_65CE02 {
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see ; disable extended stack
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@@ -49,6 +52,15 @@ hw_entry_reset:
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; Initialising IO is obviously required. Also indicated by c64 prg p269.
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jsr JIOINIT
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!ifdef CONFIG_MB_M65 {
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jsr m65_reset_common ; RAMTAS, RESTOR, CINT
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clc
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jsr M65_MODESET ; on MEGA65 go to native mode by default
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} else {
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; Setting up the screen and testing ram is obviously required
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; also affirmed by p269 of c64 prg
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jsr JRAMTAS ; called RANTAM on Codebase64 wiki
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@@ -59,12 +71,8 @@ hw_entry_reset:
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; "Compute's Mapping the 64" p236
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jsr JCINT
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!ifdef CONFIG_MB_M65 {
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clc
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jsr M65_MODESET ; on MEGA65 go to native mode by default
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}
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; What do we do when finished? A C64 jumps into the BASIC ROM
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cli ; allow interrupts to happen
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@@ -15,16 +15,12 @@ hw_entry_nmi:
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; Call interrupt routine (only if initialised)
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pha
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!ifndef CONFIG_MB_M65 { ; XXX temporarily disabled for MEGA65, seems to cause crash during startup - to be investigated
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lda NMINV+1 ; consider zeropage NMI address as uninitialized vector
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beq @1 ; this allows safer interrupt vector modifications
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pla
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jmp (NMINV)
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@1:
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}
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; Vector not initialized - call default interrupt routine
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pla
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jmp default_nmi_handler
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