chris
b7fef8abe6
A Blade reads the 65816's native-mode vectors from the RAM under the KERNAL at $FFE4-$FFEF. native_vectors_init puts handlers' addresses there: IRQ and NMI save A, X, and Y at full width, the direct page, and the data bank, push the frame an emulation-mode interrupt makes, and run the KERNAL's handlers through CINV and NMINV in 8-bit native mode, whose RTI comes back to restore everything. BRK, COP, and ABORT go to the BRK handler, which on a Blade first sets the direct page and data bank to 0 and returns to emulation mode.
107 lines
3.1 KiB
ArmAsm
107 lines
3.1 KiB
ArmAsm
;; #LAYOUT# STD * #TAKE
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;; #LAYOUT# * * #IGNORE
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;
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; The 65816's native-mode interrupts on a Blade (mc64blade only, arnitech's ADR 0029 and 0030)
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;
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; In native mode the 65816 fetches its vectors from $FFE4-$FFEF, where the KERNAL's jump table
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; has its JMPs, so a Blade reads them from the RAM under the KERNAL, which CINT fills. A program
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; that switches to native mode with interrupts on keeps running: the IRQ and NMI handlers save
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; the registers, the direct page, and the data bank, run the KERNAL's handlers through CINV and
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; NMINV in 8-bit native mode on direct page 0 and data bank 0, and return with RTI. BRK, COP, and
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; ABORT go to the BRK handler, which returns to emulation mode and to READY. The code here runs
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; only on a 65816, so its own opcodes are bytes.
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;
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!ifdef CONFIG_ARNITECH_BLADE {
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native_vectors_init:
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ldx #(__native_vector_table_end - native_vector_table - 1)
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@1:
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lda native_vector_table, x
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sta NATIVE_VECTORS, x ; with the KERNAL banked in, the write reaches the RAM under it
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dex
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bpl @1
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rts
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native_vector_table:
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!word default_brk_handler ; COP
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!word default_brk_handler ; BRK
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!word default_brk_handler ; ABORT
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!word native_nmi ; NMI
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!word default_brk_handler ; reserved
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!word native_irq ; IRQ
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__native_vector_table_end:
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;
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; IRQ and NMI in native mode, with any register widths: the registers go on the stack whole,
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; then a frame as an IRQ or NMI makes it in emulation mode, whose RTI comes back to native_return.
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;
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native_irq:
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!byte $C2, $30 ; REP #$30: 16-bit A, X, and Y
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pha
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!byte $A9 ; LDA #: the handler's address, less one, for RTS
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!word native_irq_kernal - 1
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!byte $80 ; BRA native_save
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!byte native_save - (* + 1)
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native_nmi:
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!byte $C2, $30 ; REP #$30
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pha
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!byte $A9 ; LDA #
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!word hw_entry_nmi - 1
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; FALLTROUGH
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native_save:
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!byte $DA ; PHX
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!byte $5A ; PHY
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!byte $8B ; PHB
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!byte $0B ; PHD
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tax ; the handler's address, 16 bits
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!byte $F4, $00, $00 ; PEA $0000
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!byte $2B ; PLD: direct page 0
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!byte $E2, $20 ; SEP #$20: 8-bit A
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lda #$00
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pha
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!byte $AB ; PLB: data bank 0
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; The frame the KERNAL's handler returns through: program bank, address, status (8-bit A,
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; X, and Y, interrupts off)
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pha
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!byte $F4 ; PEA native_return
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!word native_return
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lda #$34
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pha
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!byte $DA ; PHX: the handler's address, for RTS
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!byte $E2, $30 ; SEP #$30: 8-bit X and Y
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rts
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native_irq_kernal:
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; The KERNAL's IRQ handlers end by pulling Y, X, and A, as hw_entry_irq pushes them
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pha
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pha
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pha
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jmp (CINV)
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native_return:
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!byte $C2, $30 ; REP #$30
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!byte $2B ; PLD
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!byte $AB ; PLB
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!byte $7A ; PLY
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!byte $FA ; PLX
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pla
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rti
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}
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