more work towards JiffyDOS

This commit is contained in:
FeralChild64 committed 2019-11-12 22:28:27 +01:00
1 parent da088c0d3c
commit 67e82f2846
6 files changed
+59 -41

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+31 -31
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@@ -10,30 +10,28 @@
#if CONFIG_IEC_JIFFYDOS
// JiffyDOS timing regime is very strict - before transmitting anything
// we need to disable sprites and (if screen is not disabled) wait for
// appropriate moment, so that no badline interruption can happen
iec_tx_byte_jiffydos:
// XXX disable screen - temporary, just for testing
tay
lda VIC_SCROLY
and #($FF - $10)
sta VIC_SCROLY
lda VIC_RASTER
!:
cmp VIC_RASTER
beq !-
tya
// JiffyDOS timing regime is very strict - before transmitting anything
// we need to disable sprites and (if screen is not disabled) wait for
// appropriate moment, so that no badline interruption can happen
jsr jiffydos_hide_sprites
pha // store previous sprite status on stack
// XXX prepare bit pairs too send
// XXX lda TBTCNT
// XXX bits to stack: 0, 2
// XXX bits to stack: 1, 3
// XXX bits to stack: 7, 6
// XXX bits to stack: 5, 4
jsr jiffydos_wait_line
__jd_check1:
// XXX send byte
@@ -50,24 +48,25 @@ __jd_check1:
iec_rx_byte_jiffydos:
// XXX disable screen - temporary, just for testing
lda VIC_SCROLY
and #($FF - $10)
sta VIC_SCROLY
lda VIC_RASTER
!:
cmp VIC_RASTER
beq !-
// JiffyDOS timing regime is very strict - before transmitting anything
// we need to disable sprites and (if screen is not disabled) wait for
// appropriate moment, so that no badline interruption can happen
jsr jiffydos_hide_sprites
pha // store previous sprite status on stack
// Wait until device is ready to send
jsr iec_wait_for_clk_release
// Prepare 'start sending' message
lda CIA2_PRA
and #$FF - BIT_CIA2_PRA_DAT_OUT // release
pha
// Wait for appropriate moment
jsr jiffydos_wait_line
// Ask device to start sending bits
pla
sta CIA2_PRA
// XXX retrieve byte
@@ -95,7 +94,8 @@ jiffydos_wait_line:
// To give the transfer routine as much time as possible,
// wait till a badline
// XXX this has to be carefully tested!
// XXX this is probably overkill, most likely it is enough to avoid 2 (3?) lines
// before badline - to be adjusted in the future
!:
sec
lda VIC_SCROLY
@@ -104,7 +104,7 @@ jiffydos_wait_line:
bne !-
jiffydos_wait_line_done:
rts // XXX 6 cycles... we might be forced to inline this routine
rts
__jd_check2:
+1 -1
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@@ -75,7 +75,7 @@ iec_jiffydos_detect_loop:
lda CIA2_PRA // 4 cycles
bpl iec_jiffydos_detected // 2 cycles
dey // 2 cycles
bne iec_jiffydos_detect_loop // 2 cyycles
bne iec_jiffydos_detect_loop // 2 cycles
lda #$00 // 2 cycles
beq iec_jiffydos_store_proto // 3 cycles, branch always
-9
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@@ -16,15 +16,6 @@ iec_tx_command:
phx_trash_a
phy_trash_a
#if CONFIG_IEC_JIFFYDOS
// With each and every command, check whether device wants to talk JiffyDOS protocol
lda #$FF // unknown protocol
sta IECPROTO
#endif // CONFIG_IEC_JIFFYDOS
// Notify all devices that we are going to send a byte
// and it is going to be a command (pulled ATN)
jsr iec_pull_atn_clk_release_data
+13
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@@ -29,6 +29,19 @@ TALK:
common_talk_listen: // common part of TALK and LISTEN
sta TBTCNT
#if CONFIG_IEC_JIFFYDOS
// It seems that only TALK/LISTEN is used to detect the JiffyDOS support
lda #$FF // unknown protocol - check what is supported
sta IECPROTO
// FALLTROUGH
#endif // CONFIG_IEC_JIFFYDOS
jmp iec_tx_command
#else
+7
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@@ -18,6 +18,13 @@ UNLSN:
// According to serial-bus.pdf (page 15) this routine flushes the IEC out buffer
jsr iec_tx_flush
#if CONFIG_IEC_JIFFYDOS
lda #$00 // switch back to standard protocol
sta IECPROTO
#endif
// Buffer empty, send the command
lda #$3F
+7
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@@ -18,6 +18,13 @@ UNTLK:
// According to serial-bus.pdf (page 15) this routine flushes the IEC out buffer
jsr iec_tx_flush
#if CONFIG_IEC_JIFFYDOS
lda #$00 // switch back to standard protocol
sta IECPROTO
#endif
// Buffer empty, send the command
lda #$5F